1 /* $FreeBSD$ */ 2 3 /*- 4 * Copyright (c) 2005, 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/cdefs.h> 21 __FBSDID("$FreeBSD$"); 22 23 /*- 24 * Ralink Technology RT2560 chipset driver 25 * http://www.ralinktech.com/ 26 */ 27 28 #include <sys/param.h> 29 #include <sys/sysctl.h> 30 #include <sys/sockio.h> 31 #include <sys/mbuf.h> 32 #include <sys/kernel.h> 33 #include <sys/socket.h> 34 #include <sys/systm.h> 35 #include <sys/malloc.h> 36 #include <sys/lock.h> 37 #include <sys/module.h> 38 #include <sys/bus.h> 39 #include <sys/endian.h> 40 41 #if defined(__DragonFly__) 42 /* empty */ 43 #else 44 #include <machine/bus.h> 45 #include <machine/resource.h> 46 #endif 47 #include <sys/rman.h> 48 49 #include <net/bpf.h> 50 #include <net/if.h> 51 #include <net/if_var.h> 52 #include <net/if_arp.h> 53 #include <net/ethernet.h> 54 #include <net/if_dl.h> 55 #include <net/if_media.h> 56 #include <net/if_types.h> 57 58 #include <netproto/802_11/ieee80211_var.h> 59 #include <netproto/802_11/ieee80211_radiotap.h> 60 #include <netproto/802_11/ieee80211_regdomain.h> 61 #include <netproto/802_11/ieee80211_ratectl.h> 62 63 #include <netinet/in.h> 64 #include <netinet/in_systm.h> 65 #include <netinet/in_var.h> 66 #include <netinet/ip.h> 67 #include <netinet/if_ether.h> 68 69 #include <dev/netif/ral/rt2560reg.h> 70 #include <dev/netif/ral/rt2560var.h> 71 72 #define RT2560_RSSI(sc, rssi) \ 73 ((rssi) > (RT2560_NOISE_FLOOR + (sc)->rssi_corr) ? \ 74 ((rssi) - RT2560_NOISE_FLOOR - (sc)->rssi_corr) : 0) 75 76 #define RAL_DEBUG 77 #ifdef RAL_DEBUG 78 #define DPRINTF(sc, fmt, ...) do { \ 79 if (sc->sc_debug > 0) \ 80 kprintf(fmt, __VA_ARGS__); \ 81 } while (0) 82 #define DPRINTFN(sc, n, fmt, ...) do { \ 83 if (sc->sc_debug >= (n)) \ 84 kprintf(fmt, __VA_ARGS__); \ 85 } while (0) 86 #else 87 #define DPRINTF(sc, fmt, ...) 88 #define DPRINTFN(sc, n, fmt, ...) 89 #endif 90 91 static struct ieee80211vap *rt2560_vap_create(struct ieee80211com *, 92 const char [IFNAMSIZ], int, enum ieee80211_opmode, 93 int, const uint8_t [IEEE80211_ADDR_LEN], 94 const uint8_t [IEEE80211_ADDR_LEN]); 95 static void rt2560_vap_delete(struct ieee80211vap *); 96 static void rt2560_dma_map_addr(void *, bus_dma_segment_t *, int, 97 int); 98 static int rt2560_alloc_tx_ring(struct rt2560_softc *, 99 struct rt2560_tx_ring *, int); 100 static void rt2560_reset_tx_ring(struct rt2560_softc *, 101 struct rt2560_tx_ring *); 102 static void rt2560_free_tx_ring(struct rt2560_softc *, 103 struct rt2560_tx_ring *); 104 static int rt2560_alloc_rx_ring(struct rt2560_softc *, 105 struct rt2560_rx_ring *, int); 106 static void rt2560_reset_rx_ring(struct rt2560_softc *, 107 struct rt2560_rx_ring *); 108 static void rt2560_free_rx_ring(struct rt2560_softc *, 109 struct rt2560_rx_ring *); 110 static int rt2560_newstate(struct ieee80211vap *, 111 enum ieee80211_state, int); 112 static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 113 static void rt2560_encryption_intr(struct rt2560_softc *); 114 static void rt2560_tx_intr(struct rt2560_softc *); 115 static void rt2560_prio_intr(struct rt2560_softc *); 116 static void rt2560_decryption_intr(struct rt2560_softc *); 117 static void rt2560_rx_intr(struct rt2560_softc *); 118 static void rt2560_beacon_update(struct ieee80211vap *, int item); 119 static void rt2560_beacon_expire(struct rt2560_softc *); 120 static void rt2560_wakeup_expire(struct rt2560_softc *); 121 static void rt2560_scan_start(struct ieee80211com *); 122 static void rt2560_scan_end(struct ieee80211com *); 123 static void rt2560_set_channel(struct ieee80211com *); 124 static void rt2560_setup_tx_desc(struct rt2560_softc *, 125 struct rt2560_tx_desc *, uint32_t, int, int, int, 126 bus_addr_t); 127 static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 128 struct ieee80211_node *); 129 static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 130 struct ieee80211_node *); 131 static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 132 struct ieee80211_node *); 133 static int rt2560_transmit(struct ieee80211com *, struct mbuf *); 134 static void rt2560_start(struct rt2560_softc *); 135 static void rt2560_watchdog(void *); 136 static void rt2560_parent(struct ieee80211com *); 137 static void rt2560_bbp_write(struct rt2560_softc *, uint8_t, 138 uint8_t); 139 static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 140 static void rt2560_rf_write(struct rt2560_softc *, uint8_t, 141 uint32_t); 142 static void rt2560_set_chan(struct rt2560_softc *, 143 struct ieee80211_channel *); 144 #if 0 145 static void rt2560_disable_rf_tune(struct rt2560_softc *); 146 #endif 147 static void rt2560_enable_tsf_sync(struct rt2560_softc *); 148 static void rt2560_enable_tsf(struct rt2560_softc *); 149 static void rt2560_update_plcp(struct rt2560_softc *); 150 static void rt2560_update_slot(struct ieee80211com *); 151 static void rt2560_set_basicrates(struct rt2560_softc *, 152 const struct ieee80211_rateset *); 153 static void rt2560_update_led(struct rt2560_softc *, int, int); 154 static void rt2560_set_bssid(struct rt2560_softc *, const uint8_t *); 155 static void rt2560_set_macaddr(struct rt2560_softc *, 156 const uint8_t *); 157 static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 158 static void rt2560_update_promisc(struct ieee80211com *); 159 static const char *rt2560_get_rf(int); 160 static void rt2560_read_config(struct rt2560_softc *); 161 static int rt2560_bbp_init(struct rt2560_softc *); 162 static void rt2560_set_txantenna(struct rt2560_softc *, int); 163 static void rt2560_set_rxantenna(struct rt2560_softc *, int); 164 static void rt2560_init_locked(struct rt2560_softc *); 165 static void rt2560_init(void *); 166 static void rt2560_stop_locked(struct rt2560_softc *); 167 static int rt2560_raw_xmit(struct ieee80211_node *, struct mbuf *, 168 const struct ieee80211_bpf_params *); 169 170 static const struct { 171 uint32_t reg; 172 uint32_t val; 173 } rt2560_def_mac[] = { 174 RT2560_DEF_MAC 175 }; 176 177 static const struct { 178 uint8_t reg; 179 uint8_t val; 180 } rt2560_def_bbp[] = { 181 RT2560_DEF_BBP 182 }; 183 184 static const uint32_t rt2560_rf2522_r2[] = RT2560_RF2522_R2; 185 static const uint32_t rt2560_rf2523_r2[] = RT2560_RF2523_R2; 186 static const uint32_t rt2560_rf2524_r2[] = RT2560_RF2524_R2; 187 static const uint32_t rt2560_rf2525_r2[] = RT2560_RF2525_R2; 188 static const uint32_t rt2560_rf2525_hi_r2[] = RT2560_RF2525_HI_R2; 189 static const uint32_t rt2560_rf2525e_r2[] = RT2560_RF2525E_R2; 190 static const uint32_t rt2560_rf2526_r2[] = RT2560_RF2526_R2; 191 static const uint32_t rt2560_rf2526_hi_r2[] = RT2560_RF2526_HI_R2; 192 193 static const struct { 194 uint8_t chan; 195 uint32_t r1, r2, r4; 196 } rt2560_rf5222[] = { 197 RT2560_RF5222 198 }; 199 200 int 201 rt2560_attach(device_t dev, int id) 202 { 203 struct rt2560_softc *sc = device_get_softc(dev); 204 struct ieee80211com *ic = &sc->sc_ic; 205 uint8_t bands[IEEE80211_MODE_BYTES]; 206 int error; 207 208 sc->sc_dev = dev; 209 210 #if defined(__DragonFly__) 211 lockinit(&sc->sc_mtx, device_get_nameunit(dev), 0, LK_CANRECURSE); 212 #else 213 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 214 MTX_DEF | MTX_RECURSE); 215 #endif 216 217 callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0); 218 mbufq_init(&sc->sc_snd, ifqmaxlen); 219 220 /* retrieve RT2560 rev. no */ 221 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 222 223 /* retrieve RF rev. no and various other things from EEPROM */ 224 rt2560_read_config(sc); 225 226 device_printf(dev, "MAC/BBP RT2560 (rev 0x%02x), RF %s\n", 227 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 228 229 /* 230 * Allocate Tx and Rx rings. 231 */ 232 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 233 if (error != 0) { 234 device_printf(sc->sc_dev, "could not allocate Tx ring\n"); 235 goto fail1; 236 } 237 238 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 239 if (error != 0) { 240 device_printf(sc->sc_dev, "could not allocate ATIM ring\n"); 241 goto fail2; 242 } 243 244 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 245 if (error != 0) { 246 device_printf(sc->sc_dev, "could not allocate Prio ring\n"); 247 goto fail3; 248 } 249 250 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 251 if (error != 0) { 252 device_printf(sc->sc_dev, "could not allocate Beacon ring\n"); 253 goto fail4; 254 } 255 256 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 257 if (error != 0) { 258 device_printf(sc->sc_dev, "could not allocate Rx ring\n"); 259 goto fail5; 260 } 261 262 /* retrieve MAC address */ 263 rt2560_get_macaddr(sc, ic->ic_macaddr); 264 265 ic->ic_softc = sc; 266 ic->ic_name = device_get_nameunit(dev); 267 ic->ic_opmode = IEEE80211_M_STA; 268 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 269 270 /* set device capabilities */ 271 ic->ic_caps = 272 IEEE80211_C_STA /* station mode */ 273 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 274 | IEEE80211_C_HOSTAP /* hostap mode */ 275 | IEEE80211_C_MONITOR /* monitor mode */ 276 | IEEE80211_C_AHDEMO /* adhoc demo mode */ 277 | IEEE80211_C_WDS /* 4-address traffic works */ 278 | IEEE80211_C_MBSS /* mesh point link mode */ 279 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 280 | IEEE80211_C_SHSLOT /* short slot time supported */ 281 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 282 | IEEE80211_C_BGSCAN /* capable of bg scanning */ 283 #ifdef notyet 284 | IEEE80211_C_TXFRAG /* handle tx frags */ 285 #endif 286 ; 287 288 memset(bands, 0, sizeof(bands)); 289 setbit(bands, IEEE80211_MODE_11B); 290 setbit(bands, IEEE80211_MODE_11G); 291 if (sc->rf_rev == RT2560_RF_5222) 292 setbit(bands, IEEE80211_MODE_11A); 293 ieee80211_init_channels(ic, NULL, bands); 294 295 ieee80211_ifattach(ic); 296 ic->ic_raw_xmit = rt2560_raw_xmit; 297 ic->ic_updateslot = rt2560_update_slot; 298 ic->ic_update_promisc = rt2560_update_promisc; 299 ic->ic_scan_start = rt2560_scan_start; 300 ic->ic_scan_end = rt2560_scan_end; 301 ic->ic_set_channel = rt2560_set_channel; 302 303 ic->ic_vap_create = rt2560_vap_create; 304 ic->ic_vap_delete = rt2560_vap_delete; 305 ic->ic_parent = rt2560_parent; 306 ic->ic_transmit = rt2560_transmit; 307 308 ieee80211_radiotap_attach(ic, 309 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 310 RT2560_TX_RADIOTAP_PRESENT, 311 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 312 RT2560_RX_RADIOTAP_PRESENT); 313 314 /* 315 * Add a few sysctl knobs. 316 */ 317 #ifdef RAL_DEBUG 318 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 319 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 320 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs"); 321 #endif 322 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 323 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 324 "txantenna", CTLFLAG_RW, &sc->tx_ant, 0, "tx antenna (0=auto)"); 325 326 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 327 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 328 "rxantenna", CTLFLAG_RW, &sc->rx_ant, 0, "rx antenna (0=auto)"); 329 330 if (bootverbose) 331 ieee80211_announce(ic); 332 333 return 0; 334 335 fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 336 fail4: rt2560_free_tx_ring(sc, &sc->prioq); 337 fail3: rt2560_free_tx_ring(sc, &sc->atimq); 338 fail2: rt2560_free_tx_ring(sc, &sc->txq); 339 #if defined(__DragonFly__) 340 fail1: lockuninit(&sc->sc_mtx); 341 #else 342 fail1: mtx_destroy(&sc->sc_mtx); 343 #endif 344 345 return ENXIO; 346 } 347 348 int 349 rt2560_detach(void *xsc) 350 { 351 struct rt2560_softc *sc = xsc; 352 struct ieee80211com *ic = &sc->sc_ic; 353 354 rt2560_stop(sc); 355 356 ieee80211_ifdetach(ic); 357 mbufq_drain(&sc->sc_snd); 358 359 rt2560_free_tx_ring(sc, &sc->txq); 360 rt2560_free_tx_ring(sc, &sc->atimq); 361 rt2560_free_tx_ring(sc, &sc->prioq); 362 rt2560_free_tx_ring(sc, &sc->bcnq); 363 rt2560_free_rx_ring(sc, &sc->rxq); 364 365 #if defined(__DragonFly__) 366 lockuninit(&sc->sc_mtx); 367 #else 368 mtx_destroy(&sc->sc_mtx); 369 #endif 370 371 return 0; 372 } 373 374 static struct ieee80211vap * 375 rt2560_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 376 enum ieee80211_opmode opmode, int flags, 377 const uint8_t bssid[IEEE80211_ADDR_LEN], 378 const uint8_t mac[IEEE80211_ADDR_LEN]) 379 { 380 struct rt2560_softc *sc = ic->ic_softc; 381 struct rt2560_vap *rvp; 382 struct ieee80211vap *vap; 383 384 switch (opmode) { 385 case IEEE80211_M_STA: 386 case IEEE80211_M_IBSS: 387 case IEEE80211_M_AHDEMO: 388 case IEEE80211_M_MONITOR: 389 case IEEE80211_M_HOSTAP: 390 case IEEE80211_M_MBSS: 391 /* XXXRP: TBD */ 392 if (!TAILQ_EMPTY(&ic->ic_vaps)) { 393 device_printf(sc->sc_dev, "only 1 vap supported\n"); 394 return NULL; 395 } 396 if (opmode == IEEE80211_M_STA) 397 flags |= IEEE80211_CLONE_NOBEACONS; 398 break; 399 case IEEE80211_M_WDS: 400 if (TAILQ_EMPTY(&ic->ic_vaps) || 401 ic->ic_opmode != IEEE80211_M_HOSTAP) { 402 device_printf(sc->sc_dev, 403 "wds only supported in ap mode\n"); 404 return NULL; 405 } 406 /* 407 * Silently remove any request for a unique 408 * bssid; WDS vap's always share the local 409 * mac address. 410 */ 411 flags &= ~IEEE80211_CLONE_BSSID; 412 break; 413 default: 414 device_printf(sc->sc_dev, "unknown opmode %d\n", opmode); 415 return NULL; 416 } 417 rvp = kmalloc(sizeof(struct rt2560_vap), M_80211_VAP, 418 M_WAITOK | M_ZERO); 419 vap = &rvp->ral_vap; 420 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid); 421 422 /* override state transition machine */ 423 rvp->ral_newstate = vap->iv_newstate; 424 vap->iv_newstate = rt2560_newstate; 425 vap->iv_update_beacon = rt2560_beacon_update; 426 427 ieee80211_ratectl_init(vap); 428 /* complete setup */ 429 ieee80211_vap_attach(vap, ieee80211_media_change, 430 ieee80211_media_status, mac); 431 if (TAILQ_FIRST(&ic->ic_vaps) == vap) 432 ic->ic_opmode = opmode; 433 return vap; 434 } 435 436 static void 437 rt2560_vap_delete(struct ieee80211vap *vap) 438 { 439 struct rt2560_vap *rvp = RT2560_VAP(vap); 440 441 ieee80211_ratectl_deinit(vap); 442 ieee80211_vap_detach(vap); 443 kfree(rvp, M_80211_VAP); 444 } 445 446 void 447 rt2560_resume(void *xsc) 448 { 449 struct rt2560_softc *sc = xsc; 450 451 if (sc->sc_ic.ic_nrunning > 0) 452 rt2560_init(sc); 453 } 454 455 static void 456 rt2560_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 457 { 458 if (error != 0) 459 return; 460 461 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 462 463 *(bus_addr_t *)arg = segs[0].ds_addr; 464 } 465 466 static int 467 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 468 int count) 469 { 470 int i, error; 471 472 ring->count = count; 473 ring->queued = 0; 474 ring->cur = ring->next = 0; 475 ring->cur_encrypt = ring->next_encrypt = 0; 476 477 #if defined(__DragonFly__) 478 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 479 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 480 count * RT2560_TX_DESC_SIZE, 1, count * RT2560_TX_DESC_SIZE, 481 0, &ring->desc_dmat); 482 #else 483 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 484 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 485 count * RT2560_TX_DESC_SIZE, 1, count * RT2560_TX_DESC_SIZE, 486 0, NULL, NULL, &ring->desc_dmat); 487 #endif 488 if (error != 0) { 489 device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 490 goto fail; 491 } 492 493 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 494 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 495 if (error != 0) { 496 device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 497 goto fail; 498 } 499 500 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 501 count * RT2560_TX_DESC_SIZE, rt2560_dma_map_addr, &ring->physaddr, 502 0); 503 if (error != 0) { 504 device_printf(sc->sc_dev, "could not load desc DMA map\n"); 505 goto fail; 506 } 507 508 ring->data = kmalloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 509 M_INTWAIT | M_ZERO); 510 if (ring->data == NULL) { 511 device_printf(sc->sc_dev, "could not allocate soft data\n"); 512 error = ENOMEM; 513 goto fail; 514 } 515 516 #if defined(__DragonFly__) 517 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 518 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 519 MCLBYTES, RT2560_MAX_SCATTER, MCLBYTES, 0, 520 &ring->data_dmat); 521 #else 522 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 523 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 524 MCLBYTES, RT2560_MAX_SCATTER, MCLBYTES, 0, NULL, NULL, 525 &ring->data_dmat); 526 #endif 527 if (error != 0) { 528 device_printf(sc->sc_dev, "could not create data DMA tag\n"); 529 goto fail; 530 } 531 532 for (i = 0; i < count; i++) { 533 error = bus_dmamap_create(ring->data_dmat, 0, 534 &ring->data[i].map); 535 if (error != 0) { 536 device_printf(sc->sc_dev, "could not create DMA map\n"); 537 goto fail; 538 } 539 } 540 541 return 0; 542 543 fail: rt2560_free_tx_ring(sc, ring); 544 return error; 545 } 546 547 static void 548 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 549 { 550 struct rt2560_tx_desc *desc; 551 struct rt2560_tx_data *data; 552 int i; 553 554 for (i = 0; i < ring->count; i++) { 555 desc = &ring->desc[i]; 556 data = &ring->data[i]; 557 558 if (data->m != NULL) { 559 bus_dmamap_sync(ring->data_dmat, data->map, 560 BUS_DMASYNC_POSTWRITE); 561 bus_dmamap_unload(ring->data_dmat, data->map); 562 m_freem(data->m); 563 data->m = NULL; 564 } 565 566 if (data->ni != NULL) { 567 ieee80211_free_node(data->ni); 568 data->ni = NULL; 569 } 570 571 desc->flags = 0; 572 } 573 574 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 575 576 ring->queued = 0; 577 ring->cur = ring->next = 0; 578 ring->cur_encrypt = ring->next_encrypt = 0; 579 } 580 581 static void 582 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 583 { 584 struct rt2560_tx_data *data; 585 int i; 586 587 if (ring->desc != NULL) { 588 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 589 BUS_DMASYNC_POSTWRITE); 590 bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 591 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 592 } 593 594 if (ring->desc_dmat != NULL) 595 bus_dma_tag_destroy(ring->desc_dmat); 596 597 if (ring->data != NULL) { 598 for (i = 0; i < ring->count; i++) { 599 data = &ring->data[i]; 600 601 if (data->m != NULL) { 602 bus_dmamap_sync(ring->data_dmat, data->map, 603 BUS_DMASYNC_POSTWRITE); 604 bus_dmamap_unload(ring->data_dmat, data->map); 605 m_freem(data->m); 606 } 607 608 if (data->ni != NULL) 609 ieee80211_free_node(data->ni); 610 611 if (data->map != NULL) 612 bus_dmamap_destroy(ring->data_dmat, data->map); 613 } 614 615 kfree(ring->data, M_DEVBUF); 616 } 617 618 if (ring->data_dmat != NULL) 619 bus_dma_tag_destroy(ring->data_dmat); 620 } 621 622 static int 623 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 624 int count) 625 { 626 struct rt2560_rx_desc *desc; 627 struct rt2560_rx_data *data; 628 bus_addr_t physaddr; 629 int i, error; 630 631 ring->count = count; 632 ring->cur = ring->next = 0; 633 ring->cur_decrypt = 0; 634 635 #if defined(__DragonFly__) 636 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 637 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 638 count * RT2560_RX_DESC_SIZE, 1, count * RT2560_RX_DESC_SIZE, 639 0, &ring->desc_dmat); 640 #else 641 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 642 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 643 count * RT2560_RX_DESC_SIZE, 1, count * RT2560_RX_DESC_SIZE, 644 0, NULL, NULL, &ring->desc_dmat); 645 #endif 646 if (error != 0) { 647 device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 648 goto fail; 649 } 650 651 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 652 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 653 if (error != 0) { 654 device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 655 goto fail; 656 } 657 658 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 659 count * RT2560_RX_DESC_SIZE, rt2560_dma_map_addr, &ring->physaddr, 660 0); 661 if (error != 0) { 662 device_printf(sc->sc_dev, "could not load desc DMA map\n"); 663 goto fail; 664 } 665 666 ring->data = kmalloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 667 M_INTWAIT | M_ZERO); 668 if (ring->data == NULL) { 669 device_printf(sc->sc_dev, "could not allocate soft data\n"); 670 error = ENOMEM; 671 goto fail; 672 } 673 674 /* 675 * Pre-allocate Rx buffers and populate Rx ring. 676 */ 677 #if defined(__DragonFly__) 678 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 679 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, MCLBYTES, 680 1, MCLBYTES, 0, &ring->data_dmat); 681 #else 682 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 683 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 684 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat); 685 #endif 686 if (error != 0) { 687 device_printf(sc->sc_dev, "could not create data DMA tag\n"); 688 goto fail; 689 } 690 691 for (i = 0; i < count; i++) { 692 desc = &sc->rxq.desc[i]; 693 data = &sc->rxq.data[i]; 694 695 error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 696 if (error != 0) { 697 device_printf(sc->sc_dev, "could not create DMA map\n"); 698 goto fail; 699 } 700 701 data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 702 if (data->m == NULL) { 703 device_printf(sc->sc_dev, 704 "could not allocate rx mbuf\n"); 705 error = ENOMEM; 706 goto fail; 707 } 708 709 error = bus_dmamap_load(ring->data_dmat, data->map, 710 mtod(data->m, void *), MCLBYTES, rt2560_dma_map_addr, 711 &physaddr, 0); 712 if (error != 0) { 713 device_printf(sc->sc_dev, 714 "could not load rx buf DMA map"); 715 goto fail; 716 } 717 718 desc->flags = htole32(RT2560_RX_BUSY); 719 desc->physaddr = htole32(physaddr); 720 } 721 722 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 723 724 return 0; 725 726 fail: rt2560_free_rx_ring(sc, ring); 727 return error; 728 } 729 730 static void 731 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 732 { 733 int i; 734 735 for (i = 0; i < ring->count; i++) { 736 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 737 ring->data[i].drop = 0; 738 } 739 740 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 741 742 ring->cur = ring->next = 0; 743 ring->cur_decrypt = 0; 744 } 745 746 static void 747 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 748 { 749 struct rt2560_rx_data *data; 750 int i; 751 752 if (ring->desc != NULL) { 753 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 754 BUS_DMASYNC_POSTWRITE); 755 bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 756 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 757 } 758 759 if (ring->desc_dmat != NULL) 760 bus_dma_tag_destroy(ring->desc_dmat); 761 762 if (ring->data != NULL) { 763 for (i = 0; i < ring->count; i++) { 764 data = &ring->data[i]; 765 766 if (data->m != NULL) { 767 bus_dmamap_sync(ring->data_dmat, data->map, 768 BUS_DMASYNC_POSTREAD); 769 bus_dmamap_unload(ring->data_dmat, data->map); 770 m_freem(data->m); 771 } 772 773 if (data->map != NULL) 774 bus_dmamap_destroy(ring->data_dmat, data->map); 775 } 776 777 kfree(ring->data, M_DEVBUF); 778 } 779 780 if (ring->data_dmat != NULL) 781 bus_dma_tag_destroy(ring->data_dmat); 782 } 783 784 static int 785 rt2560_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 786 { 787 struct rt2560_vap *rvp = RT2560_VAP(vap); 788 struct rt2560_softc *sc = vap->iv_ic->ic_softc; 789 int error; 790 791 if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) { 792 /* abort TSF synchronization */ 793 RAL_WRITE(sc, RT2560_CSR14, 0); 794 795 /* turn association led off */ 796 rt2560_update_led(sc, 0, 0); 797 } 798 799 error = rvp->ral_newstate(vap, nstate, arg); 800 801 if (error == 0 && nstate == IEEE80211_S_RUN) { 802 struct ieee80211_node *ni = vap->iv_bss; 803 struct mbuf *m; 804 805 if (vap->iv_opmode != IEEE80211_M_MONITOR) { 806 rt2560_update_plcp(sc); 807 rt2560_set_basicrates(sc, &ni->ni_rates); 808 rt2560_set_bssid(sc, ni->ni_bssid); 809 } 810 811 if (vap->iv_opmode == IEEE80211_M_HOSTAP || 812 vap->iv_opmode == IEEE80211_M_IBSS || 813 vap->iv_opmode == IEEE80211_M_MBSS) { 814 m = ieee80211_beacon_alloc(ni); 815 if (m == NULL) { 816 device_printf(sc->sc_dev, 817 "could not allocate beacon\n"); 818 return ENOBUFS; 819 } 820 ieee80211_ref_node(ni); 821 error = rt2560_tx_bcn(sc, m, ni); 822 if (error != 0) 823 return error; 824 } 825 826 /* turn association led on */ 827 rt2560_update_led(sc, 1, 0); 828 829 if (vap->iv_opmode != IEEE80211_M_MONITOR) 830 rt2560_enable_tsf_sync(sc); 831 else 832 rt2560_enable_tsf(sc); 833 } 834 return error; 835 } 836 837 /* 838 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 839 * 93C66). 840 */ 841 static uint16_t 842 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 843 { 844 uint32_t tmp; 845 uint16_t val; 846 int n; 847 848 /* clock C once before the first command */ 849 RT2560_EEPROM_CTL(sc, 0); 850 851 RT2560_EEPROM_CTL(sc, RT2560_S); 852 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 853 RT2560_EEPROM_CTL(sc, RT2560_S); 854 855 /* write start bit (1) */ 856 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 857 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 858 859 /* write READ opcode (10) */ 860 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 861 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 862 RT2560_EEPROM_CTL(sc, RT2560_S); 863 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 864 865 /* write address (A5-A0 or A7-A0) */ 866 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 867 for (; n >= 0; n--) { 868 RT2560_EEPROM_CTL(sc, RT2560_S | 869 (((addr >> n) & 1) << RT2560_SHIFT_D)); 870 RT2560_EEPROM_CTL(sc, RT2560_S | 871 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 872 } 873 874 RT2560_EEPROM_CTL(sc, RT2560_S); 875 876 /* read data Q15-Q0 */ 877 val = 0; 878 for (n = 15; n >= 0; n--) { 879 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 880 tmp = RAL_READ(sc, RT2560_CSR21); 881 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 882 RT2560_EEPROM_CTL(sc, RT2560_S); 883 } 884 885 RT2560_EEPROM_CTL(sc, 0); 886 887 /* clear Chip Select and clock C */ 888 RT2560_EEPROM_CTL(sc, RT2560_S); 889 RT2560_EEPROM_CTL(sc, 0); 890 RT2560_EEPROM_CTL(sc, RT2560_C); 891 892 return val; 893 } 894 895 /* 896 * Some frames were processed by the hardware cipher engine and are ready for 897 * transmission. 898 */ 899 static void 900 rt2560_encryption_intr(struct rt2560_softc *sc) 901 { 902 struct rt2560_tx_desc *desc; 903 int hw; 904 905 /* retrieve last descriptor index processed by cipher engine */ 906 hw = RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr; 907 hw /= RT2560_TX_DESC_SIZE; 908 909 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map, 910 BUS_DMASYNC_POSTREAD); 911 912 while (sc->txq.next_encrypt != hw) { 913 if (sc->txq.next_encrypt == sc->txq.cur_encrypt) { 914 kprintf("hw encrypt %d, cur_encrypt %d\n", hw, 915 sc->txq.cur_encrypt); 916 break; 917 } 918 919 desc = &sc->txq.desc[sc->txq.next_encrypt]; 920 921 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 922 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY)) 923 break; 924 925 /* for TKIP, swap eiv field to fix a bug in ASIC */ 926 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) == 927 RT2560_TX_CIPHER_TKIP) 928 desc->eiv = bswap32(desc->eiv); 929 930 /* mark the frame ready for transmission */ 931 desc->flags |= htole32(RT2560_TX_VALID); 932 desc->flags |= htole32(RT2560_TX_BUSY); 933 934 DPRINTFN(sc, 15, "encryption done idx=%u\n", 935 sc->txq.next_encrypt); 936 937 sc->txq.next_encrypt = 938 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 939 } 940 941 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map, 942 BUS_DMASYNC_PREWRITE); 943 944 /* kick Tx */ 945 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 946 } 947 948 static void 949 rt2560_tx_intr(struct rt2560_softc *sc) 950 { 951 struct rt2560_tx_desc *desc; 952 struct rt2560_tx_data *data; 953 struct mbuf *m; 954 struct ieee80211vap *vap; 955 struct ieee80211_node *ni; 956 uint32_t flags; 957 int retrycnt, status; 958 959 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map, 960 BUS_DMASYNC_POSTREAD); 961 962 for (;;) { 963 desc = &sc->txq.desc[sc->txq.next]; 964 data = &sc->txq.data[sc->txq.next]; 965 966 flags = le32toh(desc->flags); 967 if ((flags & RT2560_TX_BUSY) || 968 (flags & RT2560_TX_CIPHER_BUSY) || 969 !(flags & RT2560_TX_VALID)) 970 break; 971 972 m = data->m; 973 ni = data->ni; 974 vap = ni->ni_vap; 975 976 switch (flags & RT2560_TX_RESULT_MASK) { 977 case RT2560_TX_SUCCESS: 978 retrycnt = 0; 979 980 DPRINTFN(sc, 10, "%s\n", "data frame sent successfully"); 981 if (data->rix != IEEE80211_FIXED_RATE_NONE) 982 ieee80211_ratectl_tx_complete(vap, ni, 983 IEEE80211_RATECTL_TX_SUCCESS, 984 &retrycnt, NULL); 985 status = 0; 986 break; 987 988 case RT2560_TX_SUCCESS_RETRY: 989 retrycnt = RT2560_TX_RETRYCNT(flags); 990 991 DPRINTFN(sc, 9, "data frame sent after %u retries\n", 992 retrycnt); 993 if (data->rix != IEEE80211_FIXED_RATE_NONE) 994 ieee80211_ratectl_tx_complete(vap, ni, 995 IEEE80211_RATECTL_TX_SUCCESS, 996 &retrycnt, NULL); 997 status = 0; 998 break; 999 1000 case RT2560_TX_FAIL_RETRY: 1001 retrycnt = RT2560_TX_RETRYCNT(flags); 1002 1003 DPRINTFN(sc, 9, "data frame failed after %d retries\n", 1004 retrycnt); 1005 if (data->rix != IEEE80211_FIXED_RATE_NONE) 1006 ieee80211_ratectl_tx_complete(vap, ni, 1007 IEEE80211_RATECTL_TX_FAILURE, 1008 &retrycnt, NULL); 1009 status = 1; 1010 break; 1011 1012 case RT2560_TX_FAIL_INVALID: 1013 case RT2560_TX_FAIL_OTHER: 1014 default: 1015 device_printf(sc->sc_dev, "sending data frame failed " 1016 "0x%08x\n", flags); 1017 status = 1; 1018 } 1019 1020 bus_dmamap_sync(sc->txq.data_dmat, data->map, 1021 BUS_DMASYNC_POSTWRITE); 1022 bus_dmamap_unload(sc->txq.data_dmat, data->map); 1023 1024 ieee80211_tx_complete(ni, m, status); 1025 data->ni = NULL; 1026 data->m = NULL; 1027 1028 /* descriptor is no longer valid */ 1029 desc->flags &= ~htole32(RT2560_TX_VALID); 1030 1031 DPRINTFN(sc, 15, "tx done idx=%u\n", sc->txq.next); 1032 1033 sc->txq.queued--; 1034 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 1035 } 1036 1037 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map, 1038 BUS_DMASYNC_PREWRITE); 1039 1040 if (sc->prioq.queued == 0 && sc->txq.queued == 0) 1041 sc->sc_tx_timer = 0; 1042 1043 if (sc->txq.queued < RT2560_TX_RING_COUNT - 1) 1044 rt2560_start(sc); 1045 } 1046 1047 static void 1048 rt2560_prio_intr(struct rt2560_softc *sc) 1049 { 1050 struct rt2560_tx_desc *desc; 1051 struct rt2560_tx_data *data; 1052 struct ieee80211_node *ni; 1053 struct mbuf *m; 1054 int flags; 1055 1056 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map, 1057 BUS_DMASYNC_POSTREAD); 1058 1059 for (;;) { 1060 desc = &sc->prioq.desc[sc->prioq.next]; 1061 data = &sc->prioq.data[sc->prioq.next]; 1062 1063 flags = le32toh(desc->flags); 1064 if ((flags & RT2560_TX_BUSY) || (flags & RT2560_TX_VALID) == 0) 1065 break; 1066 1067 switch (flags & RT2560_TX_RESULT_MASK) { 1068 case RT2560_TX_SUCCESS: 1069 DPRINTFN(sc, 10, "%s\n", "mgt frame sent successfully"); 1070 break; 1071 1072 case RT2560_TX_SUCCESS_RETRY: 1073 DPRINTFN(sc, 9, "mgt frame sent after %u retries\n", 1074 (flags >> 5) & 0x7); 1075 break; 1076 1077 case RT2560_TX_FAIL_RETRY: 1078 DPRINTFN(sc, 9, "%s\n", 1079 "sending mgt frame failed (too much retries)"); 1080 break; 1081 1082 case RT2560_TX_FAIL_INVALID: 1083 case RT2560_TX_FAIL_OTHER: 1084 default: 1085 device_printf(sc->sc_dev, "sending mgt frame failed " 1086 "0x%08x\n", flags); 1087 break; 1088 } 1089 1090 bus_dmamap_sync(sc->prioq.data_dmat, data->map, 1091 BUS_DMASYNC_POSTWRITE); 1092 bus_dmamap_unload(sc->prioq.data_dmat, data->map); 1093 1094 m = data->m; 1095 data->m = NULL; 1096 ni = data->ni; 1097 data->ni = NULL; 1098 1099 /* descriptor is no longer valid */ 1100 desc->flags &= ~htole32(RT2560_TX_VALID); 1101 1102 DPRINTFN(sc, 15, "prio done idx=%u\n", sc->prioq.next); 1103 1104 sc->prioq.queued--; 1105 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1106 1107 if (m->m_flags & M_TXCB) 1108 ieee80211_process_callback(ni, m, 1109 (flags & RT2560_TX_RESULT_MASK) &~ 1110 (RT2560_TX_SUCCESS | RT2560_TX_SUCCESS_RETRY)); 1111 m_freem(m); 1112 ieee80211_free_node(ni); 1113 } 1114 1115 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map, 1116 BUS_DMASYNC_PREWRITE); 1117 1118 if (sc->prioq.queued == 0 && sc->txq.queued == 0) 1119 sc->sc_tx_timer = 0; 1120 1121 if (sc->prioq.queued < RT2560_PRIO_RING_COUNT) 1122 rt2560_start(sc); 1123 } 1124 1125 /* 1126 * Some frames were processed by the hardware cipher engine and are ready for 1127 * handoff to the IEEE802.11 layer. 1128 */ 1129 static void 1130 rt2560_decryption_intr(struct rt2560_softc *sc) 1131 { 1132 struct ieee80211com *ic = &sc->sc_ic; 1133 struct rt2560_rx_desc *desc; 1134 struct rt2560_rx_data *data; 1135 bus_addr_t physaddr; 1136 struct ieee80211_frame *wh; 1137 struct ieee80211_node *ni; 1138 struct mbuf *mnew, *m; 1139 int hw, error; 1140 int8_t rssi, nf; 1141 1142 /* retrieve last descriptor index processed by cipher engine */ 1143 hw = RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr; 1144 hw /= RT2560_RX_DESC_SIZE; 1145 1146 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1147 BUS_DMASYNC_POSTREAD); 1148 1149 for (; sc->rxq.cur_decrypt != hw;) { 1150 desc = &sc->rxq.desc[sc->rxq.cur_decrypt]; 1151 data = &sc->rxq.data[sc->rxq.cur_decrypt]; 1152 1153 if ((le32toh(desc->flags) & RT2560_RX_BUSY) || 1154 (le32toh(desc->flags) & RT2560_RX_CIPHER_BUSY)) 1155 break; 1156 1157 if (data->drop) { 1158 #if defined(__DragonFly__) 1159 /* not implemeted */ 1160 #else 1161 counter_u64_add(ic->ic_ierrors, 1); 1162 #endif 1163 goto skip; 1164 } 1165 1166 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1167 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) { 1168 #if defined(__DragonFly__) 1169 /* not implemeted */ 1170 #else 1171 counter_u64_add(ic->ic_ierrors, 1); 1172 #endif 1173 goto skip; 1174 } 1175 1176 /* 1177 * Try to allocate a new mbuf for this ring element and load it 1178 * before processing the current mbuf. If the ring element 1179 * cannot be loaded, drop the received packet and reuse the old 1180 * mbuf. In the unlikely case that the old mbuf can't be 1181 * reloaded either, explicitly panic. 1182 */ 1183 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1184 if (mnew == NULL) { 1185 #if defined(__DragonFly__) 1186 /* not implemeted */ 1187 #else 1188 counter_u64_add(ic->ic_ierrors, 1); 1189 #endif 1190 goto skip; 1191 } 1192 1193 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 1194 BUS_DMASYNC_POSTREAD); 1195 bus_dmamap_unload(sc->rxq.data_dmat, data->map); 1196 1197 error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1198 mtod(mnew, void *), MCLBYTES, rt2560_dma_map_addr, 1199 &physaddr, 0); 1200 if (error != 0) { 1201 m_freem(mnew); 1202 1203 /* try to reload the old mbuf */ 1204 error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1205 mtod(data->m, void *), MCLBYTES, 1206 rt2560_dma_map_addr, &physaddr, 0); 1207 if (error != 0) { 1208 /* very unlikely that it will fail... */ 1209 panic("%s: could not load old rx mbuf", 1210 device_get_name(sc->sc_dev)); 1211 } 1212 #if defined(__DragonFly__) 1213 /* not implemeted */ 1214 #else 1215 counter_u64_add(ic->ic_ierrors, 1); 1216 #endif 1217 goto skip; 1218 } 1219 1220 /* 1221 * New mbuf successfully loaded, update Rx ring and continue 1222 * processing. 1223 */ 1224 m = data->m; 1225 data->m = mnew; 1226 desc->physaddr = htole32(physaddr); 1227 1228 /* finalize mbuf */ 1229 m->m_pkthdr.len = m->m_len = 1230 (le32toh(desc->flags) >> 16) & 0xfff; 1231 1232 rssi = RT2560_RSSI(sc, desc->rssi); 1233 nf = RT2560_NOISE_FLOOR; 1234 if (ieee80211_radiotap_active(ic)) { 1235 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1236 uint32_t tsf_lo, tsf_hi; 1237 1238 /* get timestamp (low and high 32 bits) */ 1239 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1240 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1241 1242 tap->wr_tsf = 1243 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1244 tap->wr_flags = 0; 1245 tap->wr_rate = ieee80211_plcp2rate(desc->rate, 1246 (desc->flags & htole32(RT2560_RX_OFDM)) ? 1247 IEEE80211_T_OFDM : IEEE80211_T_CCK); 1248 tap->wr_antenna = sc->rx_ant; 1249 tap->wr_antsignal = nf + rssi; 1250 tap->wr_antnoise = nf; 1251 } 1252 1253 sc->sc_flags |= RT2560_F_INPUT_RUNNING; 1254 RAL_UNLOCK(sc); 1255 wh = mtod(m, struct ieee80211_frame *); 1256 ni = ieee80211_find_rxnode(ic, 1257 (struct ieee80211_frame_min *)wh); 1258 if (ni != NULL) { 1259 (void) ieee80211_input(ni, m, rssi, nf); 1260 ieee80211_free_node(ni); 1261 } else 1262 (void) ieee80211_input_all(ic, m, rssi, nf); 1263 1264 RAL_LOCK(sc); 1265 sc->sc_flags &= ~RT2560_F_INPUT_RUNNING; 1266 skip: desc->flags = htole32(RT2560_RX_BUSY); 1267 1268 DPRINTFN(sc, 15, "decryption done idx=%u\n", sc->rxq.cur_decrypt); 1269 1270 sc->rxq.cur_decrypt = 1271 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1272 } 1273 1274 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1275 BUS_DMASYNC_PREWRITE); 1276 } 1277 1278 /* 1279 * Some frames were received. Pass them to the hardware cipher engine before 1280 * sending them to the 802.11 layer. 1281 */ 1282 static void 1283 rt2560_rx_intr(struct rt2560_softc *sc) 1284 { 1285 struct rt2560_rx_desc *desc; 1286 struct rt2560_rx_data *data; 1287 1288 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1289 BUS_DMASYNC_POSTREAD); 1290 1291 for (;;) { 1292 desc = &sc->rxq.desc[sc->rxq.cur]; 1293 data = &sc->rxq.data[sc->rxq.cur]; 1294 1295 if ((le32toh(desc->flags) & RT2560_RX_BUSY) || 1296 (le32toh(desc->flags) & RT2560_RX_CIPHER_BUSY)) 1297 break; 1298 1299 data->drop = 0; 1300 1301 if ((le32toh(desc->flags) & RT2560_RX_PHY_ERROR) || 1302 (le32toh(desc->flags) & RT2560_RX_CRC_ERROR)) { 1303 /* 1304 * This should not happen since we did not request 1305 * to receive those frames when we filled RXCSR0. 1306 */ 1307 DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n", 1308 le32toh(desc->flags)); 1309 data->drop = 1; 1310 } 1311 1312 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1313 DPRINTFN(sc, 5, "%s\n", "bad length"); 1314 data->drop = 1; 1315 } 1316 1317 /* mark the frame for decryption */ 1318 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1319 1320 DPRINTFN(sc, 15, "rx done idx=%u\n", sc->rxq.cur); 1321 1322 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1323 } 1324 1325 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1326 BUS_DMASYNC_PREWRITE); 1327 1328 /* kick decrypt */ 1329 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1330 } 1331 1332 static void 1333 rt2560_beacon_update(struct ieee80211vap *vap, int item) 1334 { 1335 struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off; 1336 1337 setbit(bo->bo_flags, item); 1338 } 1339 1340 /* 1341 * This function is called periodically in IBSS mode when a new beacon must be 1342 * sent out. 1343 */ 1344 static void 1345 rt2560_beacon_expire(struct rt2560_softc *sc) 1346 { 1347 struct ieee80211com *ic = &sc->sc_ic; 1348 struct rt2560_tx_data *data; 1349 1350 if (ic->ic_opmode != IEEE80211_M_IBSS && 1351 ic->ic_opmode != IEEE80211_M_HOSTAP && 1352 ic->ic_opmode != IEEE80211_M_MBSS) 1353 return; 1354 1355 data = &sc->bcnq.data[sc->bcnq.next]; 1356 /* 1357 * Don't send beacon if bsschan isn't set 1358 */ 1359 if (data->ni == NULL) 1360 return; 1361 1362 bus_dmamap_sync(sc->bcnq.data_dmat, data->map, BUS_DMASYNC_POSTWRITE); 1363 bus_dmamap_unload(sc->bcnq.data_dmat, data->map); 1364 1365 /* XXX 1 =>'s mcast frames which means all PS sta's will wakeup! */ 1366 ieee80211_beacon_update(data->ni, data->m, 1); 1367 1368 rt2560_tx_bcn(sc, data->m, data->ni); 1369 1370 DPRINTFN(sc, 15, "%s", "beacon expired\n"); 1371 1372 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT; 1373 } 1374 1375 /* ARGSUSED */ 1376 static void 1377 rt2560_wakeup_expire(struct rt2560_softc *sc) 1378 { 1379 DPRINTFN(sc, 2, "%s", "wakeup expired\n"); 1380 } 1381 1382 void 1383 rt2560_intr(void *arg) 1384 { 1385 struct rt2560_softc *sc = arg; 1386 uint32_t r; 1387 1388 RAL_LOCK(sc); 1389 1390 /* disable interrupts */ 1391 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1392 1393 /* don't re-enable interrupts if we're shutting down */ 1394 if (!(sc->sc_flags & RT2560_F_RUNNING)) { 1395 RAL_UNLOCK(sc); 1396 return; 1397 } 1398 1399 r = RAL_READ(sc, RT2560_CSR7); 1400 RAL_WRITE(sc, RT2560_CSR7, r); 1401 1402 if (r & RT2560_BEACON_EXPIRE) 1403 rt2560_beacon_expire(sc); 1404 1405 if (r & RT2560_WAKEUP_EXPIRE) 1406 rt2560_wakeup_expire(sc); 1407 1408 if (r & RT2560_ENCRYPTION_DONE) 1409 rt2560_encryption_intr(sc); 1410 1411 if (r & RT2560_TX_DONE) 1412 rt2560_tx_intr(sc); 1413 1414 if (r & RT2560_PRIO_DONE) 1415 rt2560_prio_intr(sc); 1416 1417 if (r & RT2560_DECRYPTION_DONE) 1418 rt2560_decryption_intr(sc); 1419 1420 if (r & RT2560_RX_DONE) { 1421 rt2560_rx_intr(sc); 1422 rt2560_encryption_intr(sc); 1423 } 1424 1425 /* re-enable interrupts */ 1426 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1427 1428 RAL_UNLOCK(sc); 1429 } 1430 1431 #define RAL_SIFS 10 /* us */ 1432 1433 #define RT2560_TXRX_TURNAROUND 10 /* us */ 1434 1435 static uint8_t 1436 rt2560_plcp_signal(int rate) 1437 { 1438 switch (rate) { 1439 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1440 case 12: return 0xb; 1441 case 18: return 0xf; 1442 case 24: return 0xa; 1443 case 36: return 0xe; 1444 case 48: return 0x9; 1445 case 72: return 0xd; 1446 case 96: return 0x8; 1447 case 108: return 0xc; 1448 1449 /* CCK rates (NB: not IEEE std, device-specific) */ 1450 case 2: return 0x0; 1451 case 4: return 0x1; 1452 case 11: return 0x2; 1453 case 22: return 0x3; 1454 } 1455 return 0xff; /* XXX unsupported/unknown rate */ 1456 } 1457 1458 static void 1459 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1460 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1461 { 1462 struct ieee80211com *ic = &sc->sc_ic; 1463 uint16_t plcp_length; 1464 int remainder; 1465 1466 desc->flags = htole32(flags); 1467 desc->flags |= htole32(len << 16); 1468 1469 desc->physaddr = htole32(physaddr); 1470 desc->wme = htole16( 1471 RT2560_AIFSN(2) | 1472 RT2560_LOGCWMIN(3) | 1473 RT2560_LOGCWMAX(8)); 1474 1475 /* setup PLCP fields */ 1476 desc->plcp_signal = rt2560_plcp_signal(rate); 1477 desc->plcp_service = 4; 1478 1479 len += IEEE80211_CRC_LEN; 1480 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) { 1481 desc->flags |= htole32(RT2560_TX_OFDM); 1482 1483 plcp_length = len & 0xfff; 1484 desc->plcp_length_hi = plcp_length >> 6; 1485 desc->plcp_length_lo = plcp_length & 0x3f; 1486 } else { 1487 plcp_length = howmany(16 * len, rate); 1488 if (rate == 22) { 1489 remainder = (16 * len) % 22; 1490 if (remainder != 0 && remainder < 7) 1491 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1492 } 1493 desc->plcp_length_hi = plcp_length >> 8; 1494 desc->plcp_length_lo = plcp_length & 0xff; 1495 1496 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1497 desc->plcp_signal |= 0x08; 1498 } 1499 1500 if (!encrypt) 1501 desc->flags |= htole32(RT2560_TX_VALID); 1502 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) 1503 : htole32(RT2560_TX_BUSY); 1504 } 1505 1506 static int 1507 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1508 struct ieee80211_node *ni) 1509 { 1510 struct ieee80211vap *vap = ni->ni_vap; 1511 struct rt2560_tx_desc *desc; 1512 struct rt2560_tx_data *data; 1513 bus_dma_segment_t segs[RT2560_MAX_SCATTER]; 1514 int nsegs, rate, error; 1515 1516 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1517 data = &sc->bcnq.data[sc->bcnq.cur]; 1518 1519 /* XXX maybe a separate beacon rate? */ 1520 rate = vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)].mgmtrate; 1521 1522 #if defined(__DragonFly__) 1523 error = bus_dmamap_load_mbuf_segment(sc->bcnq.data_dmat, data->map, m0, 1524 segs, 1, &nsegs, BUS_DMA_NOWAIT); 1525 #else 1526 error = bus_dmamap_load_mbuf_sg(sc->bcnq.data_dmat, data->map, m0, 1527 segs, &nsegs, BUS_DMA_NOWAIT); 1528 #endif 1529 if (error != 0) { 1530 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1531 error); 1532 m_freem(m0); 1533 return error; 1534 } 1535 1536 if (ieee80211_radiotap_active_vap(vap)) { 1537 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1538 1539 tap->wt_flags = 0; 1540 tap->wt_rate = rate; 1541 tap->wt_antenna = sc->tx_ant; 1542 1543 ieee80211_radiotap_tx(vap, m0); 1544 } 1545 1546 data->m = m0; 1547 data->ni = ni; 1548 1549 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1550 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, segs->ds_addr); 1551 1552 DPRINTFN(sc, 10, "sending beacon frame len=%u idx=%u rate=%u\n", 1553 m0->m_pkthdr.len, sc->bcnq.cur, rate); 1554 1555 bus_dmamap_sync(sc->bcnq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1556 bus_dmamap_sync(sc->bcnq.desc_dmat, sc->bcnq.desc_map, 1557 BUS_DMASYNC_PREWRITE); 1558 1559 sc->bcnq.cur = (sc->bcnq.cur + 1) % RT2560_BEACON_RING_COUNT; 1560 1561 return 0; 1562 } 1563 1564 static int 1565 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1566 struct ieee80211_node *ni) 1567 { 1568 struct ieee80211vap *vap = ni->ni_vap; 1569 struct ieee80211com *ic = ni->ni_ic; 1570 struct rt2560_tx_desc *desc; 1571 struct rt2560_tx_data *data; 1572 struct ieee80211_frame *wh; 1573 struct ieee80211_key *k; 1574 bus_dma_segment_t segs[RT2560_MAX_SCATTER]; 1575 uint16_t dur; 1576 uint32_t flags = 0; 1577 int nsegs, rate, error; 1578 1579 desc = &sc->prioq.desc[sc->prioq.cur]; 1580 data = &sc->prioq.data[sc->prioq.cur]; 1581 1582 rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate; 1583 1584 wh = mtod(m0, struct ieee80211_frame *); 1585 1586 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1587 k = ieee80211_crypto_encap(ni, m0); 1588 if (k == NULL) { 1589 m_freem(m0); 1590 return ENOBUFS; 1591 } 1592 } 1593 1594 #if defined(__DragonFly__) 1595 error = bus_dmamap_load_mbuf_segment(sc->prioq.data_dmat, data->map, m0, 1596 segs, 1, &nsegs, BUS_DMA_NOWAIT); 1597 #else 1598 error = bus_dmamap_load_mbuf_sg(sc->prioq.data_dmat, data->map, m0, 1599 segs, &nsegs, 0); 1600 #endif 1601 if (error != 0) { 1602 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1603 error); 1604 m_freem(m0); 1605 return error; 1606 } 1607 1608 if (ieee80211_radiotap_active_vap(vap)) { 1609 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1610 1611 tap->wt_flags = 0; 1612 tap->wt_rate = rate; 1613 tap->wt_antenna = sc->tx_ant; 1614 1615 ieee80211_radiotap_tx(vap, m0); 1616 } 1617 1618 data->m = m0; 1619 data->ni = ni; 1620 /* management frames are not taken into account for amrr */ 1621 data->rix = IEEE80211_FIXED_RATE_NONE; 1622 1623 wh = mtod(m0, struct ieee80211_frame *); 1624 1625 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1626 flags |= RT2560_TX_ACK; 1627 1628 dur = ieee80211_ack_duration(ic->ic_rt, 1629 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1630 *(uint16_t *)wh->i_dur = htole16(dur); 1631 1632 /* tell hardware to add timestamp for probe responses */ 1633 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1634 IEEE80211_FC0_TYPE_MGT && 1635 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1636 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1637 flags |= RT2560_TX_TIMESTAMP; 1638 } 1639 1640 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1641 segs->ds_addr); 1642 1643 bus_dmamap_sync(sc->prioq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1644 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map, 1645 BUS_DMASYNC_PREWRITE); 1646 1647 DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n", 1648 m0->m_pkthdr.len, sc->prioq.cur, rate); 1649 1650 /* kick prio */ 1651 sc->prioq.queued++; 1652 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1653 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1654 1655 return 0; 1656 } 1657 1658 static int 1659 rt2560_sendprot(struct rt2560_softc *sc, 1660 const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate) 1661 { 1662 struct ieee80211com *ic = ni->ni_ic; 1663 const struct ieee80211_frame *wh; 1664 struct rt2560_tx_desc *desc; 1665 struct rt2560_tx_data *data; 1666 struct mbuf *mprot; 1667 int protrate, ackrate, pktlen, flags, isshort, error; 1668 uint16_t dur; 1669 bus_dma_segment_t segs[RT2560_MAX_SCATTER]; 1670 int nsegs; 1671 1672 KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY, 1673 ("protection %d", prot)); 1674 1675 wh = mtod(m, const struct ieee80211_frame *); 1676 pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN; 1677 1678 protrate = ieee80211_ctl_rate(ic->ic_rt, rate); 1679 ackrate = ieee80211_ack_rate(ic->ic_rt, rate); 1680 1681 isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0; 1682 dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort) 1683 + ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1684 flags = RT2560_TX_MORE_FRAG; 1685 if (prot == IEEE80211_PROT_RTSCTS) { 1686 /* NB: CTS is the same size as an ACK */ 1687 dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1688 flags |= RT2560_TX_ACK; 1689 mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur); 1690 } else { 1691 mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur); 1692 } 1693 if (mprot == NULL) { 1694 /* XXX stat + msg */ 1695 return ENOBUFS; 1696 } 1697 1698 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1699 data = &sc->txq.data[sc->txq.cur_encrypt]; 1700 1701 #if defined(__DragonFly__) 1702 error = bus_dmamap_load_mbuf_segment(sc->txq.data_dmat, data->map, 1703 mprot, segs, 1, &nsegs, BUS_DMA_NOWAIT); 1704 #else 1705 error = bus_dmamap_load_mbuf_sg(sc->txq.data_dmat, data->map, 1706 mprot, segs, &nsegs, 0); 1707 #endif 1708 if (error != 0) { 1709 device_printf(sc->sc_dev, 1710 "could not map mbuf (error %d)\n", error); 1711 m_freem(mprot); 1712 return error; 1713 } 1714 1715 data->m = mprot; 1716 data->ni = ieee80211_ref_node(ni); 1717 /* ctl frames are not taken into account for amrr */ 1718 data->rix = IEEE80211_FIXED_RATE_NONE; 1719 1720 rt2560_setup_tx_desc(sc, desc, flags, mprot->m_pkthdr.len, protrate, 1, 1721 segs->ds_addr); 1722 1723 bus_dmamap_sync(sc->txq.data_dmat, data->map, 1724 BUS_DMASYNC_PREWRITE); 1725 1726 sc->txq.queued++; 1727 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1728 1729 return 0; 1730 } 1731 1732 static int 1733 rt2560_tx_raw(struct rt2560_softc *sc, struct mbuf *m0, 1734 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params) 1735 { 1736 struct ieee80211vap *vap = ni->ni_vap; 1737 struct ieee80211com *ic = ni->ni_ic; 1738 struct rt2560_tx_desc *desc; 1739 struct rt2560_tx_data *data; 1740 bus_dma_segment_t segs[RT2560_MAX_SCATTER]; 1741 uint32_t flags; 1742 int nsegs, rate, error; 1743 1744 desc = &sc->prioq.desc[sc->prioq.cur]; 1745 data = &sc->prioq.data[sc->prioq.cur]; 1746 1747 rate = params->ibp_rate0; 1748 if (!ieee80211_isratevalid(ic->ic_rt, rate)) { 1749 /* XXX fall back to mcast/mgmt rate? */ 1750 m_freem(m0); 1751 return EINVAL; 1752 } 1753 1754 flags = 0; 1755 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0) 1756 flags |= RT2560_TX_ACK; 1757 if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) { 1758 error = rt2560_sendprot(sc, m0, ni, 1759 params->ibp_flags & IEEE80211_BPF_RTS ? 1760 IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY, 1761 rate); 1762 if (error) { 1763 m_freem(m0); 1764 return error; 1765 } 1766 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1767 } 1768 1769 #if defined(__DragonFly__) 1770 error = bus_dmamap_load_mbuf_segment(sc->prioq.data_dmat, data->map, m0, 1771 segs, 1, &nsegs, BUS_DMA_NOWAIT); 1772 #else 1773 error = bus_dmamap_load_mbuf_sg(sc->prioq.data_dmat, data->map, m0, 1774 segs, &nsegs, 0); 1775 #endif 1776 if (error != 0) { 1777 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1778 error); 1779 m_freem(m0); 1780 return error; 1781 } 1782 1783 if (ieee80211_radiotap_active_vap(vap)) { 1784 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1785 1786 tap->wt_flags = 0; 1787 tap->wt_rate = rate; 1788 tap->wt_antenna = sc->tx_ant; 1789 1790 ieee80211_radiotap_tx(ni->ni_vap, m0); 1791 } 1792 1793 data->m = m0; 1794 data->ni = ni; 1795 1796 /* XXX need to setup descriptor ourself */ 1797 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, 1798 rate, (params->ibp_flags & IEEE80211_BPF_CRYPTO) != 0, 1799 segs->ds_addr); 1800 1801 bus_dmamap_sync(sc->prioq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1802 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map, 1803 BUS_DMASYNC_PREWRITE); 1804 1805 DPRINTFN(sc, 10, "sending raw frame len=%u idx=%u rate=%u\n", 1806 m0->m_pkthdr.len, sc->prioq.cur, rate); 1807 1808 /* kick prio */ 1809 sc->prioq.queued++; 1810 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1811 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1812 1813 return 0; 1814 } 1815 1816 static int 1817 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1818 struct ieee80211_node *ni) 1819 { 1820 struct ieee80211vap *vap = ni->ni_vap; 1821 struct ieee80211com *ic = ni->ni_ic; 1822 struct rt2560_tx_desc *desc; 1823 struct rt2560_tx_data *data; 1824 struct ieee80211_frame *wh; 1825 const struct ieee80211_txparam *tp; 1826 struct ieee80211_key *k; 1827 struct mbuf *mnew; 1828 bus_dma_segment_t segs[RT2560_MAX_SCATTER]; 1829 uint16_t dur; 1830 uint32_t flags; 1831 int nsegs, rate, error; 1832 1833 wh = mtod(m0, struct ieee80211_frame *); 1834 1835 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1836 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1837 rate = tp->mcastrate; 1838 } else if (m0->m_flags & M_EAPOL) { 1839 rate = tp->mgmtrate; 1840 } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) { 1841 rate = tp->ucastrate; 1842 } else { 1843 (void) ieee80211_ratectl_rate(ni, NULL, 0); 1844 rate = ni->ni_txrate; 1845 } 1846 1847 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1848 k = ieee80211_crypto_encap(ni, m0); 1849 if (k == NULL) { 1850 m_freem(m0); 1851 return ENOBUFS; 1852 } 1853 1854 /* packet header may have moved, reset our local pointer */ 1855 wh = mtod(m0, struct ieee80211_frame *); 1856 } 1857 1858 flags = 0; 1859 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1860 int prot = IEEE80211_PROT_NONE; 1861 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 1862 prot = IEEE80211_PROT_RTSCTS; 1863 else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1864 ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) 1865 prot = ic->ic_protmode; 1866 if (prot != IEEE80211_PROT_NONE) { 1867 error = rt2560_sendprot(sc, m0, ni, prot, rate); 1868 if (error) { 1869 m_freem(m0); 1870 return error; 1871 } 1872 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1873 } 1874 } 1875 1876 data = &sc->txq.data[sc->txq.cur_encrypt]; 1877 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1878 1879 #if defined(__DragonFly__) 1880 error = bus_dmamap_load_mbuf_segment(sc->txq.data_dmat, data->map, m0, 1881 segs, 1, &nsegs, BUS_DMA_NOWAIT); 1882 #else 1883 error = bus_dmamap_load_mbuf_sg(sc->txq.data_dmat, data->map, m0, 1884 segs, &nsegs, 0); 1885 #endif 1886 if (error != 0 && error != EFBIG) { 1887 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1888 error); 1889 m_freem(m0); 1890 return error; 1891 } 1892 if (error != 0) { 1893 mnew = m_defrag(m0, M_NOWAIT); 1894 if (mnew == NULL) { 1895 device_printf(sc->sc_dev, 1896 "could not defragment mbuf\n"); 1897 m_freem(m0); 1898 return ENOBUFS; 1899 } 1900 m0 = mnew; 1901 1902 #if defined(__DragonFly__) 1903 error = bus_dmamap_load_mbuf_segment(sc->txq.data_dmat, 1904 data->map, 1905 m0, segs, 1, &nsegs, BUS_DMA_NOWAIT); 1906 #else 1907 error = bus_dmamap_load_mbuf_sg(sc->txq.data_dmat, data->map, 1908 m0, segs, &nsegs, 0); 1909 #endif 1910 if (error != 0) { 1911 device_printf(sc->sc_dev, 1912 "could not map mbuf (error %d)\n", error); 1913 m_freem(m0); 1914 return error; 1915 } 1916 1917 /* packet header may have moved, reset our local pointer */ 1918 wh = mtod(m0, struct ieee80211_frame *); 1919 } 1920 1921 if (ieee80211_radiotap_active_vap(vap)) { 1922 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1923 1924 tap->wt_flags = 0; 1925 tap->wt_rate = rate; 1926 tap->wt_antenna = sc->tx_ant; 1927 1928 ieee80211_radiotap_tx(vap, m0); 1929 } 1930 1931 data->m = m0; 1932 data->ni = ni; 1933 1934 /* remember link conditions for rate adaptation algorithm */ 1935 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) { 1936 data->rix = ni->ni_txrate; 1937 /* XXX probably need last rssi value and not avg */ 1938 data->rssi = ic->ic_node_getrssi(ni); 1939 } else 1940 data->rix = IEEE80211_FIXED_RATE_NONE; 1941 1942 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1943 flags |= RT2560_TX_ACK; 1944 1945 dur = ieee80211_ack_duration(ic->ic_rt, 1946 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1947 *(uint16_t *)wh->i_dur = htole16(dur); 1948 } 1949 1950 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 1951 segs->ds_addr); 1952 1953 bus_dmamap_sync(sc->txq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1954 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map, 1955 BUS_DMASYNC_PREWRITE); 1956 1957 DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n", 1958 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate); 1959 1960 /* kick encrypt */ 1961 sc->txq.queued++; 1962 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1963 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 1964 1965 return 0; 1966 } 1967 1968 static int 1969 rt2560_transmit(struct ieee80211com *ic, struct mbuf *m) 1970 { 1971 struct rt2560_softc *sc = ic->ic_softc; 1972 int error; 1973 1974 RAL_LOCK(sc); 1975 if ((sc->sc_flags & RT2560_F_RUNNING) == 0) { 1976 RAL_UNLOCK(sc); 1977 return (ENXIO); 1978 } 1979 error = mbufq_enqueue(&sc->sc_snd, m); 1980 if (error) { 1981 RAL_UNLOCK(sc); 1982 return (error); 1983 } 1984 rt2560_start(sc); 1985 RAL_UNLOCK(sc); 1986 1987 return (0); 1988 } 1989 1990 static void 1991 rt2560_start(struct rt2560_softc *sc) 1992 { 1993 struct ieee80211_node *ni; 1994 struct mbuf *m; 1995 1996 RAL_LOCK_ASSERT(sc); 1997 1998 while (sc->txq.queued < RT2560_TX_RING_COUNT - 1 && 1999 (m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2000 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 2001 if (rt2560_tx_data(sc, m, ni) != 0) { 2002 if_inc_counter(ni->ni_vap->iv_ifp, 2003 IFCOUNTER_OERRORS, 1); 2004 ieee80211_free_node(ni); 2005 break; 2006 } 2007 sc->sc_tx_timer = 5; 2008 } 2009 } 2010 2011 static void 2012 rt2560_watchdog(void *arg) 2013 { 2014 struct rt2560_softc *sc = arg; 2015 2016 RAL_LOCK_ASSERT(sc); 2017 2018 KASSERT(sc->sc_flags & RT2560_F_RUNNING, ("not running")); 2019 2020 if (sc->sc_invalid) /* card ejected */ 2021 return; 2022 2023 rt2560_encryption_intr(sc); 2024 rt2560_tx_intr(sc); 2025 2026 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) { 2027 device_printf(sc->sc_dev, "device timeout\n"); 2028 rt2560_init_locked(sc); 2029 #if defined(__DragonFly__) 2030 /* not implemeted */ 2031 #else 2032 counter_u64_add(sc->sc_ic.ic_oerrors, 1); 2033 #endif 2034 /* NB: callout is reset in rt2560_init() */ 2035 return; 2036 } 2037 callout_reset(&sc->watchdog_ch, hz, rt2560_watchdog, sc); 2038 } 2039 2040 static void 2041 rt2560_parent(struct ieee80211com *ic) 2042 { 2043 struct rt2560_softc *sc = ic->ic_softc; 2044 int startall = 0; 2045 2046 RAL_LOCK(sc); 2047 if (ic->ic_nrunning > 0) { 2048 if ((sc->sc_flags & RT2560_F_RUNNING) == 0) { 2049 rt2560_init_locked(sc); 2050 startall = 1; 2051 } else 2052 rt2560_update_promisc(ic); 2053 } else if (sc->sc_flags & RT2560_F_RUNNING) 2054 rt2560_stop_locked(sc); 2055 RAL_UNLOCK(sc); 2056 if (startall) 2057 ieee80211_start_all(ic); 2058 } 2059 2060 static void 2061 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2062 { 2063 uint32_t tmp; 2064 int ntries; 2065 2066 for (ntries = 0; ntries < 100; ntries++) { 2067 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2068 break; 2069 DELAY(1); 2070 } 2071 if (ntries == 100) { 2072 device_printf(sc->sc_dev, "could not write to BBP\n"); 2073 return; 2074 } 2075 2076 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2077 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2078 2079 DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val); 2080 } 2081 2082 static uint8_t 2083 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2084 { 2085 uint32_t val; 2086 int ntries; 2087 2088 for (ntries = 0; ntries < 100; ntries++) { 2089 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2090 break; 2091 DELAY(1); 2092 } 2093 if (ntries == 100) { 2094 device_printf(sc->sc_dev, "could not read from BBP\n"); 2095 return 0; 2096 } 2097 2098 val = RT2560_BBP_BUSY | reg << 8; 2099 RAL_WRITE(sc, RT2560_BBPCSR, val); 2100 2101 for (ntries = 0; ntries < 100; ntries++) { 2102 val = RAL_READ(sc, RT2560_BBPCSR); 2103 if (!(val & RT2560_BBP_BUSY)) 2104 return val & 0xff; 2105 DELAY(1); 2106 } 2107 2108 device_printf(sc->sc_dev, "could not read from BBP\n"); 2109 return 0; 2110 } 2111 2112 static void 2113 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2114 { 2115 uint32_t tmp; 2116 int ntries; 2117 2118 for (ntries = 0; ntries < 100; ntries++) { 2119 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2120 break; 2121 DELAY(1); 2122 } 2123 if (ntries == 100) { 2124 device_printf(sc->sc_dev, "could not write to RF\n"); 2125 return; 2126 } 2127 2128 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2129 (reg & 0x3); 2130 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2131 2132 /* remember last written value in sc */ 2133 sc->rf_regs[reg] = val; 2134 2135 DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff); 2136 } 2137 2138 static void 2139 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2140 { 2141 struct ieee80211com *ic = &sc->sc_ic; 2142 uint8_t power, tmp; 2143 u_int i, chan; 2144 2145 chan = ieee80211_chan2ieee(ic, c); 2146 KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan)); 2147 2148 if (IEEE80211_IS_CHAN_2GHZ(c)) 2149 power = min(sc->txpow[chan - 1], 31); 2150 else 2151 power = 31; 2152 2153 /* adjust txpower using ifconfig settings */ 2154 power -= (100 - ic->ic_txpowlimit) / 8; 2155 2156 DPRINTFN(sc, 2, "setting channel to %u, txpower to %u\n", chan, power); 2157 2158 switch (sc->rf_rev) { 2159 case RT2560_RF_2522: 2160 rt2560_rf_write(sc, RAL_RF1, 0x00814); 2161 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2522_r2[chan - 1]); 2162 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 2163 break; 2164 2165 case RT2560_RF_2523: 2166 rt2560_rf_write(sc, RAL_RF1, 0x08804); 2167 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2523_r2[chan - 1]); 2168 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 2169 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 2170 break; 2171 2172 case RT2560_RF_2524: 2173 rt2560_rf_write(sc, RAL_RF1, 0x0c808); 2174 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2524_r2[chan - 1]); 2175 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 2176 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 2177 break; 2178 2179 case RT2560_RF_2525: 2180 rt2560_rf_write(sc, RAL_RF1, 0x08808); 2181 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2182 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 2183 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 2184 2185 rt2560_rf_write(sc, RAL_RF1, 0x08808); 2186 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525_r2[chan - 1]); 2187 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 2188 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 2189 break; 2190 2191 case RT2560_RF_2525E: 2192 rt2560_rf_write(sc, RAL_RF1, 0x08808); 2193 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525e_r2[chan - 1]); 2194 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 2195 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 2196 break; 2197 2198 case RT2560_RF_2526: 2199 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2200 rt2560_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 2201 rt2560_rf_write(sc, RAL_RF1, 0x08804); 2202 2203 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2526_r2[chan - 1]); 2204 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 2205 rt2560_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 2206 break; 2207 2208 /* dual-band RF */ 2209 case RT2560_RF_5222: 2210 for (i = 0; rt2560_rf5222[i].chan != chan; i++); 2211 2212 rt2560_rf_write(sc, RAL_RF1, rt2560_rf5222[i].r1); 2213 rt2560_rf_write(sc, RAL_RF2, rt2560_rf5222[i].r2); 2214 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 2215 rt2560_rf_write(sc, RAL_RF4, rt2560_rf5222[i].r4); 2216 break; 2217 default: 2218 kprintf("unknown ral rev=%d\n", sc->rf_rev); 2219 } 2220 2221 /* XXX */ 2222 if ((ic->ic_flags & IEEE80211_F_SCAN) == 0) { 2223 /* set Japan filter bit for channel 14 */ 2224 tmp = rt2560_bbp_read(sc, 70); 2225 2226 tmp &= ~RT2560_JAPAN_FILTER; 2227 if (chan == 14) 2228 tmp |= RT2560_JAPAN_FILTER; 2229 2230 rt2560_bbp_write(sc, 70, tmp); 2231 2232 /* clear CRC errors */ 2233 RAL_READ(sc, RT2560_CNT0); 2234 } 2235 } 2236 2237 static void 2238 rt2560_set_channel(struct ieee80211com *ic) 2239 { 2240 struct rt2560_softc *sc = ic->ic_softc; 2241 2242 RAL_LOCK(sc); 2243 rt2560_set_chan(sc, ic->ic_curchan); 2244 RAL_UNLOCK(sc); 2245 2246 } 2247 2248 #if 0 2249 /* 2250 * Disable RF auto-tuning. 2251 */ 2252 static void 2253 rt2560_disable_rf_tune(struct rt2560_softc *sc) 2254 { 2255 uint32_t tmp; 2256 2257 if (sc->rf_rev != RT2560_RF_2523) { 2258 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 2259 rt2560_rf_write(sc, RAL_RF1, tmp); 2260 } 2261 2262 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 2263 rt2560_rf_write(sc, RAL_RF3, tmp); 2264 2265 DPRINTFN(sc, 2, "%s", "disabling RF autotune\n"); 2266 } 2267 #endif 2268 2269 /* 2270 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2271 * synchronization. 2272 */ 2273 static void 2274 rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2275 { 2276 struct ieee80211com *ic = &sc->sc_ic; 2277 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2278 uint16_t logcwmin, preload; 2279 uint32_t tmp; 2280 2281 /* first, disable TSF synchronization */ 2282 RAL_WRITE(sc, RT2560_CSR14, 0); 2283 2284 tmp = 16 * vap->iv_bss->ni_intval; 2285 RAL_WRITE(sc, RT2560_CSR12, tmp); 2286 2287 RAL_WRITE(sc, RT2560_CSR13, 0); 2288 2289 logcwmin = 5; 2290 preload = (vap->iv_opmode == IEEE80211_M_STA) ? 384 : 1024; 2291 tmp = logcwmin << 16 | preload; 2292 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2293 2294 /* finally, enable TSF synchronization */ 2295 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2296 if (ic->ic_opmode == IEEE80211_M_STA) 2297 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2298 else 2299 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2300 RT2560_ENABLE_BEACON_GENERATOR; 2301 RAL_WRITE(sc, RT2560_CSR14, tmp); 2302 2303 DPRINTF(sc, "%s", "enabling TSF synchronization\n"); 2304 } 2305 2306 static void 2307 rt2560_enable_tsf(struct rt2560_softc *sc) 2308 { 2309 RAL_WRITE(sc, RT2560_CSR14, 0); 2310 RAL_WRITE(sc, RT2560_CSR14, 2311 RT2560_ENABLE_TSF_SYNC(2) | RT2560_ENABLE_TSF); 2312 } 2313 2314 static void 2315 rt2560_update_plcp(struct rt2560_softc *sc) 2316 { 2317 struct ieee80211com *ic = &sc->sc_ic; 2318 2319 /* no short preamble for 1Mbps */ 2320 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2321 2322 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2323 /* values taken from the reference driver */ 2324 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2325 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2326 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2327 } else { 2328 /* same values as above or'ed 0x8 */ 2329 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2330 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2331 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2332 } 2333 2334 DPRINTF(sc, "updating PLCP for %s preamble\n", 2335 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long"); 2336 } 2337 2338 /* 2339 * This function can be called by ieee80211_set_shortslottime(). Refer to 2340 * IEEE Std 802.11-1999 pp. 85 to know how these values are computed. 2341 */ 2342 static void 2343 rt2560_update_slot(struct ieee80211com *ic) 2344 { 2345 struct rt2560_softc *sc = ic->ic_softc; 2346 uint8_t slottime; 2347 uint16_t tx_sifs, tx_pifs, tx_difs, eifs; 2348 uint32_t tmp; 2349 2350 #ifndef FORCE_SLOTTIME 2351 slottime = IEEE80211_GET_SLOTTIME(ic); 2352 #else 2353 /* 2354 * Setting slot time according to "short slot time" capability 2355 * in beacon/probe_resp seems to cause problem to acknowledge 2356 * certain AP's data frames transimitted at CCK/DS rates: the 2357 * problematic AP keeps retransmitting data frames, probably 2358 * because MAC level acks are not received by hardware. 2359 * So we cheat a little bit here by claiming we are capable of 2360 * "short slot time" but setting hardware slot time to the normal 2361 * slot time. ral(4) does not seem to have trouble to receive 2362 * frames transmitted using short slot time even if hardware 2363 * slot time is set to normal slot time. If we didn't use this 2364 * trick, we would have to claim that short slot time is not 2365 * supported; this would give relative poor RX performance 2366 * (-1Mb~-2Mb lower) and the _whole_ BSS would stop using short 2367 * slot time. 2368 */ 2369 slottime = IEEE80211_DUR_SLOT; 2370 #endif 2371 2372 /* update the MAC slot boundaries */ 2373 tx_sifs = RAL_SIFS - RT2560_TXRX_TURNAROUND; 2374 tx_pifs = tx_sifs + slottime; 2375 tx_difs = IEEE80211_DUR_DIFS(tx_sifs, slottime); 2376 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2377 2378 tmp = RAL_READ(sc, RT2560_CSR11); 2379 tmp = (tmp & ~0x1f00) | slottime << 8; 2380 RAL_WRITE(sc, RT2560_CSR11, tmp); 2381 2382 tmp = tx_pifs << 16 | tx_sifs; 2383 RAL_WRITE(sc, RT2560_CSR18, tmp); 2384 2385 tmp = eifs << 16 | tx_difs; 2386 RAL_WRITE(sc, RT2560_CSR19, tmp); 2387 2388 DPRINTF(sc, "setting slottime to %uus\n", slottime); 2389 } 2390 2391 static void 2392 rt2560_set_basicrates(struct rt2560_softc *sc, 2393 const struct ieee80211_rateset *rs) 2394 { 2395 struct ieee80211com *ic = &sc->sc_ic; 2396 uint32_t mask = 0; 2397 uint8_t rate; 2398 int i; 2399 2400 for (i = 0; i < rs->rs_nrates; i++) { 2401 rate = rs->rs_rates[i]; 2402 2403 if (!(rate & IEEE80211_RATE_BASIC)) 2404 continue; 2405 2406 mask |= 1 << ieee80211_legacy_rate_lookup(ic->ic_rt, 2407 IEEE80211_RV(rate)); 2408 } 2409 2410 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, mask); 2411 2412 DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask); 2413 } 2414 2415 static void 2416 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2417 { 2418 uint32_t tmp; 2419 2420 /* set ON period to 70ms and OFF period to 30ms */ 2421 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2422 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2423 } 2424 2425 static void 2426 rt2560_set_bssid(struct rt2560_softc *sc, const uint8_t *bssid) 2427 { 2428 uint32_t tmp; 2429 2430 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2431 RAL_WRITE(sc, RT2560_CSR5, tmp); 2432 2433 tmp = bssid[4] | bssid[5] << 8; 2434 RAL_WRITE(sc, RT2560_CSR6, tmp); 2435 2436 #if defined(__DragonFly__) 2437 DPRINTF(sc, "setting BSSID to %s\n", ether_sprintf(bssid)); 2438 #else 2439 DPRINTF(sc, "setting BSSID to %6D\n", bssid, ":"); 2440 #endif 2441 } 2442 2443 static void 2444 rt2560_set_macaddr(struct rt2560_softc *sc, const uint8_t *addr) 2445 { 2446 uint32_t tmp; 2447 2448 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2449 RAL_WRITE(sc, RT2560_CSR3, tmp); 2450 2451 tmp = addr[4] | addr[5] << 8; 2452 RAL_WRITE(sc, RT2560_CSR4, tmp); 2453 2454 #if defined(__DragonFly__) 2455 DPRINTF(sc, "setting MAC address to %s\n", ether_sprintf(addr)); 2456 #else 2457 DPRINTF(sc, "setting MAC address to %6D\n", addr, ":"); 2458 #endif 2459 } 2460 2461 static void 2462 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2463 { 2464 uint32_t tmp; 2465 2466 tmp = RAL_READ(sc, RT2560_CSR3); 2467 addr[0] = tmp & 0xff; 2468 addr[1] = (tmp >> 8) & 0xff; 2469 addr[2] = (tmp >> 16) & 0xff; 2470 addr[3] = (tmp >> 24); 2471 2472 tmp = RAL_READ(sc, RT2560_CSR4); 2473 addr[4] = tmp & 0xff; 2474 addr[5] = (tmp >> 8) & 0xff; 2475 } 2476 2477 static void 2478 rt2560_update_promisc(struct ieee80211com *ic) 2479 { 2480 struct rt2560_softc *sc = ic->ic_softc; 2481 uint32_t tmp; 2482 2483 tmp = RAL_READ(sc, RT2560_RXCSR0); 2484 2485 tmp &= ~RT2560_DROP_NOT_TO_ME; 2486 if (ic->ic_promisc == 0) 2487 tmp |= RT2560_DROP_NOT_TO_ME; 2488 2489 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2490 2491 DPRINTF(sc, "%s promiscuous mode\n", 2492 (ic->ic_promisc > 0) ? "entering" : "leaving"); 2493 } 2494 2495 static const char * 2496 rt2560_get_rf(int rev) 2497 { 2498 switch (rev) { 2499 case RT2560_RF_2522: return "RT2522"; 2500 case RT2560_RF_2523: return "RT2523"; 2501 case RT2560_RF_2524: return "RT2524"; 2502 case RT2560_RF_2525: return "RT2525"; 2503 case RT2560_RF_2525E: return "RT2525e"; 2504 case RT2560_RF_2526: return "RT2526"; 2505 case RT2560_RF_5222: return "RT5222"; 2506 default: return "unknown"; 2507 } 2508 } 2509 2510 static void 2511 rt2560_read_config(struct rt2560_softc *sc) 2512 { 2513 uint16_t val; 2514 int i; 2515 2516 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2517 sc->rf_rev = (val >> 11) & 0x7; 2518 sc->hw_radio = (val >> 10) & 0x1; 2519 sc->led_mode = (val >> 6) & 0x7; 2520 sc->rx_ant = (val >> 4) & 0x3; 2521 sc->tx_ant = (val >> 2) & 0x3; 2522 sc->nb_ant = val & 0x3; 2523 2524 /* read default values for BBP registers */ 2525 for (i = 0; i < 16; i++) { 2526 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2527 if (val == 0 || val == 0xffff) 2528 continue; 2529 2530 sc->bbp_prom[i].reg = val >> 8; 2531 sc->bbp_prom[i].val = val & 0xff; 2532 } 2533 2534 /* read Tx power for all b/g channels */ 2535 for (i = 0; i < 14 / 2; i++) { 2536 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2537 sc->txpow[i * 2] = val & 0xff; 2538 sc->txpow[i * 2 + 1] = val >> 8; 2539 } 2540 for (i = 0; i < 14; ++i) { 2541 if (sc->txpow[i] > 31) 2542 sc->txpow[i] = 24; 2543 } 2544 2545 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CALIBRATE); 2546 if ((val & 0xff) == 0xff) 2547 sc->rssi_corr = RT2560_DEFAULT_RSSI_CORR; 2548 else 2549 sc->rssi_corr = val & 0xff; 2550 DPRINTF(sc, "rssi correction %d, calibrate 0x%02x\n", 2551 sc->rssi_corr, val); 2552 } 2553 2554 2555 static void 2556 rt2560_scan_start(struct ieee80211com *ic) 2557 { 2558 struct rt2560_softc *sc = ic->ic_softc; 2559 2560 /* abort TSF synchronization */ 2561 RAL_WRITE(sc, RT2560_CSR14, 0); 2562 rt2560_set_bssid(sc, ieee80211broadcastaddr); 2563 } 2564 2565 static void 2566 rt2560_scan_end(struct ieee80211com *ic) 2567 { 2568 struct rt2560_softc *sc = ic->ic_softc; 2569 struct ieee80211vap *vap = ic->ic_scan->ss_vap; 2570 2571 rt2560_enable_tsf_sync(sc); 2572 /* XXX keep local copy */ 2573 rt2560_set_bssid(sc, vap->iv_bss->ni_bssid); 2574 } 2575 2576 static int 2577 rt2560_bbp_init(struct rt2560_softc *sc) 2578 { 2579 int i, ntries; 2580 2581 /* wait for BBP to be ready */ 2582 for (ntries = 0; ntries < 100; ntries++) { 2583 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2584 break; 2585 DELAY(1); 2586 } 2587 if (ntries == 100) { 2588 device_printf(sc->sc_dev, "timeout waiting for BBP\n"); 2589 return EIO; 2590 } 2591 2592 /* initialize BBP registers to default values */ 2593 for (i = 0; i < nitems(rt2560_def_bbp); i++) { 2594 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2595 rt2560_def_bbp[i].val); 2596 } 2597 2598 /* initialize BBP registers to values stored in EEPROM */ 2599 for (i = 0; i < 16; i++) { 2600 if (sc->bbp_prom[i].reg == 0 && sc->bbp_prom[i].val == 0) 2601 break; 2602 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2603 } 2604 rt2560_bbp_write(sc, 17, 0x48); /* XXX restore bbp17 */ 2605 2606 return 0; 2607 } 2608 2609 static void 2610 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2611 { 2612 uint32_t tmp; 2613 uint8_t tx; 2614 2615 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2616 if (antenna == 1) 2617 tx |= RT2560_BBP_ANTA; 2618 else if (antenna == 2) 2619 tx |= RT2560_BBP_ANTB; 2620 else 2621 tx |= RT2560_BBP_DIVERSITY; 2622 2623 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2624 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2625 sc->rf_rev == RT2560_RF_5222) 2626 tx |= RT2560_BBP_FLIPIQ; 2627 2628 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2629 2630 /* update values for CCK and OFDM in BBPCSR1 */ 2631 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2632 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2633 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2634 } 2635 2636 static void 2637 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2638 { 2639 uint8_t rx; 2640 2641 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2642 if (antenna == 1) 2643 rx |= RT2560_BBP_ANTA; 2644 else if (antenna == 2) 2645 rx |= RT2560_BBP_ANTB; 2646 else 2647 rx |= RT2560_BBP_DIVERSITY; 2648 2649 /* need to force no I/Q flip for RF 2525e and 2526 */ 2650 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2651 rx &= ~RT2560_BBP_FLIPIQ; 2652 2653 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2654 } 2655 2656 static void 2657 rt2560_init_locked(struct rt2560_softc *sc) 2658 { 2659 struct ieee80211com *ic = &sc->sc_ic; 2660 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2661 uint32_t tmp; 2662 int i; 2663 2664 RAL_LOCK_ASSERT(sc); 2665 2666 rt2560_stop_locked(sc); 2667 2668 /* setup tx rings */ 2669 tmp = RT2560_PRIO_RING_COUNT << 24 | 2670 RT2560_ATIM_RING_COUNT << 16 | 2671 RT2560_TX_RING_COUNT << 8 | 2672 RT2560_TX_DESC_SIZE; 2673 2674 /* rings must be initialized in this exact order */ 2675 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2676 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2677 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2678 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2679 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2680 2681 /* setup rx ring */ 2682 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2683 2684 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2685 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2686 2687 /* initialize MAC registers to default values */ 2688 for (i = 0; i < nitems(rt2560_def_mac); i++) 2689 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2690 2691 rt2560_set_macaddr(sc, vap ? vap->iv_myaddr : ic->ic_macaddr); 2692 2693 /* set basic rate set (will be updated later) */ 2694 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2695 2696 rt2560_update_slot(ic); 2697 rt2560_update_plcp(sc); 2698 rt2560_update_led(sc, 0, 0); 2699 2700 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2701 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2702 2703 if (rt2560_bbp_init(sc) != 0) { 2704 rt2560_stop_locked(sc); 2705 return; 2706 } 2707 2708 rt2560_set_txantenna(sc, sc->tx_ant); 2709 rt2560_set_rxantenna(sc, sc->rx_ant); 2710 2711 /* set default BSS channel */ 2712 rt2560_set_chan(sc, ic->ic_curchan); 2713 2714 /* kick Rx */ 2715 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2716 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2717 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2718 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 2719 ic->ic_opmode != IEEE80211_M_MBSS) 2720 tmp |= RT2560_DROP_TODS; 2721 if (ic->ic_promisc == 0) 2722 tmp |= RT2560_DROP_NOT_TO_ME; 2723 } 2724 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2725 2726 /* clear old FCS and Rx FIFO errors */ 2727 RAL_READ(sc, RT2560_CNT0); 2728 RAL_READ(sc, RT2560_CNT4); 2729 2730 /* clear any pending interrupts */ 2731 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2732 2733 /* enable interrupts */ 2734 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2735 2736 sc->sc_flags |= RT2560_F_RUNNING; 2737 2738 callout_reset(&sc->watchdog_ch, hz, rt2560_watchdog, sc); 2739 } 2740 2741 static void 2742 rt2560_init(void *priv) 2743 { 2744 struct rt2560_softc *sc = priv; 2745 struct ieee80211com *ic = &sc->sc_ic; 2746 2747 RAL_LOCK(sc); 2748 rt2560_init_locked(sc); 2749 RAL_UNLOCK(sc); 2750 2751 if (sc->sc_flags & RT2560_F_RUNNING) 2752 ieee80211_start_all(ic); /* start all vap's */ 2753 } 2754 2755 static void 2756 rt2560_stop_locked(struct rt2560_softc *sc) 2757 { 2758 volatile int *flags = &sc->sc_flags; 2759 2760 RAL_LOCK_ASSERT(sc); 2761 2762 #if defined(__DragonFly__) 2763 while (*flags & RT2560_F_INPUT_RUNNING) 2764 lksleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10); 2765 #else 2766 while (*flags & RT2560_F_INPUT_RUNNING) 2767 msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10); 2768 #endif 2769 2770 callout_stop(&sc->watchdog_ch); 2771 sc->sc_tx_timer = 0; 2772 2773 if (sc->sc_flags & RT2560_F_RUNNING) { 2774 sc->sc_flags &= ~RT2560_F_RUNNING; 2775 2776 /* abort Tx */ 2777 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2778 2779 /* disable Rx */ 2780 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2781 2782 /* reset ASIC (imply reset BBP) */ 2783 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2784 RAL_WRITE(sc, RT2560_CSR1, 0); 2785 2786 /* disable interrupts */ 2787 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2788 2789 /* reset Tx and Rx rings */ 2790 rt2560_reset_tx_ring(sc, &sc->txq); 2791 rt2560_reset_tx_ring(sc, &sc->atimq); 2792 rt2560_reset_tx_ring(sc, &sc->prioq); 2793 rt2560_reset_tx_ring(sc, &sc->bcnq); 2794 rt2560_reset_rx_ring(sc, &sc->rxq); 2795 } 2796 } 2797 2798 void 2799 rt2560_stop(void *arg) 2800 { 2801 struct rt2560_softc *sc = arg; 2802 2803 RAL_LOCK(sc); 2804 rt2560_stop_locked(sc); 2805 RAL_UNLOCK(sc); 2806 } 2807 2808 static int 2809 rt2560_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2810 const struct ieee80211_bpf_params *params) 2811 { 2812 struct ieee80211com *ic = ni->ni_ic; 2813 struct rt2560_softc *sc = ic->ic_softc; 2814 2815 RAL_LOCK(sc); 2816 2817 /* prevent management frames from being sent if we're not ready */ 2818 if (!(sc->sc_flags & RT2560_F_RUNNING)) { 2819 RAL_UNLOCK(sc); 2820 m_freem(m); 2821 return ENETDOWN; 2822 } 2823 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 2824 RAL_UNLOCK(sc); 2825 m_freem(m); 2826 return ENOBUFS; /* XXX */ 2827 } 2828 2829 if (params == NULL) { 2830 /* 2831 * Legacy path; interpret frame contents to decide 2832 * precisely how to send the frame. 2833 */ 2834 if (rt2560_tx_mgt(sc, m, ni) != 0) 2835 goto bad; 2836 } else { 2837 /* 2838 * Caller supplied explicit parameters to use in 2839 * sending the frame. 2840 */ 2841 if (rt2560_tx_raw(sc, m, ni, params)) 2842 goto bad; 2843 } 2844 sc->sc_tx_timer = 5; 2845 2846 RAL_UNLOCK(sc); 2847 2848 return 0; 2849 bad: 2850 RAL_UNLOCK(sc); 2851 return EIO; /* XXX */ 2852 } 2853