1 /* $FreeBSD: head/sys/dev/ral/rt2661.c 195618 2009-07-11 15:02:45Z rpaulo $ */ 2 3 /*- 4 * Copyright (c) 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 * 19 * $FreeBSD: head/sys/dev/ral/rt2661.c 195618 2009-07-11 15:02:45Z rpaulo $ 20 */ 21 22 /*- 23 * Ralink Technology RT2561, RT2561S and RT2661 chipset driver 24 * http://www.ralinktech.com/ 25 */ 26 27 #include <sys/param.h> 28 #include <sys/sysctl.h> 29 #include <sys/sockio.h> 30 #include <sys/mbuf.h> 31 #include <sys/kernel.h> 32 #include <sys/socket.h> 33 #include <sys/systm.h> 34 #include <sys/malloc.h> 35 #include <sys/lock.h> 36 #include <sys/mutex.h> 37 #include <sys/module.h> 38 #include <sys/bus.h> 39 #include <sys/endian.h> 40 #include <sys/firmware.h> 41 #include <sys/rman.h> 42 43 #include <net/bpf.h> 44 #include <net/if.h> 45 #include <net/if_arp.h> 46 #include <net/ethernet.h> 47 #include <net/if_dl.h> 48 #include <net/if_media.h> 49 #include <net/if_types.h> 50 #include <net/ifq_var.h> 51 52 #include <netproto/802_11/ieee80211_var.h> 53 #include <netproto/802_11/ieee80211_radiotap.h> 54 #include <netproto/802_11/ieee80211_regdomain.h> 55 #include <netproto/802_11/ieee80211_ratectl.h> 56 57 #include <netinet/in.h> 58 #include <netinet/in_systm.h> 59 #include <netinet/in_var.h> 60 #include <netinet/ip.h> 61 #include <netinet/if_ether.h> 62 63 #include <dev/netif/ral/rt2661reg.h> 64 #include <dev/netif/ral/rt2661var.h> 65 66 #define RAL_DEBUG 67 #ifdef RAL_DEBUG 68 #define DPRINTF(sc, fmt, ...) do { \ 69 if (sc->sc_debug > 0) \ 70 kprintf(fmt, __VA_ARGS__); \ 71 } while (0) 72 #define DPRINTFN(sc, n, fmt, ...) do { \ 73 if (sc->sc_debug >= (n)) \ 74 kprintf(fmt, __VA_ARGS__); \ 75 } while (0) 76 #else 77 #define DPRINTF(sc, fmt, ...) 78 #define DPRINTFN(sc, n, fmt, ...) 79 #endif 80 81 static struct ieee80211vap *rt2661_vap_create(struct ieee80211com *, 82 const char name[IFNAMSIZ], int unit, 83 enum ieee80211_opmode opmode, 84 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN], 85 const uint8_t mac[IEEE80211_ADDR_LEN]); 86 static void rt2661_vap_delete(struct ieee80211vap *); 87 static void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int, 88 int); 89 static int rt2661_alloc_tx_ring(struct rt2661_softc *, 90 struct rt2661_tx_ring *, int); 91 static void rt2661_reset_tx_ring(struct rt2661_softc *, 92 struct rt2661_tx_ring *); 93 static void rt2661_free_tx_ring(struct rt2661_softc *, 94 struct rt2661_tx_ring *); 95 static int rt2661_alloc_rx_ring(struct rt2661_softc *, 96 struct rt2661_rx_ring *, int); 97 static void rt2661_reset_rx_ring(struct rt2661_softc *, 98 struct rt2661_rx_ring *); 99 static void rt2661_free_rx_ring(struct rt2661_softc *, 100 struct rt2661_rx_ring *); 101 static int rt2661_newstate(struct ieee80211vap *, 102 enum ieee80211_state, int); 103 static uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t); 104 static void rt2661_rx_intr(struct rt2661_softc *); 105 static void rt2661_tx_intr(struct rt2661_softc *); 106 static void rt2661_tx_dma_intr(struct rt2661_softc *, 107 struct rt2661_tx_ring *); 108 static void rt2661_mcu_beacon_expire(struct rt2661_softc *); 109 static void rt2661_mcu_wakeup(struct rt2661_softc *); 110 static void rt2661_mcu_cmd_intr(struct rt2661_softc *); 111 static void rt2661_scan_start(struct ieee80211com *); 112 static void rt2661_scan_end(struct ieee80211com *); 113 static void rt2661_set_channel(struct ieee80211com *); 114 static void rt2661_setup_tx_desc(struct rt2661_softc *, 115 struct rt2661_tx_desc *, uint32_t, uint16_t, int, 116 int, const bus_dma_segment_t *, int, int); 117 static int rt2661_tx_data(struct rt2661_softc *, struct mbuf *, 118 struct ieee80211_node *, int); 119 static int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *, 120 struct ieee80211_node *); 121 static void rt2661_start_locked(struct ifnet *); 122 static void rt2661_start(struct ifnet *, struct ifaltq_subque *); 123 static int rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *, 124 const struct ieee80211_bpf_params *); 125 static void rt2661_watchdog_callout(void *); 126 static int rt2661_ioctl(struct ifnet *, u_long, caddr_t, 127 struct ucred *); 128 static void rt2661_bbp_write(struct rt2661_softc *, uint8_t, 129 uint8_t); 130 static uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t); 131 static void rt2661_rf_write(struct rt2661_softc *, uint8_t, 132 uint32_t); 133 static int rt2661_tx_cmd(struct rt2661_softc *, uint8_t, 134 uint16_t); 135 static void rt2661_select_antenna(struct rt2661_softc *); 136 static void rt2661_enable_mrr(struct rt2661_softc *); 137 static void rt2661_set_txpreamble(struct rt2661_softc *); 138 static void rt2661_set_basicrates(struct rt2661_softc *, 139 const struct ieee80211_rateset *); 140 static void rt2661_select_band(struct rt2661_softc *, 141 struct ieee80211_channel *); 142 static void rt2661_set_chan(struct rt2661_softc *, 143 struct ieee80211_channel *); 144 static void rt2661_set_bssid(struct rt2661_softc *, 145 const uint8_t *); 146 static void rt2661_set_macaddr(struct rt2661_softc *, 147 const uint8_t *); 148 static void rt2661_update_promisc(struct ifnet *); 149 static int rt2661_wme_update(struct ieee80211com *) __unused; 150 static void rt2661_update_slot(struct ifnet *); 151 static const char *rt2661_get_rf(int); 152 static void rt2661_read_eeprom(struct rt2661_softc *, 153 uint8_t macaddr[IEEE80211_ADDR_LEN]); 154 static int rt2661_bbp_init(struct rt2661_softc *); 155 static void rt2661_init_locked(struct rt2661_softc *); 156 static void rt2661_init(void *); 157 static void rt2661_stop_locked(struct rt2661_softc *); 158 static void rt2661_stop(void *); 159 static int rt2661_load_microcode(struct rt2661_softc *); 160 #ifdef notyet 161 static void rt2661_rx_tune(struct rt2661_softc *); 162 static void rt2661_radar_start(struct rt2661_softc *); 163 static int rt2661_radar_stop(struct rt2661_softc *); 164 #endif 165 static int rt2661_prepare_beacon(struct rt2661_softc *, 166 struct ieee80211vap *); 167 static void rt2661_enable_tsf_sync(struct rt2661_softc *); 168 static void rt2661_enable_tsf(struct rt2661_softc *); 169 static int rt2661_get_rssi(struct rt2661_softc *, uint8_t); 170 171 static const struct { 172 uint32_t reg; 173 uint32_t val; 174 } rt2661_def_mac[] = { 175 RT2661_DEF_MAC 176 }; 177 178 static const struct { 179 uint8_t reg; 180 uint8_t val; 181 } rt2661_def_bbp[] = { 182 RT2661_DEF_BBP 183 }; 184 185 static const struct rfprog { 186 uint8_t chan; 187 uint32_t r1, r2, r3, r4; 188 } rt2661_rf5225_1[] = { 189 RT2661_RF5225_1 190 }, rt2661_rf5225_2[] = { 191 RT2661_RF5225_2 192 }; 193 194 int 195 rt2661_attach(device_t dev, int id) 196 { 197 struct rt2661_softc *sc = device_get_softc(dev); 198 struct ieee80211com *ic; 199 struct ifnet *ifp; 200 uint32_t val; 201 int error, ac, ntries; 202 uint8_t bands; 203 uint8_t macaddr[IEEE80211_ADDR_LEN]; 204 struct sysctl_ctx_list *ctx; 205 struct sysctl_oid *tree; 206 207 sc->sc_id = id; 208 sc->sc_dev = dev; 209 210 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 211 if (ifp == NULL) { 212 device_printf(sc->sc_dev, "can not if_alloc()\n"); 213 return ENOMEM; 214 } 215 ic = ifp->if_l2com; 216 217 callout_init(&sc->watchdog_ch); 218 219 /* wait for NIC to initialize */ 220 for (ntries = 0; ntries < 1000; ntries++) { 221 if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0) 222 break; 223 DELAY(1000); 224 } 225 if (ntries == 1000) { 226 device_printf(sc->sc_dev, 227 "timeout waiting for NIC to initialize\n"); 228 error = EIO; 229 goto fail1; 230 } 231 232 /* retrieve RF rev. no and various other things from EEPROM */ 233 rt2661_read_eeprom(sc, macaddr); 234 235 device_printf(dev, "MAC/BBP RT%X, RF %s\n", val, 236 rt2661_get_rf(sc->rf_rev)); 237 238 /* 239 * Allocate Tx and Rx rings. 240 */ 241 for (ac = 0; ac < 4; ac++) { 242 error = rt2661_alloc_tx_ring(sc, &sc->txq[ac], 243 RT2661_TX_RING_COUNT); 244 if (error != 0) { 245 device_printf(sc->sc_dev, 246 "could not allocate Tx ring %d\n", ac); 247 goto fail2; 248 } 249 } 250 251 error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT); 252 if (error != 0) { 253 device_printf(sc->sc_dev, "could not allocate Mgt ring\n"); 254 goto fail2; 255 } 256 257 error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT); 258 if (error != 0) { 259 device_printf(sc->sc_dev, "could not allocate Rx ring\n"); 260 goto fail3; 261 } 262 263 ifp->if_softc = sc; 264 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 265 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 266 ifp->if_init = rt2661_init; 267 ifp->if_ioctl = rt2661_ioctl; 268 ifp->if_start = rt2661_start; 269 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN); 270 #ifdef notyet 271 ifq_set_ready(&ifp->if_snd); 272 #endif 273 274 ic->ic_ifp = ifp; 275 ic->ic_opmode = IEEE80211_M_STA; 276 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 277 278 /* set device capabilities */ 279 ic->ic_caps = 280 IEEE80211_C_STA /* station mode */ 281 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 282 | IEEE80211_C_HOSTAP /* hostap mode */ 283 | IEEE80211_C_MONITOR /* monitor mode */ 284 | IEEE80211_C_AHDEMO /* adhoc demo mode */ 285 | IEEE80211_C_WDS /* 4-address traffic works */ 286 | IEEE80211_C_MBSS /* mesh point link mode */ 287 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 288 | IEEE80211_C_SHSLOT /* short slot time supported */ 289 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 290 | IEEE80211_C_BGSCAN /* capable of bg scanning */ 291 #ifdef notyet 292 | IEEE80211_C_TXFRAG /* handle tx frags */ 293 | IEEE80211_C_WME /* 802.11e */ 294 #endif 295 ; 296 297 bands = 0; 298 setbit(&bands, IEEE80211_MODE_11B); 299 setbit(&bands, IEEE80211_MODE_11G); 300 if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325) 301 setbit(&bands, IEEE80211_MODE_11A); 302 ieee80211_init_channels(ic, NULL, &bands); 303 304 ieee80211_ifattach(ic, macaddr); 305 #if 0 306 ic->ic_wme.wme_update = rt2661_wme_update; 307 #endif 308 ic->ic_scan_start = rt2661_scan_start; 309 ic->ic_scan_end = rt2661_scan_end; 310 ic->ic_set_channel = rt2661_set_channel; 311 ic->ic_updateslot = rt2661_update_slot; 312 ic->ic_update_promisc = rt2661_update_promisc; 313 ic->ic_raw_xmit = rt2661_raw_xmit; 314 315 ic->ic_vap_create = rt2661_vap_create; 316 ic->ic_vap_delete = rt2661_vap_delete; 317 318 ieee80211_radiotap_attach(ic, 319 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 320 RT2661_TX_RADIOTAP_PRESENT, 321 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 322 RT2661_RX_RADIOTAP_PRESENT); 323 324 ctx = device_get_sysctl_ctx(sc->sc_dev); 325 tree = device_get_sysctl_tree(sc->sc_dev); 326 #ifdef RAL_DEBUG 327 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 328 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs"); 329 #endif 330 if (bootverbose) 331 ieee80211_announce(ic); 332 333 return 0; 334 335 fail3: rt2661_free_tx_ring(sc, &sc->mgtq); 336 fail2: while (--ac >= 0) 337 rt2661_free_tx_ring(sc, &sc->txq[ac]); 338 fail1: 339 if_free(ifp); 340 return error; 341 } 342 343 int 344 rt2661_detach(void *xsc) 345 { 346 struct rt2661_softc *sc = xsc; 347 struct ifnet *ifp = sc->sc_ifp; 348 struct ieee80211com *ic = ifp->if_l2com; 349 350 rt2661_stop_locked(sc); 351 352 ieee80211_ifdetach(ic); 353 354 rt2661_free_tx_ring(sc, &sc->txq[0]); 355 rt2661_free_tx_ring(sc, &sc->txq[1]); 356 rt2661_free_tx_ring(sc, &sc->txq[2]); 357 rt2661_free_tx_ring(sc, &sc->txq[3]); 358 rt2661_free_tx_ring(sc, &sc->mgtq); 359 rt2661_free_rx_ring(sc, &sc->rxq); 360 361 if_free(ifp); 362 363 return 0; 364 } 365 366 static struct ieee80211vap * 367 rt2661_vap_create(struct ieee80211com *ic, 368 const char name[IFNAMSIZ], int unit, 369 enum ieee80211_opmode opmode, int flags, 370 const uint8_t bssid[IEEE80211_ADDR_LEN], 371 const uint8_t mac[IEEE80211_ADDR_LEN]) 372 { 373 struct ifnet *ifp = ic->ic_ifp; 374 struct rt2661_vap *rvp; 375 struct ieee80211vap *vap; 376 377 switch (opmode) { 378 case IEEE80211_M_STA: 379 case IEEE80211_M_IBSS: 380 case IEEE80211_M_AHDEMO: 381 case IEEE80211_M_MONITOR: 382 case IEEE80211_M_HOSTAP: 383 case IEEE80211_M_MBSS: 384 /* XXXRP: TBD */ 385 if (!TAILQ_EMPTY(&ic->ic_vaps)) { 386 if_printf(ifp, "only 1 vap supported\n"); 387 return NULL; 388 } 389 if (opmode == IEEE80211_M_STA) 390 flags |= IEEE80211_CLONE_NOBEACONS; 391 break; 392 case IEEE80211_M_WDS: 393 if (TAILQ_EMPTY(&ic->ic_vaps) || 394 ic->ic_opmode != IEEE80211_M_HOSTAP) { 395 if_printf(ifp, "wds only supported in ap mode\n"); 396 return NULL; 397 } 398 /* 399 * Silently remove any request for a unique 400 * bssid; WDS vap's always share the local 401 * mac address. 402 */ 403 flags &= ~IEEE80211_CLONE_BSSID; 404 break; 405 default: 406 if_printf(ifp, "unknown opmode %d\n", opmode); 407 return NULL; 408 } 409 rvp = (struct rt2661_vap *) kmalloc(sizeof(struct rt2661_vap), 410 M_80211_VAP, M_INTWAIT | M_ZERO); 411 if (rvp == NULL) 412 return NULL; 413 vap = &rvp->ral_vap; 414 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac); 415 416 /* override state transition machine */ 417 rvp->ral_newstate = vap->iv_newstate; 418 vap->iv_newstate = rt2661_newstate; 419 #if 0 420 vap->iv_update_beacon = rt2661_beacon_update; 421 #endif 422 423 ieee80211_ratectl_init(vap); 424 /* complete setup */ 425 ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status); 426 if (TAILQ_FIRST(&ic->ic_vaps) == vap) 427 ic->ic_opmode = opmode; 428 return vap; 429 } 430 431 static void 432 rt2661_vap_delete(struct ieee80211vap *vap) 433 { 434 struct rt2661_vap *rvp = RT2661_VAP(vap); 435 436 ieee80211_ratectl_deinit(vap); 437 ieee80211_vap_detach(vap); 438 kfree(rvp, M_80211_VAP); 439 } 440 441 void 442 rt2661_shutdown(void *xsc) 443 { 444 struct rt2661_softc *sc = xsc; 445 446 rt2661_stop(sc); 447 } 448 449 void 450 rt2661_suspend(void *xsc) 451 { 452 struct rt2661_softc *sc = xsc; 453 454 rt2661_stop(sc); 455 } 456 457 void 458 rt2661_resume(void *xsc) 459 { 460 struct rt2661_softc *sc = xsc; 461 struct ifnet *ifp = sc->sc_ifp; 462 463 if (ifp->if_flags & IFF_UP) 464 rt2661_init(sc); 465 } 466 467 static void 468 rt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 469 { 470 if (error != 0) 471 return; 472 473 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 474 475 *(bus_addr_t *)arg = segs[0].ds_addr; 476 } 477 478 static int 479 rt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring, 480 int count) 481 { 482 int i, error; 483 484 ring->count = count; 485 ring->queued = 0; 486 ring->cur = ring->next = ring->stat = 0; 487 488 error = bus_dma_tag_create(ring->desc_dmat, 4, 0, 489 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 490 count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE, 491 0, &ring->desc_dmat); 492 if (error != 0) { 493 device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 494 goto fail; 495 } 496 497 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 498 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 499 if (error != 0) { 500 device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 501 goto fail; 502 } 503 504 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 505 count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 506 0); 507 if (error != 0) { 508 device_printf(sc->sc_dev, "could not load desc DMA map\n"); 509 goto fail; 510 } 511 512 ring->data = kmalloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF, 513 M_INTWAIT | M_ZERO); 514 if (ring->data == NULL) { 515 device_printf(sc->sc_dev, "could not allocate soft data\n"); 516 error = ENOMEM; 517 goto fail; 518 } 519 520 error = bus_dma_tag_create(ring->data_dmat, 1, 0, 521 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 522 RT2661_MAX_SCATTER, MCLBYTES, 0, &ring->data_dmat); 523 if (error != 0) { 524 device_printf(sc->sc_dev, "could not create data DMA tag\n"); 525 goto fail; 526 } 527 528 for (i = 0; i < count; i++) { 529 error = bus_dmamap_create(ring->data_dmat, 0, 530 &ring->data[i].map); 531 if (error != 0) { 532 device_printf(sc->sc_dev, "could not create DMA map\n"); 533 goto fail; 534 } 535 } 536 537 return 0; 538 539 fail: rt2661_free_tx_ring(sc, ring); 540 return error; 541 } 542 543 static void 544 rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 545 { 546 struct rt2661_tx_desc *desc; 547 struct rt2661_tx_data *data; 548 int i; 549 550 for (i = 0; i < ring->count; i++) { 551 desc = &ring->desc[i]; 552 data = &ring->data[i]; 553 554 if (data->m != NULL) { 555 bus_dmamap_sync(ring->data_dmat, data->map, 556 BUS_DMASYNC_POSTWRITE); 557 bus_dmamap_unload(ring->data_dmat, data->map); 558 m_freem(data->m); 559 data->m = NULL; 560 } 561 562 if (data->ni != NULL) { 563 ieee80211_free_node(data->ni); 564 data->ni = NULL; 565 } 566 567 desc->flags = 0; 568 } 569 570 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 571 572 ring->queued = 0; 573 ring->cur = ring->next = ring->stat = 0; 574 } 575 576 static void 577 rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 578 { 579 struct rt2661_tx_data *data; 580 int i; 581 582 if (ring->desc != NULL) { 583 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 584 BUS_DMASYNC_POSTWRITE); 585 bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 586 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 587 } 588 589 if (ring->desc_dmat != NULL) 590 bus_dma_tag_destroy(ring->desc_dmat); 591 592 if (ring->data != NULL) { 593 for (i = 0; i < ring->count; i++) { 594 data = &ring->data[i]; 595 596 if (data->m != NULL) { 597 bus_dmamap_sync(ring->data_dmat, data->map, 598 BUS_DMASYNC_POSTWRITE); 599 bus_dmamap_unload(ring->data_dmat, data->map); 600 m_freem(data->m); 601 } 602 603 if (data->ni != NULL) 604 ieee80211_free_node(data->ni); 605 606 if (data->map != NULL) 607 bus_dmamap_destroy(ring->data_dmat, data->map); 608 } 609 610 kfree(ring->data, M_DEVBUF); 611 } 612 613 if (ring->data_dmat != NULL) 614 bus_dma_tag_destroy(ring->data_dmat); 615 } 616 617 static int 618 rt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring, 619 int count) 620 { 621 struct rt2661_rx_desc *desc; 622 struct rt2661_rx_data *data; 623 bus_addr_t physaddr; 624 int i, error; 625 626 ring->count = count; 627 ring->cur = ring->next = 0; 628 629 error = bus_dma_tag_create(ring->desc_dmat, 4, 0, 630 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 631 count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE, 632 0, &ring->desc_dmat); 633 if (error != 0) { 634 device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 635 goto fail; 636 } 637 638 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 639 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 640 if (error != 0) { 641 device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 642 goto fail; 643 } 644 645 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 646 count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 647 0); 648 if (error != 0) { 649 device_printf(sc->sc_dev, "could not load desc DMA map\n"); 650 goto fail; 651 } 652 653 ring->data = kmalloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF, 654 M_INTWAIT | M_ZERO); 655 if (ring->data == NULL) { 656 device_printf(sc->sc_dev, "could not allocate soft data\n"); 657 error = ENOMEM; 658 goto fail; 659 } 660 661 /* 662 * Pre-allocate Rx buffers and populate Rx ring. 663 */ 664 error = bus_dma_tag_create(ring->data_dmat, 1, 0, 665 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 666 1, MCLBYTES, 0, &ring->data_dmat); 667 if (error != 0) { 668 device_printf(sc->sc_dev, "could not create data DMA tag\n"); 669 goto fail; 670 } 671 672 for (i = 0; i < count; i++) { 673 desc = &sc->rxq.desc[i]; 674 data = &sc->rxq.data[i]; 675 676 error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 677 if (error != 0) { 678 device_printf(sc->sc_dev, "could not create DMA map\n"); 679 goto fail; 680 } 681 682 data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 683 if (data->m == NULL) { 684 device_printf(sc->sc_dev, 685 "could not allocate rx mbuf\n"); 686 error = ENOMEM; 687 goto fail; 688 } 689 690 error = bus_dmamap_load(ring->data_dmat, data->map, 691 mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr, 692 &physaddr, 0); 693 if (error != 0) { 694 device_printf(sc->sc_dev, 695 "could not load rx buf DMA map"); 696 goto fail; 697 } 698 699 desc->flags = htole32(RT2661_RX_BUSY); 700 desc->physaddr = htole32(physaddr); 701 } 702 703 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 704 705 return 0; 706 707 fail: rt2661_free_rx_ring(sc, ring); 708 return error; 709 } 710 711 static void 712 rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 713 { 714 int i; 715 716 for (i = 0; i < ring->count; i++) 717 ring->desc[i].flags = htole32(RT2661_RX_BUSY); 718 719 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 720 721 ring->cur = ring->next = 0; 722 } 723 724 static void 725 rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 726 { 727 struct rt2661_rx_data *data; 728 int i; 729 730 if (ring->desc != NULL) { 731 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 732 BUS_DMASYNC_POSTWRITE); 733 bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 734 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 735 } 736 737 if (ring->desc_dmat != NULL) 738 bus_dma_tag_destroy(ring->desc_dmat); 739 740 if (ring->data != NULL) { 741 for (i = 0; i < ring->count; i++) { 742 data = &ring->data[i]; 743 744 if (data->m != NULL) { 745 bus_dmamap_sync(ring->data_dmat, data->map, 746 BUS_DMASYNC_POSTREAD); 747 bus_dmamap_unload(ring->data_dmat, data->map); 748 m_freem(data->m); 749 } 750 751 if (data->map != NULL) 752 bus_dmamap_destroy(ring->data_dmat, data->map); 753 } 754 755 kfree(ring->data, M_DEVBUF); 756 } 757 758 if (ring->data_dmat != NULL) 759 bus_dma_tag_destroy(ring->data_dmat); 760 } 761 762 static int 763 rt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 764 { 765 struct rt2661_vap *rvp = RT2661_VAP(vap); 766 struct ieee80211com *ic = vap->iv_ic; 767 struct rt2661_softc *sc = ic->ic_ifp->if_softc; 768 int error; 769 770 if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) { 771 uint32_t tmp; 772 773 /* abort TSF synchronization */ 774 tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 775 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff); 776 } 777 778 error = rvp->ral_newstate(vap, nstate, arg); 779 780 if (error == 0 && nstate == IEEE80211_S_RUN) { 781 struct ieee80211_node *ni = vap->iv_bss; 782 783 if (vap->iv_opmode != IEEE80211_M_MONITOR) { 784 rt2661_enable_mrr(sc); 785 rt2661_set_txpreamble(sc); 786 rt2661_set_basicrates(sc, &ni->ni_rates); 787 rt2661_set_bssid(sc, ni->ni_bssid); 788 } 789 790 if (vap->iv_opmode == IEEE80211_M_HOSTAP || 791 vap->iv_opmode == IEEE80211_M_IBSS || 792 vap->iv_opmode == IEEE80211_M_MBSS) { 793 error = rt2661_prepare_beacon(sc, vap); 794 if (error != 0) 795 return error; 796 } 797 if (vap->iv_opmode != IEEE80211_M_MONITOR) 798 rt2661_enable_tsf_sync(sc); 799 else 800 rt2661_enable_tsf(sc); 801 } 802 return error; 803 } 804 805 /* 806 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 807 * 93C66). 808 */ 809 static uint16_t 810 rt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr) 811 { 812 uint32_t tmp; 813 uint16_t val; 814 int n; 815 816 /* clock C once before the first command */ 817 RT2661_EEPROM_CTL(sc, 0); 818 819 RT2661_EEPROM_CTL(sc, RT2661_S); 820 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 821 RT2661_EEPROM_CTL(sc, RT2661_S); 822 823 /* write start bit (1) */ 824 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 825 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 826 827 /* write READ opcode (10) */ 828 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 829 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 830 RT2661_EEPROM_CTL(sc, RT2661_S); 831 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 832 833 /* write address (A5-A0 or A7-A0) */ 834 n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7; 835 for (; n >= 0; n--) { 836 RT2661_EEPROM_CTL(sc, RT2661_S | 837 (((addr >> n) & 1) << RT2661_SHIFT_D)); 838 RT2661_EEPROM_CTL(sc, RT2661_S | 839 (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C); 840 } 841 842 RT2661_EEPROM_CTL(sc, RT2661_S); 843 844 /* read data Q15-Q0 */ 845 val = 0; 846 for (n = 15; n >= 0; n--) { 847 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 848 tmp = RAL_READ(sc, RT2661_E2PROM_CSR); 849 val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n; 850 RT2661_EEPROM_CTL(sc, RT2661_S); 851 } 852 853 RT2661_EEPROM_CTL(sc, 0); 854 855 /* clear Chip Select and clock C */ 856 RT2661_EEPROM_CTL(sc, RT2661_S); 857 RT2661_EEPROM_CTL(sc, 0); 858 RT2661_EEPROM_CTL(sc, RT2661_C); 859 860 return val; 861 } 862 863 static void 864 rt2661_tx_intr(struct rt2661_softc *sc) 865 { 866 struct ifnet *ifp = sc->sc_ifp; 867 struct rt2661_tx_ring *txq; 868 struct rt2661_tx_data *data; 869 uint32_t val; 870 int qid, retrycnt; 871 struct ieee80211vap *vap; 872 873 for (;;) { 874 struct ieee80211_node *ni; 875 struct mbuf *m; 876 877 val = RAL_READ(sc, RT2661_STA_CSR4); 878 if (!(val & RT2661_TX_STAT_VALID)) 879 break; 880 881 /* retrieve the queue in which this frame was sent */ 882 qid = RT2661_TX_QID(val); 883 txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq; 884 885 /* retrieve rate control algorithm context */ 886 data = &txq->data[txq->stat]; 887 m = data->m; 888 data->m = NULL; 889 890 ni = data->ni; 891 data->ni = NULL; 892 893 /* if no frame has been sent, ignore */ 894 if (ni == NULL) 895 continue; 896 897 vap = ni->ni_vap; 898 899 switch (RT2661_TX_RESULT(val)) { 900 case RT2661_TX_SUCCESS: 901 retrycnt = RT2661_TX_RETRYCNT(val); 902 903 DPRINTFN(sc, 10, "data frame sent successfully after " 904 "%d retries\n", retrycnt); 905 if (data->rix != IEEE80211_FIXED_RATE_NONE) 906 ieee80211_ratectl_tx_complete(vap, ni, 907 IEEE80211_RATECTL_TX_SUCCESS, 908 &retrycnt, NULL); 909 IFNET_STAT_INC(ifp, opackets, 1); 910 break; 911 912 case RT2661_TX_RETRY_FAIL: 913 retrycnt = RT2661_TX_RETRYCNT(val); 914 915 DPRINTFN(sc, 9, "%s\n", 916 "sending data frame failed (too much retries)"); 917 if (data->rix != IEEE80211_FIXED_RATE_NONE) 918 ieee80211_ratectl_tx_complete(vap, ni, 919 IEEE80211_RATECTL_TX_FAILURE, 920 &retrycnt, NULL); 921 IFNET_STAT_INC(ifp, oerrors, 1); 922 break; 923 924 default: 925 /* other failure */ 926 device_printf(sc->sc_dev, 927 "sending data frame failed 0x%08x\n", val); 928 IFNET_STAT_INC(ifp, oerrors, 1); 929 } 930 931 DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat); 932 933 txq->queued--; 934 if (++txq->stat >= txq->count) /* faster than % count */ 935 txq->stat = 0; 936 937 if (m->m_flags & M_TXCB) 938 ieee80211_process_callback(ni, m, 939 RT2661_TX_RESULT(val) != RT2661_TX_SUCCESS); 940 m_freem(m); 941 ieee80211_free_node(ni); 942 } 943 944 sc->sc_tx_timer = 0; 945 ifq_clr_oactive(&ifp->if_snd); 946 947 rt2661_start_locked(ifp); 948 } 949 950 static void 951 rt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq) 952 { 953 struct rt2661_tx_desc *desc; 954 struct rt2661_tx_data *data; 955 956 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD); 957 958 for (;;) { 959 desc = &txq->desc[txq->next]; 960 data = &txq->data[txq->next]; 961 962 if ((le32toh(desc->flags) & RT2661_TX_BUSY) || 963 !(le32toh(desc->flags) & RT2661_TX_VALID)) 964 break; 965 966 bus_dmamap_sync(txq->data_dmat, data->map, 967 BUS_DMASYNC_POSTWRITE); 968 bus_dmamap_unload(txq->data_dmat, data->map); 969 970 /* descriptor is no longer valid */ 971 desc->flags &= ~htole32(RT2661_TX_VALID); 972 973 DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next); 974 975 if (++txq->next >= txq->count) /* faster than % count */ 976 txq->next = 0; 977 } 978 979 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 980 } 981 982 static void 983 rt2661_rx_intr(struct rt2661_softc *sc) 984 { 985 struct ifnet *ifp = sc->sc_ifp; 986 struct ieee80211com *ic = ifp->if_l2com; 987 struct rt2661_rx_desc *desc; 988 struct rt2661_rx_data *data; 989 bus_addr_t physaddr; 990 struct ieee80211_frame *wh; 991 struct ieee80211_node *ni; 992 struct mbuf *mnew, *m; 993 int error; 994 995 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 996 BUS_DMASYNC_POSTREAD); 997 998 for (;;) { 999 int8_t rssi, nf; 1000 1001 desc = &sc->rxq.desc[sc->rxq.cur]; 1002 data = &sc->rxq.data[sc->rxq.cur]; 1003 1004 if (le32toh(desc->flags) & RT2661_RX_BUSY) 1005 break; 1006 1007 if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) || 1008 (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) { 1009 /* 1010 * This should not happen since we did not request 1011 * to receive those frames when we filled TXRX_CSR0. 1012 */ 1013 DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n", 1014 le32toh(desc->flags)); 1015 IFNET_STAT_INC(ifp, ierrors, 1); 1016 goto skip; 1017 } 1018 1019 if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) { 1020 IFNET_STAT_INC(ifp, ierrors, 1); 1021 goto skip; 1022 } 1023 1024 /* 1025 * Try to allocate a new mbuf for this ring element and load it 1026 * before processing the current mbuf. If the ring element 1027 * cannot be loaded, drop the received packet and reuse the old 1028 * mbuf. In the unlikely case that the old mbuf can't be 1029 * reloaded either, explicitly panic. 1030 */ 1031 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1032 if (mnew == NULL) { 1033 IFNET_STAT_INC(ifp, ierrors, 1); 1034 goto skip; 1035 } 1036 1037 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 1038 BUS_DMASYNC_POSTREAD); 1039 bus_dmamap_unload(sc->rxq.data_dmat, data->map); 1040 1041 error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1042 mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr, 1043 &physaddr, 0); 1044 if (error != 0) { 1045 m_freem(mnew); 1046 1047 /* try to reload the old mbuf */ 1048 error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1049 mtod(data->m, void *), MCLBYTES, 1050 rt2661_dma_map_addr, &physaddr, 0); 1051 if (error != 0) { 1052 /* very unlikely that it will fail... */ 1053 panic("%s: could not load old rx mbuf", 1054 device_get_name(sc->sc_dev)); 1055 } 1056 IFNET_STAT_INC(ifp, ierrors, 1); 1057 goto skip; 1058 } 1059 1060 /* 1061 * New mbuf successfully loaded, update Rx ring and continue 1062 * processing. 1063 */ 1064 m = data->m; 1065 data->m = mnew; 1066 desc->physaddr = htole32(physaddr); 1067 1068 /* finalize mbuf */ 1069 m->m_pkthdr.rcvif = ifp; 1070 m->m_pkthdr.len = m->m_len = 1071 (le32toh(desc->flags) >> 16) & 0xfff; 1072 1073 rssi = rt2661_get_rssi(sc, desc->rssi); 1074 /* Error happened during RSSI conversion. */ 1075 if (rssi < 0) 1076 rssi = -30; /* XXX ignored by net80211 */ 1077 nf = RT2661_NOISE_FLOOR; 1078 1079 if (ieee80211_radiotap_active(ic)) { 1080 struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap; 1081 uint32_t tsf_lo, tsf_hi; 1082 1083 /* get timestamp (low and high 32 bits) */ 1084 tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13); 1085 tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12); 1086 1087 tap->wr_tsf = 1088 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1089 tap->wr_flags = 0; 1090 tap->wr_rate = ieee80211_plcp2rate(desc->rate, 1091 (desc->flags & htole32(RT2661_RX_OFDM)) ? 1092 IEEE80211_T_OFDM : IEEE80211_T_CCK); 1093 tap->wr_antsignal = nf + rssi; 1094 tap->wr_antnoise = nf; 1095 } 1096 sc->sc_flags |= RAL_INPUT_RUNNING; 1097 wh = mtod(m, struct ieee80211_frame *); 1098 1099 /* send the frame to the 802.11 layer */ 1100 ni = ieee80211_find_rxnode(ic, 1101 (struct ieee80211_frame_min *)wh); 1102 if (ni != NULL) { 1103 (void) ieee80211_input(ni, m, rssi, nf); 1104 ieee80211_free_node(ni); 1105 } else 1106 (void) ieee80211_input_all(ic, m, rssi, nf); 1107 1108 sc->sc_flags &= ~RAL_INPUT_RUNNING; 1109 1110 skip: desc->flags |= htole32(RT2661_RX_BUSY); 1111 1112 DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur); 1113 1114 sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT; 1115 } 1116 1117 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1118 BUS_DMASYNC_PREWRITE); 1119 } 1120 1121 /* ARGSUSED */ 1122 static void 1123 rt2661_mcu_beacon_expire(struct rt2661_softc *sc) 1124 { 1125 /* do nothing */ 1126 } 1127 1128 static void 1129 rt2661_mcu_wakeup(struct rt2661_softc *sc) 1130 { 1131 RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16); 1132 1133 RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7); 1134 RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18); 1135 RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20); 1136 1137 /* send wakeup command to MCU */ 1138 rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0); 1139 } 1140 1141 static void 1142 rt2661_mcu_cmd_intr(struct rt2661_softc *sc) 1143 { 1144 RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR); 1145 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 1146 } 1147 1148 void 1149 rt2661_intr(void *arg) 1150 { 1151 struct rt2661_softc *sc = arg; 1152 struct ifnet *ifp = sc->sc_ifp; 1153 uint32_t r1, r2; 1154 1155 /* disable MAC and MCU interrupts */ 1156 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f); 1157 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 1158 1159 /* don't re-enable interrupts if we're shutting down */ 1160 if (!(ifp->if_flags & IFF_RUNNING)) { 1161 return; 1162 } 1163 1164 r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR); 1165 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1); 1166 1167 r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR); 1168 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2); 1169 1170 if (r1 & RT2661_MGT_DONE) 1171 rt2661_tx_dma_intr(sc, &sc->mgtq); 1172 1173 if (r1 & RT2661_RX_DONE) 1174 rt2661_rx_intr(sc); 1175 1176 if (r1 & RT2661_TX0_DMA_DONE) 1177 rt2661_tx_dma_intr(sc, &sc->txq[0]); 1178 1179 if (r1 & RT2661_TX1_DMA_DONE) 1180 rt2661_tx_dma_intr(sc, &sc->txq[1]); 1181 1182 if (r1 & RT2661_TX2_DMA_DONE) 1183 rt2661_tx_dma_intr(sc, &sc->txq[2]); 1184 1185 if (r1 & RT2661_TX3_DMA_DONE) 1186 rt2661_tx_dma_intr(sc, &sc->txq[3]); 1187 1188 if (r1 & RT2661_TX_DONE) 1189 rt2661_tx_intr(sc); 1190 1191 if (r2 & RT2661_MCU_CMD_DONE) 1192 rt2661_mcu_cmd_intr(sc); 1193 1194 if (r2 & RT2661_MCU_BEACON_EXPIRE) 1195 rt2661_mcu_beacon_expire(sc); 1196 1197 if (r2 & RT2661_MCU_WAKEUP) 1198 rt2661_mcu_wakeup(sc); 1199 1200 /* re-enable MAC and MCU interrupts */ 1201 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 1202 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 1203 1204 } 1205 1206 static uint8_t 1207 rt2661_plcp_signal(int rate) 1208 { 1209 switch (rate) { 1210 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1211 case 12: return 0xb; 1212 case 18: return 0xf; 1213 case 24: return 0xa; 1214 case 36: return 0xe; 1215 case 48: return 0x9; 1216 case 72: return 0xd; 1217 case 96: return 0x8; 1218 case 108: return 0xc; 1219 1220 /* CCK rates (NB: not IEEE std, device-specific) */ 1221 case 2: return 0x0; 1222 case 4: return 0x1; 1223 case 11: return 0x2; 1224 case 22: return 0x3; 1225 } 1226 return 0xff; /* XXX unsupported/unknown rate */ 1227 } 1228 1229 static void 1230 rt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc, 1231 uint32_t flags, uint16_t xflags, int len, int rate, 1232 const bus_dma_segment_t *segs, int nsegs, int ac) 1233 { 1234 struct ifnet *ifp = sc->sc_ifp; 1235 struct ieee80211com *ic = ifp->if_l2com; 1236 uint16_t plcp_length; 1237 int i, remainder; 1238 1239 desc->flags = htole32(flags); 1240 desc->flags |= htole32(len << 16); 1241 desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID); 1242 1243 desc->xflags = htole16(xflags); 1244 desc->xflags |= htole16(nsegs << 13); 1245 1246 desc->wme = htole16( 1247 RT2661_QID(ac) | 1248 RT2661_AIFSN(2) | 1249 RT2661_LOGCWMIN(4) | 1250 RT2661_LOGCWMAX(10)); 1251 1252 /* 1253 * Remember in which queue this frame was sent. This field is driver 1254 * private data only. It will be made available by the NIC in STA_CSR4 1255 * on Tx interrupts. 1256 */ 1257 desc->qid = ac; 1258 1259 /* setup PLCP fields */ 1260 desc->plcp_signal = rt2661_plcp_signal(rate); 1261 desc->plcp_service = 4; 1262 1263 len += IEEE80211_CRC_LEN; 1264 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) { 1265 desc->flags |= htole32(RT2661_TX_OFDM); 1266 1267 plcp_length = len & 0xfff; 1268 desc->plcp_length_hi = plcp_length >> 6; 1269 desc->plcp_length_lo = plcp_length & 0x3f; 1270 } else { 1271 plcp_length = (16 * len + rate - 1) / rate; 1272 if (rate == 22) { 1273 remainder = (16 * len) % 22; 1274 if (remainder != 0 && remainder < 7) 1275 desc->plcp_service |= RT2661_PLCP_LENGEXT; 1276 } 1277 desc->plcp_length_hi = plcp_length >> 8; 1278 desc->plcp_length_lo = plcp_length & 0xff; 1279 1280 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1281 desc->plcp_signal |= 0x08; 1282 } 1283 1284 /* RT2x61 supports scatter with up to 5 segments */ 1285 for (i = 0; i < nsegs; i++) { 1286 desc->addr[i] = htole32(segs[i].ds_addr); 1287 desc->len [i] = htole16(segs[i].ds_len); 1288 } 1289 } 1290 1291 static int 1292 rt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0, 1293 struct ieee80211_node *ni) 1294 { 1295 struct ieee80211vap *vap = ni->ni_vap; 1296 struct ieee80211com *ic = ni->ni_ic; 1297 struct rt2661_tx_desc *desc; 1298 struct rt2661_tx_data *data; 1299 struct ieee80211_frame *wh; 1300 struct ieee80211_key *k; 1301 bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1302 uint16_t dur; 1303 uint32_t flags = 0; /* XXX HWSEQ */ 1304 int nsegs, rate, error; 1305 1306 desc = &sc->mgtq.desc[sc->mgtq.cur]; 1307 data = &sc->mgtq.data[sc->mgtq.cur]; 1308 1309 rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate; 1310 1311 wh = mtod(m0, struct ieee80211_frame *); 1312 1313 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1314 k = ieee80211_crypto_encap(ni, m0); 1315 if (k == NULL) { 1316 m_freem(m0); 1317 return ENOBUFS; 1318 } 1319 } 1320 1321 error = bus_dmamap_load_mbuf_segment(sc->mgtq.data_dmat, data->map, m0, 1322 segs, 1, &nsegs, BUS_DMA_NOWAIT); 1323 if (error != 0) { 1324 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1325 error); 1326 m_freem(m0); 1327 return error; 1328 } 1329 1330 if (ieee80211_radiotap_active_vap(vap)) { 1331 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1332 1333 tap->wt_flags = 0; 1334 tap->wt_rate = rate; 1335 1336 ieee80211_radiotap_tx(vap, m0); 1337 } 1338 1339 data->m = m0; 1340 data->ni = ni; 1341 /* management frames are not taken into account for amrr */ 1342 data->rix = IEEE80211_FIXED_RATE_NONE; 1343 1344 wh = mtod(m0, struct ieee80211_frame *); 1345 1346 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1347 flags |= RT2661_TX_NEED_ACK; 1348 1349 dur = ieee80211_ack_duration(ic->ic_rt, 1350 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1351 *(uint16_t *)wh->i_dur = htole16(dur); 1352 1353 /* tell hardware to add timestamp in probe responses */ 1354 if ((wh->i_fc[0] & 1355 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1356 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1357 flags |= RT2661_TX_TIMESTAMP; 1358 } 1359 1360 rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */, 1361 m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT); 1362 1363 bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1364 bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map, 1365 BUS_DMASYNC_PREWRITE); 1366 1367 DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n", 1368 m0->m_pkthdr.len, sc->mgtq.cur, rate); 1369 1370 /* kick mgt */ 1371 sc->mgtq.queued++; 1372 sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT; 1373 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT); 1374 1375 return 0; 1376 } 1377 1378 static int 1379 rt2661_sendprot(struct rt2661_softc *sc, int ac, 1380 const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate) 1381 { 1382 struct ieee80211com *ic = ni->ni_ic; 1383 struct rt2661_tx_ring *txq = &sc->txq[ac]; 1384 const struct ieee80211_frame *wh; 1385 struct rt2661_tx_desc *desc; 1386 struct rt2661_tx_data *data; 1387 struct mbuf *mprot; 1388 int protrate, pktlen, flags, isshort, error; 1389 uint16_t dur; 1390 bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1391 int nsegs; 1392 1393 KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY, 1394 ("protection %d", prot)); 1395 1396 wh = mtod(m, const struct ieee80211_frame *); 1397 pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN; 1398 1399 protrate = ieee80211_ctl_rate(ic->ic_rt, rate); 1400 ieee80211_ack_rate(ic->ic_rt, rate); 1401 1402 isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0; 1403 dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort) 1404 + ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1405 flags = RT2661_TX_MORE_FRAG; 1406 if (prot == IEEE80211_PROT_RTSCTS) { 1407 /* NB: CTS is the same size as an ACK */ 1408 dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1409 flags |= RT2661_TX_NEED_ACK; 1410 mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur); 1411 } else { 1412 mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur); 1413 } 1414 if (mprot == NULL) { 1415 /* XXX stat + msg */ 1416 return ENOBUFS; 1417 } 1418 1419 data = &txq->data[txq->cur]; 1420 desc = &txq->desc[txq->cur]; 1421 1422 error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map, mprot, segs, 1423 1, &nsegs, BUS_DMA_NOWAIT); 1424 if (error != 0) { 1425 device_printf(sc->sc_dev, 1426 "could not map mbuf (error %d)\n", error); 1427 m_freem(mprot); 1428 return error; 1429 } 1430 1431 data->m = mprot; 1432 data->ni = ieee80211_ref_node(ni); 1433 /* ctl frames are not taken into account for amrr */ 1434 data->rix = IEEE80211_FIXED_RATE_NONE; 1435 1436 rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len, 1437 protrate, segs, 1, ac); 1438 1439 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1440 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1441 1442 txq->queued++; 1443 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1444 1445 return 0; 1446 } 1447 1448 static int 1449 rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0, 1450 struct ieee80211_node *ni, int ac) 1451 { 1452 struct ieee80211vap *vap = ni->ni_vap; 1453 struct ifnet *ifp = sc->sc_ifp; 1454 struct ieee80211com *ic = ifp->if_l2com; 1455 struct rt2661_tx_ring *txq = &sc->txq[ac]; 1456 struct rt2661_tx_desc *desc; 1457 struct rt2661_tx_data *data; 1458 struct ieee80211_frame *wh; 1459 const struct ieee80211_txparam *tp; 1460 struct ieee80211_key *k; 1461 const struct chanAccParams *cap; 1462 struct mbuf *mnew; 1463 bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1464 uint16_t dur; 1465 uint32_t flags; 1466 int error, nsegs, rate, noack = 0; 1467 1468 wh = mtod(m0, struct ieee80211_frame *); 1469 1470 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1471 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1472 rate = tp->mcastrate; 1473 } else if (m0->m_flags & M_EAPOL) { 1474 rate = tp->mgmtrate; 1475 } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) { 1476 rate = tp->ucastrate; 1477 } else { 1478 ieee80211_ratectl_rate(ni, NULL, 0); 1479 rate = ni->ni_txrate; 1480 } 1481 rate &= IEEE80211_RATE_VAL; 1482 1483 if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) { 1484 cap = &ic->ic_wme.wme_chanParams; 1485 noack = cap->cap_wmeParams[ac].wmep_noackPolicy; 1486 } 1487 1488 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1489 k = ieee80211_crypto_encap(ni, m0); 1490 if (k == NULL) { 1491 m_freem(m0); 1492 return ENOBUFS; 1493 } 1494 1495 /* packet header may have moved, reset our local pointer */ 1496 wh = mtod(m0, struct ieee80211_frame *); 1497 } 1498 1499 flags = 0; 1500 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1501 int prot = IEEE80211_PROT_NONE; 1502 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 1503 prot = IEEE80211_PROT_RTSCTS; 1504 else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1505 ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) 1506 prot = ic->ic_protmode; 1507 if (prot != IEEE80211_PROT_NONE) { 1508 error = rt2661_sendprot(sc, ac, m0, ni, prot, rate); 1509 if (error) { 1510 m_freem(m0); 1511 return error; 1512 } 1513 flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS; 1514 } 1515 } 1516 1517 data = &txq->data[txq->cur]; 1518 desc = &txq->desc[txq->cur]; 1519 1520 error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map, m0, segs, 1521 1, &nsegs, BUS_DMA_NOWAIT); 1522 if (error != 0 && error != EFBIG) { 1523 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1524 error); 1525 m_freem(m0); 1526 return error; 1527 } 1528 if (error != 0) { 1529 mnew = m_defrag(m0, M_NOWAIT); 1530 if (mnew == NULL) { 1531 device_printf(sc->sc_dev, 1532 "could not defragment mbuf\n"); 1533 m_freem(m0); 1534 return ENOBUFS; 1535 } 1536 m0 = mnew; 1537 1538 error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map, m0, 1539 segs, 1, &nsegs, BUS_DMA_NOWAIT); 1540 if (error != 0) { 1541 device_printf(sc->sc_dev, 1542 "could not map mbuf (error %d)\n", error); 1543 m_freem(m0); 1544 return error; 1545 } 1546 1547 /* packet header have moved, reset our local pointer */ 1548 wh = mtod(m0, struct ieee80211_frame *); 1549 } 1550 1551 if (ieee80211_radiotap_active_vap(vap)) { 1552 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1553 1554 tap->wt_flags = 0; 1555 tap->wt_rate = rate; 1556 1557 ieee80211_radiotap_tx(vap, m0); 1558 } 1559 1560 data->m = m0; 1561 data->ni = ni; 1562 1563 /* remember link conditions for rate adaptation algorithm */ 1564 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) { 1565 data->rix = ni->ni_txrate; 1566 /* XXX probably need last rssi value and not avg */ 1567 data->rssi = ic->ic_node_getrssi(ni); 1568 } else 1569 data->rix = IEEE80211_FIXED_RATE_NONE; 1570 1571 if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1572 flags |= RT2661_TX_NEED_ACK; 1573 1574 dur = ieee80211_ack_duration(ic->ic_rt, 1575 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1576 *(uint16_t *)wh->i_dur = htole16(dur); 1577 } 1578 1579 rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs, 1580 nsegs, ac); 1581 1582 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1583 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1584 1585 DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n", 1586 m0->m_pkthdr.len, txq->cur, rate); 1587 1588 /* kick Tx */ 1589 txq->queued++; 1590 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1591 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac); 1592 1593 return 0; 1594 } 1595 1596 static void 1597 rt2661_start_locked(struct ifnet *ifp) 1598 { 1599 struct rt2661_softc *sc = ifp->if_softc; 1600 struct mbuf *m; 1601 struct ieee80211_node *ni; 1602 int ac; 1603 1604 /* prevent management frames from being sent if we're not ready */ 1605 if (!(ifp->if_flags & IFF_RUNNING) || sc->sc_invalid) 1606 return; 1607 1608 for (;;) { 1609 m = ifq_dequeue(&ifp->if_snd); 1610 if (m == NULL) 1611 break; 1612 1613 ac = M_WME_GETAC(m); 1614 if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) { 1615 /* there is no place left in this ring */ 1616 ifq_prepend(&ifp->if_snd, m); 1617 ifq_set_oactive(&ifp->if_snd); 1618 break; 1619 } 1620 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1621 if (rt2661_tx_data(sc, m, ni, ac) != 0) { 1622 ieee80211_free_node(ni); 1623 IFNET_STAT_INC(ifp, oerrors, 1); 1624 break; 1625 } 1626 1627 sc->sc_tx_timer = 5; 1628 } 1629 } 1630 1631 static void 1632 rt2661_start(struct ifnet *ifp, struct ifaltq_subque *ifsq) 1633 { 1634 ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq); 1635 rt2661_start_locked(ifp); 1636 } 1637 1638 static int 1639 rt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1640 const struct ieee80211_bpf_params *params) 1641 { 1642 struct ieee80211com *ic = ni->ni_ic; 1643 struct ifnet *ifp = ic->ic_ifp; 1644 struct rt2661_softc *sc = ifp->if_softc; 1645 1646 /* prevent management frames from being sent if we're not ready */ 1647 if (!(ifp->if_flags & IFF_RUNNING)) { 1648 m_freem(m); 1649 ieee80211_free_node(ni); 1650 return ENETDOWN; 1651 } 1652 if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) { 1653 ifq_set_oactive(&ifp->if_snd); 1654 m_freem(m); 1655 ieee80211_free_node(ni); 1656 return ENOBUFS; /* XXX */ 1657 } 1658 1659 IFNET_STAT_INC(ifp, opackets, 1); 1660 1661 /* 1662 * Legacy path; interpret frame contents to decide 1663 * precisely how to send the frame. 1664 * XXX raw path 1665 */ 1666 if (rt2661_tx_mgt(sc, m, ni) != 0) 1667 goto bad; 1668 sc->sc_tx_timer = 5; 1669 1670 return 0; 1671 bad: 1672 IFNET_STAT_INC(ifp, oerrors, 1); 1673 ieee80211_free_node(ni); 1674 return EIO; /* XXX */ 1675 } 1676 1677 static void 1678 rt2661_watchdog_callout(void *arg) 1679 { 1680 struct rt2661_softc *sc = (struct rt2661_softc *)arg; 1681 struct ifnet *ifp = sc->sc_ifp; 1682 1683 KASSERT(ifp->if_flags & IFF_RUNNING, ("not running")); 1684 1685 if (sc->sc_invalid) /* card ejected */ 1686 return; 1687 1688 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) { 1689 if_printf(ifp, "device timeout\n"); 1690 rt2661_init_locked(sc); 1691 IFNET_STAT_INC(ifp, oerrors, 1); 1692 /* NB: callout is reset in rt2661_init() */ 1693 return; 1694 } 1695 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog_callout, sc); 1696 1697 } 1698 1699 static int 1700 rt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *ucred) 1701 { 1702 struct rt2661_softc *sc = ifp->if_softc; 1703 struct ieee80211com *ic = ifp->if_l2com; 1704 struct ifreq *ifr = (struct ifreq *) data; 1705 int error = 0, startall = 0; 1706 1707 switch (cmd) { 1708 case SIOCSIFFLAGS: 1709 if (ifp->if_flags & IFF_UP) { 1710 if ((ifp->if_flags & IFF_RUNNING) == 0) { 1711 rt2661_init_locked(sc); 1712 startall = 1; 1713 } else 1714 rt2661_update_promisc(ifp); 1715 } else { 1716 if (ifp->if_flags & IFF_RUNNING) 1717 rt2661_stop_locked(sc); 1718 } 1719 if (startall) 1720 ieee80211_start_all(ic); 1721 break; 1722 case SIOCGIFMEDIA: 1723 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1724 break; 1725 case SIOCGIFADDR: 1726 error = ether_ioctl(ifp, cmd, data); 1727 break; 1728 default: 1729 error = EINVAL; 1730 break; 1731 } 1732 return error; 1733 } 1734 1735 static void 1736 rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val) 1737 { 1738 uint32_t tmp; 1739 int ntries; 1740 1741 for (ntries = 0; ntries < 100; ntries++) { 1742 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1743 break; 1744 DELAY(1); 1745 } 1746 if (ntries == 100) { 1747 device_printf(sc->sc_dev, "could not write to BBP\n"); 1748 return; 1749 } 1750 1751 tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val; 1752 RAL_WRITE(sc, RT2661_PHY_CSR3, tmp); 1753 1754 DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val); 1755 } 1756 1757 static uint8_t 1758 rt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg) 1759 { 1760 uint32_t val; 1761 int ntries; 1762 1763 for (ntries = 0; ntries < 100; ntries++) { 1764 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1765 break; 1766 DELAY(1); 1767 } 1768 if (ntries == 100) { 1769 device_printf(sc->sc_dev, "could not read from BBP\n"); 1770 return 0; 1771 } 1772 1773 val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8; 1774 RAL_WRITE(sc, RT2661_PHY_CSR3, val); 1775 1776 for (ntries = 0; ntries < 100; ntries++) { 1777 val = RAL_READ(sc, RT2661_PHY_CSR3); 1778 if (!(val & RT2661_BBP_BUSY)) 1779 return val & 0xff; 1780 DELAY(1); 1781 } 1782 1783 device_printf(sc->sc_dev, "could not read from BBP\n"); 1784 return 0; 1785 } 1786 1787 static void 1788 rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val) 1789 { 1790 uint32_t tmp; 1791 int ntries; 1792 1793 for (ntries = 0; ntries < 100; ntries++) { 1794 if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY)) 1795 break; 1796 DELAY(1); 1797 } 1798 if (ntries == 100) { 1799 device_printf(sc->sc_dev, "could not write to RF\n"); 1800 return; 1801 } 1802 1803 tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 | 1804 (reg & 3); 1805 RAL_WRITE(sc, RT2661_PHY_CSR4, tmp); 1806 1807 /* remember last written value in sc */ 1808 sc->rf_regs[reg] = val; 1809 1810 DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff); 1811 } 1812 1813 static int 1814 rt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg) 1815 { 1816 if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY) 1817 return EIO; /* there is already a command pending */ 1818 1819 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 1820 RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg); 1821 1822 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd); 1823 1824 return 0; 1825 } 1826 1827 static void 1828 rt2661_select_antenna(struct rt2661_softc *sc) 1829 { 1830 uint8_t bbp4, bbp77; 1831 uint32_t tmp; 1832 1833 bbp4 = rt2661_bbp_read(sc, 4); 1834 bbp77 = rt2661_bbp_read(sc, 77); 1835 1836 /* TBD */ 1837 1838 /* make sure Rx is disabled before switching antenna */ 1839 tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 1840 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 1841 1842 rt2661_bbp_write(sc, 4, bbp4); 1843 rt2661_bbp_write(sc, 77, bbp77); 1844 1845 /* restore Rx filter */ 1846 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 1847 } 1848 1849 /* 1850 * Enable multi-rate retries for frames sent at OFDM rates. 1851 * In 802.11b/g mode, allow fallback to CCK rates. 1852 */ 1853 static void 1854 rt2661_enable_mrr(struct rt2661_softc *sc) 1855 { 1856 struct ifnet *ifp = sc->sc_ifp; 1857 struct ieee80211com *ic = ifp->if_l2com; 1858 uint32_t tmp; 1859 1860 tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1861 1862 tmp &= ~RT2661_MRR_CCK_FALLBACK; 1863 if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan)) 1864 tmp |= RT2661_MRR_CCK_FALLBACK; 1865 tmp |= RT2661_MRR_ENABLED; 1866 1867 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1868 } 1869 1870 static void 1871 rt2661_set_txpreamble(struct rt2661_softc *sc) 1872 { 1873 struct ifnet *ifp = sc->sc_ifp; 1874 struct ieee80211com *ic = ifp->if_l2com; 1875 uint32_t tmp; 1876 1877 tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1878 1879 tmp &= ~RT2661_SHORT_PREAMBLE; 1880 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1881 tmp |= RT2661_SHORT_PREAMBLE; 1882 1883 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1884 } 1885 1886 static void 1887 rt2661_set_basicrates(struct rt2661_softc *sc, 1888 const struct ieee80211_rateset *rs) 1889 { 1890 #define RV(r) ((r) & IEEE80211_RATE_VAL) 1891 struct ifnet *ifp = sc->sc_ifp; 1892 struct ieee80211com *ic = ifp->if_l2com; 1893 uint32_t mask = 0; 1894 uint8_t rate; 1895 int i, j; 1896 1897 for (i = 0; i < rs->rs_nrates; i++) { 1898 rate = rs->rs_rates[i]; 1899 1900 if (!(rate & IEEE80211_RATE_BASIC)) 1901 continue; 1902 1903 /* 1904 * Find h/w rate index. We know it exists because the rate 1905 * set has already been negotiated. 1906 */ 1907 for (j = 0; ic->ic_sup_rates[IEEE80211_MODE_11G].rs_rates[j] != RV(rate); j++); 1908 1909 mask |= 1 << j; 1910 } 1911 1912 RAL_WRITE(sc, RT2661_TXRX_CSR5, mask); 1913 1914 DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask); 1915 #undef RV 1916 } 1917 1918 /* 1919 * Reprogram MAC/BBP to switch to a new band. Values taken from the reference 1920 * driver. 1921 */ 1922 static void 1923 rt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c) 1924 { 1925 uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104; 1926 uint32_t tmp; 1927 1928 /* update all BBP registers that depend on the band */ 1929 bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c; 1930 bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48; 1931 if (IEEE80211_IS_CHAN_5GHZ(c)) { 1932 bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c; 1933 bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10; 1934 } 1935 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 1936 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 1937 bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10; 1938 } 1939 1940 rt2661_bbp_write(sc, 17, bbp17); 1941 rt2661_bbp_write(sc, 96, bbp96); 1942 rt2661_bbp_write(sc, 104, bbp104); 1943 1944 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 1945 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 1946 rt2661_bbp_write(sc, 75, 0x80); 1947 rt2661_bbp_write(sc, 86, 0x80); 1948 rt2661_bbp_write(sc, 88, 0x80); 1949 } 1950 1951 rt2661_bbp_write(sc, 35, bbp35); 1952 rt2661_bbp_write(sc, 97, bbp97); 1953 rt2661_bbp_write(sc, 98, bbp98); 1954 1955 tmp = RAL_READ(sc, RT2661_PHY_CSR0); 1956 tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ); 1957 if (IEEE80211_IS_CHAN_2GHZ(c)) 1958 tmp |= RT2661_PA_PE_2GHZ; 1959 else 1960 tmp |= RT2661_PA_PE_5GHZ; 1961 RAL_WRITE(sc, RT2661_PHY_CSR0, tmp); 1962 } 1963 1964 static void 1965 rt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c) 1966 { 1967 struct ifnet *ifp = sc->sc_ifp; 1968 struct ieee80211com *ic = ifp->if_l2com; 1969 const struct rfprog *rfprog; 1970 uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT; 1971 int8_t power; 1972 u_int i, chan; 1973 1974 chan = ieee80211_chan2ieee(ic, c); 1975 KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan)); 1976 1977 /* select the appropriate RF settings based on what EEPROM says */ 1978 rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2; 1979 1980 /* find the settings for this channel (we know it exists) */ 1981 for (i = 0; rfprog[i].chan != chan; i++); 1982 1983 power = sc->txpow[i]; 1984 if (power < 0) { 1985 bbp94 += power; 1986 power = 0; 1987 } else if (power > 31) { 1988 bbp94 += power - 31; 1989 power = 31; 1990 } 1991 1992 /* 1993 * If we are switching from the 2GHz band to the 5GHz band or 1994 * vice-versa, BBP registers need to be reprogrammed. 1995 */ 1996 if (c->ic_flags != sc->sc_curchan->ic_flags) { 1997 rt2661_select_band(sc, c); 1998 rt2661_select_antenna(sc); 1999 } 2000 sc->sc_curchan = c; 2001 2002 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2003 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2004 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 2005 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2006 2007 DELAY(200); 2008 2009 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2010 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2011 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1); 2012 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2013 2014 DELAY(200); 2015 2016 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2017 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2018 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 2019 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2020 2021 /* enable smart mode for MIMO-capable RFs */ 2022 bbp3 = rt2661_bbp_read(sc, 3); 2023 2024 bbp3 &= ~RT2661_SMART_MODE; 2025 if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529) 2026 bbp3 |= RT2661_SMART_MODE; 2027 2028 rt2661_bbp_write(sc, 3, bbp3); 2029 2030 if (bbp94 != RT2661_BBPR94_DEFAULT) 2031 rt2661_bbp_write(sc, 94, bbp94); 2032 2033 /* 5GHz radio needs a 1ms delay here */ 2034 if (IEEE80211_IS_CHAN_5GHZ(c)) 2035 DELAY(1000); 2036 } 2037 2038 static void 2039 rt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid) 2040 { 2041 uint32_t tmp; 2042 2043 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2044 RAL_WRITE(sc, RT2661_MAC_CSR4, tmp); 2045 2046 tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16; 2047 RAL_WRITE(sc, RT2661_MAC_CSR5, tmp); 2048 } 2049 2050 static void 2051 rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr) 2052 { 2053 uint32_t tmp; 2054 2055 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2056 RAL_WRITE(sc, RT2661_MAC_CSR2, tmp); 2057 2058 tmp = addr[4] | addr[5] << 8; 2059 RAL_WRITE(sc, RT2661_MAC_CSR3, tmp); 2060 } 2061 2062 static void 2063 rt2661_update_promisc(struct ifnet *ifp) 2064 { 2065 struct rt2661_softc *sc = ifp->if_softc; 2066 uint32_t tmp; 2067 2068 tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2069 2070 tmp &= ~RT2661_DROP_NOT_TO_ME; 2071 if (!(ifp->if_flags & IFF_PROMISC)) 2072 tmp |= RT2661_DROP_NOT_TO_ME; 2073 2074 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2075 2076 DPRINTF(sc, "%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2077 "entering" : "leaving"); 2078 } 2079 2080 /* 2081 * Update QoS (802.11e) settings for each h/w Tx ring. 2082 */ 2083 static int 2084 rt2661_wme_update(struct ieee80211com *ic) 2085 { 2086 struct rt2661_softc *sc = ic->ic_ifp->if_softc; 2087 const struct wmeParams *wmep; 2088 2089 wmep = ic->ic_wme.wme_chanParams.cap_wmeParams; 2090 2091 /* XXX: not sure about shifts. */ 2092 /* XXX: the reference driver plays with AC_VI settings too. */ 2093 2094 /* update TxOp */ 2095 RAL_WRITE(sc, RT2661_AC_TXOP_CSR0, 2096 wmep[WME_AC_BE].wmep_txopLimit << 16 | 2097 wmep[WME_AC_BK].wmep_txopLimit); 2098 RAL_WRITE(sc, RT2661_AC_TXOP_CSR1, 2099 wmep[WME_AC_VI].wmep_txopLimit << 16 | 2100 wmep[WME_AC_VO].wmep_txopLimit); 2101 2102 /* update CWmin */ 2103 RAL_WRITE(sc, RT2661_CWMIN_CSR, 2104 wmep[WME_AC_BE].wmep_logcwmin << 12 | 2105 wmep[WME_AC_BK].wmep_logcwmin << 8 | 2106 wmep[WME_AC_VI].wmep_logcwmin << 4 | 2107 wmep[WME_AC_VO].wmep_logcwmin); 2108 2109 /* update CWmax */ 2110 RAL_WRITE(sc, RT2661_CWMAX_CSR, 2111 wmep[WME_AC_BE].wmep_logcwmax << 12 | 2112 wmep[WME_AC_BK].wmep_logcwmax << 8 | 2113 wmep[WME_AC_VI].wmep_logcwmax << 4 | 2114 wmep[WME_AC_VO].wmep_logcwmax); 2115 2116 /* update Aifsn */ 2117 RAL_WRITE(sc, RT2661_AIFSN_CSR, 2118 wmep[WME_AC_BE].wmep_aifsn << 12 | 2119 wmep[WME_AC_BK].wmep_aifsn << 8 | 2120 wmep[WME_AC_VI].wmep_aifsn << 4 | 2121 wmep[WME_AC_VO].wmep_aifsn); 2122 2123 return 0; 2124 } 2125 2126 static void 2127 rt2661_update_slot(struct ifnet *ifp) 2128 { 2129 struct rt2661_softc *sc = ifp->if_softc; 2130 struct ieee80211com *ic = ifp->if_l2com; 2131 uint8_t slottime; 2132 uint32_t tmp; 2133 2134 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2135 2136 tmp = RAL_READ(sc, RT2661_MAC_CSR9); 2137 tmp = (tmp & ~0xff) | slottime; 2138 RAL_WRITE(sc, RT2661_MAC_CSR9, tmp); 2139 } 2140 2141 static const char * 2142 rt2661_get_rf(int rev) 2143 { 2144 switch (rev) { 2145 case RT2661_RF_5225: return "RT5225"; 2146 case RT2661_RF_5325: return "RT5325 (MIMO XR)"; 2147 case RT2661_RF_2527: return "RT2527"; 2148 case RT2661_RF_2529: return "RT2529 (MIMO XR)"; 2149 default: return "unknown"; 2150 } 2151 } 2152 2153 static void 2154 rt2661_read_eeprom(struct rt2661_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN]) 2155 { 2156 uint16_t val; 2157 int i; 2158 2159 /* read MAC address */ 2160 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01); 2161 macaddr[0] = val & 0xff; 2162 macaddr[1] = val >> 8; 2163 2164 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23); 2165 macaddr[2] = val & 0xff; 2166 macaddr[3] = val >> 8; 2167 2168 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45); 2169 macaddr[4] = val & 0xff; 2170 macaddr[5] = val >> 8; 2171 2172 val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA); 2173 /* XXX: test if different from 0xffff? */ 2174 sc->rf_rev = (val >> 11) & 0x1f; 2175 sc->hw_radio = (val >> 10) & 0x1; 2176 sc->rx_ant = (val >> 4) & 0x3; 2177 sc->tx_ant = (val >> 2) & 0x3; 2178 sc->nb_ant = val & 0x3; 2179 2180 DPRINTF(sc, "RF revision=%d\n", sc->rf_rev); 2181 2182 val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2); 2183 sc->ext_5ghz_lna = (val >> 6) & 0x1; 2184 sc->ext_2ghz_lna = (val >> 4) & 0x1; 2185 2186 DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n", 2187 sc->ext_2ghz_lna, sc->ext_5ghz_lna); 2188 2189 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET); 2190 if ((val & 0xff) != 0xff) 2191 sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */ 2192 2193 /* Only [-10, 10] is valid */ 2194 if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10) 2195 sc->rssi_2ghz_corr = 0; 2196 2197 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET); 2198 if ((val & 0xff) != 0xff) 2199 sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */ 2200 2201 /* Only [-10, 10] is valid */ 2202 if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10) 2203 sc->rssi_5ghz_corr = 0; 2204 2205 /* adjust RSSI correction for external low-noise amplifier */ 2206 if (sc->ext_2ghz_lna) 2207 sc->rssi_2ghz_corr -= 14; 2208 if (sc->ext_5ghz_lna) 2209 sc->rssi_5ghz_corr -= 14; 2210 2211 DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n", 2212 sc->rssi_2ghz_corr, sc->rssi_5ghz_corr); 2213 2214 val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET); 2215 if ((val >> 8) != 0xff) 2216 sc->rfprog = (val >> 8) & 0x3; 2217 if ((val & 0xff) != 0xff) 2218 sc->rffreq = val & 0xff; 2219 2220 DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq); 2221 2222 /* read Tx power for all a/b/g channels */ 2223 for (i = 0; i < 19; i++) { 2224 val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i); 2225 sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */ 2226 DPRINTF(sc, "Channel=%d Tx power=%d\n", 2227 rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]); 2228 sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */ 2229 DPRINTF(sc, "Channel=%d Tx power=%d\n", 2230 rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]); 2231 } 2232 2233 /* read vendor-specific BBP values */ 2234 for (i = 0; i < 16; i++) { 2235 val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i); 2236 if (val == 0 || val == 0xffff) 2237 continue; /* skip invalid entries */ 2238 sc->bbp_prom[i].reg = val >> 8; 2239 sc->bbp_prom[i].val = val & 0xff; 2240 DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg, 2241 sc->bbp_prom[i].val); 2242 } 2243 } 2244 2245 static int 2246 rt2661_bbp_init(struct rt2661_softc *sc) 2247 { 2248 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2249 int i, ntries; 2250 uint8_t val; 2251 2252 /* wait for BBP to be ready */ 2253 for (ntries = 0; ntries < 100; ntries++) { 2254 val = rt2661_bbp_read(sc, 0); 2255 if (val != 0 && val != 0xff) 2256 break; 2257 DELAY(100); 2258 } 2259 if (ntries == 100) { 2260 device_printf(sc->sc_dev, "timeout waiting for BBP\n"); 2261 return EIO; 2262 } 2263 2264 /* initialize BBP registers to default values */ 2265 for (i = 0; i < N(rt2661_def_bbp); i++) { 2266 rt2661_bbp_write(sc, rt2661_def_bbp[i].reg, 2267 rt2661_def_bbp[i].val); 2268 } 2269 2270 /* write vendor-specific BBP values (from EEPROM) */ 2271 for (i = 0; i < 16; i++) { 2272 if (sc->bbp_prom[i].reg == 0) 2273 continue; 2274 rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2275 } 2276 2277 return 0; 2278 #undef N 2279 } 2280 2281 static void 2282 rt2661_init_locked(struct rt2661_softc *sc) 2283 { 2284 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2285 struct ifnet *ifp = sc->sc_ifp; 2286 struct ieee80211com *ic = ifp->if_l2com; 2287 uint32_t tmp, sta[3]; 2288 int i, error, ntries; 2289 2290 if ((sc->sc_flags & RAL_FW_LOADED) == 0) { 2291 error = rt2661_load_microcode(sc); 2292 if (error != 0) { 2293 if_printf(ifp, 2294 "%s: could not load 8051 microcode, error %d\n", 2295 __func__, error); 2296 return; 2297 } 2298 sc->sc_flags |= RAL_FW_LOADED; 2299 } 2300 2301 rt2661_stop_locked(sc); 2302 2303 /* initialize Tx rings */ 2304 RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr); 2305 RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr); 2306 RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr); 2307 RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr); 2308 2309 /* initialize Mgt ring */ 2310 RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr); 2311 2312 /* initialize Rx ring */ 2313 RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr); 2314 2315 /* initialize Tx rings sizes */ 2316 RAL_WRITE(sc, RT2661_TX_RING_CSR0, 2317 RT2661_TX_RING_COUNT << 24 | 2318 RT2661_TX_RING_COUNT << 16 | 2319 RT2661_TX_RING_COUNT << 8 | 2320 RT2661_TX_RING_COUNT); 2321 2322 RAL_WRITE(sc, RT2661_TX_RING_CSR1, 2323 RT2661_TX_DESC_WSIZE << 16 | 2324 RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */ 2325 RT2661_MGT_RING_COUNT); 2326 2327 /* initialize Rx rings */ 2328 RAL_WRITE(sc, RT2661_RX_RING_CSR, 2329 RT2661_RX_DESC_BACK << 16 | 2330 RT2661_RX_DESC_WSIZE << 8 | 2331 RT2661_RX_RING_COUNT); 2332 2333 /* XXX: some magic here */ 2334 RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa); 2335 2336 /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */ 2337 RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f); 2338 2339 /* load base address of Rx ring */ 2340 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2); 2341 2342 /* initialize MAC registers to default values */ 2343 for (i = 0; i < N(rt2661_def_mac); i++) 2344 RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val); 2345 2346 rt2661_set_macaddr(sc, IF_LLADDR(ifp)); 2347 2348 /* set host ready */ 2349 RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2350 RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2351 2352 /* wait for BBP/RF to wakeup */ 2353 for (ntries = 0; ntries < 1000; ntries++) { 2354 if (RAL_READ(sc, RT2661_MAC_CSR12) & 8) 2355 break; 2356 DELAY(1000); 2357 } 2358 if (ntries == 1000) { 2359 kprintf("timeout waiting for BBP/RF to wakeup\n"); 2360 rt2661_stop_locked(sc); 2361 return; 2362 } 2363 2364 if (rt2661_bbp_init(sc) != 0) { 2365 rt2661_stop_locked(sc); 2366 return; 2367 } 2368 2369 /* select default channel */ 2370 sc->sc_curchan = ic->ic_curchan; 2371 rt2661_select_band(sc, sc->sc_curchan); 2372 rt2661_select_antenna(sc); 2373 rt2661_set_chan(sc, sc->sc_curchan); 2374 2375 /* update Rx filter */ 2376 tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff; 2377 2378 tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR; 2379 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2380 tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR | 2381 RT2661_DROP_ACKCTS; 2382 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 2383 ic->ic_opmode != IEEE80211_M_MBSS) 2384 tmp |= RT2661_DROP_TODS; 2385 if (!(ifp->if_flags & IFF_PROMISC)) 2386 tmp |= RT2661_DROP_NOT_TO_ME; 2387 } 2388 2389 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2390 2391 /* clear STA registers */ 2392 RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta)); 2393 2394 /* initialize ASIC */ 2395 RAL_WRITE(sc, RT2661_MAC_CSR1, 4); 2396 2397 /* clear any pending interrupt */ 2398 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2399 2400 /* enable interrupts */ 2401 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 2402 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 2403 2404 /* kick Rx */ 2405 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1); 2406 2407 ifq_clr_oactive(&ifp->if_snd); 2408 ifp->if_flags |= IFF_RUNNING; 2409 2410 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog_callout, sc); 2411 #undef N 2412 } 2413 2414 static void 2415 rt2661_init(void *priv) 2416 { 2417 struct rt2661_softc *sc = priv; 2418 struct ifnet *ifp = sc->sc_ifp; 2419 struct ieee80211com *ic = ifp->if_l2com; 2420 2421 rt2661_init_locked(sc); 2422 2423 if (ifp->if_flags & IFF_RUNNING) 2424 ieee80211_start_all(ic); /* start all vap's */ 2425 } 2426 2427 void 2428 rt2661_stop_locked(struct rt2661_softc *sc) 2429 { 2430 struct ifnet *ifp = sc->sc_ifp; 2431 uint32_t tmp; 2432 volatile int *flags = &sc->sc_flags; 2433 2434 while (*flags & RAL_INPUT_RUNNING) 2435 zsleep(sc, &wlan_global_serializer, 0, "ralrunning", hz/10); 2436 2437 callout_stop(&sc->watchdog_ch); 2438 sc->sc_tx_timer = 0; 2439 2440 if (ifp->if_flags & IFF_RUNNING) { 2441 ifp->if_flags &= ~IFF_RUNNING; 2442 ifq_clr_oactive(&ifp->if_snd); 2443 2444 /* abort Tx (for all 5 Tx rings) */ 2445 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16); 2446 2447 /* disable Rx (value remains after reset!) */ 2448 tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2449 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2450 2451 /* reset ASIC */ 2452 RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2453 RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2454 2455 /* disable interrupts */ 2456 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff); 2457 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 2458 2459 /* clear any pending interrupt */ 2460 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2461 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff); 2462 2463 /* reset Tx and Rx rings */ 2464 rt2661_reset_tx_ring(sc, &sc->txq[0]); 2465 rt2661_reset_tx_ring(sc, &sc->txq[1]); 2466 rt2661_reset_tx_ring(sc, &sc->txq[2]); 2467 rt2661_reset_tx_ring(sc, &sc->txq[3]); 2468 rt2661_reset_tx_ring(sc, &sc->mgtq); 2469 rt2661_reset_rx_ring(sc, &sc->rxq); 2470 } 2471 } 2472 2473 void 2474 rt2661_stop(void *priv) 2475 { 2476 struct rt2661_softc *sc = priv; 2477 2478 rt2661_stop_locked(sc); 2479 } 2480 2481 static int 2482 rt2661_load_microcode(struct rt2661_softc *sc) 2483 { 2484 struct ifnet *ifp = sc->sc_ifp; 2485 const struct firmware *fp; 2486 const char *imagename; 2487 int ntries, error; 2488 2489 switch (sc->sc_id) { 2490 case 0x0301: imagename = "rt2561sfw"; break; 2491 case 0x0302: imagename = "rt2561fw"; break; 2492 case 0x0401: imagename = "rt2661fw"; break; 2493 default: 2494 if_printf(ifp, "%s: unexpected pci device id 0x%x, " 2495 "don't know how to retrieve firmware\n", 2496 __func__, sc->sc_id); 2497 return EINVAL; 2498 } 2499 2500 wlan_assert_serialized(); 2501 wlan_serialize_exit(); 2502 fp = firmware_get(imagename); 2503 wlan_serialize_enter(); 2504 2505 if (fp == NULL) { 2506 if_printf(ifp, "%s: unable to retrieve firmware image %s\n", 2507 __func__, imagename); 2508 return EINVAL; 2509 } 2510 2511 /* 2512 * Load 8051 microcode into NIC. 2513 */ 2514 /* reset 8051 */ 2515 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2516 2517 /* cancel any pending Host to MCU command */ 2518 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0); 2519 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 2520 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0); 2521 2522 /* write 8051's microcode */ 2523 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL); 2524 RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize); 2525 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2526 2527 /* kick 8051's ass */ 2528 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0); 2529 2530 /* wait for 8051 to initialize */ 2531 for (ntries = 0; ntries < 500; ntries++) { 2532 if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY) 2533 break; 2534 DELAY(100); 2535 } 2536 if (ntries == 500) { 2537 if_printf(ifp, "%s: timeout waiting for MCU to initialize\n", 2538 __func__); 2539 error = EIO; 2540 } else 2541 error = 0; 2542 2543 firmware_put(fp, FIRMWARE_UNLOAD); 2544 return error; 2545 } 2546 2547 #ifdef notyet 2548 /* 2549 * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and 2550 * false CCA count. This function is called periodically (every seconds) when 2551 * in the RUN state. Values taken from the reference driver. 2552 */ 2553 static void 2554 rt2661_rx_tune(struct rt2661_softc *sc) 2555 { 2556 uint8_t bbp17; 2557 uint16_t cca; 2558 int lo, hi, dbm; 2559 2560 /* 2561 * Tuning range depends on operating band and on the presence of an 2562 * external low-noise amplifier. 2563 */ 2564 lo = 0x20; 2565 if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan)) 2566 lo += 0x08; 2567 if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) || 2568 (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna)) 2569 lo += 0x10; 2570 hi = lo + 0x20; 2571 2572 /* retrieve false CCA count since last call (clear on read) */ 2573 cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff; 2574 2575 if (dbm >= -35) { 2576 bbp17 = 0x60; 2577 } else if (dbm >= -58) { 2578 bbp17 = hi; 2579 } else if (dbm >= -66) { 2580 bbp17 = lo + 0x10; 2581 } else if (dbm >= -74) { 2582 bbp17 = lo + 0x08; 2583 } else { 2584 /* RSSI < -74dBm, tune using false CCA count */ 2585 2586 bbp17 = sc->bbp17; /* current value */ 2587 2588 hi -= 2 * (-74 - dbm); 2589 if (hi < lo) 2590 hi = lo; 2591 2592 if (bbp17 > hi) { 2593 bbp17 = hi; 2594 2595 } else if (cca > 512) { 2596 if (++bbp17 > hi) 2597 bbp17 = hi; 2598 } else if (cca < 100) { 2599 if (--bbp17 < lo) 2600 bbp17 = lo; 2601 } 2602 } 2603 2604 if (bbp17 != sc->bbp17) { 2605 rt2661_bbp_write(sc, 17, bbp17); 2606 sc->bbp17 = bbp17; 2607 } 2608 } 2609 2610 /* 2611 * Enter/Leave radar detection mode. 2612 * This is for 802.11h additional regulatory domains. 2613 */ 2614 static void 2615 rt2661_radar_start(struct rt2661_softc *sc) 2616 { 2617 uint32_t tmp; 2618 2619 /* disable Rx */ 2620 tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2621 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2622 2623 rt2661_bbp_write(sc, 82, 0x20); 2624 rt2661_bbp_write(sc, 83, 0x00); 2625 rt2661_bbp_write(sc, 84, 0x40); 2626 2627 /* save current BBP registers values */ 2628 sc->bbp18 = rt2661_bbp_read(sc, 18); 2629 sc->bbp21 = rt2661_bbp_read(sc, 21); 2630 sc->bbp22 = rt2661_bbp_read(sc, 22); 2631 sc->bbp16 = rt2661_bbp_read(sc, 16); 2632 sc->bbp17 = rt2661_bbp_read(sc, 17); 2633 sc->bbp64 = rt2661_bbp_read(sc, 64); 2634 2635 rt2661_bbp_write(sc, 18, 0xff); 2636 rt2661_bbp_write(sc, 21, 0x3f); 2637 rt2661_bbp_write(sc, 22, 0x3f); 2638 rt2661_bbp_write(sc, 16, 0xbd); 2639 rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34); 2640 rt2661_bbp_write(sc, 64, 0x21); 2641 2642 /* restore Rx filter */ 2643 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2644 } 2645 2646 static int 2647 rt2661_radar_stop(struct rt2661_softc *sc) 2648 { 2649 uint8_t bbp66; 2650 2651 /* read radar detection result */ 2652 bbp66 = rt2661_bbp_read(sc, 66); 2653 2654 /* restore BBP registers values */ 2655 rt2661_bbp_write(sc, 16, sc->bbp16); 2656 rt2661_bbp_write(sc, 17, sc->bbp17); 2657 rt2661_bbp_write(sc, 18, sc->bbp18); 2658 rt2661_bbp_write(sc, 21, sc->bbp21); 2659 rt2661_bbp_write(sc, 22, sc->bbp22); 2660 rt2661_bbp_write(sc, 64, sc->bbp64); 2661 2662 return bbp66 == 1; 2663 } 2664 #endif 2665 2666 static int 2667 rt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap) 2668 { 2669 struct ieee80211com *ic = vap->iv_ic; 2670 struct ieee80211_beacon_offsets bo; 2671 struct rt2661_tx_desc desc; 2672 struct mbuf *m0; 2673 int rate; 2674 2675 m0 = ieee80211_beacon_alloc(vap->iv_bss, &bo); 2676 if (m0 == NULL) { 2677 device_printf(sc->sc_dev, "could not allocate beacon frame\n"); 2678 return ENOBUFS; 2679 } 2680 2681 /* send beacons at the lowest available rate */ 2682 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2; 2683 2684 rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ, 2685 m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT); 2686 2687 /* copy the first 24 bytes of Tx descriptor into NIC memory */ 2688 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24); 2689 2690 /* copy beacon header and payload into NIC memory */ 2691 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24, 2692 mtod(m0, uint8_t *), m0->m_pkthdr.len); 2693 2694 m_freem(m0); 2695 2696 return 0; 2697 } 2698 2699 /* 2700 * Enable TSF synchronization and tell h/w to start sending beacons for IBSS 2701 * and HostAP operating modes. 2702 */ 2703 static void 2704 rt2661_enable_tsf_sync(struct rt2661_softc *sc) 2705 { 2706 struct ifnet *ifp = sc->sc_ifp; 2707 struct ieee80211com *ic = ifp->if_l2com; 2708 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2709 uint32_t tmp; 2710 2711 if (vap->iv_opmode != IEEE80211_M_STA) { 2712 /* 2713 * Change default 16ms TBTT adjustment to 8ms. 2714 * Must be done before enabling beacon generation. 2715 */ 2716 RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8); 2717 } 2718 2719 tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000; 2720 2721 /* set beacon interval (in 1/16ms unit) */ 2722 tmp |= vap->iv_bss->ni_intval * 16; 2723 2724 tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT; 2725 if (vap->iv_opmode == IEEE80211_M_STA) 2726 tmp |= RT2661_TSF_MODE(1); 2727 else 2728 tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON; 2729 2730 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp); 2731 } 2732 2733 static void 2734 rt2661_enable_tsf(struct rt2661_softc *sc) 2735 { 2736 RAL_WRITE(sc, RT2661_TXRX_CSR9, 2737 (RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000) 2738 | RT2661_TSF_TICKING | RT2661_TSF_MODE(2)); 2739 } 2740 2741 /* 2742 * Retrieve the "Received Signal Strength Indicator" from the raw values 2743 * contained in Rx descriptors. The computation depends on which band the 2744 * frame was received. Correction values taken from the reference driver. 2745 */ 2746 static int 2747 rt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw) 2748 { 2749 int lna, agc, rssi; 2750 2751 lna = (raw >> 5) & 0x3; 2752 agc = raw & 0x1f; 2753 2754 if (lna == 0) { 2755 /* 2756 * No mapping available. 2757 * 2758 * NB: Since RSSI is relative to noise floor, -1 is 2759 * adequate for caller to know error happened. 2760 */ 2761 return -1; 2762 } 2763 2764 rssi = (2 * agc) - RT2661_NOISE_FLOOR; 2765 2766 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) { 2767 rssi += sc->rssi_2ghz_corr; 2768 2769 if (lna == 1) 2770 rssi -= 64; 2771 else if (lna == 2) 2772 rssi -= 74; 2773 else if (lna == 3) 2774 rssi -= 90; 2775 } else { 2776 rssi += sc->rssi_5ghz_corr; 2777 2778 if (lna == 1) 2779 rssi -= 64; 2780 else if (lna == 2) 2781 rssi -= 86; 2782 else if (lna == 3) 2783 rssi -= 100; 2784 } 2785 return rssi; 2786 } 2787 2788 static void 2789 rt2661_scan_start(struct ieee80211com *ic) 2790 { 2791 struct ifnet *ifp = ic->ic_ifp; 2792 struct rt2661_softc *sc = ifp->if_softc; 2793 uint32_t tmp; 2794 2795 /* abort TSF synchronization */ 2796 tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 2797 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff); 2798 rt2661_set_bssid(sc, ifp->if_broadcastaddr); 2799 } 2800 2801 static void 2802 rt2661_scan_end(struct ieee80211com *ic) 2803 { 2804 struct ifnet *ifp = ic->ic_ifp; 2805 struct rt2661_softc *sc = ifp->if_softc; 2806 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2807 2808 rt2661_enable_tsf_sync(sc); 2809 /* XXX keep local copy */ 2810 rt2661_set_bssid(sc, vap->iv_bss->ni_bssid); 2811 } 2812 2813 static void 2814 rt2661_set_channel(struct ieee80211com *ic) 2815 { 2816 struct ifnet *ifp = ic->ic_ifp; 2817 struct rt2661_softc *sc = ifp->if_softc; 2818 2819 rt2661_set_chan(sc, ic->ic_curchan); 2820 } 2821