1 /* $FreeBSD: head/sys/dev/ral/rt2661.c 195618 2009-07-11 15:02:45Z rpaulo $ */ 2 3 /*- 4 * Copyright (c) 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 * 19 * $FreeBSD: head/sys/dev/ral/rt2661.c 195618 2009-07-11 15:02:45Z rpaulo $ 20 */ 21 22 /*- 23 * Ralink Technology RT2561, RT2561S and RT2661 chipset driver 24 * http://www.ralinktech.com/ 25 */ 26 27 #include <sys/param.h> 28 #include <sys/sysctl.h> 29 #include <sys/sockio.h> 30 #include <sys/mbuf.h> 31 #include <sys/kernel.h> 32 #include <sys/socket.h> 33 #include <sys/systm.h> 34 #include <sys/malloc.h> 35 #include <sys/lock.h> 36 #include <sys/mutex.h> 37 #include <sys/module.h> 38 #include <sys/bus.h> 39 #include <sys/endian.h> 40 #include <sys/firmware.h> 41 #include <sys/rman.h> 42 43 #include <net/bpf.h> 44 #include <net/if.h> 45 #include <net/if_arp.h> 46 #include <net/ethernet.h> 47 #include <net/if_dl.h> 48 #include <net/if_media.h> 49 #include <net/if_types.h> 50 #include <net/ifq_var.h> 51 52 #include <netproto/802_11/ieee80211_var.h> 53 #include <netproto/802_11/ieee80211_radiotap.h> 54 #include <netproto/802_11/ieee80211_regdomain.h> 55 #include <netproto/802_11/ieee80211_ratectl.h> 56 57 #include <netinet/in.h> 58 #include <netinet/in_systm.h> 59 #include <netinet/in_var.h> 60 #include <netinet/ip.h> 61 #include <netinet/if_ether.h> 62 63 #include <dev/netif/ral/rt2661reg.h> 64 #include <dev/netif/ral/rt2661var.h> 65 66 #define RAL_DEBUG 67 #ifdef RAL_DEBUG 68 #define DPRINTF(sc, fmt, ...) do { \ 69 if (sc->sc_debug > 0) \ 70 kprintf(fmt, __VA_ARGS__); \ 71 } while (0) 72 #define DPRINTFN(sc, n, fmt, ...) do { \ 73 if (sc->sc_debug >= (n)) \ 74 kprintf(fmt, __VA_ARGS__); \ 75 } while (0) 76 #else 77 #define DPRINTF(sc, fmt, ...) 78 #define DPRINTFN(sc, n, fmt, ...) 79 #endif 80 81 static struct ieee80211vap *rt2661_vap_create(struct ieee80211com *, 82 const char name[IFNAMSIZ], int unit, 83 enum ieee80211_opmode opmode, 84 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN], 85 const uint8_t mac[IEEE80211_ADDR_LEN]); 86 static void rt2661_vap_delete(struct ieee80211vap *); 87 static void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int, 88 int); 89 static int rt2661_alloc_tx_ring(struct rt2661_softc *, 90 struct rt2661_tx_ring *, int); 91 static void rt2661_reset_tx_ring(struct rt2661_softc *, 92 struct rt2661_tx_ring *); 93 static void rt2661_free_tx_ring(struct rt2661_softc *, 94 struct rt2661_tx_ring *); 95 static int rt2661_alloc_rx_ring(struct rt2661_softc *, 96 struct rt2661_rx_ring *, int); 97 static void rt2661_reset_rx_ring(struct rt2661_softc *, 98 struct rt2661_rx_ring *); 99 static void rt2661_free_rx_ring(struct rt2661_softc *, 100 struct rt2661_rx_ring *); 101 static int rt2661_newstate(struct ieee80211vap *, 102 enum ieee80211_state, int); 103 static uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t); 104 static void rt2661_rx_intr(struct rt2661_softc *); 105 static void rt2661_tx_intr(struct rt2661_softc *); 106 static void rt2661_tx_dma_intr(struct rt2661_softc *, 107 struct rt2661_tx_ring *); 108 static void rt2661_mcu_beacon_expire(struct rt2661_softc *); 109 static void rt2661_mcu_wakeup(struct rt2661_softc *); 110 static void rt2661_mcu_cmd_intr(struct rt2661_softc *); 111 static void rt2661_scan_start(struct ieee80211com *); 112 static void rt2661_scan_end(struct ieee80211com *); 113 static void rt2661_set_channel(struct ieee80211com *); 114 static void rt2661_setup_tx_desc(struct rt2661_softc *, 115 struct rt2661_tx_desc *, uint32_t, uint16_t, int, 116 int, const bus_dma_segment_t *, int, int); 117 static int rt2661_tx_data(struct rt2661_softc *, struct mbuf *, 118 struct ieee80211_node *, int); 119 static int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *, 120 struct ieee80211_node *); 121 static void rt2661_start_locked(struct ifnet *); 122 static void rt2661_start(struct ifnet *, struct ifaltq_subque *); 123 static int rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *, 124 const struct ieee80211_bpf_params *); 125 static void rt2661_watchdog_callout(void *); 126 static int rt2661_ioctl(struct ifnet *, u_long, caddr_t, 127 struct ucred *); 128 static void rt2661_bbp_write(struct rt2661_softc *, uint8_t, 129 uint8_t); 130 static uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t); 131 static void rt2661_rf_write(struct rt2661_softc *, uint8_t, 132 uint32_t); 133 static int rt2661_tx_cmd(struct rt2661_softc *, uint8_t, 134 uint16_t); 135 static void rt2661_select_antenna(struct rt2661_softc *); 136 static void rt2661_enable_mrr(struct rt2661_softc *); 137 static void rt2661_set_txpreamble(struct rt2661_softc *); 138 static void rt2661_set_basicrates(struct rt2661_softc *, 139 const struct ieee80211_rateset *); 140 static void rt2661_select_band(struct rt2661_softc *, 141 struct ieee80211_channel *); 142 static void rt2661_set_chan(struct rt2661_softc *, 143 struct ieee80211_channel *); 144 static void rt2661_set_bssid(struct rt2661_softc *, 145 const uint8_t *); 146 static void rt2661_set_macaddr(struct rt2661_softc *, 147 const uint8_t *); 148 static void rt2661_update_promisc(struct ifnet *); 149 static int rt2661_wme_update(struct ieee80211com *) __unused; 150 static void rt2661_update_slot(struct ifnet *); 151 static const char *rt2661_get_rf(int); 152 static void rt2661_read_eeprom(struct rt2661_softc *, 153 uint8_t macaddr[IEEE80211_ADDR_LEN]); 154 static int rt2661_bbp_init(struct rt2661_softc *); 155 static void rt2661_init_locked(struct rt2661_softc *); 156 static void rt2661_init(void *); 157 static void rt2661_stop_locked(struct rt2661_softc *); 158 static void rt2661_stop(void *); 159 static int rt2661_load_microcode(struct rt2661_softc *); 160 #ifdef notyet 161 static void rt2661_rx_tune(struct rt2661_softc *); 162 static void rt2661_radar_start(struct rt2661_softc *); 163 static int rt2661_radar_stop(struct rt2661_softc *); 164 #endif 165 static int rt2661_prepare_beacon(struct rt2661_softc *, 166 struct ieee80211vap *); 167 static void rt2661_enable_tsf_sync(struct rt2661_softc *); 168 static void rt2661_enable_tsf(struct rt2661_softc *); 169 static int rt2661_get_rssi(struct rt2661_softc *, uint8_t); 170 171 static const struct { 172 uint32_t reg; 173 uint32_t val; 174 } rt2661_def_mac[] = { 175 RT2661_DEF_MAC 176 }; 177 178 static const struct { 179 uint8_t reg; 180 uint8_t val; 181 } rt2661_def_bbp[] = { 182 RT2661_DEF_BBP 183 }; 184 185 static const struct rfprog { 186 uint8_t chan; 187 uint32_t r1, r2, r3, r4; 188 } rt2661_rf5225_1[] = { 189 RT2661_RF5225_1 190 }, rt2661_rf5225_2[] = { 191 RT2661_RF5225_2 192 }; 193 194 int 195 rt2661_attach(device_t dev, int id) 196 { 197 struct rt2661_softc *sc = device_get_softc(dev); 198 struct ieee80211com *ic; 199 struct ifnet *ifp; 200 uint32_t val; 201 int error, ac, ntries; 202 uint8_t bands; 203 uint8_t macaddr[IEEE80211_ADDR_LEN]; 204 struct sysctl_ctx_list *ctx; 205 struct sysctl_oid *tree; 206 207 sc->sc_id = id; 208 sc->sc_dev = dev; 209 210 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 211 if (ifp == NULL) { 212 device_printf(sc->sc_dev, "can not if_alloc()\n"); 213 return ENOMEM; 214 } 215 ic = ifp->if_l2com; 216 217 callout_init(&sc->watchdog_ch); 218 219 /* wait for NIC to initialize */ 220 for (ntries = 0; ntries < 1000; ntries++) { 221 if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0) 222 break; 223 DELAY(1000); 224 } 225 if (ntries == 1000) { 226 device_printf(sc->sc_dev, 227 "timeout waiting for NIC to initialize\n"); 228 error = EIO; 229 goto fail1; 230 } 231 232 /* retrieve RF rev. no and various other things from EEPROM */ 233 rt2661_read_eeprom(sc, macaddr); 234 235 device_printf(dev, "MAC/BBP RT%X, RF %s\n", val, 236 rt2661_get_rf(sc->rf_rev)); 237 238 /* 239 * Allocate Tx and Rx rings. 240 */ 241 for (ac = 0; ac < 4; ac++) { 242 error = rt2661_alloc_tx_ring(sc, &sc->txq[ac], 243 RT2661_TX_RING_COUNT); 244 if (error != 0) { 245 device_printf(sc->sc_dev, 246 "could not allocate Tx ring %d\n", ac); 247 goto fail2; 248 } 249 } 250 251 error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT); 252 if (error != 0) { 253 device_printf(sc->sc_dev, "could not allocate Mgt ring\n"); 254 goto fail2; 255 } 256 257 error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT); 258 if (error != 0) { 259 device_printf(sc->sc_dev, "could not allocate Rx ring\n"); 260 goto fail3; 261 } 262 263 ifp->if_softc = sc; 264 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 265 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 266 ifp->if_init = rt2661_init; 267 ifp->if_ioctl = rt2661_ioctl; 268 ifp->if_start = rt2661_start; 269 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN); 270 #ifdef notyet 271 ifq_set_ready(&ifp->if_snd); 272 #endif 273 274 ic->ic_ifp = ifp; 275 ic->ic_opmode = IEEE80211_M_STA; 276 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 277 278 /* set device capabilities */ 279 ic->ic_caps = 280 IEEE80211_C_STA /* station mode */ 281 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 282 | IEEE80211_C_HOSTAP /* hostap mode */ 283 | IEEE80211_C_MONITOR /* monitor mode */ 284 | IEEE80211_C_AHDEMO /* adhoc demo mode */ 285 | IEEE80211_C_WDS /* 4-address traffic works */ 286 | IEEE80211_C_MBSS /* mesh point link mode */ 287 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 288 | IEEE80211_C_SHSLOT /* short slot time supported */ 289 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 290 | IEEE80211_C_BGSCAN /* capable of bg scanning */ 291 #ifdef notyet 292 | IEEE80211_C_TXFRAG /* handle tx frags */ 293 | IEEE80211_C_WME /* 802.11e */ 294 #endif 295 ; 296 297 bands = 0; 298 setbit(&bands, IEEE80211_MODE_11B); 299 setbit(&bands, IEEE80211_MODE_11G); 300 if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325) 301 setbit(&bands, IEEE80211_MODE_11A); 302 ieee80211_init_channels(ic, NULL, &bands); 303 304 ieee80211_ifattach(ic, macaddr); 305 #if 0 306 ic->ic_wme.wme_update = rt2661_wme_update; 307 #endif 308 ic->ic_scan_start = rt2661_scan_start; 309 ic->ic_scan_end = rt2661_scan_end; 310 ic->ic_set_channel = rt2661_set_channel; 311 ic->ic_updateslot = rt2661_update_slot; 312 ic->ic_update_promisc = rt2661_update_promisc; 313 ic->ic_raw_xmit = rt2661_raw_xmit; 314 315 ic->ic_vap_create = rt2661_vap_create; 316 ic->ic_vap_delete = rt2661_vap_delete; 317 318 ieee80211_radiotap_attach(ic, 319 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 320 RT2661_TX_RADIOTAP_PRESENT, 321 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 322 RT2661_RX_RADIOTAP_PRESENT); 323 324 ctx = &sc->sc_sysctl_ctx; 325 sysctl_ctx_init(ctx); 326 tree = SYSCTL_ADD_NODE(ctx, SYSCTL_STATIC_CHILDREN(_hw), 327 OID_AUTO, 328 device_get_nameunit(sc->sc_dev), 329 CTLFLAG_RD, 0, ""); 330 if (tree == NULL) { 331 device_printf(sc->sc_dev, "can't add sysctl node\n"); 332 return 0; 333 } 334 #ifdef RAL_DEBUG 335 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 336 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs"); 337 #endif 338 if (bootverbose) 339 ieee80211_announce(ic); 340 341 return 0; 342 343 fail3: rt2661_free_tx_ring(sc, &sc->mgtq); 344 fail2: while (--ac >= 0) 345 rt2661_free_tx_ring(sc, &sc->txq[ac]); 346 fail1: 347 if_free(ifp); 348 return error; 349 } 350 351 int 352 rt2661_detach(void *xsc) 353 { 354 struct rt2661_softc *sc = xsc; 355 struct ifnet *ifp = sc->sc_ifp; 356 struct ieee80211com *ic = ifp->if_l2com; 357 358 rt2661_stop_locked(sc); 359 360 ieee80211_ifdetach(ic); 361 362 rt2661_free_tx_ring(sc, &sc->txq[0]); 363 rt2661_free_tx_ring(sc, &sc->txq[1]); 364 rt2661_free_tx_ring(sc, &sc->txq[2]); 365 rt2661_free_tx_ring(sc, &sc->txq[3]); 366 rt2661_free_tx_ring(sc, &sc->mgtq); 367 rt2661_free_rx_ring(sc, &sc->rxq); 368 369 if_free(ifp); 370 371 return 0; 372 } 373 374 static struct ieee80211vap * 375 rt2661_vap_create(struct ieee80211com *ic, 376 const char name[IFNAMSIZ], int unit, 377 enum ieee80211_opmode opmode, int flags, 378 const uint8_t bssid[IEEE80211_ADDR_LEN], 379 const uint8_t mac[IEEE80211_ADDR_LEN]) 380 { 381 struct ifnet *ifp = ic->ic_ifp; 382 struct rt2661_vap *rvp; 383 struct ieee80211vap *vap; 384 385 switch (opmode) { 386 case IEEE80211_M_STA: 387 case IEEE80211_M_IBSS: 388 case IEEE80211_M_AHDEMO: 389 case IEEE80211_M_MONITOR: 390 case IEEE80211_M_HOSTAP: 391 case IEEE80211_M_MBSS: 392 /* XXXRP: TBD */ 393 if (!TAILQ_EMPTY(&ic->ic_vaps)) { 394 if_printf(ifp, "only 1 vap supported\n"); 395 return NULL; 396 } 397 if (opmode == IEEE80211_M_STA) 398 flags |= IEEE80211_CLONE_NOBEACONS; 399 break; 400 case IEEE80211_M_WDS: 401 if (TAILQ_EMPTY(&ic->ic_vaps) || 402 ic->ic_opmode != IEEE80211_M_HOSTAP) { 403 if_printf(ifp, "wds only supported in ap mode\n"); 404 return NULL; 405 } 406 /* 407 * Silently remove any request for a unique 408 * bssid; WDS vap's always share the local 409 * mac address. 410 */ 411 flags &= ~IEEE80211_CLONE_BSSID; 412 break; 413 default: 414 if_printf(ifp, "unknown opmode %d\n", opmode); 415 return NULL; 416 } 417 rvp = (struct rt2661_vap *) kmalloc(sizeof(struct rt2661_vap), 418 M_80211_VAP, M_INTWAIT | M_ZERO); 419 if (rvp == NULL) 420 return NULL; 421 vap = &rvp->ral_vap; 422 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac); 423 424 /* override state transition machine */ 425 rvp->ral_newstate = vap->iv_newstate; 426 vap->iv_newstate = rt2661_newstate; 427 #if 0 428 vap->iv_update_beacon = rt2661_beacon_update; 429 #endif 430 431 ieee80211_ratectl_init(vap); 432 /* complete setup */ 433 ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status); 434 if (TAILQ_FIRST(&ic->ic_vaps) == vap) 435 ic->ic_opmode = opmode; 436 return vap; 437 } 438 439 static void 440 rt2661_vap_delete(struct ieee80211vap *vap) 441 { 442 struct rt2661_vap *rvp = RT2661_VAP(vap); 443 444 ieee80211_ratectl_deinit(vap); 445 ieee80211_vap_detach(vap); 446 kfree(rvp, M_80211_VAP); 447 } 448 449 void 450 rt2661_shutdown(void *xsc) 451 { 452 struct rt2661_softc *sc = xsc; 453 454 rt2661_stop(sc); 455 } 456 457 void 458 rt2661_suspend(void *xsc) 459 { 460 struct rt2661_softc *sc = xsc; 461 462 rt2661_stop(sc); 463 } 464 465 void 466 rt2661_resume(void *xsc) 467 { 468 struct rt2661_softc *sc = xsc; 469 struct ifnet *ifp = sc->sc_ifp; 470 471 if (ifp->if_flags & IFF_UP) 472 rt2661_init(sc); 473 } 474 475 static void 476 rt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 477 { 478 if (error != 0) 479 return; 480 481 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 482 483 *(bus_addr_t *)arg = segs[0].ds_addr; 484 } 485 486 static int 487 rt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring, 488 int count) 489 { 490 int i, error; 491 492 ring->count = count; 493 ring->queued = 0; 494 ring->cur = ring->next = ring->stat = 0; 495 496 error = bus_dma_tag_create(ring->desc_dmat, 4, 0, 497 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 498 count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE, 499 0, &ring->desc_dmat); 500 if (error != 0) { 501 device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 502 goto fail; 503 } 504 505 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 506 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 507 if (error != 0) { 508 device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 509 goto fail; 510 } 511 512 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 513 count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 514 0); 515 if (error != 0) { 516 device_printf(sc->sc_dev, "could not load desc DMA map\n"); 517 goto fail; 518 } 519 520 ring->data = kmalloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF, 521 M_INTWAIT | M_ZERO); 522 if (ring->data == NULL) { 523 device_printf(sc->sc_dev, "could not allocate soft data\n"); 524 error = ENOMEM; 525 goto fail; 526 } 527 528 error = bus_dma_tag_create(ring->data_dmat, 1, 0, 529 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 530 RT2661_MAX_SCATTER, MCLBYTES, 0, &ring->data_dmat); 531 if (error != 0) { 532 device_printf(sc->sc_dev, "could not create data DMA tag\n"); 533 goto fail; 534 } 535 536 for (i = 0; i < count; i++) { 537 error = bus_dmamap_create(ring->data_dmat, 0, 538 &ring->data[i].map); 539 if (error != 0) { 540 device_printf(sc->sc_dev, "could not create DMA map\n"); 541 goto fail; 542 } 543 } 544 545 return 0; 546 547 fail: rt2661_free_tx_ring(sc, ring); 548 return error; 549 } 550 551 static void 552 rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 553 { 554 struct rt2661_tx_desc *desc; 555 struct rt2661_tx_data *data; 556 int i; 557 558 for (i = 0; i < ring->count; i++) { 559 desc = &ring->desc[i]; 560 data = &ring->data[i]; 561 562 if (data->m != NULL) { 563 bus_dmamap_sync(ring->data_dmat, data->map, 564 BUS_DMASYNC_POSTWRITE); 565 bus_dmamap_unload(ring->data_dmat, data->map); 566 m_freem(data->m); 567 data->m = NULL; 568 } 569 570 if (data->ni != NULL) { 571 ieee80211_free_node(data->ni); 572 data->ni = NULL; 573 } 574 575 desc->flags = 0; 576 } 577 578 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 579 580 ring->queued = 0; 581 ring->cur = ring->next = ring->stat = 0; 582 } 583 584 static void 585 rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 586 { 587 struct rt2661_tx_data *data; 588 int i; 589 590 if (ring->desc != NULL) { 591 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 592 BUS_DMASYNC_POSTWRITE); 593 bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 594 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 595 } 596 597 if (ring->desc_dmat != NULL) 598 bus_dma_tag_destroy(ring->desc_dmat); 599 600 if (ring->data != NULL) { 601 for (i = 0; i < ring->count; i++) { 602 data = &ring->data[i]; 603 604 if (data->m != NULL) { 605 bus_dmamap_sync(ring->data_dmat, data->map, 606 BUS_DMASYNC_POSTWRITE); 607 bus_dmamap_unload(ring->data_dmat, data->map); 608 m_freem(data->m); 609 } 610 611 if (data->ni != NULL) 612 ieee80211_free_node(data->ni); 613 614 if (data->map != NULL) 615 bus_dmamap_destroy(ring->data_dmat, data->map); 616 } 617 618 kfree(ring->data, M_DEVBUF); 619 } 620 621 if (ring->data_dmat != NULL) 622 bus_dma_tag_destroy(ring->data_dmat); 623 } 624 625 static int 626 rt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring, 627 int count) 628 { 629 struct rt2661_rx_desc *desc; 630 struct rt2661_rx_data *data; 631 bus_addr_t physaddr; 632 int i, error; 633 634 ring->count = count; 635 ring->cur = ring->next = 0; 636 637 error = bus_dma_tag_create(ring->desc_dmat, 4, 0, 638 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 639 count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE, 640 0, &ring->desc_dmat); 641 if (error != 0) { 642 device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 643 goto fail; 644 } 645 646 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 647 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 648 if (error != 0) { 649 device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 650 goto fail; 651 } 652 653 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 654 count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 655 0); 656 if (error != 0) { 657 device_printf(sc->sc_dev, "could not load desc DMA map\n"); 658 goto fail; 659 } 660 661 ring->data = kmalloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF, 662 M_INTWAIT | M_ZERO); 663 if (ring->data == NULL) { 664 device_printf(sc->sc_dev, "could not allocate soft data\n"); 665 error = ENOMEM; 666 goto fail; 667 } 668 669 /* 670 * Pre-allocate Rx buffers and populate Rx ring. 671 */ 672 error = bus_dma_tag_create(ring->data_dmat, 1, 0, 673 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 674 1, MCLBYTES, 0, &ring->data_dmat); 675 if (error != 0) { 676 device_printf(sc->sc_dev, "could not create data DMA tag\n"); 677 goto fail; 678 } 679 680 for (i = 0; i < count; i++) { 681 desc = &sc->rxq.desc[i]; 682 data = &sc->rxq.data[i]; 683 684 error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 685 if (error != 0) { 686 device_printf(sc->sc_dev, "could not create DMA map\n"); 687 goto fail; 688 } 689 690 data->m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR); 691 if (data->m == NULL) { 692 device_printf(sc->sc_dev, 693 "could not allocate rx mbuf\n"); 694 error = ENOMEM; 695 goto fail; 696 } 697 698 error = bus_dmamap_load(ring->data_dmat, data->map, 699 mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr, 700 &physaddr, 0); 701 if (error != 0) { 702 device_printf(sc->sc_dev, 703 "could not load rx buf DMA map"); 704 goto fail; 705 } 706 707 desc->flags = htole32(RT2661_RX_BUSY); 708 desc->physaddr = htole32(physaddr); 709 } 710 711 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 712 713 return 0; 714 715 fail: rt2661_free_rx_ring(sc, ring); 716 return error; 717 } 718 719 static void 720 rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 721 { 722 int i; 723 724 for (i = 0; i < ring->count; i++) 725 ring->desc[i].flags = htole32(RT2661_RX_BUSY); 726 727 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 728 729 ring->cur = ring->next = 0; 730 } 731 732 static void 733 rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 734 { 735 struct rt2661_rx_data *data; 736 int i; 737 738 if (ring->desc != NULL) { 739 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 740 BUS_DMASYNC_POSTWRITE); 741 bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 742 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 743 } 744 745 if (ring->desc_dmat != NULL) 746 bus_dma_tag_destroy(ring->desc_dmat); 747 748 if (ring->data != NULL) { 749 for (i = 0; i < ring->count; i++) { 750 data = &ring->data[i]; 751 752 if (data->m != NULL) { 753 bus_dmamap_sync(ring->data_dmat, data->map, 754 BUS_DMASYNC_POSTREAD); 755 bus_dmamap_unload(ring->data_dmat, data->map); 756 m_freem(data->m); 757 } 758 759 if (data->map != NULL) 760 bus_dmamap_destroy(ring->data_dmat, data->map); 761 } 762 763 kfree(ring->data, M_DEVBUF); 764 } 765 766 if (ring->data_dmat != NULL) 767 bus_dma_tag_destroy(ring->data_dmat); 768 } 769 770 static int 771 rt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 772 { 773 struct rt2661_vap *rvp = RT2661_VAP(vap); 774 struct ieee80211com *ic = vap->iv_ic; 775 struct rt2661_softc *sc = ic->ic_ifp->if_softc; 776 int error; 777 778 if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) { 779 uint32_t tmp; 780 781 /* abort TSF synchronization */ 782 tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 783 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff); 784 } 785 786 error = rvp->ral_newstate(vap, nstate, arg); 787 788 if (error == 0 && nstate == IEEE80211_S_RUN) { 789 struct ieee80211_node *ni = vap->iv_bss; 790 791 if (vap->iv_opmode != IEEE80211_M_MONITOR) { 792 rt2661_enable_mrr(sc); 793 rt2661_set_txpreamble(sc); 794 rt2661_set_basicrates(sc, &ni->ni_rates); 795 rt2661_set_bssid(sc, ni->ni_bssid); 796 } 797 798 if (vap->iv_opmode == IEEE80211_M_HOSTAP || 799 vap->iv_opmode == IEEE80211_M_IBSS || 800 vap->iv_opmode == IEEE80211_M_MBSS) { 801 error = rt2661_prepare_beacon(sc, vap); 802 if (error != 0) 803 return error; 804 } 805 if (vap->iv_opmode != IEEE80211_M_MONITOR) 806 rt2661_enable_tsf_sync(sc); 807 else 808 rt2661_enable_tsf(sc); 809 } 810 return error; 811 } 812 813 /* 814 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 815 * 93C66). 816 */ 817 static uint16_t 818 rt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr) 819 { 820 uint32_t tmp; 821 uint16_t val; 822 int n; 823 824 /* clock C once before the first command */ 825 RT2661_EEPROM_CTL(sc, 0); 826 827 RT2661_EEPROM_CTL(sc, RT2661_S); 828 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 829 RT2661_EEPROM_CTL(sc, RT2661_S); 830 831 /* write start bit (1) */ 832 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 833 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 834 835 /* write READ opcode (10) */ 836 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 837 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 838 RT2661_EEPROM_CTL(sc, RT2661_S); 839 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 840 841 /* write address (A5-A0 or A7-A0) */ 842 n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7; 843 for (; n >= 0; n--) { 844 RT2661_EEPROM_CTL(sc, RT2661_S | 845 (((addr >> n) & 1) << RT2661_SHIFT_D)); 846 RT2661_EEPROM_CTL(sc, RT2661_S | 847 (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C); 848 } 849 850 RT2661_EEPROM_CTL(sc, RT2661_S); 851 852 /* read data Q15-Q0 */ 853 val = 0; 854 for (n = 15; n >= 0; n--) { 855 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 856 tmp = RAL_READ(sc, RT2661_E2PROM_CSR); 857 val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n; 858 RT2661_EEPROM_CTL(sc, RT2661_S); 859 } 860 861 RT2661_EEPROM_CTL(sc, 0); 862 863 /* clear Chip Select and clock C */ 864 RT2661_EEPROM_CTL(sc, RT2661_S); 865 RT2661_EEPROM_CTL(sc, 0); 866 RT2661_EEPROM_CTL(sc, RT2661_C); 867 868 return val; 869 } 870 871 static void 872 rt2661_tx_intr(struct rt2661_softc *sc) 873 { 874 struct ifnet *ifp = sc->sc_ifp; 875 struct rt2661_tx_ring *txq; 876 struct rt2661_tx_data *data; 877 uint32_t val; 878 int qid, retrycnt; 879 struct ieee80211vap *vap; 880 881 for (;;) { 882 struct ieee80211_node *ni; 883 struct mbuf *m; 884 885 val = RAL_READ(sc, RT2661_STA_CSR4); 886 if (!(val & RT2661_TX_STAT_VALID)) 887 break; 888 889 /* retrieve the queue in which this frame was sent */ 890 qid = RT2661_TX_QID(val); 891 txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq; 892 893 /* retrieve rate control algorithm context */ 894 data = &txq->data[txq->stat]; 895 m = data->m; 896 data->m = NULL; 897 898 ni = data->ni; 899 data->ni = NULL; 900 901 /* if no frame has been sent, ignore */ 902 if (ni == NULL) 903 continue; 904 905 vap = ni->ni_vap; 906 907 switch (RT2661_TX_RESULT(val)) { 908 case RT2661_TX_SUCCESS: 909 retrycnt = RT2661_TX_RETRYCNT(val); 910 911 DPRINTFN(sc, 10, "data frame sent successfully after " 912 "%d retries\n", retrycnt); 913 if (data->rix != IEEE80211_FIXED_RATE_NONE) 914 ieee80211_ratectl_tx_complete(vap, ni, 915 IEEE80211_RATECTL_TX_SUCCESS, 916 &retrycnt, NULL); 917 IFNET_STAT_INC(ifp, opackets, 1); 918 break; 919 920 case RT2661_TX_RETRY_FAIL: 921 retrycnt = RT2661_TX_RETRYCNT(val); 922 923 DPRINTFN(sc, 9, "%s\n", 924 "sending data frame failed (too much retries)"); 925 if (data->rix != IEEE80211_FIXED_RATE_NONE) 926 ieee80211_ratectl_tx_complete(vap, ni, 927 IEEE80211_RATECTL_TX_FAILURE, 928 &retrycnt, NULL); 929 IFNET_STAT_INC(ifp, oerrors, 1); 930 break; 931 932 default: 933 /* other failure */ 934 device_printf(sc->sc_dev, 935 "sending data frame failed 0x%08x\n", val); 936 IFNET_STAT_INC(ifp, oerrors, 1); 937 } 938 939 DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat); 940 941 txq->queued--; 942 if (++txq->stat >= txq->count) /* faster than % count */ 943 txq->stat = 0; 944 945 if (m->m_flags & M_TXCB) 946 ieee80211_process_callback(ni, m, 947 RT2661_TX_RESULT(val) != RT2661_TX_SUCCESS); 948 m_freem(m); 949 ieee80211_free_node(ni); 950 } 951 952 sc->sc_tx_timer = 0; 953 ifq_clr_oactive(&ifp->if_snd); 954 955 rt2661_start_locked(ifp); 956 } 957 958 static void 959 rt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq) 960 { 961 struct rt2661_tx_desc *desc; 962 struct rt2661_tx_data *data; 963 964 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD); 965 966 for (;;) { 967 desc = &txq->desc[txq->next]; 968 data = &txq->data[txq->next]; 969 970 if ((le32toh(desc->flags) & RT2661_TX_BUSY) || 971 !(le32toh(desc->flags) & RT2661_TX_VALID)) 972 break; 973 974 bus_dmamap_sync(txq->data_dmat, data->map, 975 BUS_DMASYNC_POSTWRITE); 976 bus_dmamap_unload(txq->data_dmat, data->map); 977 978 /* descriptor is no longer valid */ 979 desc->flags &= ~htole32(RT2661_TX_VALID); 980 981 DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next); 982 983 if (++txq->next >= txq->count) /* faster than % count */ 984 txq->next = 0; 985 } 986 987 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 988 } 989 990 static void 991 rt2661_rx_intr(struct rt2661_softc *sc) 992 { 993 struct ifnet *ifp = sc->sc_ifp; 994 struct ieee80211com *ic = ifp->if_l2com; 995 struct rt2661_rx_desc *desc; 996 struct rt2661_rx_data *data; 997 bus_addr_t physaddr; 998 struct ieee80211_frame *wh; 999 struct ieee80211_node *ni; 1000 struct mbuf *mnew, *m; 1001 int error; 1002 1003 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1004 BUS_DMASYNC_POSTREAD); 1005 1006 for (;;) { 1007 int8_t rssi, nf; 1008 1009 desc = &sc->rxq.desc[sc->rxq.cur]; 1010 data = &sc->rxq.data[sc->rxq.cur]; 1011 1012 if (le32toh(desc->flags) & RT2661_RX_BUSY) 1013 break; 1014 1015 if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) || 1016 (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) { 1017 /* 1018 * This should not happen since we did not request 1019 * to receive those frames when we filled TXRX_CSR0. 1020 */ 1021 DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n", 1022 le32toh(desc->flags)); 1023 IFNET_STAT_INC(ifp, ierrors, 1); 1024 goto skip; 1025 } 1026 1027 if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) { 1028 IFNET_STAT_INC(ifp, ierrors, 1); 1029 goto skip; 1030 } 1031 1032 /* 1033 * Try to allocate a new mbuf for this ring element and load it 1034 * before processing the current mbuf. If the ring element 1035 * cannot be loaded, drop the received packet and reuse the old 1036 * mbuf. In the unlikely case that the old mbuf can't be 1037 * reloaded either, explicitly panic. 1038 */ 1039 mnew = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR); 1040 if (mnew == NULL) { 1041 IFNET_STAT_INC(ifp, ierrors, 1); 1042 goto skip; 1043 } 1044 1045 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 1046 BUS_DMASYNC_POSTREAD); 1047 bus_dmamap_unload(sc->rxq.data_dmat, data->map); 1048 1049 error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1050 mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr, 1051 &physaddr, 0); 1052 if (error != 0) { 1053 m_freem(mnew); 1054 1055 /* try to reload the old mbuf */ 1056 error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1057 mtod(data->m, void *), MCLBYTES, 1058 rt2661_dma_map_addr, &physaddr, 0); 1059 if (error != 0) { 1060 /* very unlikely that it will fail... */ 1061 panic("%s: could not load old rx mbuf", 1062 device_get_name(sc->sc_dev)); 1063 } 1064 IFNET_STAT_INC(ifp, ierrors, 1); 1065 goto skip; 1066 } 1067 1068 /* 1069 * New mbuf successfully loaded, update Rx ring and continue 1070 * processing. 1071 */ 1072 m = data->m; 1073 data->m = mnew; 1074 desc->physaddr = htole32(physaddr); 1075 1076 /* finalize mbuf */ 1077 m->m_pkthdr.rcvif = ifp; 1078 m->m_pkthdr.len = m->m_len = 1079 (le32toh(desc->flags) >> 16) & 0xfff; 1080 1081 rssi = rt2661_get_rssi(sc, desc->rssi); 1082 /* Error happened during RSSI conversion. */ 1083 if (rssi < 0) 1084 rssi = -30; /* XXX ignored by net80211 */ 1085 nf = RT2661_NOISE_FLOOR; 1086 1087 if (ieee80211_radiotap_active(ic)) { 1088 struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap; 1089 uint32_t tsf_lo, tsf_hi; 1090 1091 /* get timestamp (low and high 32 bits) */ 1092 tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13); 1093 tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12); 1094 1095 tap->wr_tsf = 1096 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1097 tap->wr_flags = 0; 1098 tap->wr_rate = ieee80211_plcp2rate(desc->rate, 1099 (desc->flags & htole32(RT2661_RX_OFDM)) ? 1100 IEEE80211_T_OFDM : IEEE80211_T_CCK); 1101 tap->wr_antsignal = nf + rssi; 1102 tap->wr_antnoise = nf; 1103 } 1104 sc->sc_flags |= RAL_INPUT_RUNNING; 1105 wh = mtod(m, struct ieee80211_frame *); 1106 1107 /* send the frame to the 802.11 layer */ 1108 ni = ieee80211_find_rxnode(ic, 1109 (struct ieee80211_frame_min *)wh); 1110 if (ni != NULL) { 1111 (void) ieee80211_input(ni, m, rssi, nf); 1112 ieee80211_free_node(ni); 1113 } else 1114 (void) ieee80211_input_all(ic, m, rssi, nf); 1115 1116 sc->sc_flags &= ~RAL_INPUT_RUNNING; 1117 1118 skip: desc->flags |= htole32(RT2661_RX_BUSY); 1119 1120 DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur); 1121 1122 sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT; 1123 } 1124 1125 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1126 BUS_DMASYNC_PREWRITE); 1127 } 1128 1129 /* ARGSUSED */ 1130 static void 1131 rt2661_mcu_beacon_expire(struct rt2661_softc *sc) 1132 { 1133 /* do nothing */ 1134 } 1135 1136 static void 1137 rt2661_mcu_wakeup(struct rt2661_softc *sc) 1138 { 1139 RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16); 1140 1141 RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7); 1142 RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18); 1143 RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20); 1144 1145 /* send wakeup command to MCU */ 1146 rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0); 1147 } 1148 1149 static void 1150 rt2661_mcu_cmd_intr(struct rt2661_softc *sc) 1151 { 1152 RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR); 1153 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 1154 } 1155 1156 void 1157 rt2661_intr(void *arg) 1158 { 1159 struct rt2661_softc *sc = arg; 1160 struct ifnet *ifp = sc->sc_ifp; 1161 uint32_t r1, r2; 1162 1163 /* disable MAC and MCU interrupts */ 1164 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f); 1165 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 1166 1167 /* don't re-enable interrupts if we're shutting down */ 1168 if (!(ifp->if_flags & IFF_RUNNING)) { 1169 return; 1170 } 1171 1172 r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR); 1173 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1); 1174 1175 r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR); 1176 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2); 1177 1178 if (r1 & RT2661_MGT_DONE) 1179 rt2661_tx_dma_intr(sc, &sc->mgtq); 1180 1181 if (r1 & RT2661_RX_DONE) 1182 rt2661_rx_intr(sc); 1183 1184 if (r1 & RT2661_TX0_DMA_DONE) 1185 rt2661_tx_dma_intr(sc, &sc->txq[0]); 1186 1187 if (r1 & RT2661_TX1_DMA_DONE) 1188 rt2661_tx_dma_intr(sc, &sc->txq[1]); 1189 1190 if (r1 & RT2661_TX2_DMA_DONE) 1191 rt2661_tx_dma_intr(sc, &sc->txq[2]); 1192 1193 if (r1 & RT2661_TX3_DMA_DONE) 1194 rt2661_tx_dma_intr(sc, &sc->txq[3]); 1195 1196 if (r1 & RT2661_TX_DONE) 1197 rt2661_tx_intr(sc); 1198 1199 if (r2 & RT2661_MCU_CMD_DONE) 1200 rt2661_mcu_cmd_intr(sc); 1201 1202 if (r2 & RT2661_MCU_BEACON_EXPIRE) 1203 rt2661_mcu_beacon_expire(sc); 1204 1205 if (r2 & RT2661_MCU_WAKEUP) 1206 rt2661_mcu_wakeup(sc); 1207 1208 /* re-enable MAC and MCU interrupts */ 1209 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 1210 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 1211 1212 } 1213 1214 static uint8_t 1215 rt2661_plcp_signal(int rate) 1216 { 1217 switch (rate) { 1218 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1219 case 12: return 0xb; 1220 case 18: return 0xf; 1221 case 24: return 0xa; 1222 case 36: return 0xe; 1223 case 48: return 0x9; 1224 case 72: return 0xd; 1225 case 96: return 0x8; 1226 case 108: return 0xc; 1227 1228 /* CCK rates (NB: not IEEE std, device-specific) */ 1229 case 2: return 0x0; 1230 case 4: return 0x1; 1231 case 11: return 0x2; 1232 case 22: return 0x3; 1233 } 1234 return 0xff; /* XXX unsupported/unknown rate */ 1235 } 1236 1237 static void 1238 rt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc, 1239 uint32_t flags, uint16_t xflags, int len, int rate, 1240 const bus_dma_segment_t *segs, int nsegs, int ac) 1241 { 1242 struct ifnet *ifp = sc->sc_ifp; 1243 struct ieee80211com *ic = ifp->if_l2com; 1244 uint16_t plcp_length; 1245 int i, remainder; 1246 1247 desc->flags = htole32(flags); 1248 desc->flags |= htole32(len << 16); 1249 desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID); 1250 1251 desc->xflags = htole16(xflags); 1252 desc->xflags |= htole16(nsegs << 13); 1253 1254 desc->wme = htole16( 1255 RT2661_QID(ac) | 1256 RT2661_AIFSN(2) | 1257 RT2661_LOGCWMIN(4) | 1258 RT2661_LOGCWMAX(10)); 1259 1260 /* 1261 * Remember in which queue this frame was sent. This field is driver 1262 * private data only. It will be made available by the NIC in STA_CSR4 1263 * on Tx interrupts. 1264 */ 1265 desc->qid = ac; 1266 1267 /* setup PLCP fields */ 1268 desc->plcp_signal = rt2661_plcp_signal(rate); 1269 desc->plcp_service = 4; 1270 1271 len += IEEE80211_CRC_LEN; 1272 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) { 1273 desc->flags |= htole32(RT2661_TX_OFDM); 1274 1275 plcp_length = len & 0xfff; 1276 desc->plcp_length_hi = plcp_length >> 6; 1277 desc->plcp_length_lo = plcp_length & 0x3f; 1278 } else { 1279 plcp_length = (16 * len + rate - 1) / rate; 1280 if (rate == 22) { 1281 remainder = (16 * len) % 22; 1282 if (remainder != 0 && remainder < 7) 1283 desc->plcp_service |= RT2661_PLCP_LENGEXT; 1284 } 1285 desc->plcp_length_hi = plcp_length >> 8; 1286 desc->plcp_length_lo = plcp_length & 0xff; 1287 1288 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1289 desc->plcp_signal |= 0x08; 1290 } 1291 1292 /* RT2x61 supports scatter with up to 5 segments */ 1293 for (i = 0; i < nsegs; i++) { 1294 desc->addr[i] = htole32(segs[i].ds_addr); 1295 desc->len [i] = htole16(segs[i].ds_len); 1296 } 1297 } 1298 1299 static int 1300 rt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0, 1301 struct ieee80211_node *ni) 1302 { 1303 struct ieee80211vap *vap = ni->ni_vap; 1304 struct ieee80211com *ic = ni->ni_ic; 1305 struct rt2661_tx_desc *desc; 1306 struct rt2661_tx_data *data; 1307 struct ieee80211_frame *wh; 1308 struct ieee80211_key *k; 1309 bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1310 uint16_t dur; 1311 uint32_t flags = 0; /* XXX HWSEQ */ 1312 int nsegs, rate, error; 1313 1314 desc = &sc->mgtq.desc[sc->mgtq.cur]; 1315 data = &sc->mgtq.data[sc->mgtq.cur]; 1316 1317 rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate; 1318 1319 wh = mtod(m0, struct ieee80211_frame *); 1320 1321 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1322 k = ieee80211_crypto_encap(ni, m0); 1323 if (k == NULL) { 1324 m_freem(m0); 1325 return ENOBUFS; 1326 } 1327 } 1328 1329 error = bus_dmamap_load_mbuf_segment(sc->mgtq.data_dmat, data->map, m0, 1330 segs, 1, &nsegs, BUS_DMA_NOWAIT); 1331 if (error != 0) { 1332 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1333 error); 1334 m_freem(m0); 1335 return error; 1336 } 1337 1338 if (ieee80211_radiotap_active_vap(vap)) { 1339 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1340 1341 tap->wt_flags = 0; 1342 tap->wt_rate = rate; 1343 1344 ieee80211_radiotap_tx(vap, m0); 1345 } 1346 1347 data->m = m0; 1348 data->ni = ni; 1349 /* management frames are not taken into account for amrr */ 1350 data->rix = IEEE80211_FIXED_RATE_NONE; 1351 1352 wh = mtod(m0, struct ieee80211_frame *); 1353 1354 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1355 flags |= RT2661_TX_NEED_ACK; 1356 1357 dur = ieee80211_ack_duration(ic->ic_rt, 1358 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1359 *(uint16_t *)wh->i_dur = htole16(dur); 1360 1361 /* tell hardware to add timestamp in probe responses */ 1362 if ((wh->i_fc[0] & 1363 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1364 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1365 flags |= RT2661_TX_TIMESTAMP; 1366 } 1367 1368 rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */, 1369 m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT); 1370 1371 bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1372 bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map, 1373 BUS_DMASYNC_PREWRITE); 1374 1375 DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n", 1376 m0->m_pkthdr.len, sc->mgtq.cur, rate); 1377 1378 /* kick mgt */ 1379 sc->mgtq.queued++; 1380 sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT; 1381 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT); 1382 1383 return 0; 1384 } 1385 1386 static int 1387 rt2661_sendprot(struct rt2661_softc *sc, int ac, 1388 const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate) 1389 { 1390 struct ieee80211com *ic = ni->ni_ic; 1391 struct rt2661_tx_ring *txq = &sc->txq[ac]; 1392 const struct ieee80211_frame *wh; 1393 struct rt2661_tx_desc *desc; 1394 struct rt2661_tx_data *data; 1395 struct mbuf *mprot; 1396 int protrate, pktlen, flags, isshort, error; 1397 uint16_t dur; 1398 bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1399 int nsegs; 1400 1401 KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY, 1402 ("protection %d", prot)); 1403 1404 wh = mtod(m, const struct ieee80211_frame *); 1405 pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN; 1406 1407 protrate = ieee80211_ctl_rate(ic->ic_rt, rate); 1408 ieee80211_ack_rate(ic->ic_rt, rate); 1409 1410 isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0; 1411 dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort) 1412 + ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1413 flags = RT2661_TX_MORE_FRAG; 1414 if (prot == IEEE80211_PROT_RTSCTS) { 1415 /* NB: CTS is the same size as an ACK */ 1416 dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1417 flags |= RT2661_TX_NEED_ACK; 1418 mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur); 1419 } else { 1420 mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur); 1421 } 1422 if (mprot == NULL) { 1423 /* XXX stat + msg */ 1424 return ENOBUFS; 1425 } 1426 1427 data = &txq->data[txq->cur]; 1428 desc = &txq->desc[txq->cur]; 1429 1430 error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map, mprot, segs, 1431 1, &nsegs, BUS_DMA_NOWAIT); 1432 if (error != 0) { 1433 device_printf(sc->sc_dev, 1434 "could not map mbuf (error %d)\n", error); 1435 m_freem(mprot); 1436 return error; 1437 } 1438 1439 data->m = mprot; 1440 data->ni = ieee80211_ref_node(ni); 1441 /* ctl frames are not taken into account for amrr */ 1442 data->rix = IEEE80211_FIXED_RATE_NONE; 1443 1444 rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len, 1445 protrate, segs, 1, ac); 1446 1447 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1448 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1449 1450 txq->queued++; 1451 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1452 1453 return 0; 1454 } 1455 1456 static int 1457 rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0, 1458 struct ieee80211_node *ni, int ac) 1459 { 1460 struct ieee80211vap *vap = ni->ni_vap; 1461 struct ifnet *ifp = sc->sc_ifp; 1462 struct ieee80211com *ic = ifp->if_l2com; 1463 struct rt2661_tx_ring *txq = &sc->txq[ac]; 1464 struct rt2661_tx_desc *desc; 1465 struct rt2661_tx_data *data; 1466 struct ieee80211_frame *wh; 1467 const struct ieee80211_txparam *tp; 1468 struct ieee80211_key *k; 1469 const struct chanAccParams *cap; 1470 struct mbuf *mnew; 1471 bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1472 uint16_t dur; 1473 uint32_t flags; 1474 int error, nsegs, rate, noack = 0; 1475 1476 wh = mtod(m0, struct ieee80211_frame *); 1477 1478 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1479 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1480 rate = tp->mcastrate; 1481 } else if (m0->m_flags & M_EAPOL) { 1482 rate = tp->mgmtrate; 1483 } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) { 1484 rate = tp->ucastrate; 1485 } else { 1486 ieee80211_ratectl_rate(ni, NULL, 0); 1487 rate = ni->ni_txrate; 1488 } 1489 rate &= IEEE80211_RATE_VAL; 1490 1491 if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) { 1492 cap = &ic->ic_wme.wme_chanParams; 1493 noack = cap->cap_wmeParams[ac].wmep_noackPolicy; 1494 } 1495 1496 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1497 k = ieee80211_crypto_encap(ni, m0); 1498 if (k == NULL) { 1499 m_freem(m0); 1500 return ENOBUFS; 1501 } 1502 1503 /* packet header may have moved, reset our local pointer */ 1504 wh = mtod(m0, struct ieee80211_frame *); 1505 } 1506 1507 flags = 0; 1508 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1509 int prot = IEEE80211_PROT_NONE; 1510 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 1511 prot = IEEE80211_PROT_RTSCTS; 1512 else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1513 ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) 1514 prot = ic->ic_protmode; 1515 if (prot != IEEE80211_PROT_NONE) { 1516 error = rt2661_sendprot(sc, ac, m0, ni, prot, rate); 1517 if (error) { 1518 m_freem(m0); 1519 return error; 1520 } 1521 flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS; 1522 } 1523 } 1524 1525 data = &txq->data[txq->cur]; 1526 desc = &txq->desc[txq->cur]; 1527 1528 error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map, m0, segs, 1529 1, &nsegs, BUS_DMA_NOWAIT); 1530 if (error != 0 && error != EFBIG) { 1531 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1532 error); 1533 m_freem(m0); 1534 return error; 1535 } 1536 if (error != 0) { 1537 mnew = m_defrag(m0, MB_DONTWAIT); 1538 if (mnew == NULL) { 1539 device_printf(sc->sc_dev, 1540 "could not defragment mbuf\n"); 1541 m_freem(m0); 1542 return ENOBUFS; 1543 } 1544 m0 = mnew; 1545 1546 error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map, m0, 1547 segs, 1, &nsegs, BUS_DMA_NOWAIT); 1548 if (error != 0) { 1549 device_printf(sc->sc_dev, 1550 "could not map mbuf (error %d)\n", error); 1551 m_freem(m0); 1552 return error; 1553 } 1554 1555 /* packet header have moved, reset our local pointer */ 1556 wh = mtod(m0, struct ieee80211_frame *); 1557 } 1558 1559 if (ieee80211_radiotap_active_vap(vap)) { 1560 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1561 1562 tap->wt_flags = 0; 1563 tap->wt_rate = rate; 1564 1565 ieee80211_radiotap_tx(vap, m0); 1566 } 1567 1568 data->m = m0; 1569 data->ni = ni; 1570 1571 /* remember link conditions for rate adaptation algorithm */ 1572 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) { 1573 data->rix = ni->ni_txrate; 1574 /* XXX probably need last rssi value and not avg */ 1575 data->rssi = ic->ic_node_getrssi(ni); 1576 } else 1577 data->rix = IEEE80211_FIXED_RATE_NONE; 1578 1579 if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1580 flags |= RT2661_TX_NEED_ACK; 1581 1582 dur = ieee80211_ack_duration(ic->ic_rt, 1583 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1584 *(uint16_t *)wh->i_dur = htole16(dur); 1585 } 1586 1587 rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs, 1588 nsegs, ac); 1589 1590 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1591 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1592 1593 DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n", 1594 m0->m_pkthdr.len, txq->cur, rate); 1595 1596 /* kick Tx */ 1597 txq->queued++; 1598 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1599 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac); 1600 1601 return 0; 1602 } 1603 1604 static void 1605 rt2661_start_locked(struct ifnet *ifp) 1606 { 1607 struct rt2661_softc *sc = ifp->if_softc; 1608 struct mbuf *m; 1609 struct ieee80211_node *ni; 1610 int ac; 1611 1612 /* prevent management frames from being sent if we're not ready */ 1613 if (!(ifp->if_flags & IFF_RUNNING) || sc->sc_invalid) 1614 return; 1615 1616 for (;;) { 1617 m = ifq_dequeue(&ifp->if_snd); 1618 if (m == NULL) 1619 break; 1620 1621 ac = M_WME_GETAC(m); 1622 if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) { 1623 /* there is no place left in this ring */ 1624 ifq_prepend(&ifp->if_snd, m); 1625 ifq_set_oactive(&ifp->if_snd); 1626 break; 1627 } 1628 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1629 if (rt2661_tx_data(sc, m, ni, ac) != 0) { 1630 ieee80211_free_node(ni); 1631 IFNET_STAT_INC(ifp, oerrors, 1); 1632 break; 1633 } 1634 1635 sc->sc_tx_timer = 5; 1636 } 1637 } 1638 1639 static void 1640 rt2661_start(struct ifnet *ifp, struct ifaltq_subque *ifsq) 1641 { 1642 ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq); 1643 rt2661_start_locked(ifp); 1644 } 1645 1646 static int 1647 rt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1648 const struct ieee80211_bpf_params *params) 1649 { 1650 struct ieee80211com *ic = ni->ni_ic; 1651 struct ifnet *ifp = ic->ic_ifp; 1652 struct rt2661_softc *sc = ifp->if_softc; 1653 1654 /* prevent management frames from being sent if we're not ready */ 1655 if (!(ifp->if_flags & IFF_RUNNING)) { 1656 m_freem(m); 1657 ieee80211_free_node(ni); 1658 return ENETDOWN; 1659 } 1660 if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) { 1661 ifq_set_oactive(&ifp->if_snd); 1662 m_freem(m); 1663 ieee80211_free_node(ni); 1664 return ENOBUFS; /* XXX */ 1665 } 1666 1667 IFNET_STAT_INC(ifp, opackets, 1); 1668 1669 /* 1670 * Legacy path; interpret frame contents to decide 1671 * precisely how to send the frame. 1672 * XXX raw path 1673 */ 1674 if (rt2661_tx_mgt(sc, m, ni) != 0) 1675 goto bad; 1676 sc->sc_tx_timer = 5; 1677 1678 return 0; 1679 bad: 1680 IFNET_STAT_INC(ifp, oerrors, 1); 1681 ieee80211_free_node(ni); 1682 return EIO; /* XXX */ 1683 } 1684 1685 static void 1686 rt2661_watchdog_callout(void *arg) 1687 { 1688 struct rt2661_softc *sc = (struct rt2661_softc *)arg; 1689 struct ifnet *ifp = sc->sc_ifp; 1690 1691 KASSERT(ifp->if_flags & IFF_RUNNING, ("not running")); 1692 1693 if (sc->sc_invalid) /* card ejected */ 1694 return; 1695 1696 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) { 1697 if_printf(ifp, "device timeout\n"); 1698 rt2661_init_locked(sc); 1699 IFNET_STAT_INC(ifp, oerrors, 1); 1700 /* NB: callout is reset in rt2661_init() */ 1701 return; 1702 } 1703 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog_callout, sc); 1704 1705 } 1706 1707 static int 1708 rt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *ucred) 1709 { 1710 struct rt2661_softc *sc = ifp->if_softc; 1711 struct ieee80211com *ic = ifp->if_l2com; 1712 struct ifreq *ifr = (struct ifreq *) data; 1713 int error = 0, startall = 0; 1714 1715 switch (cmd) { 1716 case SIOCSIFFLAGS: 1717 if (ifp->if_flags & IFF_UP) { 1718 if ((ifp->if_flags & IFF_RUNNING) == 0) { 1719 rt2661_init_locked(sc); 1720 startall = 1; 1721 } else 1722 rt2661_update_promisc(ifp); 1723 } else { 1724 if (ifp->if_flags & IFF_RUNNING) 1725 rt2661_stop_locked(sc); 1726 } 1727 if (startall) 1728 ieee80211_start_all(ic); 1729 break; 1730 case SIOCGIFMEDIA: 1731 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1732 break; 1733 case SIOCGIFADDR: 1734 error = ether_ioctl(ifp, cmd, data); 1735 break; 1736 default: 1737 error = EINVAL; 1738 break; 1739 } 1740 return error; 1741 } 1742 1743 static void 1744 rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val) 1745 { 1746 uint32_t tmp; 1747 int ntries; 1748 1749 for (ntries = 0; ntries < 100; ntries++) { 1750 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1751 break; 1752 DELAY(1); 1753 } 1754 if (ntries == 100) { 1755 device_printf(sc->sc_dev, "could not write to BBP\n"); 1756 return; 1757 } 1758 1759 tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val; 1760 RAL_WRITE(sc, RT2661_PHY_CSR3, tmp); 1761 1762 DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val); 1763 } 1764 1765 static uint8_t 1766 rt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg) 1767 { 1768 uint32_t val; 1769 int ntries; 1770 1771 for (ntries = 0; ntries < 100; ntries++) { 1772 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1773 break; 1774 DELAY(1); 1775 } 1776 if (ntries == 100) { 1777 device_printf(sc->sc_dev, "could not read from BBP\n"); 1778 return 0; 1779 } 1780 1781 val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8; 1782 RAL_WRITE(sc, RT2661_PHY_CSR3, val); 1783 1784 for (ntries = 0; ntries < 100; ntries++) { 1785 val = RAL_READ(sc, RT2661_PHY_CSR3); 1786 if (!(val & RT2661_BBP_BUSY)) 1787 return val & 0xff; 1788 DELAY(1); 1789 } 1790 1791 device_printf(sc->sc_dev, "could not read from BBP\n"); 1792 return 0; 1793 } 1794 1795 static void 1796 rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val) 1797 { 1798 uint32_t tmp; 1799 int ntries; 1800 1801 for (ntries = 0; ntries < 100; ntries++) { 1802 if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY)) 1803 break; 1804 DELAY(1); 1805 } 1806 if (ntries == 100) { 1807 device_printf(sc->sc_dev, "could not write to RF\n"); 1808 return; 1809 } 1810 1811 tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 | 1812 (reg & 3); 1813 RAL_WRITE(sc, RT2661_PHY_CSR4, tmp); 1814 1815 /* remember last written value in sc */ 1816 sc->rf_regs[reg] = val; 1817 1818 DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff); 1819 } 1820 1821 static int 1822 rt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg) 1823 { 1824 if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY) 1825 return EIO; /* there is already a command pending */ 1826 1827 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 1828 RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg); 1829 1830 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd); 1831 1832 return 0; 1833 } 1834 1835 static void 1836 rt2661_select_antenna(struct rt2661_softc *sc) 1837 { 1838 uint8_t bbp4, bbp77; 1839 uint32_t tmp; 1840 1841 bbp4 = rt2661_bbp_read(sc, 4); 1842 bbp77 = rt2661_bbp_read(sc, 77); 1843 1844 /* TBD */ 1845 1846 /* make sure Rx is disabled before switching antenna */ 1847 tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 1848 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 1849 1850 rt2661_bbp_write(sc, 4, bbp4); 1851 rt2661_bbp_write(sc, 77, bbp77); 1852 1853 /* restore Rx filter */ 1854 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 1855 } 1856 1857 /* 1858 * Enable multi-rate retries for frames sent at OFDM rates. 1859 * In 802.11b/g mode, allow fallback to CCK rates. 1860 */ 1861 static void 1862 rt2661_enable_mrr(struct rt2661_softc *sc) 1863 { 1864 struct ifnet *ifp = sc->sc_ifp; 1865 struct ieee80211com *ic = ifp->if_l2com; 1866 uint32_t tmp; 1867 1868 tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1869 1870 tmp &= ~RT2661_MRR_CCK_FALLBACK; 1871 if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan)) 1872 tmp |= RT2661_MRR_CCK_FALLBACK; 1873 tmp |= RT2661_MRR_ENABLED; 1874 1875 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1876 } 1877 1878 static void 1879 rt2661_set_txpreamble(struct rt2661_softc *sc) 1880 { 1881 struct ifnet *ifp = sc->sc_ifp; 1882 struct ieee80211com *ic = ifp->if_l2com; 1883 uint32_t tmp; 1884 1885 tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1886 1887 tmp &= ~RT2661_SHORT_PREAMBLE; 1888 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1889 tmp |= RT2661_SHORT_PREAMBLE; 1890 1891 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1892 } 1893 1894 static void 1895 rt2661_set_basicrates(struct rt2661_softc *sc, 1896 const struct ieee80211_rateset *rs) 1897 { 1898 #define RV(r) ((r) & IEEE80211_RATE_VAL) 1899 struct ifnet *ifp = sc->sc_ifp; 1900 struct ieee80211com *ic = ifp->if_l2com; 1901 uint32_t mask = 0; 1902 uint8_t rate; 1903 int i, j; 1904 1905 for (i = 0; i < rs->rs_nrates; i++) { 1906 rate = rs->rs_rates[i]; 1907 1908 if (!(rate & IEEE80211_RATE_BASIC)) 1909 continue; 1910 1911 /* 1912 * Find h/w rate index. We know it exists because the rate 1913 * set has already been negotiated. 1914 */ 1915 for (j = 0; ic->ic_sup_rates[IEEE80211_MODE_11G].rs_rates[j] != RV(rate); j++); 1916 1917 mask |= 1 << j; 1918 } 1919 1920 RAL_WRITE(sc, RT2661_TXRX_CSR5, mask); 1921 1922 DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask); 1923 #undef RV 1924 } 1925 1926 /* 1927 * Reprogram MAC/BBP to switch to a new band. Values taken from the reference 1928 * driver. 1929 */ 1930 static void 1931 rt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c) 1932 { 1933 uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104; 1934 uint32_t tmp; 1935 1936 /* update all BBP registers that depend on the band */ 1937 bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c; 1938 bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48; 1939 if (IEEE80211_IS_CHAN_5GHZ(c)) { 1940 bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c; 1941 bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10; 1942 } 1943 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 1944 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 1945 bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10; 1946 } 1947 1948 rt2661_bbp_write(sc, 17, bbp17); 1949 rt2661_bbp_write(sc, 96, bbp96); 1950 rt2661_bbp_write(sc, 104, bbp104); 1951 1952 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 1953 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 1954 rt2661_bbp_write(sc, 75, 0x80); 1955 rt2661_bbp_write(sc, 86, 0x80); 1956 rt2661_bbp_write(sc, 88, 0x80); 1957 } 1958 1959 rt2661_bbp_write(sc, 35, bbp35); 1960 rt2661_bbp_write(sc, 97, bbp97); 1961 rt2661_bbp_write(sc, 98, bbp98); 1962 1963 tmp = RAL_READ(sc, RT2661_PHY_CSR0); 1964 tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ); 1965 if (IEEE80211_IS_CHAN_2GHZ(c)) 1966 tmp |= RT2661_PA_PE_2GHZ; 1967 else 1968 tmp |= RT2661_PA_PE_5GHZ; 1969 RAL_WRITE(sc, RT2661_PHY_CSR0, tmp); 1970 } 1971 1972 static void 1973 rt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c) 1974 { 1975 struct ifnet *ifp = sc->sc_ifp; 1976 struct ieee80211com *ic = ifp->if_l2com; 1977 const struct rfprog *rfprog; 1978 uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT; 1979 int8_t power; 1980 u_int i, chan; 1981 1982 chan = ieee80211_chan2ieee(ic, c); 1983 KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan)); 1984 1985 /* select the appropriate RF settings based on what EEPROM says */ 1986 rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2; 1987 1988 /* find the settings for this channel (we know it exists) */ 1989 for (i = 0; rfprog[i].chan != chan; i++); 1990 1991 power = sc->txpow[i]; 1992 if (power < 0) { 1993 bbp94 += power; 1994 power = 0; 1995 } else if (power > 31) { 1996 bbp94 += power - 31; 1997 power = 31; 1998 } 1999 2000 /* 2001 * If we are switching from the 2GHz band to the 5GHz band or 2002 * vice-versa, BBP registers need to be reprogrammed. 2003 */ 2004 if (c->ic_flags != sc->sc_curchan->ic_flags) { 2005 rt2661_select_band(sc, c); 2006 rt2661_select_antenna(sc); 2007 } 2008 sc->sc_curchan = c; 2009 2010 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2011 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2012 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 2013 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2014 2015 DELAY(200); 2016 2017 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2018 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2019 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1); 2020 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2021 2022 DELAY(200); 2023 2024 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2025 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2026 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 2027 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2028 2029 /* enable smart mode for MIMO-capable RFs */ 2030 bbp3 = rt2661_bbp_read(sc, 3); 2031 2032 bbp3 &= ~RT2661_SMART_MODE; 2033 if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529) 2034 bbp3 |= RT2661_SMART_MODE; 2035 2036 rt2661_bbp_write(sc, 3, bbp3); 2037 2038 if (bbp94 != RT2661_BBPR94_DEFAULT) 2039 rt2661_bbp_write(sc, 94, bbp94); 2040 2041 /* 5GHz radio needs a 1ms delay here */ 2042 if (IEEE80211_IS_CHAN_5GHZ(c)) 2043 DELAY(1000); 2044 } 2045 2046 static void 2047 rt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid) 2048 { 2049 uint32_t tmp; 2050 2051 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2052 RAL_WRITE(sc, RT2661_MAC_CSR4, tmp); 2053 2054 tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16; 2055 RAL_WRITE(sc, RT2661_MAC_CSR5, tmp); 2056 } 2057 2058 static void 2059 rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr) 2060 { 2061 uint32_t tmp; 2062 2063 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2064 RAL_WRITE(sc, RT2661_MAC_CSR2, tmp); 2065 2066 tmp = addr[4] | addr[5] << 8; 2067 RAL_WRITE(sc, RT2661_MAC_CSR3, tmp); 2068 } 2069 2070 static void 2071 rt2661_update_promisc(struct ifnet *ifp) 2072 { 2073 struct rt2661_softc *sc = ifp->if_softc; 2074 uint32_t tmp; 2075 2076 tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2077 2078 tmp &= ~RT2661_DROP_NOT_TO_ME; 2079 if (!(ifp->if_flags & IFF_PROMISC)) 2080 tmp |= RT2661_DROP_NOT_TO_ME; 2081 2082 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2083 2084 DPRINTF(sc, "%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2085 "entering" : "leaving"); 2086 } 2087 2088 /* 2089 * Update QoS (802.11e) settings for each h/w Tx ring. 2090 */ 2091 static int 2092 rt2661_wme_update(struct ieee80211com *ic) 2093 { 2094 struct rt2661_softc *sc = ic->ic_ifp->if_softc; 2095 const struct wmeParams *wmep; 2096 2097 wmep = ic->ic_wme.wme_chanParams.cap_wmeParams; 2098 2099 /* XXX: not sure about shifts. */ 2100 /* XXX: the reference driver plays with AC_VI settings too. */ 2101 2102 /* update TxOp */ 2103 RAL_WRITE(sc, RT2661_AC_TXOP_CSR0, 2104 wmep[WME_AC_BE].wmep_txopLimit << 16 | 2105 wmep[WME_AC_BK].wmep_txopLimit); 2106 RAL_WRITE(sc, RT2661_AC_TXOP_CSR1, 2107 wmep[WME_AC_VI].wmep_txopLimit << 16 | 2108 wmep[WME_AC_VO].wmep_txopLimit); 2109 2110 /* update CWmin */ 2111 RAL_WRITE(sc, RT2661_CWMIN_CSR, 2112 wmep[WME_AC_BE].wmep_logcwmin << 12 | 2113 wmep[WME_AC_BK].wmep_logcwmin << 8 | 2114 wmep[WME_AC_VI].wmep_logcwmin << 4 | 2115 wmep[WME_AC_VO].wmep_logcwmin); 2116 2117 /* update CWmax */ 2118 RAL_WRITE(sc, RT2661_CWMAX_CSR, 2119 wmep[WME_AC_BE].wmep_logcwmax << 12 | 2120 wmep[WME_AC_BK].wmep_logcwmax << 8 | 2121 wmep[WME_AC_VI].wmep_logcwmax << 4 | 2122 wmep[WME_AC_VO].wmep_logcwmax); 2123 2124 /* update Aifsn */ 2125 RAL_WRITE(sc, RT2661_AIFSN_CSR, 2126 wmep[WME_AC_BE].wmep_aifsn << 12 | 2127 wmep[WME_AC_BK].wmep_aifsn << 8 | 2128 wmep[WME_AC_VI].wmep_aifsn << 4 | 2129 wmep[WME_AC_VO].wmep_aifsn); 2130 2131 return 0; 2132 } 2133 2134 static void 2135 rt2661_update_slot(struct ifnet *ifp) 2136 { 2137 struct rt2661_softc *sc = ifp->if_softc; 2138 struct ieee80211com *ic = ifp->if_l2com; 2139 uint8_t slottime; 2140 uint32_t tmp; 2141 2142 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2143 2144 tmp = RAL_READ(sc, RT2661_MAC_CSR9); 2145 tmp = (tmp & ~0xff) | slottime; 2146 RAL_WRITE(sc, RT2661_MAC_CSR9, tmp); 2147 } 2148 2149 static const char * 2150 rt2661_get_rf(int rev) 2151 { 2152 switch (rev) { 2153 case RT2661_RF_5225: return "RT5225"; 2154 case RT2661_RF_5325: return "RT5325 (MIMO XR)"; 2155 case RT2661_RF_2527: return "RT2527"; 2156 case RT2661_RF_2529: return "RT2529 (MIMO XR)"; 2157 default: return "unknown"; 2158 } 2159 } 2160 2161 static void 2162 rt2661_read_eeprom(struct rt2661_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN]) 2163 { 2164 uint16_t val; 2165 int i; 2166 2167 /* read MAC address */ 2168 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01); 2169 macaddr[0] = val & 0xff; 2170 macaddr[1] = val >> 8; 2171 2172 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23); 2173 macaddr[2] = val & 0xff; 2174 macaddr[3] = val >> 8; 2175 2176 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45); 2177 macaddr[4] = val & 0xff; 2178 macaddr[5] = val >> 8; 2179 2180 val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA); 2181 /* XXX: test if different from 0xffff? */ 2182 sc->rf_rev = (val >> 11) & 0x1f; 2183 sc->hw_radio = (val >> 10) & 0x1; 2184 sc->rx_ant = (val >> 4) & 0x3; 2185 sc->tx_ant = (val >> 2) & 0x3; 2186 sc->nb_ant = val & 0x3; 2187 2188 DPRINTF(sc, "RF revision=%d\n", sc->rf_rev); 2189 2190 val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2); 2191 sc->ext_5ghz_lna = (val >> 6) & 0x1; 2192 sc->ext_2ghz_lna = (val >> 4) & 0x1; 2193 2194 DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n", 2195 sc->ext_2ghz_lna, sc->ext_5ghz_lna); 2196 2197 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET); 2198 if ((val & 0xff) != 0xff) 2199 sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */ 2200 2201 /* Only [-10, 10] is valid */ 2202 if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10) 2203 sc->rssi_2ghz_corr = 0; 2204 2205 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET); 2206 if ((val & 0xff) != 0xff) 2207 sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */ 2208 2209 /* Only [-10, 10] is valid */ 2210 if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10) 2211 sc->rssi_5ghz_corr = 0; 2212 2213 /* adjust RSSI correction for external low-noise amplifier */ 2214 if (sc->ext_2ghz_lna) 2215 sc->rssi_2ghz_corr -= 14; 2216 if (sc->ext_5ghz_lna) 2217 sc->rssi_5ghz_corr -= 14; 2218 2219 DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n", 2220 sc->rssi_2ghz_corr, sc->rssi_5ghz_corr); 2221 2222 val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET); 2223 if ((val >> 8) != 0xff) 2224 sc->rfprog = (val >> 8) & 0x3; 2225 if ((val & 0xff) != 0xff) 2226 sc->rffreq = val & 0xff; 2227 2228 DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq); 2229 2230 /* read Tx power for all a/b/g channels */ 2231 for (i = 0; i < 19; i++) { 2232 val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i); 2233 sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */ 2234 DPRINTF(sc, "Channel=%d Tx power=%d\n", 2235 rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]); 2236 sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */ 2237 DPRINTF(sc, "Channel=%d Tx power=%d\n", 2238 rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]); 2239 } 2240 2241 /* read vendor-specific BBP values */ 2242 for (i = 0; i < 16; i++) { 2243 val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i); 2244 if (val == 0 || val == 0xffff) 2245 continue; /* skip invalid entries */ 2246 sc->bbp_prom[i].reg = val >> 8; 2247 sc->bbp_prom[i].val = val & 0xff; 2248 DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg, 2249 sc->bbp_prom[i].val); 2250 } 2251 } 2252 2253 static int 2254 rt2661_bbp_init(struct rt2661_softc *sc) 2255 { 2256 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2257 int i, ntries; 2258 uint8_t val; 2259 2260 /* wait for BBP to be ready */ 2261 for (ntries = 0; ntries < 100; ntries++) { 2262 val = rt2661_bbp_read(sc, 0); 2263 if (val != 0 && val != 0xff) 2264 break; 2265 DELAY(100); 2266 } 2267 if (ntries == 100) { 2268 device_printf(sc->sc_dev, "timeout waiting for BBP\n"); 2269 return EIO; 2270 } 2271 2272 /* initialize BBP registers to default values */ 2273 for (i = 0; i < N(rt2661_def_bbp); i++) { 2274 rt2661_bbp_write(sc, rt2661_def_bbp[i].reg, 2275 rt2661_def_bbp[i].val); 2276 } 2277 2278 /* write vendor-specific BBP values (from EEPROM) */ 2279 for (i = 0; i < 16; i++) { 2280 if (sc->bbp_prom[i].reg == 0) 2281 continue; 2282 rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2283 } 2284 2285 return 0; 2286 #undef N 2287 } 2288 2289 static void 2290 rt2661_init_locked(struct rt2661_softc *sc) 2291 { 2292 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2293 struct ifnet *ifp = sc->sc_ifp; 2294 struct ieee80211com *ic = ifp->if_l2com; 2295 uint32_t tmp, sta[3]; 2296 int i, error, ntries; 2297 2298 if ((sc->sc_flags & RAL_FW_LOADED) == 0) { 2299 error = rt2661_load_microcode(sc); 2300 if (error != 0) { 2301 if_printf(ifp, 2302 "%s: could not load 8051 microcode, error %d\n", 2303 __func__, error); 2304 return; 2305 } 2306 sc->sc_flags |= RAL_FW_LOADED; 2307 } 2308 2309 rt2661_stop_locked(sc); 2310 2311 /* initialize Tx rings */ 2312 RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr); 2313 RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr); 2314 RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr); 2315 RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr); 2316 2317 /* initialize Mgt ring */ 2318 RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr); 2319 2320 /* initialize Rx ring */ 2321 RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr); 2322 2323 /* initialize Tx rings sizes */ 2324 RAL_WRITE(sc, RT2661_TX_RING_CSR0, 2325 RT2661_TX_RING_COUNT << 24 | 2326 RT2661_TX_RING_COUNT << 16 | 2327 RT2661_TX_RING_COUNT << 8 | 2328 RT2661_TX_RING_COUNT); 2329 2330 RAL_WRITE(sc, RT2661_TX_RING_CSR1, 2331 RT2661_TX_DESC_WSIZE << 16 | 2332 RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */ 2333 RT2661_MGT_RING_COUNT); 2334 2335 /* initialize Rx rings */ 2336 RAL_WRITE(sc, RT2661_RX_RING_CSR, 2337 RT2661_RX_DESC_BACK << 16 | 2338 RT2661_RX_DESC_WSIZE << 8 | 2339 RT2661_RX_RING_COUNT); 2340 2341 /* XXX: some magic here */ 2342 RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa); 2343 2344 /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */ 2345 RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f); 2346 2347 /* load base address of Rx ring */ 2348 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2); 2349 2350 /* initialize MAC registers to default values */ 2351 for (i = 0; i < N(rt2661_def_mac); i++) 2352 RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val); 2353 2354 rt2661_set_macaddr(sc, IF_LLADDR(ifp)); 2355 2356 /* set host ready */ 2357 RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2358 RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2359 2360 /* wait for BBP/RF to wakeup */ 2361 for (ntries = 0; ntries < 1000; ntries++) { 2362 if (RAL_READ(sc, RT2661_MAC_CSR12) & 8) 2363 break; 2364 DELAY(1000); 2365 } 2366 if (ntries == 1000) { 2367 kprintf("timeout waiting for BBP/RF to wakeup\n"); 2368 rt2661_stop_locked(sc); 2369 return; 2370 } 2371 2372 if (rt2661_bbp_init(sc) != 0) { 2373 rt2661_stop_locked(sc); 2374 return; 2375 } 2376 2377 /* select default channel */ 2378 sc->sc_curchan = ic->ic_curchan; 2379 rt2661_select_band(sc, sc->sc_curchan); 2380 rt2661_select_antenna(sc); 2381 rt2661_set_chan(sc, sc->sc_curchan); 2382 2383 /* update Rx filter */ 2384 tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff; 2385 2386 tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR; 2387 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2388 tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR | 2389 RT2661_DROP_ACKCTS; 2390 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 2391 ic->ic_opmode != IEEE80211_M_MBSS) 2392 tmp |= RT2661_DROP_TODS; 2393 if (!(ifp->if_flags & IFF_PROMISC)) 2394 tmp |= RT2661_DROP_NOT_TO_ME; 2395 } 2396 2397 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2398 2399 /* clear STA registers */ 2400 RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta)); 2401 2402 /* initialize ASIC */ 2403 RAL_WRITE(sc, RT2661_MAC_CSR1, 4); 2404 2405 /* clear any pending interrupt */ 2406 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2407 2408 /* enable interrupts */ 2409 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 2410 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 2411 2412 /* kick Rx */ 2413 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1); 2414 2415 ifq_clr_oactive(&ifp->if_snd); 2416 ifp->if_flags |= IFF_RUNNING; 2417 2418 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog_callout, sc); 2419 #undef N 2420 } 2421 2422 static void 2423 rt2661_init(void *priv) 2424 { 2425 struct rt2661_softc *sc = priv; 2426 struct ifnet *ifp = sc->sc_ifp; 2427 struct ieee80211com *ic = ifp->if_l2com; 2428 2429 rt2661_init_locked(sc); 2430 2431 if (ifp->if_flags & IFF_RUNNING) 2432 ieee80211_start_all(ic); /* start all vap's */ 2433 } 2434 2435 void 2436 rt2661_stop_locked(struct rt2661_softc *sc) 2437 { 2438 struct ifnet *ifp = sc->sc_ifp; 2439 uint32_t tmp; 2440 volatile int *flags = &sc->sc_flags; 2441 2442 while (*flags & RAL_INPUT_RUNNING) 2443 zsleep(sc, &wlan_global_serializer, 0, "ralrunning", hz/10); 2444 2445 callout_stop(&sc->watchdog_ch); 2446 sc->sc_tx_timer = 0; 2447 2448 if (ifp->if_flags & IFF_RUNNING) { 2449 ifp->if_flags &= ~IFF_RUNNING; 2450 ifq_clr_oactive(&ifp->if_snd); 2451 2452 /* abort Tx (for all 5 Tx rings) */ 2453 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16); 2454 2455 /* disable Rx (value remains after reset!) */ 2456 tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2457 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2458 2459 /* reset ASIC */ 2460 RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2461 RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2462 2463 /* disable interrupts */ 2464 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff); 2465 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 2466 2467 /* clear any pending interrupt */ 2468 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2469 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff); 2470 2471 /* reset Tx and Rx rings */ 2472 rt2661_reset_tx_ring(sc, &sc->txq[0]); 2473 rt2661_reset_tx_ring(sc, &sc->txq[1]); 2474 rt2661_reset_tx_ring(sc, &sc->txq[2]); 2475 rt2661_reset_tx_ring(sc, &sc->txq[3]); 2476 rt2661_reset_tx_ring(sc, &sc->mgtq); 2477 rt2661_reset_rx_ring(sc, &sc->rxq); 2478 } 2479 } 2480 2481 void 2482 rt2661_stop(void *priv) 2483 { 2484 struct rt2661_softc *sc = priv; 2485 2486 rt2661_stop_locked(sc); 2487 } 2488 2489 static int 2490 rt2661_load_microcode(struct rt2661_softc *sc) 2491 { 2492 struct ifnet *ifp = sc->sc_ifp; 2493 const struct firmware *fp; 2494 const char *imagename; 2495 int ntries, error; 2496 2497 switch (sc->sc_id) { 2498 case 0x0301: imagename = "rt2561sfw"; break; 2499 case 0x0302: imagename = "rt2561fw"; break; 2500 case 0x0401: imagename = "rt2661fw"; break; 2501 default: 2502 if_printf(ifp, "%s: unexpected pci device id 0x%x, " 2503 "don't know how to retrieve firmware\n", 2504 __func__, sc->sc_id); 2505 return EINVAL; 2506 } 2507 2508 wlan_assert_serialized(); 2509 wlan_serialize_exit(); 2510 fp = firmware_get(imagename); 2511 wlan_serialize_enter(); 2512 2513 if (fp == NULL) { 2514 if_printf(ifp, "%s: unable to retrieve firmware image %s\n", 2515 __func__, imagename); 2516 return EINVAL; 2517 } 2518 2519 /* 2520 * Load 8051 microcode into NIC. 2521 */ 2522 /* reset 8051 */ 2523 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2524 2525 /* cancel any pending Host to MCU command */ 2526 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0); 2527 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 2528 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0); 2529 2530 /* write 8051's microcode */ 2531 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL); 2532 RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize); 2533 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2534 2535 /* kick 8051's ass */ 2536 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0); 2537 2538 /* wait for 8051 to initialize */ 2539 for (ntries = 0; ntries < 500; ntries++) { 2540 if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY) 2541 break; 2542 DELAY(100); 2543 } 2544 if (ntries == 500) { 2545 if_printf(ifp, "%s: timeout waiting for MCU to initialize\n", 2546 __func__); 2547 error = EIO; 2548 } else 2549 error = 0; 2550 2551 firmware_put(fp, FIRMWARE_UNLOAD); 2552 return error; 2553 } 2554 2555 #ifdef notyet 2556 /* 2557 * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and 2558 * false CCA count. This function is called periodically (every seconds) when 2559 * in the RUN state. Values taken from the reference driver. 2560 */ 2561 static void 2562 rt2661_rx_tune(struct rt2661_softc *sc) 2563 { 2564 uint8_t bbp17; 2565 uint16_t cca; 2566 int lo, hi, dbm; 2567 2568 /* 2569 * Tuning range depends on operating band and on the presence of an 2570 * external low-noise amplifier. 2571 */ 2572 lo = 0x20; 2573 if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan)) 2574 lo += 0x08; 2575 if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) || 2576 (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna)) 2577 lo += 0x10; 2578 hi = lo + 0x20; 2579 2580 /* retrieve false CCA count since last call (clear on read) */ 2581 cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff; 2582 2583 if (dbm >= -35) { 2584 bbp17 = 0x60; 2585 } else if (dbm >= -58) { 2586 bbp17 = hi; 2587 } else if (dbm >= -66) { 2588 bbp17 = lo + 0x10; 2589 } else if (dbm >= -74) { 2590 bbp17 = lo + 0x08; 2591 } else { 2592 /* RSSI < -74dBm, tune using false CCA count */ 2593 2594 bbp17 = sc->bbp17; /* current value */ 2595 2596 hi -= 2 * (-74 - dbm); 2597 if (hi < lo) 2598 hi = lo; 2599 2600 if (bbp17 > hi) { 2601 bbp17 = hi; 2602 2603 } else if (cca > 512) { 2604 if (++bbp17 > hi) 2605 bbp17 = hi; 2606 } else if (cca < 100) { 2607 if (--bbp17 < lo) 2608 bbp17 = lo; 2609 } 2610 } 2611 2612 if (bbp17 != sc->bbp17) { 2613 rt2661_bbp_write(sc, 17, bbp17); 2614 sc->bbp17 = bbp17; 2615 } 2616 } 2617 2618 /* 2619 * Enter/Leave radar detection mode. 2620 * This is for 802.11h additional regulatory domains. 2621 */ 2622 static void 2623 rt2661_radar_start(struct rt2661_softc *sc) 2624 { 2625 uint32_t tmp; 2626 2627 /* disable Rx */ 2628 tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2629 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2630 2631 rt2661_bbp_write(sc, 82, 0x20); 2632 rt2661_bbp_write(sc, 83, 0x00); 2633 rt2661_bbp_write(sc, 84, 0x40); 2634 2635 /* save current BBP registers values */ 2636 sc->bbp18 = rt2661_bbp_read(sc, 18); 2637 sc->bbp21 = rt2661_bbp_read(sc, 21); 2638 sc->bbp22 = rt2661_bbp_read(sc, 22); 2639 sc->bbp16 = rt2661_bbp_read(sc, 16); 2640 sc->bbp17 = rt2661_bbp_read(sc, 17); 2641 sc->bbp64 = rt2661_bbp_read(sc, 64); 2642 2643 rt2661_bbp_write(sc, 18, 0xff); 2644 rt2661_bbp_write(sc, 21, 0x3f); 2645 rt2661_bbp_write(sc, 22, 0x3f); 2646 rt2661_bbp_write(sc, 16, 0xbd); 2647 rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34); 2648 rt2661_bbp_write(sc, 64, 0x21); 2649 2650 /* restore Rx filter */ 2651 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2652 } 2653 2654 static int 2655 rt2661_radar_stop(struct rt2661_softc *sc) 2656 { 2657 uint8_t bbp66; 2658 2659 /* read radar detection result */ 2660 bbp66 = rt2661_bbp_read(sc, 66); 2661 2662 /* restore BBP registers values */ 2663 rt2661_bbp_write(sc, 16, sc->bbp16); 2664 rt2661_bbp_write(sc, 17, sc->bbp17); 2665 rt2661_bbp_write(sc, 18, sc->bbp18); 2666 rt2661_bbp_write(sc, 21, sc->bbp21); 2667 rt2661_bbp_write(sc, 22, sc->bbp22); 2668 rt2661_bbp_write(sc, 64, sc->bbp64); 2669 2670 return bbp66 == 1; 2671 } 2672 #endif 2673 2674 static int 2675 rt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap) 2676 { 2677 struct ieee80211com *ic = vap->iv_ic; 2678 struct ieee80211_beacon_offsets bo; 2679 struct rt2661_tx_desc desc; 2680 struct mbuf *m0; 2681 int rate; 2682 2683 m0 = ieee80211_beacon_alloc(vap->iv_bss, &bo); 2684 if (m0 == NULL) { 2685 device_printf(sc->sc_dev, "could not allocate beacon frame\n"); 2686 return ENOBUFS; 2687 } 2688 2689 /* send beacons at the lowest available rate */ 2690 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2; 2691 2692 rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ, 2693 m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT); 2694 2695 /* copy the first 24 bytes of Tx descriptor into NIC memory */ 2696 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24); 2697 2698 /* copy beacon header and payload into NIC memory */ 2699 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24, 2700 mtod(m0, uint8_t *), m0->m_pkthdr.len); 2701 2702 m_freem(m0); 2703 2704 return 0; 2705 } 2706 2707 /* 2708 * Enable TSF synchronization and tell h/w to start sending beacons for IBSS 2709 * and HostAP operating modes. 2710 */ 2711 static void 2712 rt2661_enable_tsf_sync(struct rt2661_softc *sc) 2713 { 2714 struct ifnet *ifp = sc->sc_ifp; 2715 struct ieee80211com *ic = ifp->if_l2com; 2716 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2717 uint32_t tmp; 2718 2719 if (vap->iv_opmode != IEEE80211_M_STA) { 2720 /* 2721 * Change default 16ms TBTT adjustment to 8ms. 2722 * Must be done before enabling beacon generation. 2723 */ 2724 RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8); 2725 } 2726 2727 tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000; 2728 2729 /* set beacon interval (in 1/16ms unit) */ 2730 tmp |= vap->iv_bss->ni_intval * 16; 2731 2732 tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT; 2733 if (vap->iv_opmode == IEEE80211_M_STA) 2734 tmp |= RT2661_TSF_MODE(1); 2735 else 2736 tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON; 2737 2738 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp); 2739 } 2740 2741 static void 2742 rt2661_enable_tsf(struct rt2661_softc *sc) 2743 { 2744 RAL_WRITE(sc, RT2661_TXRX_CSR9, 2745 (RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000) 2746 | RT2661_TSF_TICKING | RT2661_TSF_MODE(2)); 2747 } 2748 2749 /* 2750 * Retrieve the "Received Signal Strength Indicator" from the raw values 2751 * contained in Rx descriptors. The computation depends on which band the 2752 * frame was received. Correction values taken from the reference driver. 2753 */ 2754 static int 2755 rt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw) 2756 { 2757 int lna, agc, rssi; 2758 2759 lna = (raw >> 5) & 0x3; 2760 agc = raw & 0x1f; 2761 2762 if (lna == 0) { 2763 /* 2764 * No mapping available. 2765 * 2766 * NB: Since RSSI is relative to noise floor, -1 is 2767 * adequate for caller to know error happened. 2768 */ 2769 return -1; 2770 } 2771 2772 rssi = (2 * agc) - RT2661_NOISE_FLOOR; 2773 2774 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) { 2775 rssi += sc->rssi_2ghz_corr; 2776 2777 if (lna == 1) 2778 rssi -= 64; 2779 else if (lna == 2) 2780 rssi -= 74; 2781 else if (lna == 3) 2782 rssi -= 90; 2783 } else { 2784 rssi += sc->rssi_5ghz_corr; 2785 2786 if (lna == 1) 2787 rssi -= 64; 2788 else if (lna == 2) 2789 rssi -= 86; 2790 else if (lna == 3) 2791 rssi -= 100; 2792 } 2793 return rssi; 2794 } 2795 2796 static void 2797 rt2661_scan_start(struct ieee80211com *ic) 2798 { 2799 struct ifnet *ifp = ic->ic_ifp; 2800 struct rt2661_softc *sc = ifp->if_softc; 2801 uint32_t tmp; 2802 2803 /* abort TSF synchronization */ 2804 tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 2805 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff); 2806 rt2661_set_bssid(sc, ifp->if_broadcastaddr); 2807 } 2808 2809 static void 2810 rt2661_scan_end(struct ieee80211com *ic) 2811 { 2812 struct ifnet *ifp = ic->ic_ifp; 2813 struct rt2661_softc *sc = ifp->if_softc; 2814 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2815 2816 rt2661_enable_tsf_sync(sc); 2817 /* XXX keep local copy */ 2818 rt2661_set_bssid(sc, vap->iv_bss->ni_bssid); 2819 } 2820 2821 static void 2822 rt2661_set_channel(struct ieee80211com *ic) 2823 { 2824 struct ifnet *ifp = ic->ic_ifp; 2825 struct rt2661_softc *sc = ifp->if_softc; 2826 2827 rt2661_set_chan(sc, ic->ic_curchan); 2828 } 2829