1 /* $OpenBSD: if_txp.c,v 1.48 2001/06/27 06:34:50 kjc Exp $ */ 2 /* $FreeBSD: src/sys/dev/txp/if_txp.c,v 1.4.2.4 2001/12/14 19:50:43 jlemon Exp $ */ 3 /* $DragonFly: src/sys/dev/netif/txp/if_txp.c,v 1.42 2007/03/26 12:13:58 sephe Exp $ */ 4 5 /* 6 * Copyright (c) 2001 7 * Jason L. Wright <jason@thought.net>, Theo de Raadt, and 8 * Aaron Campbell <aaron@monkey.org>. All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Jason L. Wright, 21 * Theo de Raadt and Aaron Campbell. 22 * 4. Neither the name of the author nor the names of any co-contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Driver for 3c990 (Typhoon) Ethernet ASIC 41 */ 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/sockio.h> 46 #include <sys/mbuf.h> 47 #include <sys/malloc.h> 48 #include <sys/kernel.h> 49 #include <sys/socket.h> 50 #include <sys/serialize.h> 51 #include <sys/bus.h> 52 #include <sys/rman.h> 53 #include <sys/thread2.h> 54 55 #include <net/if.h> 56 #include <net/ifq_var.h> 57 #include <net/if_arp.h> 58 #include <net/ethernet.h> 59 #include <net/if_dl.h> 60 #include <net/if_types.h> 61 #include <net/vlan/if_vlan_var.h> 62 63 #include <netinet/in.h> 64 #include <netinet/in_systm.h> 65 #include <netinet/in_var.h> 66 #include <netinet/ip.h> 67 #include <netinet/if_ether.h> 68 #include <sys/in_cksum.h> 69 70 #include <net/if_media.h> 71 72 #include <net/bpf.h> 73 74 #include <vm/vm.h> /* for vtophys */ 75 #include <vm/pmap.h> /* for vtophys */ 76 77 #include "../mii_layer/mii.h" 78 #include "../mii_layer/miivar.h" 79 80 #include <bus/pci/pcidevs.h> 81 #include <bus/pci/pcireg.h> 82 #include <bus/pci/pcivar.h> 83 84 #define TXP_USEIOSPACE 85 #define __STRICT_ALIGNMENT 86 87 #include "if_txpreg.h" 88 #include "3c990img.h" 89 90 /* 91 * Various supported device vendors/types and their names. 92 */ 93 static struct txp_type txp_devs[] = { 94 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990TX95, 95 "3Com 3cR990-TX-95 Etherlink with 3XP Processor" }, 96 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990TX97, 97 "3Com 3cR990-TX-97 Etherlink with 3XP Processor" }, 98 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C990B, 99 "3Com 3cR990B-TXM Etherlink with 3XP Processor" }, 100 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990SVR95, 101 "3Com 3cR990-SRV-95 Etherlink Server with 3XP Processor" }, 102 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990SVR97, 103 "3Com 3cR990-SRV-97 Etherlink Server with 3XP Processor" }, 104 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C990BSVR, 105 "3Com 3cR990B-SRV Etherlink Server with 3XP Processor" }, 106 { 0, 0, NULL } 107 }; 108 109 static int txp_probe (device_t); 110 static int txp_attach (device_t); 111 static int txp_detach (device_t); 112 static void txp_intr (void *); 113 static void txp_tick (void *); 114 static int txp_shutdown (device_t); 115 static int txp_ioctl (struct ifnet *, u_long, caddr_t, struct ucred *); 116 static void txp_start (struct ifnet *); 117 static void txp_stop (struct txp_softc *); 118 static void txp_init (void *); 119 static void txp_watchdog (struct ifnet *); 120 121 static void txp_release_resources (device_t); 122 static int txp_chip_init (struct txp_softc *); 123 static int txp_reset_adapter (struct txp_softc *); 124 static int txp_download_fw (struct txp_softc *); 125 static int txp_download_fw_wait (struct txp_softc *); 126 static int txp_download_fw_section (struct txp_softc *, 127 struct txp_fw_section_header *, int); 128 static int txp_alloc_rings (struct txp_softc *); 129 static int txp_rxring_fill (struct txp_softc *); 130 static void txp_rxring_empty (struct txp_softc *); 131 static void txp_set_filter (struct txp_softc *); 132 133 static int txp_cmd_desc_numfree (struct txp_softc *); 134 static int txp_command (struct txp_softc *, u_int16_t, u_int16_t, u_int32_t, 135 u_int32_t, u_int16_t *, u_int32_t *, u_int32_t *, int); 136 static int txp_command2 (struct txp_softc *, u_int16_t, u_int16_t, 137 u_int32_t, u_int32_t, struct txp_ext_desc *, u_int8_t, 138 struct txp_rsp_desc **, int); 139 static int txp_response (struct txp_softc *, u_int32_t, u_int16_t, u_int16_t, 140 struct txp_rsp_desc **); 141 static void txp_rsp_fixup (struct txp_softc *, struct txp_rsp_desc *, 142 struct txp_rsp_desc *); 143 static void txp_capabilities (struct txp_softc *); 144 145 static void txp_ifmedia_sts (struct ifnet *, struct ifmediareq *); 146 static int txp_ifmedia_upd (struct ifnet *); 147 #ifdef TXP_DEBUG 148 static void txp_show_descriptor (void *); 149 #endif 150 static void txp_tx_reclaim (struct txp_softc *, struct txp_tx_ring *); 151 static void txp_rxbuf_reclaim (struct txp_softc *); 152 static void txp_rx_reclaim (struct txp_softc *, struct txp_rx_ring *); 153 154 #ifdef TXP_USEIOSPACE 155 #define TXP_RES SYS_RES_IOPORT 156 #define TXP_RID TXP_PCI_LOIO 157 #else 158 #define TXP_RES SYS_RES_MEMORY 159 #define TXP_RID TXP_PCI_LOMEM 160 #endif 161 162 static device_method_t txp_methods[] = { 163 /* Device interface */ 164 DEVMETHOD(device_probe, txp_probe), 165 DEVMETHOD(device_attach, txp_attach), 166 DEVMETHOD(device_detach, txp_detach), 167 DEVMETHOD(device_shutdown, txp_shutdown), 168 { 0, 0 } 169 }; 170 171 static driver_t txp_driver = { 172 "txp", 173 txp_methods, 174 sizeof(struct txp_softc) 175 }; 176 177 static devclass_t txp_devclass; 178 179 DECLARE_DUMMY_MODULE(if_txp); 180 DRIVER_MODULE(if_txp, pci, txp_driver, txp_devclass, 0, 0); 181 182 static int 183 txp_probe(device_t dev) 184 { 185 struct txp_type *t; 186 uint16_t vid, did; 187 188 vid = pci_get_vendor(dev); 189 did = pci_get_device(dev); 190 191 for (t = txp_devs; t->txp_name != NULL; ++t) { 192 if ((vid == t->txp_vid) && (did == t->txp_did)) { 193 device_set_desc(dev, t->txp_name); 194 return(0); 195 } 196 } 197 198 return(ENXIO); 199 } 200 201 static int 202 txp_attach(device_t dev) 203 { 204 struct txp_softc *sc; 205 struct ifnet *ifp; 206 uint16_t p1; 207 uint32_t p2; 208 uint8_t enaddr[ETHER_ADDR_LEN]; 209 int error = 0, rid; 210 211 sc = device_get_softc(dev); 212 callout_init(&sc->txp_stat_timer); 213 214 ifp = &sc->sc_arpcom.ac_if; 215 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 216 217 pci_enable_busmaster(dev); 218 219 rid = TXP_RID; 220 sc->sc_res = bus_alloc_resource_any(dev, TXP_RES, &rid, RF_ACTIVE); 221 222 if (sc->sc_res == NULL) { 223 device_printf(dev, "couldn't map ports/memory\n"); 224 return(ENXIO); 225 } 226 227 sc->sc_bt = rman_get_bustag(sc->sc_res); 228 sc->sc_bh = rman_get_bushandle(sc->sc_res); 229 230 /* Allocate interrupt */ 231 rid = 0; 232 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 233 RF_SHAREABLE | RF_ACTIVE); 234 235 if (sc->sc_irq == NULL) { 236 device_printf(dev, "couldn't map interrupt\n"); 237 error = ENXIO; 238 goto fail; 239 } 240 241 if (txp_chip_init(sc)) { 242 error = ENXIO; 243 goto fail; 244 } 245 246 sc->sc_fwbuf = contigmalloc(32768, M_DEVBUF, 247 M_WAITOK, 0, 0xffffffff, PAGE_SIZE, 0); 248 error = txp_download_fw(sc); 249 contigfree(sc->sc_fwbuf, 32768, M_DEVBUF); 250 sc->sc_fwbuf = NULL; 251 252 if (error) 253 goto fail; 254 255 sc->sc_ldata = contigmalloc(sizeof(struct txp_ldata), M_DEVBUF, 256 M_WAITOK, 0, 0xffffffff, PAGE_SIZE, 0); 257 bzero(sc->sc_ldata, sizeof(struct txp_ldata)); 258 259 if (txp_alloc_rings(sc)) { 260 error = ENXIO; 261 goto fail; 262 } 263 264 if (txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0, 265 NULL, NULL, NULL, 1)) { 266 error = ENXIO; 267 goto fail; 268 } 269 270 if (txp_command(sc, TXP_CMD_STATION_ADDRESS_READ, 0, 0, 0, 271 &p1, &p2, NULL, 1)) { 272 error = ENXIO; 273 goto fail; 274 } 275 276 txp_set_filter(sc); 277 278 enaddr[0] = ((uint8_t *)&p1)[1]; 279 enaddr[1] = ((uint8_t *)&p1)[0]; 280 enaddr[2] = ((uint8_t *)&p2)[3]; 281 enaddr[3] = ((uint8_t *)&p2)[2]; 282 enaddr[4] = ((uint8_t *)&p2)[1]; 283 enaddr[5] = ((uint8_t *)&p2)[0]; 284 285 ifmedia_init(&sc->sc_ifmedia, 0, txp_ifmedia_upd, txp_ifmedia_sts); 286 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T, 0, NULL); 287 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL); 288 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 289 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL); 290 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL); 291 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL); 292 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL); 293 294 sc->sc_xcvr = TXP_XCVR_AUTO; 295 txp_command(sc, TXP_CMD_XCVR_SELECT, TXP_XCVR_AUTO, 0, 0, 296 NULL, NULL, NULL, 0); 297 ifmedia_set(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO); 298 299 ifp->if_softc = sc; 300 ifp->if_mtu = ETHERMTU; 301 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 302 ifp->if_ioctl = txp_ioctl; 303 ifp->if_start = txp_start; 304 ifp->if_watchdog = txp_watchdog; 305 ifp->if_init = txp_init; 306 ifp->if_baudrate = 100000000; 307 ifq_set_maxlen(&ifp->if_snd, TX_ENTRIES); 308 ifq_set_ready(&ifp->if_snd); 309 ifp->if_hwassist = 0; 310 txp_capabilities(sc); 311 312 ether_ifattach(ifp, enaddr, NULL); 313 314 error = bus_setup_intr(dev, sc->sc_irq, INTR_NETSAFE, 315 txp_intr, sc, &sc->sc_intrhand, 316 ifp->if_serializer); 317 if (error) { 318 device_printf(dev, "couldn't set up irq\n"); 319 ether_ifdetach(ifp); 320 goto fail; 321 } 322 323 return(0); 324 325 fail: 326 txp_release_resources(dev); 327 return(error); 328 } 329 330 static int 331 txp_detach(device_t dev) 332 { 333 struct txp_softc *sc = device_get_softc(dev); 334 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 335 int i; 336 337 lwkt_serialize_enter(ifp->if_serializer); 338 339 txp_stop(sc); 340 txp_shutdown(dev); 341 bus_teardown_intr(dev, sc->sc_irq, sc->sc_intrhand); 342 343 lwkt_serialize_exit(ifp->if_serializer); 344 345 ifmedia_removeall(&sc->sc_ifmedia); 346 ether_ifdetach(ifp); 347 348 for (i = 0; i < RXBUF_ENTRIES; i++) 349 kfree(sc->sc_rxbufs[i].rb_sd, M_DEVBUF); 350 351 txp_release_resources(dev); 352 353 return(0); 354 } 355 356 static void 357 txp_release_resources(device_t dev) 358 { 359 struct txp_softc *sc; 360 361 sc = device_get_softc(dev); 362 363 if (sc->sc_irq != NULL) 364 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq); 365 366 if (sc->sc_res != NULL) 367 bus_release_resource(dev, TXP_RES, TXP_RID, sc->sc_res); 368 369 if (sc->sc_ldata != NULL) 370 contigfree(sc->sc_ldata, sizeof(struct txp_ldata), M_DEVBUF); 371 372 return; 373 } 374 375 static int 376 txp_chip_init(struct txp_softc *sc) 377 { 378 /* disable interrupts */ 379 WRITE_REG(sc, TXP_IER, 0); 380 WRITE_REG(sc, TXP_IMR, 381 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 382 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 383 TXP_INT_LATCH); 384 385 /* ack all interrupts */ 386 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH | 387 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 388 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 389 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 390 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0); 391 392 if (txp_reset_adapter(sc)) 393 return (-1); 394 395 /* disable interrupts */ 396 WRITE_REG(sc, TXP_IER, 0); 397 WRITE_REG(sc, TXP_IMR, 398 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 399 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 400 TXP_INT_LATCH); 401 402 /* ack all interrupts */ 403 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH | 404 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 405 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 406 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 407 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0); 408 409 return (0); 410 } 411 412 static int 413 txp_reset_adapter(struct txp_softc *sc) 414 { 415 u_int32_t r; 416 int i; 417 418 WRITE_REG(sc, TXP_SRR, TXP_SRR_ALL); 419 DELAY(1000); 420 WRITE_REG(sc, TXP_SRR, 0); 421 422 /* Should wait max 6 seconds */ 423 for (i = 0; i < 6000; i++) { 424 r = READ_REG(sc, TXP_A2H_0); 425 if (r == STAT_WAITING_FOR_HOST_REQUEST) 426 break; 427 DELAY(1000); 428 } 429 430 if (r != STAT_WAITING_FOR_HOST_REQUEST) { 431 if_printf(&sc->sc_arpcom.ac_if, "reset hung\n"); 432 return (-1); 433 } 434 435 return (0); 436 } 437 438 static int 439 txp_download_fw(struct txp_softc *sc) 440 { 441 struct txp_fw_file_header *fileheader; 442 struct txp_fw_section_header *secthead; 443 int sect; 444 u_int32_t r, i, ier, imr; 445 446 ier = READ_REG(sc, TXP_IER); 447 WRITE_REG(sc, TXP_IER, ier | TXP_INT_A2H_0); 448 449 imr = READ_REG(sc, TXP_IMR); 450 WRITE_REG(sc, TXP_IMR, imr | TXP_INT_A2H_0); 451 452 for (i = 0; i < 10000; i++) { 453 r = READ_REG(sc, TXP_A2H_0); 454 if (r == STAT_WAITING_FOR_HOST_REQUEST) 455 break; 456 DELAY(50); 457 } 458 if (r != STAT_WAITING_FOR_HOST_REQUEST) { 459 if_printf(&sc->sc_arpcom.ac_if, 460 "not waiting for host request\n"); 461 return (-1); 462 } 463 464 /* Ack the status */ 465 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0); 466 467 fileheader = (struct txp_fw_file_header *)tc990image; 468 if (bcmp("TYPHOON", fileheader->magicid, sizeof(fileheader->magicid))) { 469 if_printf(&sc->sc_arpcom.ac_if, "fw invalid magic\n"); 470 return (-1); 471 } 472 473 /* Tell boot firmware to get ready for image */ 474 WRITE_REG(sc, TXP_H2A_1, fileheader->addr); 475 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_RUNTIME_IMAGE); 476 477 if (txp_download_fw_wait(sc)) { 478 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed, initial\n"); 479 return (-1); 480 } 481 482 secthead = (struct txp_fw_section_header *)(((u_int8_t *)tc990image) + 483 sizeof(struct txp_fw_file_header)); 484 485 for (sect = 0; sect < fileheader->nsections; sect++) { 486 if (txp_download_fw_section(sc, secthead, sect)) 487 return (-1); 488 secthead = (struct txp_fw_section_header *) 489 (((u_int8_t *)secthead) + secthead->nbytes + 490 sizeof(*secthead)); 491 } 492 493 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_DOWNLOAD_COMPLETE); 494 495 for (i = 0; i < 10000; i++) { 496 r = READ_REG(sc, TXP_A2H_0); 497 if (r == STAT_WAITING_FOR_BOOT) 498 break; 499 DELAY(50); 500 } 501 if (r != STAT_WAITING_FOR_BOOT) { 502 if_printf(&sc->sc_arpcom.ac_if, "not waiting for boot\n"); 503 return (-1); 504 } 505 506 WRITE_REG(sc, TXP_IER, ier); 507 WRITE_REG(sc, TXP_IMR, imr); 508 509 return (0); 510 } 511 512 static int 513 txp_download_fw_wait(struct txp_softc *sc) 514 { 515 u_int32_t i, r; 516 517 for (i = 0; i < 10000; i++) { 518 r = READ_REG(sc, TXP_ISR); 519 if (r & TXP_INT_A2H_0) 520 break; 521 DELAY(50); 522 } 523 524 if (!(r & TXP_INT_A2H_0)) { 525 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed comm0\n"); 526 return (-1); 527 } 528 529 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0); 530 531 r = READ_REG(sc, TXP_A2H_0); 532 if (r != STAT_WAITING_FOR_SEGMENT) { 533 if_printf(&sc->sc_arpcom.ac_if, "fw not waiting for segment\n"); 534 return (-1); 535 } 536 return (0); 537 } 538 539 static int 540 txp_download_fw_section(struct txp_softc *sc, 541 struct txp_fw_section_header *sect, int sectnum) 542 { 543 vm_offset_t dma; 544 int rseg, err = 0; 545 struct mbuf m; 546 u_int16_t csum; 547 548 /* Skip zero length sections */ 549 if (sect->nbytes == 0) 550 return (0); 551 552 /* Make sure we aren't past the end of the image */ 553 rseg = ((u_int8_t *)sect) - ((u_int8_t *)tc990image); 554 if (rseg >= sizeof(tc990image)) { 555 if_printf(&sc->sc_arpcom.ac_if, "fw invalid section address, " 556 "section %d\n", sectnum); 557 return (-1); 558 } 559 560 /* Make sure this section doesn't go past the end */ 561 rseg += sect->nbytes; 562 if (rseg >= sizeof(tc990image)) { 563 if_printf(&sc->sc_arpcom.ac_if, "fw truncated section %d\n", 564 sectnum); 565 return (-1); 566 } 567 568 bcopy(((u_int8_t *)sect) + sizeof(*sect), sc->sc_fwbuf, sect->nbytes); 569 dma = vtophys(sc->sc_fwbuf); 570 571 /* 572 * dummy up mbuf and verify section checksum 573 */ 574 m.m_type = MT_DATA; 575 m.m_next = m.m_nextpkt = NULL; 576 m.m_len = sect->nbytes; 577 m.m_data = sc->sc_fwbuf; 578 m.m_flags = 0; 579 csum = in_cksum(&m, sect->nbytes); 580 if (csum != sect->cksum) { 581 if_printf(&sc->sc_arpcom.ac_if, "fw section %d, bad " 582 "cksum (expected 0x%x got 0x%x)\n", 583 sectnum, sect->cksum, csum); 584 err = -1; 585 goto bail; 586 } 587 588 WRITE_REG(sc, TXP_H2A_1, sect->nbytes); 589 WRITE_REG(sc, TXP_H2A_2, sect->cksum); 590 WRITE_REG(sc, TXP_H2A_3, sect->addr); 591 WRITE_REG(sc, TXP_H2A_4, 0); 592 WRITE_REG(sc, TXP_H2A_5, dma & 0xffffffff); 593 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_SEGMENT_AVAILABLE); 594 595 if (txp_download_fw_wait(sc)) { 596 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed, " 597 "section %d\n", sectnum); 598 err = -1; 599 } 600 601 bail: 602 return (err); 603 } 604 605 static void 606 txp_intr(void *vsc) 607 { 608 struct txp_softc *sc = vsc; 609 struct txp_hostvar *hv = sc->sc_hostvar; 610 u_int32_t isr; 611 612 /* mask all interrupts */ 613 WRITE_REG(sc, TXP_IMR, TXP_INT_RESERVED | TXP_INT_SELF | 614 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 615 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 | 616 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 617 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH); 618 619 isr = READ_REG(sc, TXP_ISR); 620 while (isr) { 621 WRITE_REG(sc, TXP_ISR, isr); 622 623 if ((*sc->sc_rxhir.r_roff) != (*sc->sc_rxhir.r_woff)) 624 txp_rx_reclaim(sc, &sc->sc_rxhir); 625 if ((*sc->sc_rxlor.r_roff) != (*sc->sc_rxlor.r_woff)) 626 txp_rx_reclaim(sc, &sc->sc_rxlor); 627 628 if (hv->hv_rx_buf_write_idx == hv->hv_rx_buf_read_idx) 629 txp_rxbuf_reclaim(sc); 630 631 if (sc->sc_txhir.r_cnt && (sc->sc_txhir.r_cons != 632 TXP_OFFSET2IDX(*(sc->sc_txhir.r_off)))) 633 txp_tx_reclaim(sc, &sc->sc_txhir); 634 635 if (sc->sc_txlor.r_cnt && (sc->sc_txlor.r_cons != 636 TXP_OFFSET2IDX(*(sc->sc_txlor.r_off)))) 637 txp_tx_reclaim(sc, &sc->sc_txlor); 638 639 isr = READ_REG(sc, TXP_ISR); 640 } 641 642 /* unmask all interrupts */ 643 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3); 644 645 txp_start(&sc->sc_arpcom.ac_if); 646 647 return; 648 } 649 650 static void 651 txp_rx_reclaim(struct txp_softc *sc, struct txp_rx_ring *r) 652 { 653 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 654 struct txp_rx_desc *rxd; 655 struct mbuf *m; 656 struct txp_swdesc *sd = NULL; 657 u_int32_t roff, woff; 658 659 roff = *r->r_roff; 660 woff = *r->r_woff; 661 rxd = r->r_desc + (roff / sizeof(struct txp_rx_desc)); 662 663 while (roff != woff) { 664 665 if (rxd->rx_flags & RX_FLAGS_ERROR) { 666 if_printf(ifp, "error 0x%x\n", rxd->rx_stat); 667 ifp->if_ierrors++; 668 goto next; 669 } 670 671 /* retrieve stashed pointer */ 672 sd = rxd->rx_sd; 673 674 m = sd->sd_mbuf; 675 sd->sd_mbuf = NULL; 676 677 m->m_pkthdr.len = m->m_len = rxd->rx_len; 678 679 #ifdef __STRICT_ALIGNMENT 680 { 681 /* 682 * XXX Nice chip, except it won't accept "off by 2" 683 * buffers, so we're force to copy. Supposedly 684 * this will be fixed in a newer firmware rev 685 * and this will be temporary. 686 */ 687 struct mbuf *mnew; 688 689 MGETHDR(mnew, MB_DONTWAIT, MT_DATA); 690 if (mnew == NULL) { 691 m_freem(m); 692 goto next; 693 } 694 if (m->m_len > (MHLEN - 2)) { 695 MCLGET(mnew, MB_DONTWAIT); 696 if (!(mnew->m_flags & M_EXT)) { 697 m_freem(mnew); 698 m_freem(m); 699 goto next; 700 } 701 } 702 mnew->m_pkthdr.rcvif = ifp; 703 m_adj(mnew, 2); 704 mnew->m_pkthdr.len = mnew->m_len = m->m_len; 705 m_copydata(m, 0, m->m_pkthdr.len, mtod(mnew, caddr_t)); 706 m_freem(m); 707 m = mnew; 708 } 709 #endif 710 711 if (rxd->rx_stat & RX_STAT_IPCKSUMBAD) 712 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED; 713 else if (rxd->rx_stat & RX_STAT_IPCKSUMGOOD) 714 m->m_pkthdr.csum_flags |= 715 CSUM_IP_CHECKED|CSUM_IP_VALID; 716 717 if ((rxd->rx_stat & RX_STAT_TCPCKSUMGOOD) || 718 (rxd->rx_stat & RX_STAT_UDPCKSUMGOOD)) { 719 m->m_pkthdr.csum_flags |= 720 CSUM_DATA_VALID|CSUM_PSEUDO_HDR; 721 m->m_pkthdr.csum_data = 0xffff; 722 } 723 724 lwkt_serialize_enter(ifp->if_serializer); 725 if (rxd->rx_stat & RX_STAT_VLAN) 726 VLAN_INPUT_TAG(m, htons(rxd->rx_vlan >> 16)); 727 else 728 ifp->if_input(ifp, m); 729 lwkt_serialize_exit(ifp->if_serializer); 730 731 next: 732 733 roff += sizeof(struct txp_rx_desc); 734 if (roff == (RX_ENTRIES * sizeof(struct txp_rx_desc))) { 735 roff = 0; 736 rxd = r->r_desc; 737 } else 738 rxd++; 739 woff = *r->r_woff; 740 } 741 742 *r->r_roff = woff; 743 744 return; 745 } 746 747 static void 748 txp_rxbuf_reclaim(struct txp_softc *sc) 749 { 750 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 751 struct txp_hostvar *hv = sc->sc_hostvar; 752 struct txp_rxbuf_desc *rbd; 753 struct txp_swdesc *sd; 754 u_int32_t i; 755 756 if (!(ifp->if_flags & IFF_RUNNING)) 757 return; 758 759 i = sc->sc_rxbufprod; 760 rbd = sc->sc_rxbufs + i; 761 762 while (1) { 763 sd = rbd->rb_sd; 764 if (sd->sd_mbuf != NULL) 765 break; 766 767 MGETHDR(sd->sd_mbuf, MB_DONTWAIT, MT_DATA); 768 if (sd->sd_mbuf == NULL) 769 goto err_sd; 770 771 MCLGET(sd->sd_mbuf, MB_DONTWAIT); 772 if ((sd->sd_mbuf->m_flags & M_EXT) == 0) 773 goto err_mbuf; 774 sd->sd_mbuf->m_pkthdr.rcvif = ifp; 775 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES; 776 777 rbd->rb_paddrlo = vtophys(mtod(sd->sd_mbuf, vm_offset_t)) 778 & 0xffffffff; 779 rbd->rb_paddrhi = 0; 780 781 hv->hv_rx_buf_write_idx = TXP_IDX2OFFSET(i); 782 783 if (++i == RXBUF_ENTRIES) { 784 i = 0; 785 rbd = sc->sc_rxbufs; 786 } else 787 rbd++; 788 } 789 790 sc->sc_rxbufprod = i; 791 792 return; 793 794 err_mbuf: 795 m_freem(sd->sd_mbuf); 796 err_sd: 797 kfree(sd, M_DEVBUF); 798 } 799 800 /* 801 * Reclaim mbufs and entries from a transmit ring. 802 */ 803 static void 804 txp_tx_reclaim(struct txp_softc *sc, struct txp_tx_ring *r) 805 { 806 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 807 u_int32_t idx = TXP_OFFSET2IDX(*(r->r_off)); 808 u_int32_t cons = r->r_cons, cnt = r->r_cnt; 809 struct txp_tx_desc *txd = r->r_desc + cons; 810 struct txp_swdesc *sd = sc->sc_txd + cons; 811 struct mbuf *m; 812 813 while (cons != idx) { 814 if (cnt == 0) 815 break; 816 817 if ((txd->tx_flags & TX_FLAGS_TYPE_M) == 818 TX_FLAGS_TYPE_DATA) { 819 m = sd->sd_mbuf; 820 if (m != NULL) { 821 m_freem(m); 822 txd->tx_addrlo = 0; 823 txd->tx_addrhi = 0; 824 ifp->if_opackets++; 825 } 826 } 827 ifp->if_flags &= ~IFF_OACTIVE; 828 829 if (++cons == TX_ENTRIES) { 830 txd = r->r_desc; 831 cons = 0; 832 sd = sc->sc_txd; 833 } else { 834 txd++; 835 sd++; 836 } 837 838 cnt--; 839 } 840 841 r->r_cons = cons; 842 r->r_cnt = cnt; 843 if (cnt == 0) 844 ifp->if_timer = 0; 845 } 846 847 static int 848 txp_shutdown(device_t dev) 849 { 850 struct txp_softc *sc; 851 struct ifnet *ifp; 852 853 sc = device_get_softc(dev); 854 ifp = &sc->sc_arpcom.ac_if; 855 lwkt_serialize_enter(ifp->if_serializer); 856 857 /* mask all interrupts */ 858 WRITE_REG(sc, TXP_IMR, 859 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 860 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 861 TXP_INT_LATCH); 862 863 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0); 864 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0); 865 txp_command(sc, TXP_CMD_HALT, 0, 0, 0, NULL, NULL, NULL, 0); 866 867 lwkt_serialize_exit(ifp->if_serializer); 868 return(0); 869 } 870 871 static int 872 txp_alloc_rings(struct txp_softc *sc) 873 { 874 struct txp_boot_record *boot; 875 struct txp_ldata *ld; 876 u_int32_t r; 877 int i; 878 879 ld = sc->sc_ldata; 880 boot = &ld->txp_boot; 881 882 /* boot record */ 883 sc->sc_boot = boot; 884 885 /* host variables */ 886 bzero(&ld->txp_hostvar, sizeof(struct txp_hostvar)); 887 boot->br_hostvar_lo = vtophys(&ld->txp_hostvar); 888 boot->br_hostvar_hi = 0; 889 sc->sc_hostvar = (struct txp_hostvar *)&ld->txp_hostvar; 890 891 /* hi priority tx ring */ 892 boot->br_txhipri_lo = vtophys(&ld->txp_txhiring); 893 boot->br_txhipri_hi = 0; 894 boot->br_txhipri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc); 895 sc->sc_txhir.r_reg = TXP_H2A_1; 896 sc->sc_txhir.r_desc = (struct txp_tx_desc *)&ld->txp_txhiring; 897 sc->sc_txhir.r_cons = sc->sc_txhir.r_prod = sc->sc_txhir.r_cnt = 0; 898 sc->sc_txhir.r_off = &sc->sc_hostvar->hv_tx_hi_desc_read_idx; 899 900 /* lo priority tx ring */ 901 boot->br_txlopri_lo = vtophys(&ld->txp_txloring); 902 boot->br_txlopri_hi = 0; 903 boot->br_txlopri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc); 904 sc->sc_txlor.r_reg = TXP_H2A_3; 905 sc->sc_txlor.r_desc = (struct txp_tx_desc *)&ld->txp_txloring; 906 sc->sc_txlor.r_cons = sc->sc_txlor.r_prod = sc->sc_txlor.r_cnt = 0; 907 sc->sc_txlor.r_off = &sc->sc_hostvar->hv_tx_lo_desc_read_idx; 908 909 /* high priority rx ring */ 910 boot->br_rxhipri_lo = vtophys(&ld->txp_rxhiring); 911 boot->br_rxhipri_hi = 0; 912 boot->br_rxhipri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc); 913 sc->sc_rxhir.r_desc = (struct txp_rx_desc *)&ld->txp_rxhiring; 914 sc->sc_rxhir.r_roff = &sc->sc_hostvar->hv_rx_hi_read_idx; 915 sc->sc_rxhir.r_woff = &sc->sc_hostvar->hv_rx_hi_write_idx; 916 917 /* low priority rx ring */ 918 boot->br_rxlopri_lo = vtophys(&ld->txp_rxloring); 919 boot->br_rxlopri_hi = 0; 920 boot->br_rxlopri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc); 921 sc->sc_rxlor.r_desc = (struct txp_rx_desc *)&ld->txp_rxloring; 922 sc->sc_rxlor.r_roff = &sc->sc_hostvar->hv_rx_lo_read_idx; 923 sc->sc_rxlor.r_woff = &sc->sc_hostvar->hv_rx_lo_write_idx; 924 925 /* command ring */ 926 bzero(&ld->txp_cmdring, sizeof(struct txp_cmd_desc) * CMD_ENTRIES); 927 boot->br_cmd_lo = vtophys(&ld->txp_cmdring); 928 boot->br_cmd_hi = 0; 929 boot->br_cmd_siz = CMD_ENTRIES * sizeof(struct txp_cmd_desc); 930 sc->sc_cmdring.base = (struct txp_cmd_desc *)&ld->txp_cmdring; 931 sc->sc_cmdring.size = CMD_ENTRIES * sizeof(struct txp_cmd_desc); 932 sc->sc_cmdring.lastwrite = 0; 933 934 /* response ring */ 935 bzero(&ld->txp_rspring, sizeof(struct txp_rsp_desc) * RSP_ENTRIES); 936 boot->br_resp_lo = vtophys(&ld->txp_rspring); 937 boot->br_resp_hi = 0; 938 boot->br_resp_siz = CMD_ENTRIES * sizeof(struct txp_rsp_desc); 939 sc->sc_rspring.base = (struct txp_rsp_desc *)&ld->txp_rspring; 940 sc->sc_rspring.size = RSP_ENTRIES * sizeof(struct txp_rsp_desc); 941 sc->sc_rspring.lastwrite = 0; 942 943 /* receive buffer ring */ 944 boot->br_rxbuf_lo = vtophys(&ld->txp_rxbufs); 945 boot->br_rxbuf_hi = 0; 946 boot->br_rxbuf_siz = RXBUF_ENTRIES * sizeof(struct txp_rxbuf_desc); 947 sc->sc_rxbufs = (struct txp_rxbuf_desc *)&ld->txp_rxbufs; 948 949 for (i = 0; i < RXBUF_ENTRIES; i++) { 950 struct txp_swdesc *sd; 951 if (sc->sc_rxbufs[i].rb_sd != NULL) 952 continue; 953 sc->sc_rxbufs[i].rb_sd = kmalloc(sizeof(struct txp_swdesc), 954 M_DEVBUF, M_WAITOK); 955 if (sc->sc_rxbufs[i].rb_sd == NULL) 956 return(ENOBUFS); 957 sd = sc->sc_rxbufs[i].rb_sd; 958 sd->sd_mbuf = NULL; 959 } 960 sc->sc_rxbufprod = 0; 961 962 /* zero dma */ 963 bzero(&ld->txp_zero, sizeof(u_int32_t)); 964 boot->br_zero_lo = vtophys(&ld->txp_zero); 965 boot->br_zero_hi = 0; 966 967 /* See if it's waiting for boot, and try to boot it */ 968 for (i = 0; i < 10000; i++) { 969 r = READ_REG(sc, TXP_A2H_0); 970 if (r == STAT_WAITING_FOR_BOOT) 971 break; 972 DELAY(50); 973 } 974 975 if (r != STAT_WAITING_FOR_BOOT) { 976 if_printf(&sc->sc_arpcom.ac_if, "not waiting for boot\n"); 977 return(ENXIO); 978 } 979 980 WRITE_REG(sc, TXP_H2A_2, 0); 981 WRITE_REG(sc, TXP_H2A_1, vtophys(sc->sc_boot)); 982 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_REGISTER_BOOT_RECORD); 983 984 /* See if it booted */ 985 for (i = 0; i < 10000; i++) { 986 r = READ_REG(sc, TXP_A2H_0); 987 if (r == STAT_RUNNING) 988 break; 989 DELAY(50); 990 } 991 if (r != STAT_RUNNING) { 992 if_printf(&sc->sc_arpcom.ac_if, "fw not running\n"); 993 return(ENXIO); 994 } 995 996 /* Clear TX and CMD ring write registers */ 997 WRITE_REG(sc, TXP_H2A_1, TXP_BOOTCMD_NULL); 998 WRITE_REG(sc, TXP_H2A_2, TXP_BOOTCMD_NULL); 999 WRITE_REG(sc, TXP_H2A_3, TXP_BOOTCMD_NULL); 1000 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_NULL); 1001 1002 return (0); 1003 } 1004 1005 static int 1006 txp_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr) 1007 { 1008 struct txp_softc *sc = ifp->if_softc; 1009 struct ifreq *ifr = (struct ifreq *)data; 1010 int error = 0; 1011 1012 switch(command) { 1013 case SIOCSIFFLAGS: 1014 if (ifp->if_flags & IFF_UP) { 1015 txp_init(sc); 1016 } else { 1017 if (ifp->if_flags & IFF_RUNNING) 1018 txp_stop(sc); 1019 } 1020 break; 1021 case SIOCADDMULTI: 1022 case SIOCDELMULTI: 1023 /* 1024 * Multicast list has changed; set the hardware 1025 * filter accordingly. 1026 */ 1027 txp_set_filter(sc); 1028 error = 0; 1029 break; 1030 case SIOCGIFMEDIA: 1031 case SIOCSIFMEDIA: 1032 error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, command); 1033 break; 1034 default: 1035 error = ether_ioctl(ifp, command, data); 1036 break; 1037 } 1038 return(error); 1039 } 1040 1041 static int 1042 txp_rxring_fill(struct txp_softc *sc) 1043 { 1044 int i; 1045 struct ifnet *ifp; 1046 struct txp_swdesc *sd; 1047 1048 ifp = &sc->sc_arpcom.ac_if; 1049 1050 for (i = 0; i < RXBUF_ENTRIES; i++) { 1051 sd = sc->sc_rxbufs[i].rb_sd; 1052 MGETHDR(sd->sd_mbuf, MB_DONTWAIT, MT_DATA); 1053 if (sd->sd_mbuf == NULL) 1054 return(ENOBUFS); 1055 1056 MCLGET(sd->sd_mbuf, MB_DONTWAIT); 1057 if ((sd->sd_mbuf->m_flags & M_EXT) == 0) { 1058 m_freem(sd->sd_mbuf); 1059 return(ENOBUFS); 1060 } 1061 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES; 1062 sd->sd_mbuf->m_pkthdr.rcvif = ifp; 1063 1064 sc->sc_rxbufs[i].rb_paddrlo = 1065 vtophys(mtod(sd->sd_mbuf, vm_offset_t)); 1066 sc->sc_rxbufs[i].rb_paddrhi = 0; 1067 } 1068 1069 sc->sc_hostvar->hv_rx_buf_write_idx = (RXBUF_ENTRIES - 1) * 1070 sizeof(struct txp_rxbuf_desc); 1071 1072 return(0); 1073 } 1074 1075 static void 1076 txp_rxring_empty(struct txp_softc *sc) 1077 { 1078 int i; 1079 struct txp_swdesc *sd; 1080 1081 if (sc->sc_rxbufs == NULL) 1082 return; 1083 1084 for (i = 0; i < RXBUF_ENTRIES; i++) { 1085 if (&sc->sc_rxbufs[i] == NULL) 1086 continue; 1087 sd = sc->sc_rxbufs[i].rb_sd; 1088 if (sd == NULL) 1089 continue; 1090 if (sd->sd_mbuf != NULL) { 1091 m_freem(sd->sd_mbuf); 1092 sd->sd_mbuf = NULL; 1093 } 1094 } 1095 1096 return; 1097 } 1098 1099 static void 1100 txp_init(void *xsc) 1101 { 1102 struct txp_softc *sc; 1103 struct ifnet *ifp; 1104 u_int16_t p1; 1105 u_int32_t p2; 1106 1107 sc = xsc; 1108 ifp = &sc->sc_arpcom.ac_if; 1109 1110 if (ifp->if_flags & IFF_RUNNING) 1111 return; 1112 1113 txp_stop(sc); 1114 1115 txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0, 1116 NULL, NULL, NULL, 1); 1117 1118 /* Set station address. */ 1119 ((u_int8_t *)&p1)[1] = sc->sc_arpcom.ac_enaddr[0]; 1120 ((u_int8_t *)&p1)[0] = sc->sc_arpcom.ac_enaddr[1]; 1121 ((u_int8_t *)&p2)[3] = sc->sc_arpcom.ac_enaddr[2]; 1122 ((u_int8_t *)&p2)[2] = sc->sc_arpcom.ac_enaddr[3]; 1123 ((u_int8_t *)&p2)[1] = sc->sc_arpcom.ac_enaddr[4]; 1124 ((u_int8_t *)&p2)[0] = sc->sc_arpcom.ac_enaddr[5]; 1125 txp_command(sc, TXP_CMD_STATION_ADDRESS_WRITE, p1, p2, 0, 1126 NULL, NULL, NULL, 1); 1127 1128 txp_set_filter(sc); 1129 1130 txp_rxring_fill(sc); 1131 1132 txp_command(sc, TXP_CMD_TX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1133 txp_command(sc, TXP_CMD_RX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1134 1135 WRITE_REG(sc, TXP_IER, TXP_INT_RESERVED | TXP_INT_SELF | 1136 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 1137 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 | 1138 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 1139 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH); 1140 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3); 1141 1142 ifp->if_flags |= IFF_RUNNING; 1143 ifp->if_flags &= ~IFF_OACTIVE; 1144 ifp->if_timer = 0; 1145 1146 callout_reset(&sc->txp_stat_timer, hz, txp_tick, sc); 1147 } 1148 1149 static void 1150 txp_tick(void *vsc) 1151 { 1152 struct txp_softc *sc = vsc; 1153 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1154 struct txp_rsp_desc *rsp = NULL; 1155 struct txp_ext_desc *ext; 1156 1157 lwkt_serialize_enter(ifp->if_serializer); 1158 txp_rxbuf_reclaim(sc); 1159 1160 if (txp_command2(sc, TXP_CMD_READ_STATISTICS, 0, 0, 0, NULL, 0, 1161 &rsp, 1)) 1162 goto out; 1163 if (rsp->rsp_numdesc != 6) 1164 goto out; 1165 if (txp_command(sc, TXP_CMD_CLEAR_STATISTICS, 0, 0, 0, 1166 NULL, NULL, NULL, 1)) 1167 goto out; 1168 ext = (struct txp_ext_desc *)(rsp + 1); 1169 1170 ifp->if_ierrors += ext[3].ext_2 + ext[3].ext_3 + ext[3].ext_4 + 1171 ext[4].ext_1 + ext[4].ext_4; 1172 ifp->if_oerrors += ext[0].ext_1 + ext[1].ext_1 + ext[1].ext_4 + 1173 ext[2].ext_1; 1174 ifp->if_collisions += ext[0].ext_2 + ext[0].ext_3 + ext[1].ext_2 + 1175 ext[1].ext_3; 1176 ifp->if_opackets += rsp->rsp_par2; 1177 ifp->if_ipackets += ext[2].ext_3; 1178 1179 out: 1180 if (rsp != NULL) 1181 kfree(rsp, M_DEVBUF); 1182 1183 callout_reset(&sc->txp_stat_timer, hz, txp_tick, sc); 1184 lwkt_serialize_exit(ifp->if_serializer); 1185 } 1186 1187 static void 1188 txp_start(struct ifnet *ifp) 1189 { 1190 struct txp_softc *sc = ifp->if_softc; 1191 struct txp_tx_ring *r = &sc->sc_txhir; 1192 struct txp_tx_desc *txd; 1193 struct txp_frag_desc *fxd; 1194 struct mbuf *m, *m0; 1195 struct txp_swdesc *sd; 1196 u_int32_t firstprod, firstcnt, prod, cnt; 1197 struct ifvlan *ifv; 1198 1199 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1200 return; 1201 1202 prod = r->r_prod; 1203 cnt = r->r_cnt; 1204 1205 while (1) { 1206 m = ifq_poll(&ifp->if_snd); 1207 if (m == NULL) 1208 break; 1209 1210 firstprod = prod; 1211 firstcnt = cnt; 1212 1213 sd = sc->sc_txd + prod; 1214 sd->sd_mbuf = m; 1215 1216 if ((TX_ENTRIES - cnt) < 4) 1217 goto oactive; 1218 1219 txd = r->r_desc + prod; 1220 1221 txd->tx_flags = TX_FLAGS_TYPE_DATA; 1222 txd->tx_numdesc = 0; 1223 txd->tx_addrlo = 0; 1224 txd->tx_addrhi = 0; 1225 txd->tx_totlen = 0; 1226 txd->tx_pflags = 0; 1227 1228 if (++prod == TX_ENTRIES) 1229 prod = 0; 1230 1231 if (++cnt >= (TX_ENTRIES - 4)) 1232 goto oactive; 1233 1234 if ((m->m_flags & (M_PROTO1|M_PKTHDR)) == (M_PROTO1|M_PKTHDR) && 1235 m->m_pkthdr.rcvif != NULL) { 1236 ifv = m->m_pkthdr.rcvif->if_softc; 1237 txd->tx_pflags = TX_PFLAGS_VLAN | 1238 (htons(ifv->ifv_tag) << TX_PFLAGS_VLANTAG_S); 1239 } 1240 1241 if (m->m_pkthdr.csum_flags & CSUM_IP) 1242 txd->tx_pflags |= TX_PFLAGS_IPCKSUM; 1243 1244 #if 0 1245 if (m->m_pkthdr.csum_flags & CSUM_TCP) 1246 txd->tx_pflags |= TX_PFLAGS_TCPCKSUM; 1247 if (m->m_pkthdr.csum_flags & CSUM_UDP) 1248 txd->tx_pflags |= TX_PFLAGS_UDPCKSUM; 1249 #endif 1250 1251 fxd = (struct txp_frag_desc *)(r->r_desc + prod); 1252 for (m0 = m; m0 != NULL; m0 = m0->m_next) { 1253 if (m0->m_len == 0) 1254 continue; 1255 if (++cnt >= (TX_ENTRIES - 4)) 1256 goto oactive; 1257 1258 txd->tx_numdesc++; 1259 1260 fxd->frag_flags = FRAG_FLAGS_TYPE_FRAG; 1261 fxd->frag_rsvd1 = 0; 1262 fxd->frag_len = m0->m_len; 1263 fxd->frag_addrlo = vtophys(mtod(m0, vm_offset_t)); 1264 fxd->frag_addrhi = 0; 1265 fxd->frag_rsvd2 = 0; 1266 1267 if (++prod == TX_ENTRIES) { 1268 fxd = (struct txp_frag_desc *)r->r_desc; 1269 prod = 0; 1270 } else 1271 fxd++; 1272 1273 } 1274 1275 ifp->if_timer = 5; 1276 1277 ifq_dequeue(&ifp->if_snd, m); 1278 BPF_MTAP(ifp, m); 1279 WRITE_REG(sc, r->r_reg, TXP_IDX2OFFSET(prod)); 1280 } 1281 1282 r->r_prod = prod; 1283 r->r_cnt = cnt; 1284 return; 1285 1286 oactive: 1287 ifp->if_flags |= IFF_OACTIVE; 1288 r->r_prod = firstprod; 1289 r->r_cnt = firstcnt; 1290 return; 1291 } 1292 1293 /* 1294 * Handle simple commands sent to the typhoon 1295 */ 1296 static int 1297 txp_command(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2, 1298 u_int32_t in3, u_int16_t *out1, u_int32_t *out2, u_int32_t *out3, 1299 int wait) 1300 { 1301 struct txp_rsp_desc *rsp = NULL; 1302 1303 if (txp_command2(sc, id, in1, in2, in3, NULL, 0, &rsp, wait)) 1304 return (-1); 1305 1306 if (!wait) 1307 return (0); 1308 1309 if (out1 != NULL) 1310 *out1 = rsp->rsp_par1; 1311 if (out2 != NULL) 1312 *out2 = rsp->rsp_par2; 1313 if (out3 != NULL) 1314 *out3 = rsp->rsp_par3; 1315 kfree(rsp, M_DEVBUF); 1316 return (0); 1317 } 1318 1319 static int 1320 txp_command2(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2, 1321 u_int32_t in3, struct txp_ext_desc *in_extp, u_int8_t in_extn, 1322 struct txp_rsp_desc **rspp, int wait) 1323 { 1324 struct txp_hostvar *hv = sc->sc_hostvar; 1325 struct txp_cmd_desc *cmd; 1326 struct txp_ext_desc *ext; 1327 u_int32_t idx, i; 1328 u_int16_t seq; 1329 1330 if (txp_cmd_desc_numfree(sc) < (in_extn + 1)) { 1331 if_printf(&sc->sc_arpcom.ac_if, "no free cmd descriptors\n"); 1332 return (-1); 1333 } 1334 1335 idx = sc->sc_cmdring.lastwrite; 1336 cmd = (struct txp_cmd_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx); 1337 bzero(cmd, sizeof(*cmd)); 1338 1339 cmd->cmd_numdesc = in_extn; 1340 cmd->cmd_seq = seq = sc->sc_seq++; 1341 cmd->cmd_id = id; 1342 cmd->cmd_par1 = in1; 1343 cmd->cmd_par2 = in2; 1344 cmd->cmd_par3 = in3; 1345 cmd->cmd_flags = CMD_FLAGS_TYPE_CMD | 1346 (wait ? CMD_FLAGS_RESP : 0) | CMD_FLAGS_VALID; 1347 1348 idx += sizeof(struct txp_cmd_desc); 1349 if (idx == sc->sc_cmdring.size) 1350 idx = 0; 1351 1352 for (i = 0; i < in_extn; i++) { 1353 ext = (struct txp_ext_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx); 1354 bcopy(in_extp, ext, sizeof(struct txp_ext_desc)); 1355 in_extp++; 1356 idx += sizeof(struct txp_cmd_desc); 1357 if (idx == sc->sc_cmdring.size) 1358 idx = 0; 1359 } 1360 1361 sc->sc_cmdring.lastwrite = idx; 1362 1363 WRITE_REG(sc, TXP_H2A_2, sc->sc_cmdring.lastwrite); 1364 1365 if (!wait) 1366 return (0); 1367 1368 for (i = 0; i < 10000; i++) { 1369 idx = hv->hv_resp_read_idx; 1370 if (idx != hv->hv_resp_write_idx) { 1371 *rspp = NULL; 1372 if (txp_response(sc, idx, id, seq, rspp)) 1373 return (-1); 1374 if (*rspp != NULL) 1375 break; 1376 } 1377 DELAY(50); 1378 } 1379 if (i == 1000 || (*rspp) == NULL) { 1380 if_printf(&sc->sc_arpcom.ac_if, "0x%x command failed\n", id); 1381 return (-1); 1382 } 1383 1384 return (0); 1385 } 1386 1387 static int 1388 txp_response(struct txp_softc *sc, u_int32_t ridx, u_int16_t id, u_int16_t seq, 1389 struct txp_rsp_desc **rspp) 1390 { 1391 struct txp_hostvar *hv = sc->sc_hostvar; 1392 struct txp_rsp_desc *rsp; 1393 1394 while (ridx != hv->hv_resp_write_idx) { 1395 rsp = (struct txp_rsp_desc *)(((u_int8_t *)sc->sc_rspring.base) + ridx); 1396 1397 if (id == rsp->rsp_id && rsp->rsp_seq == seq) { 1398 *rspp = (struct txp_rsp_desc *)kmalloc( 1399 sizeof(struct txp_rsp_desc) * (rsp->rsp_numdesc + 1), 1400 M_DEVBUF, M_INTWAIT); 1401 if ((*rspp) == NULL) 1402 return (-1); 1403 txp_rsp_fixup(sc, rsp, *rspp); 1404 return (0); 1405 } 1406 1407 if (rsp->rsp_flags & RSP_FLAGS_ERROR) { 1408 if_printf(&sc->sc_arpcom.ac_if, "response error!\n"); 1409 txp_rsp_fixup(sc, rsp, NULL); 1410 ridx = hv->hv_resp_read_idx; 1411 continue; 1412 } 1413 1414 switch (rsp->rsp_id) { 1415 case TXP_CMD_CYCLE_STATISTICS: 1416 case TXP_CMD_MEDIA_STATUS_READ: 1417 break; 1418 case TXP_CMD_HELLO_RESPONSE: 1419 if_printf(&sc->sc_arpcom.ac_if, "hello\n"); 1420 break; 1421 default: 1422 if_printf(&sc->sc_arpcom.ac_if, "unknown id(0x%x)\n", 1423 rsp->rsp_id); 1424 } 1425 1426 txp_rsp_fixup(sc, rsp, NULL); 1427 ridx = hv->hv_resp_read_idx; 1428 hv->hv_resp_read_idx = ridx; 1429 } 1430 1431 return (0); 1432 } 1433 1434 static void 1435 txp_rsp_fixup(struct txp_softc *sc, struct txp_rsp_desc *rsp, 1436 struct txp_rsp_desc *dst) 1437 { 1438 struct txp_rsp_desc *src = rsp; 1439 struct txp_hostvar *hv = sc->sc_hostvar; 1440 u_int32_t i, ridx; 1441 1442 ridx = hv->hv_resp_read_idx; 1443 1444 for (i = 0; i < rsp->rsp_numdesc + 1; i++) { 1445 if (dst != NULL) 1446 bcopy(src, dst++, sizeof(struct txp_rsp_desc)); 1447 ridx += sizeof(struct txp_rsp_desc); 1448 if (ridx == sc->sc_rspring.size) { 1449 src = sc->sc_rspring.base; 1450 ridx = 0; 1451 } else 1452 src++; 1453 sc->sc_rspring.lastwrite = hv->hv_resp_read_idx = ridx; 1454 } 1455 1456 hv->hv_resp_read_idx = ridx; 1457 } 1458 1459 static int 1460 txp_cmd_desc_numfree(struct txp_softc *sc) 1461 { 1462 struct txp_hostvar *hv = sc->sc_hostvar; 1463 struct txp_boot_record *br = sc->sc_boot; 1464 u_int32_t widx, ridx, nfree; 1465 1466 widx = sc->sc_cmdring.lastwrite; 1467 ridx = hv->hv_cmd_read_idx; 1468 1469 if (widx == ridx) { 1470 /* Ring is completely free */ 1471 nfree = br->br_cmd_siz - sizeof(struct txp_cmd_desc); 1472 } else { 1473 if (widx > ridx) 1474 nfree = br->br_cmd_siz - 1475 (widx - ridx + sizeof(struct txp_cmd_desc)); 1476 else 1477 nfree = ridx - widx - sizeof(struct txp_cmd_desc); 1478 } 1479 1480 return (nfree / sizeof(struct txp_cmd_desc)); 1481 } 1482 1483 static void 1484 txp_stop(struct txp_softc *sc) 1485 { 1486 struct ifnet *ifp; 1487 1488 ifp = &sc->sc_arpcom.ac_if; 1489 1490 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1491 1492 callout_stop(&sc->txp_stat_timer); 1493 1494 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1495 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1496 1497 txp_rxring_empty(sc); 1498 1499 return; 1500 } 1501 1502 static void 1503 txp_watchdog(struct ifnet *ifp) 1504 { 1505 return; 1506 } 1507 1508 static int 1509 txp_ifmedia_upd(struct ifnet *ifp) 1510 { 1511 struct txp_softc *sc = ifp->if_softc; 1512 struct ifmedia *ifm = &sc->sc_ifmedia; 1513 u_int16_t new_xcvr; 1514 1515 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1516 return (EINVAL); 1517 1518 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_10_T) { 1519 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1520 new_xcvr = TXP_XCVR_10_FDX; 1521 else 1522 new_xcvr = TXP_XCVR_10_HDX; 1523 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) { 1524 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1525 new_xcvr = TXP_XCVR_100_FDX; 1526 else 1527 new_xcvr = TXP_XCVR_100_HDX; 1528 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) { 1529 new_xcvr = TXP_XCVR_AUTO; 1530 } else 1531 return (EINVAL); 1532 1533 /* nothing to do */ 1534 if (sc->sc_xcvr == new_xcvr) 1535 return (0); 1536 1537 txp_command(sc, TXP_CMD_XCVR_SELECT, new_xcvr, 0, 0, 1538 NULL, NULL, NULL, 0); 1539 sc->sc_xcvr = new_xcvr; 1540 1541 return (0); 1542 } 1543 1544 static void 1545 txp_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1546 { 1547 struct txp_softc *sc = ifp->if_softc; 1548 struct ifmedia *ifm = &sc->sc_ifmedia; 1549 u_int16_t bmsr, bmcr, anlpar; 1550 1551 ifmr->ifm_status = IFM_AVALID; 1552 ifmr->ifm_active = IFM_ETHER; 1553 1554 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0, 1555 &bmsr, NULL, NULL, 1)) 1556 goto bail; 1557 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0, 1558 &bmsr, NULL, NULL, 1)) 1559 goto bail; 1560 1561 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMCR, 0, 1562 &bmcr, NULL, NULL, 1)) 1563 goto bail; 1564 1565 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_ANLPAR, 0, 1566 &anlpar, NULL, NULL, 1)) 1567 goto bail; 1568 1569 if (bmsr & BMSR_LINK) 1570 ifmr->ifm_status |= IFM_ACTIVE; 1571 1572 if (bmcr & BMCR_ISO) { 1573 ifmr->ifm_active |= IFM_NONE; 1574 ifmr->ifm_status = 0; 1575 return; 1576 } 1577 1578 if (bmcr & BMCR_LOOP) 1579 ifmr->ifm_active |= IFM_LOOP; 1580 1581 if (bmcr & BMCR_AUTOEN) { 1582 if ((bmsr & BMSR_ACOMP) == 0) { 1583 ifmr->ifm_active |= IFM_NONE; 1584 return; 1585 } 1586 1587 if (anlpar & ANLPAR_T4) 1588 ifmr->ifm_active |= IFM_100_T4; 1589 else if (anlpar & ANLPAR_TX_FD) 1590 ifmr->ifm_active |= IFM_100_TX|IFM_FDX; 1591 else if (anlpar & ANLPAR_TX) 1592 ifmr->ifm_active |= IFM_100_TX; 1593 else if (anlpar & ANLPAR_10_FD) 1594 ifmr->ifm_active |= IFM_10_T|IFM_FDX; 1595 else if (anlpar & ANLPAR_10) 1596 ifmr->ifm_active |= IFM_10_T; 1597 else 1598 ifmr->ifm_active |= IFM_NONE; 1599 } else 1600 ifmr->ifm_active = ifm->ifm_cur->ifm_media; 1601 return; 1602 1603 bail: 1604 ifmr->ifm_active |= IFM_NONE; 1605 ifmr->ifm_status &= ~IFM_AVALID; 1606 } 1607 1608 #ifdef TXP_DEBUG 1609 static void 1610 txp_show_descriptor(void *d) 1611 { 1612 struct txp_cmd_desc *cmd = d; 1613 struct txp_rsp_desc *rsp = d; 1614 struct txp_tx_desc *txd = d; 1615 struct txp_frag_desc *frgd = d; 1616 1617 switch (cmd->cmd_flags & CMD_FLAGS_TYPE_M) { 1618 case CMD_FLAGS_TYPE_CMD: 1619 /* command descriptor */ 1620 kprintf("[cmd flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1621 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq, 1622 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3); 1623 break; 1624 case CMD_FLAGS_TYPE_RESP: 1625 /* response descriptor */ 1626 kprintf("[rsp flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1627 rsp->rsp_flags, rsp->rsp_numdesc, rsp->rsp_id, rsp->rsp_seq, 1628 rsp->rsp_par1, rsp->rsp_par2, rsp->rsp_par3); 1629 break; 1630 case CMD_FLAGS_TYPE_DATA: 1631 /* data header (assuming tx for now) */ 1632 kprintf("[data flags 0x%x num %d totlen %d addr 0x%x/0x%x pflags 0x%x]", 1633 txd->tx_flags, txd->tx_numdesc, txd->tx_totlen, 1634 txd->tx_addrlo, txd->tx_addrhi, txd->tx_pflags); 1635 break; 1636 case CMD_FLAGS_TYPE_FRAG: 1637 /* fragment descriptor */ 1638 kprintf("[frag flags 0x%x rsvd1 0x%x len %d addr 0x%x/0x%x rsvd2 0x%x]", 1639 frgd->frag_flags, frgd->frag_rsvd1, frgd->frag_len, 1640 frgd->frag_addrlo, frgd->frag_addrhi, frgd->frag_rsvd2); 1641 break; 1642 default: 1643 kprintf("[unknown(%x) flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1644 cmd->cmd_flags & CMD_FLAGS_TYPE_M, 1645 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq, 1646 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3); 1647 break; 1648 } 1649 } 1650 #endif 1651 1652 static void 1653 txp_set_filter(struct txp_softc *sc) 1654 { 1655 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1656 uint16_t filter; 1657 struct ifmultiaddr *ifma; 1658 1659 if (ifp->if_flags & IFF_PROMISC) { 1660 filter = TXP_RXFILT_PROMISC; 1661 goto setit; 1662 } 1663 1664 filter = TXP_RXFILT_DIRECT; 1665 1666 if (ifp->if_flags & IFF_BROADCAST) 1667 filter |= TXP_RXFILT_BROADCAST; 1668 1669 if (ifp->if_flags & IFF_ALLMULTI) { 1670 filter |= TXP_RXFILT_ALLMULTI; 1671 } else { 1672 uint32_t hashbit, hash[2]; 1673 int mcnt = 0; 1674 1675 hash[0] = hash[1] = 0; 1676 1677 LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1678 if (ifma->ifma_addr->sa_family != AF_LINK) 1679 continue; 1680 1681 mcnt++; 1682 hashbit = (uint16_t)(ether_crc32_be( 1683 LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 1684 ETHER_ADDR_LEN) & (64 - 1)); 1685 hash[hashbit / 32] |= (1 << hashbit % 32); 1686 } 1687 1688 if (mcnt > 0) { 1689 filter |= TXP_RXFILT_HASHMULTI; 1690 txp_command(sc, TXP_CMD_MCAST_HASH_MASK_WRITE, 1691 2, hash[0], hash[1], NULL, NULL, NULL, 0); 1692 } 1693 } 1694 1695 setit: 1696 txp_command(sc, TXP_CMD_RX_FILTER_WRITE, filter, 0, 0, 1697 NULL, NULL, NULL, 1); 1698 } 1699 1700 static void 1701 txp_capabilities(struct txp_softc *sc) 1702 { 1703 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1704 struct txp_rsp_desc *rsp = NULL; 1705 struct txp_ext_desc *ext; 1706 1707 if (txp_command2(sc, TXP_CMD_OFFLOAD_READ, 0, 0, 0, NULL, 0, &rsp, 1)) 1708 goto out; 1709 1710 if (rsp->rsp_numdesc != 1) 1711 goto out; 1712 ext = (struct txp_ext_desc *)(rsp + 1); 1713 1714 sc->sc_tx_capability = ext->ext_1 & OFFLOAD_MASK; 1715 sc->sc_rx_capability = ext->ext_2 & OFFLOAD_MASK; 1716 ifp->if_capabilities = 0; 1717 1718 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_VLAN) { 1719 sc->sc_tx_capability |= OFFLOAD_VLAN; 1720 sc->sc_rx_capability |= OFFLOAD_VLAN; 1721 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING; 1722 } 1723 1724 #if 0 1725 /* not ready yet */ 1726 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPSEC) { 1727 sc->sc_tx_capability |= OFFLOAD_IPSEC; 1728 sc->sc_rx_capability |= OFFLOAD_IPSEC; 1729 ifp->if_capabilities |= IFCAP_IPSEC; 1730 } 1731 #endif 1732 1733 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPCKSUM) { 1734 sc->sc_tx_capability |= OFFLOAD_IPCKSUM; 1735 sc->sc_rx_capability |= OFFLOAD_IPCKSUM; 1736 ifp->if_capabilities |= IFCAP_HWCSUM; 1737 ifp->if_hwassist |= CSUM_IP; 1738 } 1739 1740 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_TCPCKSUM) { 1741 #if 0 1742 sc->sc_tx_capability |= OFFLOAD_TCPCKSUM; 1743 #endif 1744 sc->sc_rx_capability |= OFFLOAD_TCPCKSUM; 1745 ifp->if_capabilities |= IFCAP_HWCSUM; 1746 } 1747 1748 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_UDPCKSUM) { 1749 #if 0 1750 sc->sc_tx_capability |= OFFLOAD_UDPCKSUM; 1751 #endif 1752 sc->sc_rx_capability |= OFFLOAD_UDPCKSUM; 1753 ifp->if_capabilities |= IFCAP_HWCSUM; 1754 } 1755 ifp->if_capenable = ifp->if_capabilities; 1756 1757 if (txp_command(sc, TXP_CMD_OFFLOAD_WRITE, 0, 1758 sc->sc_tx_capability, sc->sc_rx_capability, NULL, NULL, NULL, 1)) 1759 goto out; 1760 1761 out: 1762 if (rsp != NULL) 1763 kfree(rsp, M_DEVBUF); 1764 1765 return; 1766 } 1767