1 /* $OpenBSD: if_txp.c,v 1.48 2001/06/27 06:34:50 kjc Exp $ */ 2 /* $FreeBSD: src/sys/dev/txp/if_txp.c,v 1.4.2.4 2001/12/14 19:50:43 jlemon Exp $ */ 3 /* $DragonFly: src/sys/dev/netif/txp/if_txp.c,v 1.47 2008/03/10 12:59:52 sephe Exp $ */ 4 5 /* 6 * Copyright (c) 2001 7 * Jason L. Wright <jason@thought.net>, Theo de Raadt, and 8 * Aaron Campbell <aaron@monkey.org>. All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Jason L. Wright, 21 * Theo de Raadt and Aaron Campbell. 22 * 4. Neither the name of the author nor the names of any co-contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Driver for 3c990 (Typhoon) Ethernet ASIC 41 */ 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/sockio.h> 46 #include <sys/mbuf.h> 47 #include <sys/malloc.h> 48 #include <sys/kernel.h> 49 #include <sys/socket.h> 50 #include <sys/serialize.h> 51 #include <sys/bus.h> 52 #include <sys/rman.h> 53 #include <sys/thread2.h> 54 55 #include <net/if.h> 56 #include <net/ifq_var.h> 57 #include <net/if_arp.h> 58 #include <net/ethernet.h> 59 #include <net/if_dl.h> 60 #include <net/if_types.h> 61 #include <net/vlan/if_vlan_var.h> 62 #include <net/vlan/if_vlan_ether.h> 63 64 #include <netinet/in.h> 65 #include <netinet/in_systm.h> 66 #include <netinet/in_var.h> 67 #include <netinet/ip.h> 68 #include <netinet/if_ether.h> 69 #include <sys/in_cksum.h> 70 71 #include <net/if_media.h> 72 73 #include <net/bpf.h> 74 75 #include <vm/vm.h> /* for vtophys */ 76 #include <vm/pmap.h> /* for vtophys */ 77 78 #include "../mii_layer/mii.h" 79 #include "../mii_layer/miivar.h" 80 81 #include <bus/pci/pcidevs.h> 82 #include <bus/pci/pcireg.h> 83 #include <bus/pci/pcivar.h> 84 85 #define TXP_USEIOSPACE 86 #define __STRICT_ALIGNMENT 87 88 #include "if_txpreg.h" 89 #include "3c990img.h" 90 91 /* 92 * Various supported device vendors/types and their names. 93 */ 94 static struct txp_type txp_devs[] = { 95 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990TX95, 96 "3Com 3cR990-TX-95 Etherlink with 3XP Processor" }, 97 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990TX97, 98 "3Com 3cR990-TX-97 Etherlink with 3XP Processor" }, 99 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C990B, 100 "3Com 3cR990B-TXM Etherlink with 3XP Processor" }, 101 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990SVR95, 102 "3Com 3cR990-SRV-95 Etherlink Server with 3XP Processor" }, 103 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990SVR97, 104 "3Com 3cR990-SRV-97 Etherlink Server with 3XP Processor" }, 105 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C990BSVR, 106 "3Com 3cR990B-SRV Etherlink Server with 3XP Processor" }, 107 { 0, 0, NULL } 108 }; 109 110 static int txp_probe (device_t); 111 static int txp_attach (device_t); 112 static int txp_detach (device_t); 113 static void txp_intr (void *); 114 static void txp_tick (void *); 115 static int txp_shutdown (device_t); 116 static int txp_ioctl (struct ifnet *, u_long, caddr_t, struct ucred *); 117 static void txp_start (struct ifnet *); 118 static void txp_stop (struct txp_softc *); 119 static void txp_init (void *); 120 static void txp_watchdog (struct ifnet *); 121 122 static void txp_release_resources (device_t); 123 static int txp_chip_init (struct txp_softc *); 124 static int txp_reset_adapter (struct txp_softc *); 125 static int txp_download_fw (struct txp_softc *); 126 static int txp_download_fw_wait (struct txp_softc *); 127 static int txp_download_fw_section (struct txp_softc *, 128 struct txp_fw_section_header *, int); 129 static int txp_alloc_rings (struct txp_softc *); 130 static int txp_rxring_fill (struct txp_softc *); 131 static void txp_rxring_empty (struct txp_softc *); 132 static void txp_set_filter (struct txp_softc *); 133 134 static int txp_cmd_desc_numfree (struct txp_softc *); 135 static int txp_command (struct txp_softc *, u_int16_t, u_int16_t, u_int32_t, 136 u_int32_t, u_int16_t *, u_int32_t *, u_int32_t *, int); 137 static int txp_command2 (struct txp_softc *, u_int16_t, u_int16_t, 138 u_int32_t, u_int32_t, struct txp_ext_desc *, u_int8_t, 139 struct txp_rsp_desc **, int); 140 static int txp_response (struct txp_softc *, u_int32_t, u_int16_t, u_int16_t, 141 struct txp_rsp_desc **); 142 static void txp_rsp_fixup (struct txp_softc *, struct txp_rsp_desc *, 143 struct txp_rsp_desc *); 144 static void txp_capabilities (struct txp_softc *); 145 146 static void txp_ifmedia_sts (struct ifnet *, struct ifmediareq *); 147 static int txp_ifmedia_upd (struct ifnet *); 148 #ifdef TXP_DEBUG 149 static void txp_show_descriptor (void *); 150 #endif 151 static void txp_tx_reclaim (struct txp_softc *, struct txp_tx_ring *); 152 static void txp_rxbuf_reclaim (struct txp_softc *); 153 static void txp_rx_reclaim (struct txp_softc *, struct txp_rx_ring *); 154 155 #ifdef TXP_USEIOSPACE 156 #define TXP_RES SYS_RES_IOPORT 157 #define TXP_RID TXP_PCI_LOIO 158 #else 159 #define TXP_RES SYS_RES_MEMORY 160 #define TXP_RID TXP_PCI_LOMEM 161 #endif 162 163 static device_method_t txp_methods[] = { 164 /* Device interface */ 165 DEVMETHOD(device_probe, txp_probe), 166 DEVMETHOD(device_attach, txp_attach), 167 DEVMETHOD(device_detach, txp_detach), 168 DEVMETHOD(device_shutdown, txp_shutdown), 169 { 0, 0 } 170 }; 171 172 static driver_t txp_driver = { 173 "txp", 174 txp_methods, 175 sizeof(struct txp_softc) 176 }; 177 178 static devclass_t txp_devclass; 179 180 DECLARE_DUMMY_MODULE(if_txp); 181 DRIVER_MODULE(if_txp, pci, txp_driver, txp_devclass, 0, 0); 182 183 static int 184 txp_probe(device_t dev) 185 { 186 struct txp_type *t; 187 uint16_t vid, did; 188 189 vid = pci_get_vendor(dev); 190 did = pci_get_device(dev); 191 192 for (t = txp_devs; t->txp_name != NULL; ++t) { 193 if ((vid == t->txp_vid) && (did == t->txp_did)) { 194 device_set_desc(dev, t->txp_name); 195 return(0); 196 } 197 } 198 199 return(ENXIO); 200 } 201 202 static int 203 txp_attach(device_t dev) 204 { 205 struct txp_softc *sc; 206 struct ifnet *ifp; 207 uint16_t p1; 208 uint32_t p2; 209 uint8_t enaddr[ETHER_ADDR_LEN]; 210 int error = 0, rid; 211 212 sc = device_get_softc(dev); 213 callout_init(&sc->txp_stat_timer); 214 215 ifp = &sc->sc_arpcom.ac_if; 216 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 217 218 pci_enable_busmaster(dev); 219 220 rid = TXP_RID; 221 sc->sc_res = bus_alloc_resource_any(dev, TXP_RES, &rid, RF_ACTIVE); 222 223 if (sc->sc_res == NULL) { 224 device_printf(dev, "couldn't map ports/memory\n"); 225 return(ENXIO); 226 } 227 228 sc->sc_bt = rman_get_bustag(sc->sc_res); 229 sc->sc_bh = rman_get_bushandle(sc->sc_res); 230 231 /* Allocate interrupt */ 232 rid = 0; 233 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 234 RF_SHAREABLE | RF_ACTIVE); 235 236 if (sc->sc_irq == NULL) { 237 device_printf(dev, "couldn't map interrupt\n"); 238 error = ENXIO; 239 goto fail; 240 } 241 242 if (txp_chip_init(sc)) { 243 error = ENXIO; 244 goto fail; 245 } 246 247 sc->sc_fwbuf = contigmalloc(32768, M_DEVBUF, 248 M_WAITOK, 0, 0xffffffff, PAGE_SIZE, 0); 249 error = txp_download_fw(sc); 250 contigfree(sc->sc_fwbuf, 32768, M_DEVBUF); 251 sc->sc_fwbuf = NULL; 252 253 if (error) 254 goto fail; 255 256 sc->sc_ldata = contigmalloc(sizeof(struct txp_ldata), M_DEVBUF, 257 M_WAITOK | M_ZERO, 0, 0xffffffff, PAGE_SIZE, 0); 258 259 if (txp_alloc_rings(sc)) { 260 error = ENXIO; 261 goto fail; 262 } 263 264 if (txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0, 265 NULL, NULL, NULL, 1)) { 266 error = ENXIO; 267 goto fail; 268 } 269 270 if (txp_command(sc, TXP_CMD_STATION_ADDRESS_READ, 0, 0, 0, 271 &p1, &p2, NULL, 1)) { 272 error = ENXIO; 273 goto fail; 274 } 275 276 txp_set_filter(sc); 277 278 enaddr[0] = ((uint8_t *)&p1)[1]; 279 enaddr[1] = ((uint8_t *)&p1)[0]; 280 enaddr[2] = ((uint8_t *)&p2)[3]; 281 enaddr[3] = ((uint8_t *)&p2)[2]; 282 enaddr[4] = ((uint8_t *)&p2)[1]; 283 enaddr[5] = ((uint8_t *)&p2)[0]; 284 285 ifmedia_init(&sc->sc_ifmedia, 0, txp_ifmedia_upd, txp_ifmedia_sts); 286 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T, 0, NULL); 287 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL); 288 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 289 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL); 290 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL); 291 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL); 292 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL); 293 294 sc->sc_xcvr = TXP_XCVR_AUTO; 295 txp_command(sc, TXP_CMD_XCVR_SELECT, TXP_XCVR_AUTO, 0, 0, 296 NULL, NULL, NULL, 0); 297 ifmedia_set(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO); 298 299 ifp->if_softc = sc; 300 ifp->if_mtu = ETHERMTU; 301 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 302 ifp->if_ioctl = txp_ioctl; 303 ifp->if_start = txp_start; 304 ifp->if_watchdog = txp_watchdog; 305 ifp->if_init = txp_init; 306 ifp->if_baudrate = 100000000; 307 ifq_set_maxlen(&ifp->if_snd, TX_ENTRIES); 308 ifq_set_ready(&ifp->if_snd); 309 ifp->if_hwassist = 0; 310 txp_capabilities(sc); 311 312 ether_ifattach(ifp, enaddr, NULL); 313 314 error = bus_setup_intr(dev, sc->sc_irq, INTR_NETSAFE, 315 txp_intr, sc, &sc->sc_intrhand, 316 ifp->if_serializer); 317 if (error) { 318 device_printf(dev, "couldn't set up irq\n"); 319 ether_ifdetach(ifp); 320 goto fail; 321 } 322 323 return(0); 324 325 fail: 326 txp_release_resources(dev); 327 return(error); 328 } 329 330 static int 331 txp_detach(device_t dev) 332 { 333 struct txp_softc *sc = device_get_softc(dev); 334 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 335 int i; 336 337 lwkt_serialize_enter(ifp->if_serializer); 338 339 txp_stop(sc); 340 txp_shutdown(dev); 341 bus_teardown_intr(dev, sc->sc_irq, sc->sc_intrhand); 342 343 lwkt_serialize_exit(ifp->if_serializer); 344 345 ifmedia_removeall(&sc->sc_ifmedia); 346 ether_ifdetach(ifp); 347 348 for (i = 0; i < RXBUF_ENTRIES; i++) 349 kfree(sc->sc_rxbufs[i].rb_sd, M_DEVBUF); 350 351 txp_release_resources(dev); 352 353 return(0); 354 } 355 356 static void 357 txp_release_resources(device_t dev) 358 { 359 struct txp_softc *sc; 360 361 sc = device_get_softc(dev); 362 363 if (sc->sc_irq != NULL) 364 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq); 365 366 if (sc->sc_res != NULL) 367 bus_release_resource(dev, TXP_RES, TXP_RID, sc->sc_res); 368 369 if (sc->sc_ldata != NULL) 370 contigfree(sc->sc_ldata, sizeof(struct txp_ldata), M_DEVBUF); 371 372 return; 373 } 374 375 static int 376 txp_chip_init(struct txp_softc *sc) 377 { 378 /* disable interrupts */ 379 WRITE_REG(sc, TXP_IER, 0); 380 WRITE_REG(sc, TXP_IMR, 381 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 382 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 383 TXP_INT_LATCH); 384 385 /* ack all interrupts */ 386 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH | 387 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 388 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 389 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 390 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0); 391 392 if (txp_reset_adapter(sc)) 393 return (-1); 394 395 /* disable interrupts */ 396 WRITE_REG(sc, TXP_IER, 0); 397 WRITE_REG(sc, TXP_IMR, 398 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 399 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 400 TXP_INT_LATCH); 401 402 /* ack all interrupts */ 403 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH | 404 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 405 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 406 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 407 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0); 408 409 return (0); 410 } 411 412 static int 413 txp_reset_adapter(struct txp_softc *sc) 414 { 415 u_int32_t r; 416 int i; 417 418 WRITE_REG(sc, TXP_SRR, TXP_SRR_ALL); 419 DELAY(1000); 420 WRITE_REG(sc, TXP_SRR, 0); 421 422 /* Should wait max 6 seconds */ 423 for (i = 0; i < 6000; i++) { 424 r = READ_REG(sc, TXP_A2H_0); 425 if (r == STAT_WAITING_FOR_HOST_REQUEST) 426 break; 427 DELAY(1000); 428 } 429 430 if (r != STAT_WAITING_FOR_HOST_REQUEST) { 431 if_printf(&sc->sc_arpcom.ac_if, "reset hung\n"); 432 return (-1); 433 } 434 435 return (0); 436 } 437 438 static int 439 txp_download_fw(struct txp_softc *sc) 440 { 441 struct txp_fw_file_header *fileheader; 442 struct txp_fw_section_header *secthead; 443 int sect; 444 u_int32_t r, i, ier, imr; 445 446 ier = READ_REG(sc, TXP_IER); 447 WRITE_REG(sc, TXP_IER, ier | TXP_INT_A2H_0); 448 449 imr = READ_REG(sc, TXP_IMR); 450 WRITE_REG(sc, TXP_IMR, imr | TXP_INT_A2H_0); 451 452 for (i = 0; i < 10000; i++) { 453 r = READ_REG(sc, TXP_A2H_0); 454 if (r == STAT_WAITING_FOR_HOST_REQUEST) 455 break; 456 DELAY(50); 457 } 458 if (r != STAT_WAITING_FOR_HOST_REQUEST) { 459 if_printf(&sc->sc_arpcom.ac_if, 460 "not waiting for host request\n"); 461 return (-1); 462 } 463 464 /* Ack the status */ 465 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0); 466 467 fileheader = (struct txp_fw_file_header *)tc990image; 468 if (bcmp("TYPHOON", fileheader->magicid, sizeof(fileheader->magicid))) { 469 if_printf(&sc->sc_arpcom.ac_if, "fw invalid magic\n"); 470 return (-1); 471 } 472 473 /* Tell boot firmware to get ready for image */ 474 WRITE_REG(sc, TXP_H2A_1, fileheader->addr); 475 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_RUNTIME_IMAGE); 476 477 if (txp_download_fw_wait(sc)) { 478 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed, initial\n"); 479 return (-1); 480 } 481 482 secthead = (struct txp_fw_section_header *)(((u_int8_t *)tc990image) + 483 sizeof(struct txp_fw_file_header)); 484 485 for (sect = 0; sect < fileheader->nsections; sect++) { 486 if (txp_download_fw_section(sc, secthead, sect)) 487 return (-1); 488 secthead = (struct txp_fw_section_header *) 489 (((u_int8_t *)secthead) + secthead->nbytes + 490 sizeof(*secthead)); 491 } 492 493 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_DOWNLOAD_COMPLETE); 494 495 for (i = 0; i < 10000; i++) { 496 r = READ_REG(sc, TXP_A2H_0); 497 if (r == STAT_WAITING_FOR_BOOT) 498 break; 499 DELAY(50); 500 } 501 if (r != STAT_WAITING_FOR_BOOT) { 502 if_printf(&sc->sc_arpcom.ac_if, "not waiting for boot\n"); 503 return (-1); 504 } 505 506 WRITE_REG(sc, TXP_IER, ier); 507 WRITE_REG(sc, TXP_IMR, imr); 508 509 return (0); 510 } 511 512 static int 513 txp_download_fw_wait(struct txp_softc *sc) 514 { 515 u_int32_t i, r; 516 517 for (i = 0; i < 10000; i++) { 518 r = READ_REG(sc, TXP_ISR); 519 if (r & TXP_INT_A2H_0) 520 break; 521 DELAY(50); 522 } 523 524 if (!(r & TXP_INT_A2H_0)) { 525 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed comm0\n"); 526 return (-1); 527 } 528 529 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0); 530 531 r = READ_REG(sc, TXP_A2H_0); 532 if (r != STAT_WAITING_FOR_SEGMENT) { 533 if_printf(&sc->sc_arpcom.ac_if, "fw not waiting for segment\n"); 534 return (-1); 535 } 536 return (0); 537 } 538 539 static int 540 txp_download_fw_section(struct txp_softc *sc, 541 struct txp_fw_section_header *sect, int sectnum) 542 { 543 vm_offset_t dma; 544 int rseg, err = 0; 545 struct mbuf m; 546 u_int16_t csum; 547 548 /* Skip zero length sections */ 549 if (sect->nbytes == 0) 550 return (0); 551 552 /* Make sure we aren't past the end of the image */ 553 rseg = ((u_int8_t *)sect) - ((u_int8_t *)tc990image); 554 if (rseg >= sizeof(tc990image)) { 555 if_printf(&sc->sc_arpcom.ac_if, "fw invalid section address, " 556 "section %d\n", sectnum); 557 return (-1); 558 } 559 560 /* Make sure this section doesn't go past the end */ 561 rseg += sect->nbytes; 562 if (rseg >= sizeof(tc990image)) { 563 if_printf(&sc->sc_arpcom.ac_if, "fw truncated section %d\n", 564 sectnum); 565 return (-1); 566 } 567 568 bcopy(((u_int8_t *)sect) + sizeof(*sect), sc->sc_fwbuf, sect->nbytes); 569 dma = vtophys(sc->sc_fwbuf); 570 571 /* 572 * dummy up mbuf and verify section checksum 573 */ 574 m.m_type = MT_DATA; 575 m.m_next = m.m_nextpkt = NULL; 576 m.m_len = sect->nbytes; 577 m.m_data = sc->sc_fwbuf; 578 m.m_flags = 0; 579 csum = in_cksum(&m, sect->nbytes); 580 if (csum != sect->cksum) { 581 if_printf(&sc->sc_arpcom.ac_if, "fw section %d, bad " 582 "cksum (expected 0x%x got 0x%x)\n", 583 sectnum, sect->cksum, csum); 584 err = -1; 585 goto bail; 586 } 587 588 WRITE_REG(sc, TXP_H2A_1, sect->nbytes); 589 WRITE_REG(sc, TXP_H2A_2, sect->cksum); 590 WRITE_REG(sc, TXP_H2A_3, sect->addr); 591 WRITE_REG(sc, TXP_H2A_4, 0); 592 WRITE_REG(sc, TXP_H2A_5, dma & 0xffffffff); 593 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_SEGMENT_AVAILABLE); 594 595 if (txp_download_fw_wait(sc)) { 596 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed, " 597 "section %d\n", sectnum); 598 err = -1; 599 } 600 601 bail: 602 return (err); 603 } 604 605 static void 606 txp_intr(void *vsc) 607 { 608 struct txp_softc *sc = vsc; 609 struct txp_hostvar *hv = sc->sc_hostvar; 610 u_int32_t isr; 611 612 /* mask all interrupts */ 613 WRITE_REG(sc, TXP_IMR, TXP_INT_RESERVED | TXP_INT_SELF | 614 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 615 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 | 616 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 617 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH); 618 619 isr = READ_REG(sc, TXP_ISR); 620 while (isr) { 621 WRITE_REG(sc, TXP_ISR, isr); 622 623 if ((*sc->sc_rxhir.r_roff) != (*sc->sc_rxhir.r_woff)) 624 txp_rx_reclaim(sc, &sc->sc_rxhir); 625 if ((*sc->sc_rxlor.r_roff) != (*sc->sc_rxlor.r_woff)) 626 txp_rx_reclaim(sc, &sc->sc_rxlor); 627 628 if (hv->hv_rx_buf_write_idx == hv->hv_rx_buf_read_idx) 629 txp_rxbuf_reclaim(sc); 630 631 if (sc->sc_txhir.r_cnt && (sc->sc_txhir.r_cons != 632 TXP_OFFSET2IDX(*(sc->sc_txhir.r_off)))) 633 txp_tx_reclaim(sc, &sc->sc_txhir); 634 635 if (sc->sc_txlor.r_cnt && (sc->sc_txlor.r_cons != 636 TXP_OFFSET2IDX(*(sc->sc_txlor.r_off)))) 637 txp_tx_reclaim(sc, &sc->sc_txlor); 638 639 isr = READ_REG(sc, TXP_ISR); 640 } 641 642 /* unmask all interrupts */ 643 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3); 644 645 txp_start(&sc->sc_arpcom.ac_if); 646 647 return; 648 } 649 650 static void 651 txp_rx_reclaim(struct txp_softc *sc, struct txp_rx_ring *r) 652 { 653 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 654 struct txp_rx_desc *rxd; 655 struct mbuf *m; 656 struct txp_swdesc *sd = NULL; 657 u_int32_t roff, woff; 658 659 roff = *r->r_roff; 660 woff = *r->r_woff; 661 rxd = r->r_desc + (roff / sizeof(struct txp_rx_desc)); 662 663 while (roff != woff) { 664 665 if (rxd->rx_flags & RX_FLAGS_ERROR) { 666 if_printf(ifp, "error 0x%x\n", rxd->rx_stat); 667 ifp->if_ierrors++; 668 goto next; 669 } 670 671 /* retrieve stashed pointer */ 672 sd = rxd->rx_sd; 673 674 m = sd->sd_mbuf; 675 sd->sd_mbuf = NULL; 676 677 m->m_pkthdr.len = m->m_len = rxd->rx_len; 678 679 #ifdef __STRICT_ALIGNMENT 680 { 681 /* 682 * XXX Nice chip, except it won't accept "off by 2" 683 * buffers, so we're force to copy. Supposedly 684 * this will be fixed in a newer firmware rev 685 * and this will be temporary. 686 */ 687 struct mbuf *mnew; 688 689 MGETHDR(mnew, MB_DONTWAIT, MT_DATA); 690 if (mnew == NULL) { 691 m_freem(m); 692 goto next; 693 } 694 if (m->m_len > (MHLEN - 2)) { 695 MCLGET(mnew, MB_DONTWAIT); 696 if (!(mnew->m_flags & M_EXT)) { 697 m_freem(mnew); 698 m_freem(m); 699 goto next; 700 } 701 } 702 mnew->m_pkthdr.rcvif = ifp; 703 m_adj(mnew, 2); 704 mnew->m_pkthdr.len = mnew->m_len = m->m_len; 705 m_copydata(m, 0, m->m_pkthdr.len, mtod(mnew, caddr_t)); 706 m_freem(m); 707 m = mnew; 708 } 709 #endif 710 711 if (rxd->rx_stat & RX_STAT_IPCKSUMBAD) 712 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED; 713 else if (rxd->rx_stat & RX_STAT_IPCKSUMGOOD) 714 m->m_pkthdr.csum_flags |= 715 CSUM_IP_CHECKED|CSUM_IP_VALID; 716 717 if ((rxd->rx_stat & RX_STAT_TCPCKSUMGOOD) || 718 (rxd->rx_stat & RX_STAT_UDPCKSUMGOOD)) { 719 m->m_pkthdr.csum_flags |= 720 CSUM_DATA_VALID|CSUM_PSEUDO_HDR| 721 CSUM_FRAG_NOT_CHECKED; 722 m->m_pkthdr.csum_data = 0xffff; 723 } 724 725 lwkt_serialize_enter(ifp->if_serializer); 726 if (rxd->rx_stat & RX_STAT_VLAN) 727 VLAN_INPUT_TAG(m, htons(rxd->rx_vlan >> 16)); 728 else 729 ifp->if_input(ifp, m); 730 lwkt_serialize_exit(ifp->if_serializer); 731 732 next: 733 734 roff += sizeof(struct txp_rx_desc); 735 if (roff == (RX_ENTRIES * sizeof(struct txp_rx_desc))) { 736 roff = 0; 737 rxd = r->r_desc; 738 } else 739 rxd++; 740 woff = *r->r_woff; 741 } 742 743 *r->r_roff = woff; 744 745 return; 746 } 747 748 static void 749 txp_rxbuf_reclaim(struct txp_softc *sc) 750 { 751 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 752 struct txp_hostvar *hv = sc->sc_hostvar; 753 struct txp_rxbuf_desc *rbd; 754 struct txp_swdesc *sd; 755 u_int32_t i; 756 757 if (!(ifp->if_flags & IFF_RUNNING)) 758 return; 759 760 i = sc->sc_rxbufprod; 761 rbd = sc->sc_rxbufs + i; 762 763 while (1) { 764 sd = rbd->rb_sd; 765 if (sd->sd_mbuf != NULL) 766 break; 767 768 MGETHDR(sd->sd_mbuf, MB_DONTWAIT, MT_DATA); 769 if (sd->sd_mbuf == NULL) 770 goto err_sd; 771 772 MCLGET(sd->sd_mbuf, MB_DONTWAIT); 773 if ((sd->sd_mbuf->m_flags & M_EXT) == 0) 774 goto err_mbuf; 775 sd->sd_mbuf->m_pkthdr.rcvif = ifp; 776 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES; 777 778 rbd->rb_paddrlo = vtophys(mtod(sd->sd_mbuf, vm_offset_t)) 779 & 0xffffffff; 780 rbd->rb_paddrhi = 0; 781 782 hv->hv_rx_buf_write_idx = TXP_IDX2OFFSET(i); 783 784 if (++i == RXBUF_ENTRIES) { 785 i = 0; 786 rbd = sc->sc_rxbufs; 787 } else 788 rbd++; 789 } 790 791 sc->sc_rxbufprod = i; 792 793 return; 794 795 err_mbuf: 796 m_freem(sd->sd_mbuf); 797 err_sd: 798 kfree(sd, M_DEVBUF); 799 } 800 801 /* 802 * Reclaim mbufs and entries from a transmit ring. 803 */ 804 static void 805 txp_tx_reclaim(struct txp_softc *sc, struct txp_tx_ring *r) 806 { 807 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 808 u_int32_t idx = TXP_OFFSET2IDX(*(r->r_off)); 809 u_int32_t cons = r->r_cons, cnt = r->r_cnt; 810 struct txp_tx_desc *txd = r->r_desc + cons; 811 struct txp_swdesc *sd = sc->sc_txd + cons; 812 struct mbuf *m; 813 814 while (cons != idx) { 815 if (cnt == 0) 816 break; 817 818 if ((txd->tx_flags & TX_FLAGS_TYPE_M) == 819 TX_FLAGS_TYPE_DATA) { 820 m = sd->sd_mbuf; 821 if (m != NULL) { 822 m_freem(m); 823 txd->tx_addrlo = 0; 824 txd->tx_addrhi = 0; 825 ifp->if_opackets++; 826 } 827 } 828 ifp->if_flags &= ~IFF_OACTIVE; 829 830 if (++cons == TX_ENTRIES) { 831 txd = r->r_desc; 832 cons = 0; 833 sd = sc->sc_txd; 834 } else { 835 txd++; 836 sd++; 837 } 838 839 cnt--; 840 } 841 842 r->r_cons = cons; 843 r->r_cnt = cnt; 844 if (cnt == 0) 845 ifp->if_timer = 0; 846 } 847 848 static int 849 txp_shutdown(device_t dev) 850 { 851 struct txp_softc *sc; 852 struct ifnet *ifp; 853 854 sc = device_get_softc(dev); 855 ifp = &sc->sc_arpcom.ac_if; 856 lwkt_serialize_enter(ifp->if_serializer); 857 858 /* mask all interrupts */ 859 WRITE_REG(sc, TXP_IMR, 860 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 861 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 862 TXP_INT_LATCH); 863 864 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0); 865 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0); 866 txp_command(sc, TXP_CMD_HALT, 0, 0, 0, NULL, NULL, NULL, 0); 867 868 lwkt_serialize_exit(ifp->if_serializer); 869 return(0); 870 } 871 872 static int 873 txp_alloc_rings(struct txp_softc *sc) 874 { 875 struct txp_boot_record *boot; 876 struct txp_ldata *ld; 877 u_int32_t r; 878 int i; 879 880 ld = sc->sc_ldata; 881 boot = &ld->txp_boot; 882 883 /* boot record */ 884 sc->sc_boot = boot; 885 886 /* host variables */ 887 bzero(&ld->txp_hostvar, sizeof(struct txp_hostvar)); 888 boot->br_hostvar_lo = vtophys(&ld->txp_hostvar); 889 boot->br_hostvar_hi = 0; 890 sc->sc_hostvar = (struct txp_hostvar *)&ld->txp_hostvar; 891 892 /* hi priority tx ring */ 893 boot->br_txhipri_lo = vtophys(&ld->txp_txhiring); 894 boot->br_txhipri_hi = 0; 895 boot->br_txhipri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc); 896 sc->sc_txhir.r_reg = TXP_H2A_1; 897 sc->sc_txhir.r_desc = (struct txp_tx_desc *)&ld->txp_txhiring; 898 sc->sc_txhir.r_cons = sc->sc_txhir.r_prod = sc->sc_txhir.r_cnt = 0; 899 sc->sc_txhir.r_off = &sc->sc_hostvar->hv_tx_hi_desc_read_idx; 900 901 /* lo priority tx ring */ 902 boot->br_txlopri_lo = vtophys(&ld->txp_txloring); 903 boot->br_txlopri_hi = 0; 904 boot->br_txlopri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc); 905 sc->sc_txlor.r_reg = TXP_H2A_3; 906 sc->sc_txlor.r_desc = (struct txp_tx_desc *)&ld->txp_txloring; 907 sc->sc_txlor.r_cons = sc->sc_txlor.r_prod = sc->sc_txlor.r_cnt = 0; 908 sc->sc_txlor.r_off = &sc->sc_hostvar->hv_tx_lo_desc_read_idx; 909 910 /* high priority rx ring */ 911 boot->br_rxhipri_lo = vtophys(&ld->txp_rxhiring); 912 boot->br_rxhipri_hi = 0; 913 boot->br_rxhipri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc); 914 sc->sc_rxhir.r_desc = (struct txp_rx_desc *)&ld->txp_rxhiring; 915 sc->sc_rxhir.r_roff = &sc->sc_hostvar->hv_rx_hi_read_idx; 916 sc->sc_rxhir.r_woff = &sc->sc_hostvar->hv_rx_hi_write_idx; 917 918 /* low priority rx ring */ 919 boot->br_rxlopri_lo = vtophys(&ld->txp_rxloring); 920 boot->br_rxlopri_hi = 0; 921 boot->br_rxlopri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc); 922 sc->sc_rxlor.r_desc = (struct txp_rx_desc *)&ld->txp_rxloring; 923 sc->sc_rxlor.r_roff = &sc->sc_hostvar->hv_rx_lo_read_idx; 924 sc->sc_rxlor.r_woff = &sc->sc_hostvar->hv_rx_lo_write_idx; 925 926 /* command ring */ 927 bzero(&ld->txp_cmdring, sizeof(struct txp_cmd_desc) * CMD_ENTRIES); 928 boot->br_cmd_lo = vtophys(&ld->txp_cmdring); 929 boot->br_cmd_hi = 0; 930 boot->br_cmd_siz = CMD_ENTRIES * sizeof(struct txp_cmd_desc); 931 sc->sc_cmdring.base = (struct txp_cmd_desc *)&ld->txp_cmdring; 932 sc->sc_cmdring.size = CMD_ENTRIES * sizeof(struct txp_cmd_desc); 933 sc->sc_cmdring.lastwrite = 0; 934 935 /* response ring */ 936 bzero(&ld->txp_rspring, sizeof(struct txp_rsp_desc) * RSP_ENTRIES); 937 boot->br_resp_lo = vtophys(&ld->txp_rspring); 938 boot->br_resp_hi = 0; 939 boot->br_resp_siz = CMD_ENTRIES * sizeof(struct txp_rsp_desc); 940 sc->sc_rspring.base = (struct txp_rsp_desc *)&ld->txp_rspring; 941 sc->sc_rspring.size = RSP_ENTRIES * sizeof(struct txp_rsp_desc); 942 sc->sc_rspring.lastwrite = 0; 943 944 /* receive buffer ring */ 945 boot->br_rxbuf_lo = vtophys(&ld->txp_rxbufs); 946 boot->br_rxbuf_hi = 0; 947 boot->br_rxbuf_siz = RXBUF_ENTRIES * sizeof(struct txp_rxbuf_desc); 948 sc->sc_rxbufs = (struct txp_rxbuf_desc *)&ld->txp_rxbufs; 949 950 for (i = 0; i < RXBUF_ENTRIES; i++) { 951 struct txp_swdesc *sd; 952 if (sc->sc_rxbufs[i].rb_sd != NULL) 953 continue; 954 sc->sc_rxbufs[i].rb_sd = kmalloc(sizeof(struct txp_swdesc), 955 M_DEVBUF, M_WAITOK); 956 sd = sc->sc_rxbufs[i].rb_sd; 957 sd->sd_mbuf = NULL; 958 } 959 sc->sc_rxbufprod = 0; 960 961 /* zero dma */ 962 bzero(&ld->txp_zero, sizeof(u_int32_t)); 963 boot->br_zero_lo = vtophys(&ld->txp_zero); 964 boot->br_zero_hi = 0; 965 966 /* See if it's waiting for boot, and try to boot it */ 967 for (i = 0; i < 10000; i++) { 968 r = READ_REG(sc, TXP_A2H_0); 969 if (r == STAT_WAITING_FOR_BOOT) 970 break; 971 DELAY(50); 972 } 973 974 if (r != STAT_WAITING_FOR_BOOT) { 975 if_printf(&sc->sc_arpcom.ac_if, "not waiting for boot\n"); 976 return(ENXIO); 977 } 978 979 WRITE_REG(sc, TXP_H2A_2, 0); 980 WRITE_REG(sc, TXP_H2A_1, vtophys(sc->sc_boot)); 981 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_REGISTER_BOOT_RECORD); 982 983 /* See if it booted */ 984 for (i = 0; i < 10000; i++) { 985 r = READ_REG(sc, TXP_A2H_0); 986 if (r == STAT_RUNNING) 987 break; 988 DELAY(50); 989 } 990 if (r != STAT_RUNNING) { 991 if_printf(&sc->sc_arpcom.ac_if, "fw not running\n"); 992 return(ENXIO); 993 } 994 995 /* Clear TX and CMD ring write registers */ 996 WRITE_REG(sc, TXP_H2A_1, TXP_BOOTCMD_NULL); 997 WRITE_REG(sc, TXP_H2A_2, TXP_BOOTCMD_NULL); 998 WRITE_REG(sc, TXP_H2A_3, TXP_BOOTCMD_NULL); 999 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_NULL); 1000 1001 return (0); 1002 } 1003 1004 static int 1005 txp_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr) 1006 { 1007 struct txp_softc *sc = ifp->if_softc; 1008 struct ifreq *ifr = (struct ifreq *)data; 1009 int error = 0; 1010 1011 switch(command) { 1012 case SIOCSIFFLAGS: 1013 if (ifp->if_flags & IFF_UP) { 1014 txp_init(sc); 1015 } else { 1016 if (ifp->if_flags & IFF_RUNNING) 1017 txp_stop(sc); 1018 } 1019 break; 1020 case SIOCADDMULTI: 1021 case SIOCDELMULTI: 1022 /* 1023 * Multicast list has changed; set the hardware 1024 * filter accordingly. 1025 */ 1026 txp_set_filter(sc); 1027 error = 0; 1028 break; 1029 case SIOCGIFMEDIA: 1030 case SIOCSIFMEDIA: 1031 error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, command); 1032 break; 1033 default: 1034 error = ether_ioctl(ifp, command, data); 1035 break; 1036 } 1037 return(error); 1038 } 1039 1040 static int 1041 txp_rxring_fill(struct txp_softc *sc) 1042 { 1043 int i; 1044 struct ifnet *ifp; 1045 struct txp_swdesc *sd; 1046 1047 ifp = &sc->sc_arpcom.ac_if; 1048 1049 for (i = 0; i < RXBUF_ENTRIES; i++) { 1050 sd = sc->sc_rxbufs[i].rb_sd; 1051 MGETHDR(sd->sd_mbuf, MB_DONTWAIT, MT_DATA); 1052 if (sd->sd_mbuf == NULL) 1053 return(ENOBUFS); 1054 1055 MCLGET(sd->sd_mbuf, MB_DONTWAIT); 1056 if ((sd->sd_mbuf->m_flags & M_EXT) == 0) { 1057 m_freem(sd->sd_mbuf); 1058 return(ENOBUFS); 1059 } 1060 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES; 1061 sd->sd_mbuf->m_pkthdr.rcvif = ifp; 1062 1063 sc->sc_rxbufs[i].rb_paddrlo = 1064 vtophys(mtod(sd->sd_mbuf, vm_offset_t)); 1065 sc->sc_rxbufs[i].rb_paddrhi = 0; 1066 } 1067 1068 sc->sc_hostvar->hv_rx_buf_write_idx = (RXBUF_ENTRIES - 1) * 1069 sizeof(struct txp_rxbuf_desc); 1070 1071 return(0); 1072 } 1073 1074 static void 1075 txp_rxring_empty(struct txp_softc *sc) 1076 { 1077 int i; 1078 struct txp_swdesc *sd; 1079 1080 if (sc->sc_rxbufs == NULL) 1081 return; 1082 1083 for (i = 0; i < RXBUF_ENTRIES; i++) { 1084 if (&sc->sc_rxbufs[i] == NULL) 1085 continue; 1086 sd = sc->sc_rxbufs[i].rb_sd; 1087 if (sd == NULL) 1088 continue; 1089 if (sd->sd_mbuf != NULL) { 1090 m_freem(sd->sd_mbuf); 1091 sd->sd_mbuf = NULL; 1092 } 1093 } 1094 1095 return; 1096 } 1097 1098 static void 1099 txp_init(void *xsc) 1100 { 1101 struct txp_softc *sc; 1102 struct ifnet *ifp; 1103 u_int16_t p1; 1104 u_int32_t p2; 1105 1106 sc = xsc; 1107 ifp = &sc->sc_arpcom.ac_if; 1108 1109 if (ifp->if_flags & IFF_RUNNING) 1110 return; 1111 1112 txp_stop(sc); 1113 1114 txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0, 1115 NULL, NULL, NULL, 1); 1116 1117 /* Set station address. */ 1118 ((u_int8_t *)&p1)[1] = sc->sc_arpcom.ac_enaddr[0]; 1119 ((u_int8_t *)&p1)[0] = sc->sc_arpcom.ac_enaddr[1]; 1120 ((u_int8_t *)&p2)[3] = sc->sc_arpcom.ac_enaddr[2]; 1121 ((u_int8_t *)&p2)[2] = sc->sc_arpcom.ac_enaddr[3]; 1122 ((u_int8_t *)&p2)[1] = sc->sc_arpcom.ac_enaddr[4]; 1123 ((u_int8_t *)&p2)[0] = sc->sc_arpcom.ac_enaddr[5]; 1124 txp_command(sc, TXP_CMD_STATION_ADDRESS_WRITE, p1, p2, 0, 1125 NULL, NULL, NULL, 1); 1126 1127 txp_set_filter(sc); 1128 1129 txp_rxring_fill(sc); 1130 1131 txp_command(sc, TXP_CMD_TX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1132 txp_command(sc, TXP_CMD_RX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1133 1134 WRITE_REG(sc, TXP_IER, TXP_INT_RESERVED | TXP_INT_SELF | 1135 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 1136 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 | 1137 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 1138 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH); 1139 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3); 1140 1141 ifp->if_flags |= IFF_RUNNING; 1142 ifp->if_flags &= ~IFF_OACTIVE; 1143 ifp->if_timer = 0; 1144 1145 callout_reset(&sc->txp_stat_timer, hz, txp_tick, sc); 1146 } 1147 1148 static void 1149 txp_tick(void *vsc) 1150 { 1151 struct txp_softc *sc = vsc; 1152 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1153 struct txp_rsp_desc *rsp = NULL; 1154 struct txp_ext_desc *ext; 1155 1156 lwkt_serialize_enter(ifp->if_serializer); 1157 txp_rxbuf_reclaim(sc); 1158 1159 if (txp_command2(sc, TXP_CMD_READ_STATISTICS, 0, 0, 0, NULL, 0, 1160 &rsp, 1)) 1161 goto out; 1162 if (rsp->rsp_numdesc != 6) 1163 goto out; 1164 if (txp_command(sc, TXP_CMD_CLEAR_STATISTICS, 0, 0, 0, 1165 NULL, NULL, NULL, 1)) 1166 goto out; 1167 ext = (struct txp_ext_desc *)(rsp + 1); 1168 1169 ifp->if_ierrors += ext[3].ext_2 + ext[3].ext_3 + ext[3].ext_4 + 1170 ext[4].ext_1 + ext[4].ext_4; 1171 ifp->if_oerrors += ext[0].ext_1 + ext[1].ext_1 + ext[1].ext_4 + 1172 ext[2].ext_1; 1173 ifp->if_collisions += ext[0].ext_2 + ext[0].ext_3 + ext[1].ext_2 + 1174 ext[1].ext_3; 1175 ifp->if_opackets += rsp->rsp_par2; 1176 ifp->if_ipackets += ext[2].ext_3; 1177 1178 out: 1179 if (rsp != NULL) 1180 kfree(rsp, M_DEVBUF); 1181 1182 callout_reset(&sc->txp_stat_timer, hz, txp_tick, sc); 1183 lwkt_serialize_exit(ifp->if_serializer); 1184 } 1185 1186 static void 1187 txp_start(struct ifnet *ifp) 1188 { 1189 struct txp_softc *sc = ifp->if_softc; 1190 struct txp_tx_ring *r = &sc->sc_txhir; 1191 struct txp_tx_desc *txd; 1192 struct txp_frag_desc *fxd; 1193 struct mbuf *m, *m0; 1194 struct txp_swdesc *sd; 1195 u_int32_t firstprod, firstcnt, prod, cnt; 1196 1197 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1198 return; 1199 1200 prod = r->r_prod; 1201 cnt = r->r_cnt; 1202 1203 while (1) { 1204 m = ifq_poll(&ifp->if_snd); 1205 if (m == NULL) 1206 break; 1207 1208 firstprod = prod; 1209 firstcnt = cnt; 1210 1211 sd = sc->sc_txd + prod; 1212 sd->sd_mbuf = m; 1213 1214 if ((TX_ENTRIES - cnt) < 4) 1215 goto oactive; 1216 1217 txd = r->r_desc + prod; 1218 1219 txd->tx_flags = TX_FLAGS_TYPE_DATA; 1220 txd->tx_numdesc = 0; 1221 txd->tx_addrlo = 0; 1222 txd->tx_addrhi = 0; 1223 txd->tx_totlen = 0; 1224 txd->tx_pflags = 0; 1225 1226 if (++prod == TX_ENTRIES) 1227 prod = 0; 1228 1229 if (++cnt >= (TX_ENTRIES - 4)) 1230 goto oactive; 1231 1232 if (m->m_flags & M_VLANTAG) { 1233 txd->tx_pflags = TX_PFLAGS_VLAN | 1234 (htons(m->m_pkthdr.ether_vlantag) << 1235 TX_PFLAGS_VLANTAG_S); 1236 } 1237 1238 if (m->m_pkthdr.csum_flags & CSUM_IP) 1239 txd->tx_pflags |= TX_PFLAGS_IPCKSUM; 1240 1241 #if 0 1242 if (m->m_pkthdr.csum_flags & CSUM_TCP) 1243 txd->tx_pflags |= TX_PFLAGS_TCPCKSUM; 1244 if (m->m_pkthdr.csum_flags & CSUM_UDP) 1245 txd->tx_pflags |= TX_PFLAGS_UDPCKSUM; 1246 #endif 1247 1248 fxd = (struct txp_frag_desc *)(r->r_desc + prod); 1249 for (m0 = m; m0 != NULL; m0 = m0->m_next) { 1250 if (m0->m_len == 0) 1251 continue; 1252 if (++cnt >= (TX_ENTRIES - 4)) 1253 goto oactive; 1254 1255 txd->tx_numdesc++; 1256 1257 fxd->frag_flags = FRAG_FLAGS_TYPE_FRAG; 1258 fxd->frag_rsvd1 = 0; 1259 fxd->frag_len = m0->m_len; 1260 fxd->frag_addrlo = vtophys(mtod(m0, vm_offset_t)); 1261 fxd->frag_addrhi = 0; 1262 fxd->frag_rsvd2 = 0; 1263 1264 if (++prod == TX_ENTRIES) { 1265 fxd = (struct txp_frag_desc *)r->r_desc; 1266 prod = 0; 1267 } else 1268 fxd++; 1269 1270 } 1271 1272 ifp->if_timer = 5; 1273 1274 ifq_dequeue(&ifp->if_snd, m); 1275 ETHER_BPF_MTAP(ifp, m); 1276 WRITE_REG(sc, r->r_reg, TXP_IDX2OFFSET(prod)); 1277 } 1278 1279 r->r_prod = prod; 1280 r->r_cnt = cnt; 1281 return; 1282 1283 oactive: 1284 ifp->if_flags |= IFF_OACTIVE; 1285 r->r_prod = firstprod; 1286 r->r_cnt = firstcnt; 1287 return; 1288 } 1289 1290 /* 1291 * Handle simple commands sent to the typhoon 1292 */ 1293 static int 1294 txp_command(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2, 1295 u_int32_t in3, u_int16_t *out1, u_int32_t *out2, u_int32_t *out3, 1296 int wait) 1297 { 1298 struct txp_rsp_desc *rsp = NULL; 1299 1300 if (txp_command2(sc, id, in1, in2, in3, NULL, 0, &rsp, wait)) 1301 return (-1); 1302 1303 if (!wait) 1304 return (0); 1305 1306 if (out1 != NULL) 1307 *out1 = rsp->rsp_par1; 1308 if (out2 != NULL) 1309 *out2 = rsp->rsp_par2; 1310 if (out3 != NULL) 1311 *out3 = rsp->rsp_par3; 1312 kfree(rsp, M_DEVBUF); 1313 return (0); 1314 } 1315 1316 static int 1317 txp_command2(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2, 1318 u_int32_t in3, struct txp_ext_desc *in_extp, u_int8_t in_extn, 1319 struct txp_rsp_desc **rspp, int wait) 1320 { 1321 struct txp_hostvar *hv = sc->sc_hostvar; 1322 struct txp_cmd_desc *cmd; 1323 struct txp_ext_desc *ext; 1324 u_int32_t idx, i; 1325 u_int16_t seq; 1326 1327 if (txp_cmd_desc_numfree(sc) < (in_extn + 1)) { 1328 if_printf(&sc->sc_arpcom.ac_if, "no free cmd descriptors\n"); 1329 return (-1); 1330 } 1331 1332 idx = sc->sc_cmdring.lastwrite; 1333 cmd = (struct txp_cmd_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx); 1334 bzero(cmd, sizeof(*cmd)); 1335 1336 cmd->cmd_numdesc = in_extn; 1337 cmd->cmd_seq = seq = sc->sc_seq++; 1338 cmd->cmd_id = id; 1339 cmd->cmd_par1 = in1; 1340 cmd->cmd_par2 = in2; 1341 cmd->cmd_par3 = in3; 1342 cmd->cmd_flags = CMD_FLAGS_TYPE_CMD | 1343 (wait ? CMD_FLAGS_RESP : 0) | CMD_FLAGS_VALID; 1344 1345 idx += sizeof(struct txp_cmd_desc); 1346 if (idx == sc->sc_cmdring.size) 1347 idx = 0; 1348 1349 for (i = 0; i < in_extn; i++) { 1350 ext = (struct txp_ext_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx); 1351 bcopy(in_extp, ext, sizeof(struct txp_ext_desc)); 1352 in_extp++; 1353 idx += sizeof(struct txp_cmd_desc); 1354 if (idx == sc->sc_cmdring.size) 1355 idx = 0; 1356 } 1357 1358 sc->sc_cmdring.lastwrite = idx; 1359 1360 WRITE_REG(sc, TXP_H2A_2, sc->sc_cmdring.lastwrite); 1361 1362 if (!wait) 1363 return (0); 1364 1365 for (i = 0; i < 10000; i++) { 1366 idx = hv->hv_resp_read_idx; 1367 if (idx != hv->hv_resp_write_idx) { 1368 *rspp = NULL; 1369 if (txp_response(sc, idx, id, seq, rspp)) 1370 return (-1); 1371 if (*rspp != NULL) 1372 break; 1373 } 1374 DELAY(50); 1375 } 1376 if (i == 1000 || (*rspp) == NULL) { 1377 if_printf(&sc->sc_arpcom.ac_if, "0x%x command failed\n", id); 1378 return (-1); 1379 } 1380 1381 return (0); 1382 } 1383 1384 static int 1385 txp_response(struct txp_softc *sc, u_int32_t ridx, u_int16_t id, u_int16_t seq, 1386 struct txp_rsp_desc **rspp) 1387 { 1388 struct txp_hostvar *hv = sc->sc_hostvar; 1389 struct txp_rsp_desc *rsp; 1390 1391 while (ridx != hv->hv_resp_write_idx) { 1392 rsp = (struct txp_rsp_desc *)(((u_int8_t *)sc->sc_rspring.base) + ridx); 1393 1394 if (id == rsp->rsp_id && rsp->rsp_seq == seq) { 1395 *rspp = (struct txp_rsp_desc *)kmalloc( 1396 sizeof(struct txp_rsp_desc) * (rsp->rsp_numdesc + 1), 1397 M_DEVBUF, M_INTWAIT); 1398 if ((*rspp) == NULL) 1399 return (-1); 1400 txp_rsp_fixup(sc, rsp, *rspp); 1401 return (0); 1402 } 1403 1404 if (rsp->rsp_flags & RSP_FLAGS_ERROR) { 1405 if_printf(&sc->sc_arpcom.ac_if, "response error!\n"); 1406 txp_rsp_fixup(sc, rsp, NULL); 1407 ridx = hv->hv_resp_read_idx; 1408 continue; 1409 } 1410 1411 switch (rsp->rsp_id) { 1412 case TXP_CMD_CYCLE_STATISTICS: 1413 case TXP_CMD_MEDIA_STATUS_READ: 1414 break; 1415 case TXP_CMD_HELLO_RESPONSE: 1416 if_printf(&sc->sc_arpcom.ac_if, "hello\n"); 1417 break; 1418 default: 1419 if_printf(&sc->sc_arpcom.ac_if, "unknown id(0x%x)\n", 1420 rsp->rsp_id); 1421 } 1422 1423 txp_rsp_fixup(sc, rsp, NULL); 1424 ridx = hv->hv_resp_read_idx; 1425 hv->hv_resp_read_idx = ridx; 1426 } 1427 1428 return (0); 1429 } 1430 1431 static void 1432 txp_rsp_fixup(struct txp_softc *sc, struct txp_rsp_desc *rsp, 1433 struct txp_rsp_desc *dst) 1434 { 1435 struct txp_rsp_desc *src = rsp; 1436 struct txp_hostvar *hv = sc->sc_hostvar; 1437 u_int32_t i, ridx; 1438 1439 ridx = hv->hv_resp_read_idx; 1440 1441 for (i = 0; i < rsp->rsp_numdesc + 1; i++) { 1442 if (dst != NULL) 1443 bcopy(src, dst++, sizeof(struct txp_rsp_desc)); 1444 ridx += sizeof(struct txp_rsp_desc); 1445 if (ridx == sc->sc_rspring.size) { 1446 src = sc->sc_rspring.base; 1447 ridx = 0; 1448 } else 1449 src++; 1450 sc->sc_rspring.lastwrite = hv->hv_resp_read_idx = ridx; 1451 } 1452 1453 hv->hv_resp_read_idx = ridx; 1454 } 1455 1456 static int 1457 txp_cmd_desc_numfree(struct txp_softc *sc) 1458 { 1459 struct txp_hostvar *hv = sc->sc_hostvar; 1460 struct txp_boot_record *br = sc->sc_boot; 1461 u_int32_t widx, ridx, nfree; 1462 1463 widx = sc->sc_cmdring.lastwrite; 1464 ridx = hv->hv_cmd_read_idx; 1465 1466 if (widx == ridx) { 1467 /* Ring is completely free */ 1468 nfree = br->br_cmd_siz - sizeof(struct txp_cmd_desc); 1469 } else { 1470 if (widx > ridx) 1471 nfree = br->br_cmd_siz - 1472 (widx - ridx + sizeof(struct txp_cmd_desc)); 1473 else 1474 nfree = ridx - widx - sizeof(struct txp_cmd_desc); 1475 } 1476 1477 return (nfree / sizeof(struct txp_cmd_desc)); 1478 } 1479 1480 static void 1481 txp_stop(struct txp_softc *sc) 1482 { 1483 struct ifnet *ifp; 1484 1485 ifp = &sc->sc_arpcom.ac_if; 1486 1487 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1488 1489 callout_stop(&sc->txp_stat_timer); 1490 1491 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1492 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1493 1494 txp_rxring_empty(sc); 1495 1496 return; 1497 } 1498 1499 static void 1500 txp_watchdog(struct ifnet *ifp) 1501 { 1502 return; 1503 } 1504 1505 static int 1506 txp_ifmedia_upd(struct ifnet *ifp) 1507 { 1508 struct txp_softc *sc = ifp->if_softc; 1509 struct ifmedia *ifm = &sc->sc_ifmedia; 1510 u_int16_t new_xcvr; 1511 1512 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1513 return (EINVAL); 1514 1515 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_10_T) { 1516 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1517 new_xcvr = TXP_XCVR_10_FDX; 1518 else 1519 new_xcvr = TXP_XCVR_10_HDX; 1520 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) { 1521 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1522 new_xcvr = TXP_XCVR_100_FDX; 1523 else 1524 new_xcvr = TXP_XCVR_100_HDX; 1525 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) { 1526 new_xcvr = TXP_XCVR_AUTO; 1527 } else 1528 return (EINVAL); 1529 1530 /* nothing to do */ 1531 if (sc->sc_xcvr == new_xcvr) 1532 return (0); 1533 1534 txp_command(sc, TXP_CMD_XCVR_SELECT, new_xcvr, 0, 0, 1535 NULL, NULL, NULL, 0); 1536 sc->sc_xcvr = new_xcvr; 1537 1538 return (0); 1539 } 1540 1541 static void 1542 txp_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1543 { 1544 struct txp_softc *sc = ifp->if_softc; 1545 struct ifmedia *ifm = &sc->sc_ifmedia; 1546 u_int16_t bmsr, bmcr, anlpar; 1547 1548 ifmr->ifm_status = IFM_AVALID; 1549 ifmr->ifm_active = IFM_ETHER; 1550 1551 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0, 1552 &bmsr, NULL, NULL, 1)) 1553 goto bail; 1554 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0, 1555 &bmsr, NULL, NULL, 1)) 1556 goto bail; 1557 1558 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMCR, 0, 1559 &bmcr, NULL, NULL, 1)) 1560 goto bail; 1561 1562 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_ANLPAR, 0, 1563 &anlpar, NULL, NULL, 1)) 1564 goto bail; 1565 1566 if (bmsr & BMSR_LINK) 1567 ifmr->ifm_status |= IFM_ACTIVE; 1568 1569 if (bmcr & BMCR_ISO) { 1570 ifmr->ifm_active |= IFM_NONE; 1571 ifmr->ifm_status = 0; 1572 return; 1573 } 1574 1575 if (bmcr & BMCR_LOOP) 1576 ifmr->ifm_active |= IFM_LOOP; 1577 1578 if (bmcr & BMCR_AUTOEN) { 1579 if ((bmsr & BMSR_ACOMP) == 0) { 1580 ifmr->ifm_active |= IFM_NONE; 1581 return; 1582 } 1583 1584 if (anlpar & ANLPAR_T4) 1585 ifmr->ifm_active |= IFM_100_T4; 1586 else if (anlpar & ANLPAR_TX_FD) 1587 ifmr->ifm_active |= IFM_100_TX|IFM_FDX; 1588 else if (anlpar & ANLPAR_TX) 1589 ifmr->ifm_active |= IFM_100_TX; 1590 else if (anlpar & ANLPAR_10_FD) 1591 ifmr->ifm_active |= IFM_10_T|IFM_FDX; 1592 else if (anlpar & ANLPAR_10) 1593 ifmr->ifm_active |= IFM_10_T; 1594 else 1595 ifmr->ifm_active |= IFM_NONE; 1596 } else 1597 ifmr->ifm_active = ifm->ifm_cur->ifm_media; 1598 return; 1599 1600 bail: 1601 ifmr->ifm_active |= IFM_NONE; 1602 ifmr->ifm_status &= ~IFM_AVALID; 1603 } 1604 1605 #ifdef TXP_DEBUG 1606 static void 1607 txp_show_descriptor(void *d) 1608 { 1609 struct txp_cmd_desc *cmd = d; 1610 struct txp_rsp_desc *rsp = d; 1611 struct txp_tx_desc *txd = d; 1612 struct txp_frag_desc *frgd = d; 1613 1614 switch (cmd->cmd_flags & CMD_FLAGS_TYPE_M) { 1615 case CMD_FLAGS_TYPE_CMD: 1616 /* command descriptor */ 1617 kprintf("[cmd flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1618 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq, 1619 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3); 1620 break; 1621 case CMD_FLAGS_TYPE_RESP: 1622 /* response descriptor */ 1623 kprintf("[rsp flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1624 rsp->rsp_flags, rsp->rsp_numdesc, rsp->rsp_id, rsp->rsp_seq, 1625 rsp->rsp_par1, rsp->rsp_par2, rsp->rsp_par3); 1626 break; 1627 case CMD_FLAGS_TYPE_DATA: 1628 /* data header (assuming tx for now) */ 1629 kprintf("[data flags 0x%x num %d totlen %d addr 0x%x/0x%x pflags 0x%x]", 1630 txd->tx_flags, txd->tx_numdesc, txd->tx_totlen, 1631 txd->tx_addrlo, txd->tx_addrhi, txd->tx_pflags); 1632 break; 1633 case CMD_FLAGS_TYPE_FRAG: 1634 /* fragment descriptor */ 1635 kprintf("[frag flags 0x%x rsvd1 0x%x len %d addr 0x%x/0x%x rsvd2 0x%x]", 1636 frgd->frag_flags, frgd->frag_rsvd1, frgd->frag_len, 1637 frgd->frag_addrlo, frgd->frag_addrhi, frgd->frag_rsvd2); 1638 break; 1639 default: 1640 kprintf("[unknown(%x) flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1641 cmd->cmd_flags & CMD_FLAGS_TYPE_M, 1642 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq, 1643 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3); 1644 break; 1645 } 1646 } 1647 #endif 1648 1649 static void 1650 txp_set_filter(struct txp_softc *sc) 1651 { 1652 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1653 uint16_t filter; 1654 struct ifmultiaddr *ifma; 1655 1656 if (ifp->if_flags & IFF_PROMISC) { 1657 filter = TXP_RXFILT_PROMISC; 1658 goto setit; 1659 } 1660 1661 filter = TXP_RXFILT_DIRECT; 1662 1663 if (ifp->if_flags & IFF_BROADCAST) 1664 filter |= TXP_RXFILT_BROADCAST; 1665 1666 if (ifp->if_flags & IFF_ALLMULTI) { 1667 filter |= TXP_RXFILT_ALLMULTI; 1668 } else { 1669 uint32_t hashbit, hash[2]; 1670 int mcnt = 0; 1671 1672 hash[0] = hash[1] = 0; 1673 1674 LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1675 if (ifma->ifma_addr->sa_family != AF_LINK) 1676 continue; 1677 1678 mcnt++; 1679 hashbit = (uint16_t)(ether_crc32_be( 1680 LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 1681 ETHER_ADDR_LEN) & (64 - 1)); 1682 hash[hashbit / 32] |= (1 << hashbit % 32); 1683 } 1684 1685 if (mcnt > 0) { 1686 filter |= TXP_RXFILT_HASHMULTI; 1687 txp_command(sc, TXP_CMD_MCAST_HASH_MASK_WRITE, 1688 2, hash[0], hash[1], NULL, NULL, NULL, 0); 1689 } 1690 } 1691 1692 setit: 1693 txp_command(sc, TXP_CMD_RX_FILTER_WRITE, filter, 0, 0, 1694 NULL, NULL, NULL, 1); 1695 } 1696 1697 static void 1698 txp_capabilities(struct txp_softc *sc) 1699 { 1700 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1701 struct txp_rsp_desc *rsp = NULL; 1702 struct txp_ext_desc *ext; 1703 1704 if (txp_command2(sc, TXP_CMD_OFFLOAD_READ, 0, 0, 0, NULL, 0, &rsp, 1)) 1705 goto out; 1706 1707 if (rsp->rsp_numdesc != 1) 1708 goto out; 1709 ext = (struct txp_ext_desc *)(rsp + 1); 1710 1711 sc->sc_tx_capability = ext->ext_1 & OFFLOAD_MASK; 1712 sc->sc_rx_capability = ext->ext_2 & OFFLOAD_MASK; 1713 ifp->if_capabilities = 0; 1714 1715 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_VLAN) { 1716 sc->sc_tx_capability |= OFFLOAD_VLAN; 1717 sc->sc_rx_capability |= OFFLOAD_VLAN; 1718 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING; 1719 } 1720 1721 #if 0 1722 /* not ready yet */ 1723 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPSEC) { 1724 sc->sc_tx_capability |= OFFLOAD_IPSEC; 1725 sc->sc_rx_capability |= OFFLOAD_IPSEC; 1726 ifp->if_capabilities |= IFCAP_IPSEC; 1727 } 1728 #endif 1729 1730 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPCKSUM) { 1731 sc->sc_tx_capability |= OFFLOAD_IPCKSUM; 1732 sc->sc_rx_capability |= OFFLOAD_IPCKSUM; 1733 ifp->if_capabilities |= IFCAP_HWCSUM; 1734 ifp->if_hwassist |= CSUM_IP; 1735 } 1736 1737 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_TCPCKSUM) { 1738 #if 0 1739 sc->sc_tx_capability |= OFFLOAD_TCPCKSUM; 1740 #endif 1741 sc->sc_rx_capability |= OFFLOAD_TCPCKSUM; 1742 ifp->if_capabilities |= IFCAP_HWCSUM; 1743 } 1744 1745 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_UDPCKSUM) { 1746 #if 0 1747 sc->sc_tx_capability |= OFFLOAD_UDPCKSUM; 1748 #endif 1749 sc->sc_rx_capability |= OFFLOAD_UDPCKSUM; 1750 ifp->if_capabilities |= IFCAP_HWCSUM; 1751 } 1752 ifp->if_capenable = ifp->if_capabilities; 1753 1754 if (txp_command(sc, TXP_CMD_OFFLOAD_WRITE, 0, 1755 sc->sc_tx_capability, sc->sc_rx_capability, NULL, NULL, NULL, 1)) 1756 goto out; 1757 1758 out: 1759 if (rsp != NULL) 1760 kfree(rsp, M_DEVBUF); 1761 1762 return; 1763 } 1764