1 /* 2 * Copyright (c) 2000,2001 Jonathan Chen. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions, and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in 13 * the documentation and/or other materials provided with the 14 * distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: src/sys/dev/cardbus/cardbus.c,v 1.28 2002/11/27 17:30:41 imp Exp $ 29 * $DragonFly: src/sys/dev/pccard/cardbus/cardbus.c,v 1.10 2006/12/22 23:26:22 swildner Exp $ 30 */ 31 32 /* 33 * Cardbus Bus Driver 34 * 35 * much of the bus code was stolen directly from sys/pci/pci.c 36 * (Copyright (c) 1997, Stefan Esser <se@freebsd.org>) 37 * 38 * Written by Jonathan Chen <jon@freebsd.org> 39 */ 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/malloc.h> 44 #include <sys/kernel.h> 45 #include <sys/sysctl.h> 46 #include <sys/bus.h> 47 #include <sys/rman.h> 48 49 #include <sys/pciio.h> 50 #include <bus/pci/pcivar.h> 51 #include <bus/pci/pcireg.h> 52 #include <bus/pci/pci_private.h> 53 54 #include <dev/pccard/cardbus/cardbusreg.h> 55 #include <dev/pccard/cardbus/cardbusvar.h> 56 #include <dev/pccard/cardbus/cardbus_cis.h> 57 #include <bus/pccard/pccardvar.h> 58 59 #include "power_if.h" 60 #include "pcib_if.h" 61 62 /* sysctl vars */ 63 SYSCTL_NODE(_hw, OID_AUTO, cardbus, CTLFLAG_RD, 0, "CardBus parameters"); 64 65 int cardbus_debug = 0; 66 TUNABLE_INT("hw.cardbus.debug", &cardbus_debug); 67 SYSCTL_INT(_hw_cardbus, OID_AUTO, debug, CTLFLAG_RW, 68 &cardbus_debug, 0, 69 "CardBus debug"); 70 71 int cardbus_cis_debug = 0; 72 TUNABLE_INT("hw.cardbus.cis_debug", &cardbus_cis_debug); 73 SYSCTL_INT(_hw_cardbus, OID_AUTO, cis_debug, CTLFLAG_RW, 74 &cardbus_cis_debug, 0, 75 "CardBus CIS debug"); 76 77 #define DPRINTF(a) if (cardbus_debug) kprintf a 78 #define DEVPRINTF(x) if (cardbus_debug) device_printf x 79 80 81 static struct resource *cardbus_alloc_resource(device_t cbdev, device_t child, 82 int type, int *rid, u_long start, u_long end, u_long count, 83 u_int flags); 84 static int cardbus_attach(device_t cbdev); 85 static int cardbus_attach_card(device_t cbdev); 86 static int cardbus_child_location_str(device_t cbdev, device_t child, 87 char *, size_t len); 88 static int cardbus_child_pnpinfo_str(device_t cbdev, device_t child, 89 char *, size_t len); 90 static __inline void cardbus_clear_command_bit(device_t cbdev, device_t child, 91 u_int16_t bit); 92 static void cardbus_delete_resource(device_t cbdev, device_t child, 93 int type, int rid); 94 static void cardbus_delete_resource_method(device_t cbdev, device_t child, 95 int type, int rid); 96 static int cardbus_detach(device_t cbdev); 97 static int cardbus_detach_card(device_t cbdev); 98 static void cardbus_device_setup_regs(device_t brdev, int b, int s, int f, 99 pcicfgregs *cfg); 100 static void cardbus_disable_busmaster_method(device_t cbdev, device_t child); 101 static void cardbus_disable_io_method(device_t cbdev, device_t child, 102 int space); 103 static void cardbus_driver_added(device_t cbdev, driver_t *driver); 104 static void cardbus_enable_busmaster_method(device_t cbdev, device_t child); 105 static void cardbus_enable_io_method(device_t cbdev, device_t child, 106 int space); 107 static int cardbus_freecfg(struct cardbus_devinfo *dinfo); 108 static int cardbus_get_powerstate_method(device_t cbdev, device_t child); 109 static int cardbus_get_resource(device_t cbdev, device_t child, int type, 110 int rid, u_long *startp, u_long *countp); 111 static int cardbus_get_resource_method(device_t cbdev, device_t child, 112 int type, int rid, u_long *startp, u_long *countp); 113 static void cardbus_hdrtypedata(device_t brdev, int b, int s, int f, 114 pcicfgregs *cfg); 115 static int cardbus_print_child(device_t cbdev, device_t child); 116 static int cardbus_print_resources(struct resource_list *rl, 117 const char *name, int type, const char *format); 118 static void cardbus_print_verbose(struct cardbus_devinfo *dinfo); 119 static int cardbus_probe(device_t cbdev); 120 static void cardbus_probe_nomatch(device_t cbdev, device_t child); 121 static struct cardbus_devinfo *cardbus_read_device(device_t brdev, int b, 122 int s, int f); 123 static void cardbus_read_extcap(device_t cbdev, pcicfgregs *cfg); 124 static u_int32_t cardbus_read_config_method(device_t cbdev, 125 device_t child, int reg, int width); 126 static int cardbus_read_ivar(device_t cbdev, device_t child, int which, 127 u_long *result); 128 static void cardbus_release_all_resources(device_t cbdev, 129 struct cardbus_devinfo *dinfo); 130 static int cardbus_release_resource(device_t cbdev, device_t child, 131 int type, int rid, struct resource *r); 132 static __inline void cardbus_set_command_bit(device_t cbdev, device_t child, 133 u_int16_t bit); 134 static int cardbus_set_powerstate_method(device_t cbdev, device_t child, 135 int state); 136 static int cardbus_set_resource(device_t cbdev, device_t child, int type, 137 int rid, u_long start, u_long count, struct resource *res); 138 static int cardbus_set_resource_method(device_t cbdev, device_t child, 139 int type, int rid, u_long start, u_long count); 140 static int cardbus_setup_intr(device_t cbdev, device_t child, 141 struct resource *irq, int flags, driver_intr_t *intr, 142 void *arg, void **cookiep, lwkt_serialize_t); 143 static int cardbus_teardown_intr(device_t cbdev, device_t child, 144 struct resource *irq, void *cookie); 145 static void cardbus_write_config_method(device_t cbdev, device_t child, 146 int reg, u_int32_t val, int width); 147 static int cardbus_write_ivar(device_t cbdev, device_t child, int which, 148 uintptr_t value); 149 150 /************************************************************************/ 151 /* Probe/Attach */ 152 /************************************************************************/ 153 154 static int 155 cardbus_probe(device_t cbdev) 156 { 157 device_set_desc(cbdev, "CardBus bus"); 158 return 0; 159 } 160 161 static int 162 cardbus_attach(device_t cbdev) 163 { 164 return 0; 165 } 166 167 static int 168 cardbus_detach(device_t cbdev) 169 { 170 cardbus_detach_card(cbdev); 171 return 0; 172 } 173 174 static int 175 cardbus_suspend(device_t self) 176 { 177 cardbus_detach_card(self); 178 return (0); 179 } 180 181 static int 182 cardbus_resume(device_t self) 183 { 184 return (0); 185 } 186 187 /************************************************************************/ 188 /* Attach/Detach card */ 189 /************************************************************************/ 190 191 static void 192 cardbus_device_setup_regs(device_t brdev, int b, int s, int f, pcicfgregs *cfg) 193 { 194 PCIB_WRITE_CONFIG(brdev, b, s, f, PCIR_INTLINE, 195 pci_get_irq(device_get_parent(brdev)), 1); 196 cfg->intline = PCIB_READ_CONFIG(brdev, b, s, f, PCIR_INTLINE, 1); 197 198 PCIB_WRITE_CONFIG(brdev, b, s, f, PCIR_CACHELNSZ, 0x08, 1); 199 cfg->cachelnsz = PCIB_READ_CONFIG(brdev, b, s, f, PCIR_CACHELNSZ, 1); 200 201 PCIB_WRITE_CONFIG(brdev, b, s, f, PCIR_LATTIMER, 0xa8, 1); 202 cfg->lattimer = PCIB_READ_CONFIG(brdev, b, s, f, PCIR_LATTIMER, 1); 203 204 PCIB_WRITE_CONFIG(brdev, b, s, f, PCIR_MINGNT, 0x14, 1); 205 cfg->mingnt = PCIB_READ_CONFIG(brdev, b, s, f, PCIR_MINGNT, 1); 206 207 PCIB_WRITE_CONFIG(brdev, b, s, f, PCIR_MAXLAT, 0x14, 1); 208 cfg->maxlat = PCIB_READ_CONFIG(brdev, b, s, f, PCIR_MAXLAT, 1); 209 } 210 211 static int 212 cardbus_attach_card(device_t cbdev) 213 { 214 device_t brdev = device_get_parent(cbdev); 215 int cardattached = 0; 216 static int curr_bus_number = 2; /* XXX EVILE BAD (see below) */ 217 int bus, slot, func; 218 219 cardbus_detach_card(cbdev); /* detach existing cards */ 220 221 POWER_ENABLE_SOCKET(brdev, cbdev); 222 bus = pcib_get_bus(brdev); 223 if (bus == 0) { 224 /* 225 * XXX EVILE BAD XXX 226 * Not all BIOSes initialize the secondary bus number properly, 227 * so if the default is bad, we just put one in and hope it 228 * works. 229 */ 230 bus = curr_bus_number; 231 pci_write_config(brdev, PCIR_SECBUS_2, curr_bus_number, 1); 232 pci_write_config(brdev, PCIR_SUBBUS_2, curr_bus_number + 2, 1); 233 curr_bus_number += 3; 234 } 235 /* For each function, set it up and try to attach a driver to it */ 236 for (slot = 0; slot <= CARDBUS_SLOTMAX; slot++) { 237 int cardbusfunchigh = 0; 238 for (func = 0; func <= cardbusfunchigh; func++) { 239 struct cardbus_devinfo *dinfo = 240 cardbus_read_device(brdev, bus, slot, func); 241 242 if (dinfo == NULL) 243 continue; 244 if (dinfo->pci.cfg.mfdev) 245 cardbusfunchigh = CARDBUS_FUNCMAX; 246 247 cardbus_device_setup_regs(brdev, bus, slot, func, 248 &dinfo->pci.cfg); 249 cardbus_print_verbose(dinfo); 250 dinfo->pci.cfg.dev = device_add_child(cbdev, NULL, -1); 251 if (!dinfo->pci.cfg.dev) { 252 DEVPRINTF((cbdev, "Cannot add child!\n")); 253 cardbus_freecfg(dinfo); 254 continue; 255 } 256 resource_list_init(&dinfo->pci.resources); 257 device_set_ivars(dinfo->pci.cfg.dev, dinfo); 258 cardbus_do_cis(cbdev, dinfo->pci.cfg.dev); 259 if (device_probe_and_attach(dinfo->pci.cfg.dev) != 0) 260 cardbus_release_all_resources(cbdev, dinfo); 261 else 262 cardattached++; 263 } 264 } 265 266 if (cardattached > 0) 267 return (0); 268 POWER_DISABLE_SOCKET(brdev, cbdev); 269 return (ENOENT); 270 } 271 272 static int 273 cardbus_detach_card(device_t cbdev) 274 { 275 int numdevs; 276 device_t *devlist; 277 int tmp; 278 int err = 0; 279 280 device_get_children(cbdev, &devlist, &numdevs); 281 282 if (numdevs == 0) { 283 kfree(devlist, M_TEMP); 284 return (ENOENT); 285 } 286 287 for (tmp = 0; tmp < numdevs; tmp++) { 288 struct cardbus_devinfo *dinfo = device_get_ivars(devlist[tmp]); 289 int status = device_get_state(devlist[tmp]); 290 291 if (dinfo->pci.cfg.dev != devlist[tmp]) 292 device_printf(cbdev, "devinfo dev mismatch\n"); 293 if (status == DS_ATTACHED || status == DS_BUSY) 294 device_detach(devlist[tmp]); 295 cardbus_release_all_resources(cbdev, dinfo); 296 device_delete_child(cbdev, devlist[tmp]); 297 cardbus_freecfg(dinfo); 298 } 299 POWER_DISABLE_SOCKET(device_get_parent(cbdev), cbdev); 300 kfree(devlist, M_TEMP); 301 return (err); 302 } 303 304 static void 305 cardbus_driver_added(device_t cbdev, driver_t *driver) 306 { 307 int numdevs; 308 device_t *devlist; 309 int tmp; 310 struct cardbus_devinfo *dinfo; 311 312 device_get_children(cbdev, &devlist, &numdevs); 313 314 DEVICE_IDENTIFY(driver, cbdev); 315 POWER_ENABLE_SOCKET(device_get_parent(cbdev), cbdev); 316 for (tmp = 0; tmp < numdevs; tmp++) { 317 if (device_get_state(devlist[tmp]) == DS_NOTPRESENT) { 318 dinfo = device_get_ivars(devlist[tmp]); 319 #ifdef notyet 320 cardbus_device_setup_regs(brdev, bus, slot, func, 321 &dinfo->pci.cfg); 322 #endif 323 cardbus_print_verbose(dinfo); 324 resource_list_init(&dinfo->pci.resources); 325 cardbus_do_cis(cbdev, dinfo->pci.cfg.dev); 326 if (device_probe_and_attach(dinfo->pci.cfg.dev) != 0) { 327 cardbus_release_all_resources(cbdev, dinfo); 328 } 329 } 330 } 331 332 kfree(devlist, M_TEMP); 333 } 334 335 /************************************************************************/ 336 /* PCI-Like config reading (copied from pci.c */ 337 /************************************************************************/ 338 339 /* read configuration header into pcicfgrect structure */ 340 341 static void 342 cardbus_read_extcap(device_t cbdev, pcicfgregs *cfg) 343 { 344 #define REG(n, w) PCIB_READ_CONFIG(cbdev, cfg->bus, cfg->slot, cfg->func, n, w) 345 int ptr, nextptr, ptrptr; 346 347 switch (cfg->hdrtype) { 348 case 0: 349 ptrptr = 0x34; 350 break; 351 case 2: 352 ptrptr = 0x14; 353 break; 354 default: 355 return; /* no extended capabilities support */ 356 } 357 nextptr = REG(ptrptr, 1); /* sanity check? */ 358 359 /* 360 * Read capability entries. 361 */ 362 while (nextptr != 0) { 363 /* Sanity check */ 364 if (nextptr > 255) { 365 kprintf("illegal PCI extended capability offset %d\n", 366 nextptr); 367 return; 368 } 369 /* Find the next entry */ 370 ptr = nextptr; 371 nextptr = REG(ptr + 1, 1); 372 373 /* Process this entry */ 374 switch (REG(ptr, 1)) { 375 case 0x01: /* PCI power management */ 376 if (cfg->pp_cap == 0) { 377 cfg->pp_cap = REG(ptr + PCIR_POWER_CAP, 2); 378 cfg->pp_status = ptr + PCIR_POWER_STATUS; 379 cfg->pp_pmcsr = ptr + PCIR_POWER_PMCSR; 380 if ((nextptr - ptr) > PCIR_POWER_DATA) 381 cfg->pp_data = ptr + PCIR_POWER_DATA; 382 } 383 break; 384 default: 385 break; 386 } 387 } 388 #undef REG 389 } 390 391 /* extract header type specific config data */ 392 393 static void 394 cardbus_hdrtypedata(device_t brdev, int b, int s, int f, pcicfgregs *cfg) 395 { 396 #define REG(n, w) PCIB_READ_CONFIG(brdev, b, s, f, n, w) 397 switch (cfg->hdrtype) { 398 case 0: 399 cfg->subvendor = REG(PCIR_SUBVEND_0, 2); 400 cfg->subdevice = REG(PCIR_SUBDEV_0, 2); 401 cfg->nummaps = PCI_MAXMAPS_0; 402 break; 403 case 1: 404 cfg->subvendor = REG(PCIR_SUBVEND_1, 2); 405 cfg->subdevice = REG(PCIR_SUBDEV_1, 2); 406 cfg->nummaps = PCI_MAXMAPS_1; 407 break; 408 case 2: 409 cfg->subvendor = REG(PCIR_SUBVEND_2, 2); 410 cfg->subdevice = REG(PCIR_SUBDEV_2, 2); 411 cfg->nummaps = PCI_MAXMAPS_2; 412 break; 413 } 414 #undef REG 415 } 416 417 static struct cardbus_devinfo * 418 cardbus_read_device(device_t brdev, int b, int s, int f) 419 { 420 #define REG(n, w) PCIB_READ_CONFIG(brdev, b, s, f, n, w) 421 pcicfgregs *cfg = NULL; 422 struct cardbus_devinfo *devlist_entry = NULL; 423 424 if (REG(PCIR_DEVVENDOR, 4) != 0xffffffff) { 425 devlist_entry = kmalloc(sizeof(struct cardbus_devinfo), 426 M_DEVBUF, M_WAITOK | M_ZERO); 427 if (devlist_entry == NULL) 428 return (NULL); 429 430 cfg = &devlist_entry->pci.cfg; 431 432 cfg->bus = b; 433 cfg->slot = s; 434 cfg->func = f; 435 cfg->vendor = REG(PCIR_VENDOR, 2); 436 cfg->device = REG(PCIR_DEVICE, 2); 437 cfg->cmdreg = REG(PCIR_COMMAND, 2); 438 cfg->statreg = REG(PCIR_STATUS, 2); 439 cfg->baseclass = REG(PCIR_CLASS, 1); 440 cfg->subclass = REG(PCIR_SUBCLASS, 1); 441 cfg->progif = REG(PCIR_PROGIF, 1); 442 cfg->revid = REG(PCIR_REVID, 1); 443 cfg->hdrtype = REG(PCIR_HDRTYPE, 1); 444 cfg->cachelnsz = REG(PCIR_CACHELNSZ, 1); 445 cfg->lattimer = REG(PCIR_LATTIMER, 1); 446 cfg->intpin = REG(PCIR_INTPIN, 1); 447 cfg->intline = REG(PCIR_INTLINE, 1); 448 449 cfg->mingnt = REG(PCIR_MINGNT, 1); 450 cfg->maxlat = REG(PCIR_MAXLAT, 1); 451 452 cfg->mfdev = (cfg->hdrtype & PCIM_MFDEV) != 0; 453 cfg->hdrtype &= ~PCIM_MFDEV; 454 455 cardbus_hdrtypedata(brdev, b, s, f, cfg); 456 457 if (REG(PCIR_STATUS, 2) & PCIM_STATUS_CAPPRESENT) 458 cardbus_read_extcap(brdev, cfg); 459 460 devlist_entry->pci.conf.pc_sel.pc_bus = cfg->bus; 461 devlist_entry->pci.conf.pc_sel.pc_dev = cfg->slot; 462 devlist_entry->pci.conf.pc_sel.pc_func = cfg->func; 463 devlist_entry->pci.conf.pc_hdr = cfg->hdrtype; 464 465 devlist_entry->pci.conf.pc_subvendor = cfg->subvendor; 466 devlist_entry->pci.conf.pc_subdevice = cfg->subdevice; 467 devlist_entry->pci.conf.pc_vendor = cfg->vendor; 468 devlist_entry->pci.conf.pc_device = cfg->device; 469 470 devlist_entry->pci.conf.pc_class = cfg->baseclass; 471 devlist_entry->pci.conf.pc_subclass = cfg->subclass; 472 devlist_entry->pci.conf.pc_progif = cfg->progif; 473 devlist_entry->pci.conf.pc_revid = cfg->revid; 474 } 475 return (devlist_entry); 476 #undef REG 477 } 478 479 /* free pcicfgregs structure and all depending data structures */ 480 481 static int 482 cardbus_freecfg(struct cardbus_devinfo *dinfo) 483 { 484 kfree(dinfo, M_DEVBUF); 485 486 return (0); 487 } 488 489 static void 490 cardbus_print_verbose(struct cardbus_devinfo *dinfo) 491 { 492 if (bootverbose || cardbus_debug > 0) 493 { 494 pcicfgregs *cfg = &dinfo->pci.cfg; 495 496 kprintf("found->\tvendor=0x%04x, dev=0x%04x, revid=0x%02x\n", 497 cfg->vendor, cfg->device, cfg->revid); 498 kprintf("\tclass=[%s]%02x-%02x-%02x, hdrtype=0x%02x, mfdev=%d\n", 499 pci_class_to_string(cfg->baseclass), 500 cfg->baseclass, cfg->subclass, cfg->progif, 501 cfg->hdrtype, cfg->mfdev); 502 kprintf("\tcmdreg=0x%04x, statreg=0x%04x, " 503 "cachelnsz=%d (dwords)\n", 504 cfg->cmdreg, cfg->statreg, cfg->cachelnsz); 505 kprintf("\tlattimer=0x%02x (%d ns), mingnt=0x%02x (%d ns), " 506 "maxlat=0x%02x (%d ns)\n", 507 cfg->lattimer, cfg->lattimer * 30, 508 cfg->mingnt, cfg->mingnt * 250, cfg->maxlat, 509 cfg->maxlat * 250); 510 if (cfg->intpin > 0) 511 kprintf("\tintpin=%c, irq=%d\n", 512 cfg->intpin + 'a' - 1, cfg->intline); 513 } 514 } 515 516 /************************************************************************/ 517 /* Resources */ 518 /************************************************************************/ 519 520 static int 521 cardbus_set_resource(device_t cbdev, device_t child, int type, int rid, 522 u_long start, u_long count, struct resource *res) 523 { 524 struct cardbus_devinfo *dinfo; 525 struct resource_list *rl; 526 struct resource_list_entry *rle; 527 528 if (device_get_parent(child) != cbdev) 529 return ENOENT; 530 531 dinfo = device_get_ivars(child); 532 rl = &dinfo->pci.resources; 533 rle = resource_list_find(rl, type, rid); 534 if (rle == NULL) { 535 resource_list_add(rl, type, rid, start, start + count - 1, 536 count); 537 if (res != NULL) { 538 rle = resource_list_find(rl, type, rid); 539 rle->res = res; 540 } 541 } else { 542 if (rle->res == NULL) { 543 } else if (rle->res->r_dev == cbdev && 544 (!(rman_get_flags(rle->res) & RF_ACTIVE))) { 545 int f; 546 f = rman_get_flags(rle->res); 547 bus_release_resource(cbdev, type, rid, res); 548 rle->res = bus_alloc_resource(cbdev, type, &rid, 549 start, start + count - 1, 550 count, f); 551 } else { 552 device_printf(cbdev, "set_resource: resource busy\n"); 553 return EBUSY; 554 } 555 rle->start = start; 556 rle->end = start + count - 1; 557 rle->count = count; 558 if (res != NULL) 559 rle->res = res; 560 } 561 if (device_get_parent(child) == cbdev) 562 pci_write_config(child, rid, start, 4); 563 return 0; 564 } 565 566 static int 567 cardbus_get_resource(device_t cbdev, device_t child, int type, int rid, 568 u_long *startp, u_long *countp) 569 { 570 struct cardbus_devinfo *dinfo; 571 struct resource_list *rl; 572 struct resource_list_entry *rle; 573 574 if (device_get_parent(child) != cbdev) 575 return ENOENT; 576 577 dinfo = device_get_ivars(child); 578 rl = &dinfo->pci.resources; 579 rle = resource_list_find(rl, type, rid); 580 if (!rle) 581 return ENOENT; 582 if (startp) 583 *startp = rle->start; 584 if (countp) 585 *countp = rle->count; 586 return 0; 587 } 588 589 static void 590 cardbus_delete_resource(device_t cbdev, device_t child, int type, int rid) 591 { 592 struct cardbus_devinfo *dinfo; 593 struct resource_list *rl; 594 struct resource_list_entry *rle; 595 596 if (device_get_parent(child) != cbdev) 597 return; 598 599 dinfo = device_get_ivars(child); 600 rl = &dinfo->pci.resources; 601 rle = resource_list_find(rl, type, rid); 602 if (rle) { 603 if (rle->res) { 604 if (rle->res->r_dev != cbdev || 605 rman_get_flags(rle->res) & RF_ACTIVE) { 606 device_printf(cbdev, "delete_resource: " 607 "Resource still owned by child, oops. " 608 "(type=%d, rid=%d, addr=%lx)\n", 609 rle->type, rle->rid, 610 rman_get_start(rle->res)); 611 return; 612 } 613 bus_release_resource(cbdev, type, rid, rle->res); 614 } 615 resource_list_delete(rl, type, rid); 616 } 617 if (device_get_parent(child) == cbdev) 618 pci_write_config(child, rid, 0, 4); 619 } 620 621 static int 622 cardbus_set_resource_method(device_t cbdev, device_t child, int type, int rid, 623 u_long start, u_long count) 624 { 625 int ret; 626 ret = cardbus_set_resource(cbdev, child, type, rid, start, count, NULL); 627 if (ret != 0) 628 return ret; 629 return BUS_SET_RESOURCE(device_get_parent(cbdev), child, type, rid, 630 start, count); 631 } 632 633 static int 634 cardbus_get_resource_method(device_t cbdev, device_t child, int type, int rid, 635 u_long *startp, u_long *countp) 636 { 637 int ret; 638 ret = cardbus_get_resource(cbdev, child, type, rid, startp, countp); 639 if (ret != 0) 640 return ret; 641 return BUS_GET_RESOURCE(device_get_parent(cbdev), child, type, rid, 642 startp, countp); 643 } 644 645 static void 646 cardbus_delete_resource_method(device_t cbdev, device_t child, 647 int type, int rid) 648 { 649 cardbus_delete_resource(cbdev, child, type, rid); 650 BUS_DELETE_RESOURCE(device_get_parent(cbdev), child, type, rid); 651 } 652 653 static void 654 cardbus_release_all_resources(device_t cbdev, struct cardbus_devinfo *dinfo) 655 { 656 struct resource_list_entry *rle; 657 658 /* Free all allocated resources */ 659 SLIST_FOREACH(rle, &dinfo->pci.resources, link) { 660 if (rle->res) { 661 if (rle->res->r_dev != cbdev) 662 device_printf(cbdev, "release_all_resource: " 663 "Resource still owned by child, oops. " 664 "(type=%d, rid=%d, addr=%lx)\n", 665 rle->type, rle->rid, 666 rman_get_start(rle->res)); 667 BUS_RELEASE_RESOURCE(device_get_parent(cbdev), 668 rle->res->r_dev, 669 rle->type, rle->rid, 670 rle->res); 671 rle->res = NULL; 672 /* 673 * zero out config so the card won't acknowledge 674 * access to the space anymore 675 */ 676 pci_write_config(dinfo->pci.cfg.dev, rle->rid, 0, 4); 677 } 678 } 679 resource_list_free(&dinfo->pci.resources); 680 } 681 682 static struct resource * 683 cardbus_alloc_resource(device_t cbdev, device_t child, int type, 684 int *rid, u_long start, u_long end, u_long count, u_int flags) 685 { 686 struct cardbus_devinfo *dinfo; 687 struct resource_list_entry *rle = 0; 688 int passthrough = (device_get_parent(child) != cbdev); 689 690 if (passthrough) { 691 return (BUS_ALLOC_RESOURCE(device_get_parent(cbdev), child, 692 type, rid, start, end, count, flags)); 693 } 694 695 dinfo = device_get_ivars(child); 696 rle = resource_list_find(&dinfo->pci.resources, type, *rid); 697 698 if (!rle) 699 return NULL; /* no resource of that type/rid */ 700 701 if (!rle->res) { 702 device_printf(cbdev, "WARNING: Resource not reserved by bus\n"); 703 return NULL; 704 } else { 705 /* Release the cardbus hold on the resource */ 706 if (rle->res->r_dev != cbdev) 707 return NULL; 708 bus_release_resource(cbdev, type, *rid, rle->res); 709 rle->res = NULL; 710 switch (type) { 711 case SYS_RES_IOPORT: 712 case SYS_RES_MEMORY: 713 if (!(flags & RF_ALIGNMENT_MASK)) 714 flags |= rman_make_alignment_flags(rle->count); 715 break; 716 case SYS_RES_IRQ: 717 flags |= RF_SHAREABLE; 718 break; 719 } 720 /* Allocate the resource to the child */ 721 return resource_list_alloc(&dinfo->pci.resources, cbdev, child, 722 type, rid, rle->start, rle->end, rle->count, flags); 723 } 724 } 725 726 static int 727 cardbus_release_resource(device_t cbdev, device_t child, int type, int rid, 728 struct resource *r) 729 { 730 struct cardbus_devinfo *dinfo; 731 int passthrough = (device_get_parent(child) != cbdev); 732 struct resource_list_entry *rle = 0; 733 int flags; 734 int ret; 735 736 if (passthrough) { 737 return BUS_RELEASE_RESOURCE(device_get_parent(cbdev), child, 738 type, rid, r); 739 } 740 741 dinfo = device_get_ivars(child); 742 /* 743 * According to the PCI 2.2 spec, devices may share an address 744 * decoder between memory mapped ROM access and memory 745 * mapped register access. To be safe, disable ROM access 746 * whenever it is released. 747 */ 748 if (rid == CARDBUS_ROM_REG) { 749 uint32_t rom_reg; 750 751 rom_reg = pci_read_config(child, rid, 4); 752 rom_reg &= ~CARDBUS_ROM_ENABLE; 753 pci_write_config(child, rid, rom_reg, 4); 754 } 755 756 rle = resource_list_find(&dinfo->pci.resources, type, rid); 757 758 if (!rle) { 759 device_printf(cbdev, "Allocated resource not found\n"); 760 return ENOENT; 761 } 762 if (!rle->res) { 763 device_printf(cbdev, "Allocated resource not recorded\n"); 764 return ENOENT; 765 } 766 767 ret = BUS_RELEASE_RESOURCE(device_get_parent(cbdev), child, 768 type, rid, r); 769 switch (type) { 770 case SYS_RES_IOPORT: 771 case SYS_RES_MEMORY: 772 flags = rman_make_alignment_flags(rle->count); 773 break; 774 case SYS_RES_IRQ: 775 flags = RF_SHAREABLE; 776 break; 777 default: 778 flags = 0; 779 } 780 /* Restore cardbus hold on the resource */ 781 rle->res = bus_alloc_resource(cbdev, type, &rid, 782 rle->start, rle->end, rle->count, flags); 783 if (rle->res == NULL) 784 device_printf(cbdev, "release_resource: " 785 "unable to reacquire resource\n"); 786 return ret; 787 } 788 789 static int 790 cardbus_setup_intr(device_t cbdev, device_t child, struct resource *irq, 791 int flags, driver_intr_t *intr, void *arg, 792 void **cookiep, lwkt_serialize_t serializer) 793 { 794 int ret; 795 device_t cdev; 796 struct cardbus_devinfo *dinfo; 797 798 ret = bus_generic_setup_intr(cbdev, child, irq, flags, intr, arg, 799 cookiep, serializer); 800 if (ret != 0) 801 return ret; 802 803 for (cdev = child; cbdev != device_get_parent(cdev); 804 cdev = device_get_parent(cdev)) 805 /* NOTHING */; 806 dinfo = device_get_ivars(cdev); 807 808 return 0; 809 } 810 811 static int 812 cardbus_teardown_intr(device_t cbdev, device_t child, struct resource *irq, 813 void *cookie) 814 { 815 int ret; 816 device_t cdev; 817 struct cardbus_devinfo *dinfo; 818 819 ret = bus_generic_teardown_intr(cbdev, child, irq, cookie); 820 if (ret != 0) 821 return ret; 822 823 for (cdev = child; cbdev != device_get_parent(cdev); 824 cdev = device_get_parent(cdev)) 825 /* NOTHING */; 826 dinfo = device_get_ivars(cdev); 827 828 return (0); 829 } 830 831 832 /************************************************************************/ 833 /* Other Bus Methods */ 834 /************************************************************************/ 835 836 static int 837 cardbus_print_resources(struct resource_list *rl, const char *name, 838 int type, const char *format) 839 { 840 struct resource_list_entry *rle; 841 int printed, retval; 842 843 printed = 0; 844 retval = 0; 845 /* Yes, this is kinda cheating */ 846 SLIST_FOREACH(rle, rl, link) { 847 if (rle->type == type) { 848 if (printed == 0) 849 retval += kprintf(" %s ", name); 850 else if (printed > 0) 851 retval += kprintf(","); 852 printed++; 853 retval += kprintf(format, rle->start); 854 if (rle->count > 1) { 855 retval += kprintf("-"); 856 retval += kprintf(format, rle->start + 857 rle->count - 1); 858 } 859 } 860 } 861 return retval; 862 } 863 864 static int 865 cardbus_print_child(device_t cbdev, device_t child) 866 { 867 struct cardbus_devinfo *dinfo; 868 struct resource_list *rl; 869 pcicfgregs *cfg; 870 int retval = 0; 871 872 dinfo = device_get_ivars(child); 873 cfg = &dinfo->pci.cfg; 874 rl = &dinfo->pci.resources; 875 876 retval += bus_print_child_header(cbdev, child); 877 878 retval += cardbus_print_resources(rl, "port", SYS_RES_IOPORT, "%#lx"); 879 retval += cardbus_print_resources(rl, "mem", SYS_RES_MEMORY, "%#lx"); 880 retval += cardbus_print_resources(rl, "irq", SYS_RES_IRQ, "%ld"); 881 if (device_get_flags(cbdev)) 882 retval += kprintf(" flags %#x", device_get_flags(cbdev)); 883 884 retval += kprintf(" at device %d.%d", pci_get_slot(child), 885 pci_get_function(child)); 886 887 retval += bus_print_child_footer(cbdev, child); 888 889 return (retval); 890 } 891 892 static void 893 cardbus_probe_nomatch(device_t cbdev, device_t child) 894 { 895 struct cardbus_devinfo *dinfo; 896 pcicfgregs *cfg; 897 898 dinfo = device_get_ivars(child); 899 cfg = &dinfo->pci.cfg; 900 device_printf(cbdev, "<unknown card>"); 901 kprintf(" (vendor=0x%04x, dev=0x%04x)", cfg->vendor, cfg->device); 902 kprintf(" at %d.%d", pci_get_slot(child), pci_get_function(child)); 903 if (cfg->intpin > 0 && cfg->intline != 255) { 904 kprintf(" irq %d", cfg->intline); 905 } 906 kprintf("\n"); 907 908 return; 909 } 910 911 static int 912 cardbus_child_location_str(device_t cbdev, device_t child, char *buf, 913 size_t buflen) 914 { 915 struct cardbus_devinfo *dinfo; 916 pcicfgregs *cfg; 917 918 dinfo = device_get_ivars(child); 919 cfg = &dinfo->pci.cfg; 920 ksnprintf(buf, buflen, "slot=%d function=%d", pci_get_slot(child), 921 pci_get_function(child)); 922 return (0); 923 } 924 925 static int 926 cardbus_child_pnpinfo_str(device_t cbdev, device_t child, char *buf, 927 size_t buflen) 928 { 929 struct cardbus_devinfo *dinfo; 930 pcicfgregs *cfg; 931 932 dinfo = device_get_ivars(child); 933 cfg = &dinfo->pci.cfg; 934 ksnprintf(buf, buflen, "vendor=0x%04x device=0x%04x subvendor=0x%04x " 935 "subdevice=0x%04x", cfg->vendor, cfg->device, cfg->subvendor, 936 cfg->subdevice); 937 return (0); 938 } 939 940 static int 941 cardbus_read_ivar(device_t cbdev, device_t child, int which, u_long *result) 942 { 943 struct cardbus_devinfo *dinfo; 944 pcicfgregs *cfg; 945 946 dinfo = device_get_ivars(child); 947 cfg = &dinfo->pci.cfg; 948 949 switch (which) { 950 case PCI_IVAR_ETHADDR: 951 /* 952 * The generic accessor doesn't deal with failure, so 953 * we set the return value, then return an error. 954 */ 955 if ((dinfo->fepresent & (1 << TPL_FUNCE_LAN_NID)) == 0) { 956 *((u_int8_t **) result) = NULL; 957 return (EINVAL); 958 } 959 *((u_int8_t **) result) = dinfo->funce.lan.nid; 960 break; 961 case PCI_IVAR_SUBVENDOR: 962 *result = cfg->subvendor; 963 break; 964 case PCI_IVAR_SUBDEVICE: 965 *result = cfg->subdevice; 966 break; 967 case PCI_IVAR_VENDOR: 968 *result = cfg->vendor; 969 break; 970 case PCI_IVAR_DEVICE: 971 *result = cfg->device; 972 break; 973 case PCI_IVAR_DEVID: 974 *result = (cfg->device << 16) | cfg->vendor; 975 break; 976 case PCI_IVAR_CLASS: 977 *result = cfg->baseclass; 978 break; 979 case PCI_IVAR_SUBCLASS: 980 *result = cfg->subclass; 981 break; 982 case PCI_IVAR_PROGIF: 983 *result = cfg->progif; 984 break; 985 case PCI_IVAR_REVID: 986 *result = cfg->revid; 987 break; 988 case PCI_IVAR_INTPIN: 989 *result = cfg->intpin; 990 break; 991 case PCI_IVAR_IRQ: 992 *result = cfg->intline; 993 break; 994 case PCI_IVAR_BUS: 995 *result = cfg->bus; 996 break; 997 case PCI_IVAR_SLOT: 998 *result = cfg->slot; 999 break; 1000 case PCI_IVAR_FUNCTION: 1001 *result = cfg->func; 1002 break; 1003 default: 1004 return ENOENT; 1005 } 1006 return 0; 1007 } 1008 1009 static int 1010 cardbus_write_ivar(device_t cbdev, device_t child, int which, uintptr_t value) 1011 { 1012 struct cardbus_devinfo *dinfo; 1013 pcicfgregs *cfg; 1014 1015 dinfo = device_get_ivars(child); 1016 cfg = &dinfo->pci.cfg; 1017 1018 switch (which) { 1019 case PCI_IVAR_ETHADDR: 1020 case PCI_IVAR_SUBVENDOR: 1021 case PCI_IVAR_SUBDEVICE: 1022 case PCI_IVAR_VENDOR: 1023 case PCI_IVAR_DEVICE: 1024 case PCI_IVAR_DEVID: 1025 case PCI_IVAR_CLASS: 1026 case PCI_IVAR_SUBCLASS: 1027 case PCI_IVAR_PROGIF: 1028 case PCI_IVAR_REVID: 1029 case PCI_IVAR_INTPIN: 1030 case PCI_IVAR_IRQ: 1031 case PCI_IVAR_BUS: 1032 case PCI_IVAR_SLOT: 1033 case PCI_IVAR_FUNCTION: 1034 return EINVAL; /* disallow for now */ 1035 default: 1036 return ENOENT; 1037 } 1038 return 0; 1039 } 1040 1041 /************************************************************************/ 1042 /* Compatibility with PCI bus (XXX: Do we need this?) */ 1043 /************************************************************************/ 1044 1045 /* 1046 * PCI power manangement 1047 */ 1048 static int 1049 cardbus_set_powerstate_method(device_t cbdev, device_t child, int state) 1050 { 1051 struct cardbus_devinfo *dinfo = device_get_ivars(child); 1052 pcicfgregs *cfg = &dinfo->pci.cfg; 1053 u_int16_t status; 1054 int result; 1055 1056 if (cfg->pp_cap != 0) { 1057 status = PCI_READ_CONFIG(cbdev, child, cfg->pp_status, 2) 1058 & ~PCIM_PSTAT_DMASK; 1059 result = 0; 1060 switch (state) { 1061 case PCI_POWERSTATE_D0: 1062 status |= PCIM_PSTAT_D0; 1063 break; 1064 case PCI_POWERSTATE_D1: 1065 if (cfg->pp_cap & PCIM_PCAP_D1SUPP) { 1066 status |= PCIM_PSTAT_D1; 1067 } else { 1068 result = EOPNOTSUPP; 1069 } 1070 break; 1071 case PCI_POWERSTATE_D2: 1072 if (cfg->pp_cap & PCIM_PCAP_D2SUPP) { 1073 status |= PCIM_PSTAT_D2; 1074 } else { 1075 result = EOPNOTSUPP; 1076 } 1077 break; 1078 case PCI_POWERSTATE_D3: 1079 status |= PCIM_PSTAT_D3; 1080 break; 1081 default: 1082 result = EINVAL; 1083 } 1084 if (result == 0) 1085 PCI_WRITE_CONFIG(cbdev, child, cfg->pp_status, 1086 status, 2); 1087 } else { 1088 result = ENXIO; 1089 } 1090 return (result); 1091 } 1092 1093 static int 1094 cardbus_get_powerstate_method(device_t cbdev, device_t child) 1095 { 1096 struct cardbus_devinfo *dinfo = device_get_ivars(child); 1097 pcicfgregs *cfg = &dinfo->pci.cfg; 1098 u_int16_t status; 1099 int result; 1100 1101 if (cfg->pp_cap != 0) { 1102 status = PCI_READ_CONFIG(cbdev, child, cfg->pp_status, 2); 1103 switch (status & PCIM_PSTAT_DMASK) { 1104 case PCIM_PSTAT_D0: 1105 result = PCI_POWERSTATE_D0; 1106 break; 1107 case PCIM_PSTAT_D1: 1108 result = PCI_POWERSTATE_D1; 1109 break; 1110 case PCIM_PSTAT_D2: 1111 result = PCI_POWERSTATE_D2; 1112 break; 1113 case PCIM_PSTAT_D3: 1114 result = PCI_POWERSTATE_D3; 1115 break; 1116 default: 1117 result = PCI_POWERSTATE_UNKNOWN; 1118 break; 1119 } 1120 } else { 1121 /* No support, device is always at D0 */ 1122 result = PCI_POWERSTATE_D0; 1123 } 1124 return (result); 1125 } 1126 1127 static u_int32_t 1128 cardbus_read_config_method(device_t cbdev, device_t child, int reg, int width) 1129 { 1130 struct cardbus_devinfo *dinfo = device_get_ivars(child); 1131 pcicfgregs *cfg = &dinfo->pci.cfg; 1132 1133 return PCIB_READ_CONFIG(device_get_parent(cbdev), 1134 cfg->bus, cfg->slot, cfg->func, reg, width); 1135 } 1136 1137 static void 1138 cardbus_write_config_method(device_t cbdev, device_t child, int reg, 1139 u_int32_t val, int width) 1140 { 1141 struct cardbus_devinfo *dinfo = device_get_ivars(child); 1142 pcicfgregs *cfg = &dinfo->pci.cfg; 1143 1144 PCIB_WRITE_CONFIG(device_get_parent(cbdev), 1145 cfg->bus, cfg->slot, cfg->func, reg, val, width); 1146 } 1147 1148 static __inline void 1149 cardbus_set_command_bit(device_t cbdev, device_t child, u_int16_t bit) 1150 { 1151 u_int16_t command; 1152 1153 command = PCI_READ_CONFIG(cbdev, child, PCIR_COMMAND, 2); 1154 command |= bit; 1155 PCI_WRITE_CONFIG(cbdev, child, PCIR_COMMAND, command, 2); 1156 } 1157 1158 static __inline void 1159 cardbus_clear_command_bit(device_t cbdev, device_t child, u_int16_t bit) 1160 { 1161 u_int16_t command; 1162 1163 command = PCI_READ_CONFIG(cbdev, child, PCIR_COMMAND, 2); 1164 command &= ~bit; 1165 PCI_WRITE_CONFIG(cbdev, child, PCIR_COMMAND, command, 2); 1166 } 1167 1168 static void 1169 cardbus_enable_busmaster_method(device_t cbdev, device_t child) 1170 { 1171 cardbus_set_command_bit(cbdev, child, PCIM_CMD_BUSMASTEREN); 1172 } 1173 1174 static void 1175 cardbus_disable_busmaster_method(device_t cbdev, device_t child) 1176 { 1177 cardbus_clear_command_bit(cbdev, child, PCIM_CMD_BUSMASTEREN); 1178 } 1179 1180 static void 1181 cardbus_enable_io_method(device_t cbdev, device_t child, int space) 1182 { 1183 switch (space) { 1184 case SYS_RES_IOPORT: 1185 cardbus_set_command_bit(cbdev, child, PCIM_CMD_PORTEN); 1186 break; 1187 case SYS_RES_MEMORY: 1188 cardbus_set_command_bit(cbdev, child, PCIM_CMD_MEMEN); 1189 break; 1190 } 1191 } 1192 1193 static void 1194 cardbus_disable_io_method(device_t cbdev, device_t child, int space) 1195 { 1196 switch (space) { 1197 case SYS_RES_IOPORT: 1198 cardbus_clear_command_bit(cbdev, child, PCIM_CMD_PORTEN); 1199 break; 1200 case SYS_RES_MEMORY: 1201 cardbus_clear_command_bit(cbdev, child, PCIM_CMD_MEMEN); 1202 break; 1203 } 1204 } 1205 1206 static device_method_t cardbus_methods[] = { 1207 /* Device interface */ 1208 DEVMETHOD(device_probe, cardbus_probe), 1209 DEVMETHOD(device_attach, cardbus_attach), 1210 DEVMETHOD(device_detach, cardbus_detach), 1211 DEVMETHOD(device_shutdown, bus_generic_shutdown), 1212 DEVMETHOD(device_suspend, cardbus_suspend), 1213 DEVMETHOD(device_resume, cardbus_resume), 1214 1215 /* Bus interface */ 1216 DEVMETHOD(bus_print_child, cardbus_print_child), 1217 DEVMETHOD(bus_probe_nomatch, cardbus_probe_nomatch), 1218 DEVMETHOD(bus_read_ivar, cardbus_read_ivar), 1219 DEVMETHOD(bus_write_ivar, cardbus_write_ivar), 1220 DEVMETHOD(bus_driver_added, cardbus_driver_added), 1221 DEVMETHOD(bus_alloc_resource, cardbus_alloc_resource), 1222 DEVMETHOD(bus_release_resource, cardbus_release_resource), 1223 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 1224 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 1225 DEVMETHOD(bus_setup_intr, cardbus_setup_intr), 1226 DEVMETHOD(bus_teardown_intr, cardbus_teardown_intr), 1227 1228 DEVMETHOD(bus_set_resource, cardbus_set_resource_method), 1229 DEVMETHOD(bus_get_resource, cardbus_get_resource_method), 1230 DEVMETHOD(bus_delete_resource, cardbus_delete_resource_method), 1231 DEVMETHOD(bus_child_pnpinfo_str, cardbus_child_pnpinfo_str), 1232 DEVMETHOD(bus_child_location_str, cardbus_child_location_str), 1233 1234 /* Card Interface */ 1235 DEVMETHOD(card_attach_card, cardbus_attach_card), 1236 DEVMETHOD(card_detach_card, cardbus_detach_card), 1237 DEVMETHOD(card_cis_read, cardbus_cis_read), 1238 DEVMETHOD(card_cis_free, cardbus_cis_free), 1239 1240 /* Cardbus/PCI interface */ 1241 DEVMETHOD(pci_read_config, cardbus_read_config_method), 1242 DEVMETHOD(pci_write_config, cardbus_write_config_method), 1243 DEVMETHOD(pci_enable_busmaster, cardbus_enable_busmaster_method), 1244 DEVMETHOD(pci_disable_busmaster, cardbus_disable_busmaster_method), 1245 DEVMETHOD(pci_enable_io, cardbus_enable_io_method), 1246 DEVMETHOD(pci_disable_io, cardbus_disable_io_method), 1247 DEVMETHOD(pci_get_powerstate, cardbus_get_powerstate_method), 1248 DEVMETHOD(pci_set_powerstate, cardbus_set_powerstate_method), 1249 1250 {0,0} 1251 }; 1252 1253 static driver_t cardbus_driver = { 1254 "cardbus", 1255 cardbus_methods, 1256 0 /* no softc */ 1257 }; 1258 1259 static devclass_t cardbus_devclass; 1260 1261 DRIVER_MODULE(cardbus, cbb, cardbus_driver, cardbus_devclass, 0, 0); 1262 MODULE_VERSION(cardbus, 1); 1263 MODULE_DEPEND(cardbus, exca, 1, 1, 1); 1264 /* 1265 MODULE_DEPEND(cardbus, pccbb, 1, 1, 1); 1266 */ 1267