1 /* 2 * Copyright (c) 2002 M. Warner Losh. 3 * Copyright (c) 2000,2001 Jonathan Chen. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions, and the following disclaimer, 11 * without modification, immediately at the beginning of the file. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in 14 * the documentation and/or other materials provided with the 15 * distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/dev/pccbb/pccbb.c,v 1.64 2002/11/23 23:09:45 imp Exp $ 30 * $DragonFly: src/sys/dev/pccard/pccbb/pccbb.c,v 1.16 2006/05/14 17:28:36 dillon Exp $ 31 */ 32 33 /* 34 * Copyright (c) 1998, 1999 and 2000 35 * HAYAKAWA Koichi. All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by HAYAKAWA Koichi. 48 * 4. The name of the author may not be used to endorse or promote products 49 * derived from this software without specific prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 52 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 53 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 54 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 55 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 56 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 60 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 */ 62 63 /* 64 * Driver for PCI to CardBus Bridge chips 65 * 66 * References: 67 * TI Datasheets: 68 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 69 * 70 * Written by Jonathan Chen <jon@freebsd.org> 71 * The author would like to acknowledge: 72 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 73 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 74 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 75 * * David Cross: Author of the initial ugly hack for a specific cardbus card 76 */ 77 78 #include <sys/param.h> 79 #include <sys/systm.h> 80 #include <sys/proc.h> 81 #include <sys/errno.h> 82 #include <sys/interrupt.h> 83 #include <sys/kernel.h> 84 #include <sys/lock.h> 85 #include <sys/malloc.h> 86 #include <sys/sysctl.h> 87 #include <sys/kthread.h> 88 #include <sys/bus.h> 89 #include <machine/bus.h> 90 #include <sys/rman.h> 91 #include <machine/resource.h> 92 93 #include <bus/pci/pcireg.h> 94 #include <bus/pci/pcivar.h> 95 #include <machine/clock.h> 96 97 #include <bus/pccard/pccardreg.h> 98 #include <bus/pccard/pccardvar.h> 99 100 #include <dev/pccard/exca/excareg.h> 101 #include <dev/pccard/exca/excavar.h> 102 103 #include <dev/pccard/pccbb/pccbbreg.h> 104 #include <dev/pccard/pccbb/pccbbvar.h> 105 106 #include "power_if.h" 107 #include "card_if.h" 108 #include "pcib_if.h" 109 110 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 111 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 112 113 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 114 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 115 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 116 pci_write_config(DEV, REG, ( \ 117 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 118 119 #define CBB_START_MEM 0x88000000 120 #define CBB_START_32_IO 0x1000 121 #define CBB_START_16_IO 0x100 122 123 struct yenta_chipinfo { 124 uint32_t yc_id; 125 const char *yc_name; 126 int yc_chiptype; 127 } yc_chipsets[] = { 128 /* Texas Instruments chips */ 129 {PCIC_ID_TI1031, "TI1031 PCI-PC Card Bridge", CB_TI113X}, 130 {PCIC_ID_TI1130, "TI1130 PCI-CardBus Bridge", CB_TI113X}, 131 {PCIC_ID_TI1131, "TI1131 PCI-CardBus Bridge", CB_TI113X}, 132 133 {PCIC_ID_TI1210, "TI1210 PCI-CardBus Bridge", CB_TI12XX}, 134 {PCIC_ID_TI1211, "TI1211 PCI-CardBus Bridge", CB_TI12XX}, 135 {PCIC_ID_TI1220, "TI1220 PCI-CardBus Bridge", CB_TI12XX}, 136 {PCIC_ID_TI1221, "TI1221 PCI-CardBus Bridge", CB_TI12XX}, 137 {PCIC_ID_TI1225, "TI1225 PCI-CardBus Bridge", CB_TI12XX}, 138 {PCIC_ID_TI1250, "TI1250 PCI-CardBus Bridge", CB_TI125X}, 139 {PCIC_ID_TI1251, "TI1251 PCI-CardBus Bridge", CB_TI125X}, 140 {PCIC_ID_TI1251B,"TI1251B PCI-CardBus Bridge",CB_TI125X}, 141 {PCIC_ID_TI1260, "TI1260 PCI-CardBus Bridge", CB_TI12XX}, 142 {PCIC_ID_TI1260B,"TI1260B PCI-CardBus Bridge",CB_TI12XX}, 143 {PCIC_ID_TI1410, "TI1410 PCI-CardBus Bridge", CB_TI12XX}, 144 {PCIC_ID_TI1420, "TI1420 PCI-CardBus Bridge", CB_TI12XX}, 145 {PCIC_ID_TI1421, "TI1421 PCI-CardBus Bridge", CB_TI12XX}, 146 {PCIC_ID_TI1450, "TI1450 PCI-CardBus Bridge", CB_TI125X}, /*SIC!*/ 147 {PCIC_ID_TI1451, "TI1451 PCI-CardBus Bridge", CB_TI12XX}, 148 {PCIC_ID_TI1510, "TI1510 PCI-CardBus Bridge", CB_TI12XX}, 149 {PCIC_ID_TI1520, "TI1520 PCI-CardBus Bridge", CB_TI12XX}, 150 {PCIC_ID_TI4410, "TI4410 PCI-CardBus Bridge", CB_TI12XX}, 151 {PCIC_ID_TI4450, "TI4450 PCI-CardBus Bridge", CB_TI12XX}, 152 {PCIC_ID_TI4451, "TI4451 PCI-CardBus Bridge", CB_TI12XX}, 153 {PCIC_ID_TI4510, "TI4510 PCI-CardBus Bridge", CB_TI12XX}, 154 155 /* Ricoh chips */ 156 {PCIC_ID_RICOH_RL5C465, "RF5C465 PCI-CardBus Bridge", CB_RF5C46X}, 157 {PCIC_ID_RICOH_RL5C466, "RF5C466 PCI-CardBus Bridge", CB_RF5C46X}, 158 {PCIC_ID_RICOH_RL5C475, "RF5C475 PCI-CardBus Bridge", CB_RF5C47X}, 159 {PCIC_ID_RICOH_RL5C476, "RF5C476 PCI-CardBus Bridge", CB_RF5C47X}, 160 {PCIC_ID_RICOH_RL5C477, "RF5C477 PCI-CardBus Bridge", CB_RF5C47X}, 161 {PCIC_ID_RICOH_RL5C478, "RF5C478 PCI-CardBus Bridge", CB_RF5C47X}, 162 163 /* Toshiba products */ 164 {PCIC_ID_TOPIC95, "ToPIC95 PCI-CardBus Bridge", CB_TOPIC95}, 165 {PCIC_ID_TOPIC95B, "ToPIC95B PCI-CardBus Bridge", CB_TOPIC95}, 166 {PCIC_ID_TOPIC97, "ToPIC97 PCI-CardBus Bridge", CB_TOPIC97}, 167 {PCIC_ID_TOPIC100, "ToPIC100 PCI-CardBus Bridge", CB_TOPIC97}, 168 169 /* Cirrus Logic */ 170 {PCIC_ID_CLPD6832, "CLPD6832 PCI-CardBus Bridge", CB_CIRRUS}, 171 {PCIC_ID_CLPD6833, "CLPD6833 PCI-CardBus Bridge", CB_CIRRUS}, 172 {PCIC_ID_CLPD6834, "CLPD6834 PCI-CardBus Bridge", CB_CIRRUS}, 173 174 /* 02Micro */ 175 {PCIC_ID_OZ6832, "O2Micro OZ6832/6833 PCI-CardBus Bridge", CB_CIRRUS}, 176 {PCIC_ID_OZ6860, "O2Micro OZ6836/6860 PCI-CardBus Bridge", CB_CIRRUS}, 177 {PCIC_ID_OZ6872, "O2Micro OZ6812/6872 PCI-CardBus Bridge", CB_CIRRUS}, 178 {PCIC_ID_OZ6912, "O2Micro OZ6912/6972 PCI-CardBus Bridge", CB_CIRRUS}, 179 {PCIC_ID_OZ6922, "O2Micro OZ6922 PCI-CardBus Bridge", CB_CIRRUS}, 180 {PCIC_ID_OZ6933, "O2Micro OZ6933 PCI-CardBus Bridge", CB_CIRRUS}, 181 182 /* sentinel */ 183 {0 /* null id */, "unknown", CB_UNKNOWN}, 184 }; 185 186 /* sysctl vars */ 187 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters"); 188 189 /* There's no way to say TUNEABLE_LONG to get the right types */ 190 u_long cbb_start_mem = CBB_START_MEM; 191 TUNABLE_INT("hw.cbb.start_memory", (int *)&cbb_start_mem); 192 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW, 193 &cbb_start_mem, CBB_START_MEM, 194 "Starting address for memory allocations"); 195 196 u_long cbb_start_16_io = CBB_START_16_IO; 197 TUNABLE_INT("hw.cbb.start_16_io", (int *)&cbb_start_16_io); 198 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW, 199 &cbb_start_16_io, CBB_START_16_IO, 200 "Starting ioport for 16-bit cards"); 201 202 u_long cbb_start_32_io = CBB_START_32_IO; 203 TUNABLE_INT("hw.cbb.start_32_io", (int *)&cbb_start_32_io); 204 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW, 205 &cbb_start_32_io, CBB_START_32_IO, 206 "Starting ioport for 32-bit cards"); 207 208 int cbb_debug = 0; 209 TUNABLE_INT("hw.cbb.debug", &cbb_debug); 210 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0, 211 "Verbose cardbus bridge debugging"); 212 213 static int cbb_chipset(uint32_t pci_id, const char **namep); 214 static int cbb_probe(device_t brdev); 215 static void cbb_chipinit(struct cbb_softc *sc); 216 static int cbb_attach(device_t brdev); 217 static void cbb_release_helper(device_t brdev); 218 static int cbb_detach(device_t brdev); 219 static int cbb_shutdown(device_t brdev); 220 static void cbb_driver_added(device_t brdev, driver_t *driver); 221 static void cbb_child_detached(device_t brdev, device_t child); 222 static void cbb_event_thread(void *arg); 223 static void cbb_insert(struct cbb_softc *sc); 224 static void cbb_removal(struct cbb_softc *sc); 225 static void cbb_intr(void *arg); 226 static int cbb_detect_voltage(device_t brdev); 227 static int cbb_power(device_t brdev, int volts); 228 static void cbb_cardbus_reset(device_t brdev); 229 static int cbb_cardbus_power_enable_socket(device_t brdev, 230 device_t child); 231 static void cbb_cardbus_power_disable_socket(device_t brdev, 232 device_t child); 233 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 234 uint32_t end); 235 static int cbb_cardbus_mem_open(device_t brdev, int win, 236 uint32_t start, uint32_t end); 237 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 238 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 239 int type, int rid, struct resource *res); 240 static int cbb_cardbus_deactivate_resource(device_t brdev, 241 device_t child, int type, int rid, struct resource *res); 242 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 243 device_t child, int type, int *rid, u_long start, 244 u_long end, u_long count, uint flags); 245 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 246 int type, int rid, struct resource *res); 247 static int cbb_power_enable_socket(device_t brdev, device_t child); 248 static void cbb_power_disable_socket(device_t brdev, device_t child); 249 static int cbb_activate_resource(device_t brdev, device_t child, 250 int type, int rid, struct resource *r); 251 static int cbb_deactivate_resource(device_t brdev, device_t child, 252 int type, int rid, struct resource *r); 253 static struct resource *cbb_alloc_resource(device_t brdev, device_t child, 254 int type, int *rid, u_long start, u_long end, u_long count, 255 uint flags); 256 static int cbb_release_resource(device_t brdev, device_t child, 257 int type, int rid, struct resource *r); 258 static int cbb_read_ivar(device_t brdev, device_t child, int which, 259 uintptr_t *result); 260 static int cbb_write_ivar(device_t brdev, device_t child, int which, 261 uintptr_t value); 262 static int cbb_maxslots(device_t brdev); 263 static uint32_t cbb_read_config(device_t brdev, int b, int s, int f, 264 int reg, int width); 265 static void cbb_write_config(device_t brdev, int b, int s, int f, 266 int reg, uint32_t val, int width); 267 268 /* 269 */ 270 static __inline void 271 cbb_set(struct cbb_softc *sc, uint32_t reg, uint32_t val) 272 { 273 bus_space_write_4(sc->bst, sc->bsh, reg, val); 274 } 275 276 static __inline uint32_t 277 cbb_get(struct cbb_softc *sc, uint32_t reg) 278 { 279 return (bus_space_read_4(sc->bst, sc->bsh, reg)); 280 } 281 282 static __inline void 283 cbb_setb(struct cbb_softc *sc, uint32_t reg, uint32_t bits) 284 { 285 cbb_set(sc, reg, cbb_get(sc, reg) | bits); 286 } 287 288 static __inline void 289 cbb_clrb(struct cbb_softc *sc, uint32_t reg, uint32_t bits) 290 { 291 cbb_set(sc, reg, cbb_get(sc, reg) & ~bits); 292 } 293 294 static void 295 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 296 { 297 struct cbb_reslist *rle; 298 299 SLIST_FOREACH(rle, &sc->rl, link) { 300 if (rle->res == res) { 301 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 302 free(rle, M_DEVBUF); 303 return; 304 } 305 } 306 } 307 308 static struct resource * 309 cbb_find_res(struct cbb_softc *sc, int type, int rid) 310 { 311 struct cbb_reslist *rle; 312 313 SLIST_FOREACH(rle, &sc->rl, link) 314 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 315 return (rle->res); 316 return (NULL); 317 } 318 319 static int 320 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 321 int rid) 322 { 323 struct cbb_reslist *rle; 324 325 /* 326 * Need to record allocated resource so we can iterate through 327 * it later. 328 */ 329 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 330 if (rle == NULL) 331 return (ENOMEM); 332 rle->res = res; 333 rle->type = type; 334 rle->rid = rid; 335 SLIST_INSERT_HEAD(&sc->rl, rle, link); 336 return (0); 337 } 338 339 static void 340 cbb_destroy_res(struct cbb_softc *sc) 341 { 342 struct cbb_reslist *rle; 343 344 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 345 device_printf(sc->dev, "Danger Will Robinson: Resource " 346 "left allocated! This is a bug... " 347 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type, 348 rman_get_start(rle->res)); 349 SLIST_REMOVE_HEAD(&sc->rl, link); 350 free(rle, M_DEVBUF); 351 } 352 } 353 354 /************************************************************************/ 355 /* Probe/Attach */ 356 /************************************************************************/ 357 358 static int 359 cbb_chipset(uint32_t pci_id, const char **namep) 360 { 361 struct yenta_chipinfo *ycp; 362 363 for (ycp = yc_chipsets; ycp->yc_id != 0 && pci_id != ycp->yc_id; ++ycp) 364 continue; 365 if (namep != NULL) 366 *namep = ycp->yc_name; 367 return (ycp->yc_chiptype); 368 } 369 370 static int 371 cbb_probe(device_t brdev) 372 { 373 const char *name; 374 uint32_t progif; 375 uint32_t subclass; 376 uint32_t class; 377 378 /* 379 * Do we know that we support the chipset? If so, then we 380 * accept the device. 381 */ 382 if (cbb_chipset(pci_get_devid(brdev), &name) != CB_UNKNOWN) { 383 device_set_desc(brdev, name); 384 return (0); 385 } 386 387 /* 388 * We do support generic CardBus bridges. All that we've seen 389 * to date have progif 0 (the Yenta spec, and successors mandate 390 * this). We do not support PCI PCMCIA bridges (with one exception) 391 * with this driver since they generally are I/O mapped. Those 392 * are supported by the pcic driver. This should help us be more 393 * future proof. 394 */ 395 class = pci_get_class(brdev); 396 subclass = pci_get_subclass(brdev); 397 progif = pci_get_progif(brdev); 398 if (class == PCIC_BRIDGE && subclass == PCIS_BRIDGE_CARDBUS && progif == 0) { 399 device_set_desc(brdev, "PCI-CardBus Bridge"); 400 return (0); 401 } 402 return (ENXIO); 403 } 404 405 406 static void 407 cbb_chipinit(struct cbb_softc *sc) 408 { 409 uint32_t mux, sysctrl; 410 411 /* Set CardBus latency timer */ 412 if (pci_read_config(sc->dev, PCIR_SECLAT_1, 1) < 0x20) 413 pci_write_config(sc->dev, PCIR_SECLAT_1, 0x20, 1); 414 415 /* Set PCI latency timer */ 416 if (pci_read_config(sc->dev, PCIR_LATTIMER, 1) < 0x20) 417 pci_write_config(sc->dev, PCIR_LATTIMER, 0x20, 1); 418 419 /* Enable memory access */ 420 PCI_MASK_CONFIG(sc->dev, PCIR_COMMAND, 421 | PCIM_CMD_MEMEN 422 | PCIM_CMD_PORTEN 423 | PCIM_CMD_BUSMASTEREN, 2); 424 425 /* disable Legacy IO */ 426 switch (sc->chipset) { 427 case CB_RF5C46X: 428 PCI_MASK_CONFIG(sc->dev, CBBR_BRIDGECTRL, 429 & ~(CBBM_BRIDGECTRL_RL_3E0_EN | 430 CBBM_BRIDGECTRL_RL_3E2_EN), 2); 431 break; 432 default: 433 pci_write_config(sc->dev, CBBR_LEGACY, 0x0, 4); 434 break; 435 } 436 437 /* Use PCI interrupt for interrupt routing */ 438 PCI_MASK2_CONFIG(sc->dev, CBBR_BRIDGECTRL, 439 & ~(CBBM_BRIDGECTRL_MASTER_ABORT | 440 CBBM_BRIDGECTRL_INTR_IREQ_EN), 441 | CBBM_BRIDGECTRL_WRITE_POST_EN, 442 2); 443 444 /* 445 * XXX this should be a function table, ala OLDCARD. This means 446 * that we could more easily support ISA interrupts for pccard 447 * cards if we had to. 448 */ 449 switch (sc->chipset) { 450 case CB_TI113X: 451 /* 452 * The TI 1031, TI 1130 and TI 1131 all require another bit 453 * be set to enable PCI routing of interrupts, and then 454 * a bit for each of the CSC and Function interrupts we 455 * want routed. 456 */ 457 PCI_MASK_CONFIG(sc->dev, CBBR_CBCTRL, 458 | CBBM_CBCTRL_113X_PCI_INTR | 459 CBBM_CBCTRL_113X_PCI_CSC | CBBM_CBCTRL_113X_PCI_IRQ_EN, 460 1); 461 PCI_MASK_CONFIG(sc->dev, CBBR_DEVCTRL, 462 & ~(CBBM_DEVCTRL_INT_SERIAL | 463 CBBM_DEVCTRL_INT_PCI), 1); 464 break; 465 case CB_TI12XX: 466 /* 467 * Some TI 12xx (and [14][45]xx) based pci cards 468 * sometimes have issues with the MFUNC register not 469 * being initialized due to a bad EEPROM on board. 470 * Laptops that this matters on have this register 471 * properly initialized. 472 * 473 * The TI125X parts have a different register. 474 */ 475 mux = pci_read_config(sc->dev, CBBR_MFUNC, 4); 476 sysctrl = pci_read_config(sc->dev, CBBR_SYSCTRL, 4); 477 if (mux == 0) { 478 mux = (mux & ~CBBM_MFUNC_PIN0) | 479 CBBM_MFUNC_PIN0_INTA; 480 if ((sysctrl & CBBM_SYSCTRL_INTRTIE) == 0) 481 mux = (mux & ~CBBM_MFUNC_PIN1) | 482 CBBM_MFUNC_PIN1_INTB; 483 pci_write_config(sc->dev, CBBR_MFUNC, mux, 4); 484 } 485 /*FALLTHROUGH*/ 486 case CB_TI125X: 487 /* 488 * Disable zoom video. Some machines initialize this 489 * improperly and exerpience has shown that this helps 490 * on some machines. 491 */ 492 pci_write_config(sc->dev, CBBR_MMCTRL, 0, 4); 493 break; 494 case CB_TOPIC97: 495 /* 496 * Disable Zoom Video, ToPIC 97, 100. 497 */ 498 pci_write_config(sc->dev, CBBR_TOPIC_ZV_CONTROL, 0, 1); 499 /* 500 * ToPIC 97, 100 501 * At offset 0xa1: INTERRUPT CONTROL register 502 * 0x1: Turn on INT interrupts. 503 */ 504 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_INTCTRL, 505 | CBBM_TOPIC_INTCTRL_INTIRQSEL, 1); 506 goto topic_common; 507 case CB_TOPIC95: 508 /* 509 * SOCKETCTRL appears to be TOPIC 95/B specific 510 */ 511 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_SOCKETCTRL, 512 | CBBM_TOPIC_SOCKETCTRL_SCR_IRQSEL, 4); 513 514 topic_common:; 515 /* 516 * At offset 0xa0: SLOT CONTROL 517 * 0x80 Enable CardBus Functionality 518 * 0x40 Enable CardBus and PC Card registers 519 * 0x20 Lock ID in exca regs 520 * 0x10 Write protect ID in config regs 521 * Clear the rest of the bits, which defaults the slot 522 * in legacy mode to 0x3e0 and offset 0. (legacy 523 * mode is determined elsewhere) 524 */ 525 pci_write_config(sc->dev, CBBR_TOPIC_SLOTCTRL, 526 CBBM_TOPIC_SLOTCTRL_SLOTON | 527 CBBM_TOPIC_SLOTCTRL_SLOTEN | 528 CBBM_TOPIC_SLOTCTRL_ID_LOCK | 529 CBBM_TOPIC_SLOTCTRL_ID_WP, 1); 530 531 /* 532 * At offset 0xa3 Card Detect Control Register 533 * 0x80 CARDBUS enbale 534 * 0x01 Cleared for hardware change detect 535 */ 536 PCI_MASK2_CONFIG(sc->dev, CBBR_TOPIC_CDC, 537 | CBBM_TOPIC_CDC_CARDBUS, 538 & ~CBBM_TOPIC_CDC_SWDETECT, 4); 539 break; 540 } 541 542 /* 543 * Need to tell ExCA registers to route via PCI interrupts. There 544 * are two ways to do this. Once is to set INTR_ENABLE and the 545 * other is to set CSC to 0. Since both methods are mutually 546 * compatible, we do both. 547 */ 548 exca_write(&sc->exca, EXCA_INTR, EXCA_INTR_ENABLE); 549 exca_write(&sc->exca, EXCA_CSC_INTR, 0); 550 551 /* close all memory and io windows */ 552 pci_write_config(sc->dev, CBBR_MEMBASE0, 0xffffffff, 4); 553 pci_write_config(sc->dev, CBBR_MEMLIMIT0, 0, 4); 554 pci_write_config(sc->dev, CBBR_MEMBASE1, 0xffffffff, 4); 555 pci_write_config(sc->dev, CBBR_MEMLIMIT1, 0, 4); 556 pci_write_config(sc->dev, CBBR_IOBASE0, 0xffffffff, 4); 557 pci_write_config(sc->dev, CBBR_IOLIMIT0, 0, 4); 558 pci_write_config(sc->dev, CBBR_IOBASE1, 0xffffffff, 4); 559 pci_write_config(sc->dev, CBBR_IOLIMIT1, 0, 4); 560 } 561 562 static int 563 cbb_attach(device_t brdev) 564 { 565 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(brdev); 566 int rid; 567 568 lockinit(&sc->lock, "cbb", 0, 0); 569 sc->chipset = cbb_chipset(pci_get_devid(brdev), NULL); 570 sc->dev = brdev; 571 sc->cbdev = NULL; 572 sc->pccarddev = NULL; 573 sc->secbus = pci_read_config(brdev, PCIR_SECBUS_2, 1); 574 sc->subbus = pci_read_config(brdev, PCIR_SUBBUS_2, 1); 575 SLIST_INIT(&sc->rl); 576 STAILQ_INIT(&sc->intr_handlers); 577 578 #ifndef BURN_THE_BOATS 579 /* 580 * The PCI bus code should assign us memory in the absense 581 * of the BIOS doing so. However, 'should' isn't 'is,' so we kludge 582 * up something here until the PCI/acpi code properly assigns the 583 * resource. 584 */ 585 #endif 586 rid = CBBR_SOCKBASE; 587 sc->base_res = bus_alloc_resource(brdev, SYS_RES_MEMORY, &rid, 588 0, ~0, 1, RF_ACTIVE); 589 if (!sc->base_res) { 590 #ifdef BURN_THE_BOATS 591 device_printf(brdev, "Could not map register memory\n"); 592 return (ENOMEM); 593 #else 594 uint32_t sockbase; 595 596 /* 597 * Generally, the BIOS will assign this memory for us. 598 * However, newer BIOSes do not because the MS design 599 * documents have mandated that this is for the OS 600 * to assign rather than the BIOS. This driver shouldn't 601 * be doing this, but until the pci bus code (or acpi) 602 * does this, we allow CardBus bridges to work on more 603 * machines. 604 */ 605 pci_write_config(brdev, rid, 0xffffffff, 4); 606 sockbase = pci_read_config(brdev, rid, 4); 607 sockbase = (sockbase & 0xfffffff0) & -(sockbase & 0xfffffff0); 608 sc->base_res = bus_generic_alloc_resource( 609 device_get_parent(brdev), brdev, SYS_RES_MEMORY, 610 &rid, cbb_start_mem, ~0, sockbase, 611 RF_ACTIVE|rman_make_alignment_flags(sockbase)); 612 if (!sc->base_res) { 613 device_printf(brdev, 614 "Could not grab register memory\n"); 615 return (ENOMEM); 616 } 617 sc->flags |= CBB_KLUDGE_ALLOC; 618 pci_write_config(brdev, CBBR_SOCKBASE, 619 rman_get_start(sc->base_res), 4); 620 #endif 621 } 622 DEVPRINTF((brdev, "PCI Memory allocated: %08lx\n", 623 rman_get_start(sc->base_res))); 624 625 sc->bst = rman_get_bustag(sc->base_res); 626 sc->bsh = rman_get_bushandle(sc->base_res); 627 exca_init(&sc->exca, brdev, sc->bst, sc->bsh, CBB_EXCA_OFFSET); 628 sc->exca.flags |= EXCA_HAS_MEMREG_WIN; 629 cbb_chipinit(sc); 630 631 /* attach children */ 632 sc->cbdev = device_add_child(brdev, "cardbus", -1); 633 if (sc->cbdev == NULL) 634 DEVPRINTF((brdev, "WARNING: cannot add cardbus bus.\n")); 635 else if (device_probe_and_attach(sc->cbdev) != 0) { 636 DEVPRINTF((brdev, "WARNING: cannot attach cardbus bus!\n")); 637 sc->cbdev = NULL; 638 } 639 640 sc->pccarddev = device_add_child(brdev, "pccard", -1); 641 if (sc->pccarddev == NULL) 642 DEVPRINTF((brdev, "WARNING: cannot add pccard bus.\n")); 643 else if (device_probe_and_attach(sc->pccarddev) != 0) { 644 DEVPRINTF((brdev, "WARNING: cannot attach pccard bus.\n")); 645 sc->pccarddev = NULL; 646 } 647 648 /* Map and establish the interrupt. */ 649 rid = 0; 650 sc->irq_res = bus_alloc_resource(brdev, SYS_RES_IRQ, &rid, 0, ~0, 1, 651 RF_SHAREABLE | RF_ACTIVE); 652 if (sc->irq_res == NULL) { 653 printf("cbb: Unable to map IRQ...\n"); 654 goto err; 655 } 656 657 if (bus_setup_intr(brdev, sc->irq_res, 0, cbb_intr, sc, 658 &sc->intrhand, NULL)) { 659 device_printf(brdev, "couldn't establish interrupt"); 660 goto err; 661 } 662 663 /* reset 16-bit pcmcia bus */ 664 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET); 665 666 /* turn off power */ 667 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 668 669 /* CSC Interrupt: Card detect interrupt on */ 670 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 671 672 /* reset interrupt */ 673 cbb_set(sc, CBB_SOCKET_EVENT, cbb_get(sc, CBB_SOCKET_EVENT)); 674 675 /* Start the thread */ 676 if (kthread_create(cbb_event_thread, sc, &sc->event_thread, 677 "%s%d", device_get_name(sc->dev), device_get_unit(sc->dev))) { 678 device_printf (sc->dev, "unable to create event thread.\n"); 679 panic ("cbb_create_event_thread"); 680 } 681 682 return (0); 683 err: 684 if (sc->irq_res) 685 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 686 if (sc->base_res) { 687 if (sc->flags & CBB_KLUDGE_ALLOC) 688 bus_generic_release_resource(device_get_parent(brdev), 689 brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 690 sc->base_res); 691 else 692 bus_release_resource(brdev, SYS_RES_MEMORY, 693 CBBR_SOCKBASE, sc->base_res); 694 } 695 return (ENOMEM); 696 } 697 698 /* 699 * shutdown and detach both call the release helper to disable the interrupt 700 * and cleanup the resources. 701 */ 702 static 703 void 704 cbb_release_helper(device_t brdev) 705 { 706 struct cbb_softc *sc = device_get_softc(brdev); 707 708 lockmgr(&sc->lock, LK_EXCLUSIVE); 709 sc->flags |= CBB_KTHREAD_DONE; 710 lockmgr(&sc->lock, LK_RELEASE); 711 if (sc->flags & CBB_KTHREAD_RUNNING) { 712 wakeup(sc); 713 tsleep(cbb_detach, 0, "pccbb", 2); 714 } 715 716 /* 717 * Reset the bridge controller and reset the interrupt, then tear 718 * it down (which disables the interrupt) and de-power. 719 */ 720 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 721 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET); 722 723 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 724 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 725 726 /* 727 * Release interrupt and memory-mapped resources. Device memory 728 * cannot be safely accessed after we do this. 729 */ 730 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 731 if (sc->flags & CBB_KLUDGE_ALLOC) { 732 bus_generic_release_resource(device_get_parent(brdev), 733 brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 734 sc->base_res); 735 } else { 736 bus_release_resource(brdev, SYS_RES_MEMORY, 737 CBBR_SOCKBASE, sc->base_res); 738 } 739 } 740 741 static int 742 cbb_detach(device_t brdev) 743 { 744 device_t *devlist; 745 int numdevs; 746 int error; 747 int i; 748 749 device_get_children(brdev, &devlist, &numdevs); 750 751 error = 0; 752 for (i = 0; i < numdevs; i++) { 753 if (device_detach(devlist[i]) == 0) 754 device_delete_child(brdev, devlist[i]); 755 else 756 error++; 757 } 758 free (devlist, M_TEMP); 759 if (error == 0) 760 cbb_release_helper(brdev); 761 else 762 error = ENXIO; 763 return (error); 764 } 765 766 static int 767 cbb_shutdown(device_t brdev) 768 { 769 device_t *devlist; 770 int numdevs; 771 int i; 772 773 device_get_children(brdev, &devlist, &numdevs); 774 775 for (i = 0; i < numdevs; i++) { 776 if (device_shutdown(devlist[i]) == 0) 777 ; /* XXX delete the child without detach? */ 778 } 779 free (devlist, M_TEMP); 780 cbb_release_helper(brdev); 781 782 /* 783 * This may prevent bios confusion on reboot for some bioses 784 */ 785 pci_write_config(brdev, PCIR_COMMAND, 0, 2); 786 return (0); 787 } 788 789 static int 790 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 791 int flags, driver_intr_t *intr, void *arg, 792 void **cookiep, lwkt_serialize_t serializer) 793 { 794 struct cbb_intrhand *ih; 795 struct cbb_softc *sc = device_get_softc(dev); 796 797 /* 798 * You aren't allowed to have fast interrupts for pccard/cardbus 799 * things since those interrupts are PCI and shared. Since we use 800 * the PCI interrupt for the status change interrupts, it can't be 801 * free for use by the driver. Fast interrupts must not be shared. 802 */ 803 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_WAITOK|M_ZERO); 804 if (ih == NULL) 805 return (ENOMEM); 806 *cookiep = ih; 807 ih->intr = intr; 808 ih->arg = arg; 809 ih->serializer = serializer; 810 STAILQ_INSERT_TAIL(&sc->intr_handlers, ih, entries); 811 /* 812 * XXX we should do what old card does to ensure that we don't 813 * XXX call the function's interrupt routine(s). 814 */ 815 /* 816 * XXX need to turn on ISA interrupts, if we ever support them, but 817 * XXX for now that's all we need to do. 818 */ 819 return (0); 820 } 821 822 static int 823 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 824 void *cookie) 825 { 826 struct cbb_intrhand *ih; 827 struct cbb_softc *sc = device_get_softc(dev); 828 829 cbb_setb(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */ 830 /* XXX Need to do different things for ISA interrupts. */ 831 ih = (struct cbb_intrhand *) cookie; 832 STAILQ_REMOVE(&sc->intr_handlers, ih, cbb_intrhand, entries); 833 free(ih, M_DEVBUF); 834 return (0); 835 } 836 837 838 static void 839 cbb_driver_added(device_t brdev, driver_t *driver) 840 { 841 struct cbb_softc *sc = device_get_softc(brdev); 842 device_t *devlist; 843 int tmp; 844 int numdevs; 845 int wake; 846 uint32_t sockstate; 847 848 DEVICE_IDENTIFY(driver, brdev); 849 device_get_children(brdev, &devlist, &numdevs); 850 wake = 0; 851 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 852 for (tmp = 0; tmp < numdevs; tmp++) { 853 if (device_get_state(devlist[tmp]) == DS_NOTPRESENT && 854 device_probe_and_attach(devlist[tmp]) == 0) { 855 if (devlist[tmp] == NULL) 856 /* NOTHING */; 857 else if (strcmp(driver->name, "cardbus") == 0) { 858 sc->cbdev = devlist[tmp]; 859 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) && 860 (sockstate & CBB_SOCKET_STAT_CB)) 861 wake++; 862 } else if (strcmp(driver->name, "pccard") == 0) { 863 sc->pccarddev = devlist[tmp]; 864 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) && 865 (sockstate & CBB_SOCKET_STAT_16BIT)) 866 wake++; 867 } else 868 device_printf(brdev, 869 "Unsupported child bus: %s\n", 870 driver->name); 871 } 872 } 873 free(devlist, M_TEMP); 874 875 if (wake > 0) { 876 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) 877 == 0) { 878 wakeup(sc); 879 } 880 } 881 } 882 883 static void 884 cbb_child_detached(device_t brdev, device_t child) 885 { 886 struct cbb_softc *sc = device_get_softc(brdev); 887 888 if (child == sc->cbdev) 889 sc->cbdev = NULL; 890 else if (child == sc->pccarddev) 891 sc->pccarddev = NULL; 892 else 893 device_printf(brdev, "Unknown child detached: %s %p/%p\n", 894 device_get_nameunit(child), sc->cbdev, sc->pccarddev); 895 } 896 897 /************************************************************************/ 898 /* Kthreads */ 899 /************************************************************************/ 900 901 static void 902 cbb_event_thread(void *arg) 903 { 904 struct cbb_softc *sc = arg; 905 uint32_t status; 906 int err; 907 908 /* 909 * We take out Giant here because we need it deep, down in 910 * the bowels of the vm system for mapping the memory we need 911 * to read the CIS. We also need it for kthread_exit, which 912 * drops it. 913 */ 914 sc->flags |= CBB_KTHREAD_RUNNING; 915 while (1) { 916 /* 917 * Check to see if we have anything first so that 918 * if there's a card already inserted, we do the 919 * right thing. 920 */ 921 lockmgr(&sc->lock, LK_EXCLUSIVE); 922 if (sc->flags & CBB_KTHREAD_DONE) 923 break; 924 925 status = cbb_get(sc, CBB_SOCKET_STATE); 926 /* mtx_lock(&Giant); */ 927 if ((status & CBB_SOCKET_STAT_CD) == 0) 928 cbb_insert(sc); 929 else 930 cbb_removal(sc); 931 lockmgr(&sc->lock, LK_RELEASE); 932 /* mtx_unlock(&Giant); */ 933 934 /* 935 * Wait until it has been 1s since the last time we 936 * get an interrupt. We handle the rest of the interrupt 937 * at the top of the loop. 938 */ 939 err = tsleep(sc, 0, "pccbb", 0); 940 while (err != EWOULDBLOCK && 941 (sc->flags & CBB_KTHREAD_DONE) == 0) 942 err = tsleep(sc, 0, "pccbb", 1 * hz); 943 } 944 sc->flags &= ~CBB_KTHREAD_RUNNING; 945 lockmgr(&sc->lock, LK_RELEASE); 946 /* mtx_lock(&Giant); */ 947 kthread_exit(); 948 } 949 950 /************************************************************************/ 951 /* Insert/removal */ 952 /************************************************************************/ 953 954 static void 955 cbb_insert(struct cbb_softc *sc) 956 { 957 uint32_t sockevent, sockstate; 958 959 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 960 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 961 962 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 963 sockevent, sockstate)); 964 965 if (sockstate & CBB_SOCKET_STAT_16BIT) { 966 if (sc->pccarddev != NULL) { 967 sc->flags |= CBB_16BIT_CARD; 968 sc->flags |= CBB_CARD_OK; 969 if (CARD_ATTACH_CARD(sc->pccarddev) != 0) { 970 device_printf(sc->dev, 971 "PC Card card activation failed\n"); 972 sc->flags &= ~CBB_CARD_OK; 973 } 974 } else { 975 device_printf(sc->dev, 976 "PC Card inserted, but no pccard bus.\n"); 977 } 978 } else if (sockstate & CBB_SOCKET_STAT_CB) { 979 if (sc->cbdev != NULL) { 980 sc->flags &= ~CBB_16BIT_CARD; 981 sc->flags |= CBB_CARD_OK; 982 if (CARD_ATTACH_CARD(sc->cbdev) != 0) { 983 device_printf(sc->dev, 984 "CardBus card activation failed\n"); 985 sc->flags &= ~CBB_CARD_OK; 986 } 987 } else { 988 device_printf(sc->dev, 989 "CardBus card inserted, but no cardbus bus.\n"); 990 } 991 } else { 992 /* 993 * We should power the card down, and try again a couple of 994 * times if this happens. XXX 995 */ 996 device_printf (sc->dev, "Unsupported card type detected\n"); 997 } 998 } 999 1000 static void 1001 cbb_removal(struct cbb_softc *sc) 1002 { 1003 if (sc->flags & CBB_16BIT_CARD) { 1004 if (sc->pccarddev != NULL) 1005 CARD_DETACH_CARD(sc->pccarddev); 1006 } else { 1007 if (sc->cbdev != NULL) 1008 CARD_DETACH_CARD(sc->cbdev); 1009 } 1010 cbb_destroy_res(sc); 1011 } 1012 1013 /************************************************************************/ 1014 /* Interrupt Handler */ 1015 /************************************************************************/ 1016 1017 static void 1018 cbb_intr(void *arg) 1019 { 1020 struct cbb_softc *sc = arg; 1021 uint32_t sockevent; 1022 struct cbb_intrhand *ih; 1023 1024 /* 1025 * This ISR needs work XXX 1026 */ 1027 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 1028 if (sockevent) { 1029 /* ack the interrupt */ 1030 cbb_setb(sc, CBB_SOCKET_EVENT, sockevent); 1031 1032 /* 1033 * If anything has happened to the socket, we assume that 1034 * the card is no longer OK, and we shouldn't call its 1035 * ISR. We set CARD_OK as soon as we've attached the 1036 * card. This helps in a noisy eject, which happens 1037 * all too often when users are ejecting their PC Cards. 1038 * 1039 * We use this method in preference to checking to see if 1040 * the card is still there because the check suffers from 1041 * a race condition in the bouncing case. Prior versions 1042 * of the pccard software used a similar trick and achieved 1043 * excellent results. 1044 */ 1045 if (sockevent & CBB_SOCKET_EVENT_CD) { 1046 lockmgr(&sc->lock, LK_EXCLUSIVE); 1047 sc->flags &= ~CBB_CARD_OK; 1048 lockmgr(&sc->lock, LK_RELEASE); 1049 wakeup(sc); 1050 } 1051 if (sockevent & CBB_SOCKET_EVENT_CSTS) { 1052 DPRINTF((" cstsevent occured: 0x%08x\n", 1053 cbb_get(sc, CBB_SOCKET_STATE))); 1054 } 1055 if (sockevent & CBB_SOCKET_EVENT_POWER) { 1056 DPRINTF((" pwrevent occured: 0x%08x\n", 1057 cbb_get(sc, CBB_SOCKET_STATE))); 1058 } 1059 /* Other bits? */ 1060 } 1061 if (sc->flags & CBB_CARD_OK) { 1062 STAILQ_FOREACH(ih, &sc->intr_handlers, entries) { 1063 if (ih->serializer) { 1064 lwkt_serialize_handler_call(ih->serializer, 1065 (inthand2_t *)ih->intr, 1066 ih->arg, NULL); 1067 } else { 1068 (*ih->intr)(ih->arg); 1069 } 1070 } 1071 1072 } 1073 } 1074 1075 /************************************************************************/ 1076 /* Generic Power functions */ 1077 /************************************************************************/ 1078 1079 static int 1080 cbb_detect_voltage(device_t brdev) 1081 { 1082 struct cbb_softc *sc = device_get_softc(brdev); 1083 uint32_t psr; 1084 int vol = CARD_UKN_CARD; 1085 1086 psr = cbb_get(sc, CBB_SOCKET_STATE); 1087 1088 if (psr & CBB_SOCKET_STAT_5VCARD) 1089 vol |= CARD_5V_CARD; 1090 if (psr & CBB_SOCKET_STAT_3VCARD) 1091 vol |= CARD_3V_CARD; 1092 if (psr & CBB_SOCKET_STAT_XVCARD) 1093 vol |= CARD_XV_CARD; 1094 if (psr & CBB_SOCKET_STAT_YVCARD) 1095 vol |= CARD_YV_CARD; 1096 1097 return (vol); 1098 } 1099 1100 static int 1101 cbb_power(device_t brdev, int volts) 1102 { 1103 uint32_t status, sock_ctrl; 1104 struct cbb_softc *sc = device_get_softc(brdev); 1105 int timeout; 1106 uint32_t sockevent; 1107 1108 DEVPRINTF((sc->dev, "cbb_power: %s and %s [%x]\n", 1109 (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" : 1110 (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" : 1111 (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" : 1112 (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" : 1113 (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" : 1114 (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" : 1115 "VCC-UNKNOWN", 1116 (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" : 1117 (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V" : 1118 (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC" : 1119 (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" : 1120 "VPP-UNKNOWN", 1121 volts)); 1122 1123 status = cbb_get(sc, CBB_SOCKET_STATE); 1124 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 1125 1126 switch (volts & CARD_VCCMASK) { 1127 case CARD_VCC_UC: 1128 break; 1129 case CARD_VCC_5V: 1130 if (CBB_SOCKET_STAT_5VCARD & status) { /* check 5 V card */ 1131 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 1132 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 1133 } else { 1134 device_printf(sc->dev, 1135 "BAD voltage request: no 5 V card\n"); 1136 } 1137 break; 1138 case CARD_VCC_3V: 1139 if (CBB_SOCKET_STAT_3VCARD & status) { 1140 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 1141 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 1142 } else { 1143 device_printf(sc->dev, 1144 "BAD voltage request: no 3.3 V card\n"); 1145 } 1146 break; 1147 case CARD_VCC_0V: 1148 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 1149 break; 1150 default: 1151 return (0); /* power NEVER changed */ 1152 break; 1153 } 1154 1155 switch (volts & CARD_VPPMASK) { 1156 case CARD_VPP_UC: 1157 break; 1158 case CARD_VPP_0V: 1159 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 1160 break; 1161 case CARD_VPP_VCC: 1162 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 1163 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 1164 break; 1165 case CARD_VPP_12V: 1166 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 1167 sock_ctrl |= CBB_SOCKET_CTRL_VPP_12V; 1168 break; 1169 } 1170 1171 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 1172 return (1); /* no change necessary */ 1173 1174 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 1175 status = cbb_get(sc, CBB_SOCKET_STATE); 1176 1177 /* 1178 * XXX This busy wait is bogus. We should wait for a power 1179 * interrupt and then whine if the status is bad. If we're 1180 * worried about the card not coming up, then we should also 1181 * schedule a timeout which we can cacel in the power interrupt. 1182 */ 1183 timeout = 20; 1184 do { 1185 DELAY(20*1000); 1186 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 1187 } while (!(sockevent & CBB_SOCKET_EVENT_POWER) && --timeout > 0); 1188 /* reset event status */ 1189 /* XXX should only reset EVENT_POWER */ 1190 cbb_set(sc, CBB_SOCKET_EVENT, sockevent); 1191 if (timeout < 0) { 1192 printf ("VCC supply failed.\n"); 1193 return (0); 1194 } 1195 1196 /* XXX 1197 * delay 400 ms: thgough the standard defines that the Vcc set-up time 1198 * is 20 ms, some PC-Card bridge requires longer duration. 1199 * XXX Note: We should check the stutus AFTER the delay to give time 1200 * for things to stabilize. 1201 */ 1202 DELAY(400*1000); 1203 1204 if (status & CBB_SOCKET_STAT_BADVCC) { 1205 device_printf(sc->dev, 1206 "bad Vcc request. ctrl=0x%x, status=0x%x\n", 1207 sock_ctrl ,status); 1208 printf("cbb_power: %s and %s [%x]\n", 1209 (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" : 1210 (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" : 1211 (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" : 1212 (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" : 1213 (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" : 1214 (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" : 1215 "VCC-UNKNOWN", 1216 (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" : 1217 (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V": 1218 (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC": 1219 (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" : 1220 "VPP-UNKNOWN", 1221 volts); 1222 return (0); 1223 } 1224 return (1); /* power changed correctly */ 1225 } 1226 1227 /* 1228 * detect the voltage for the card, and set it. Since the power 1229 * used is the square of the voltage, lower voltages is a big win 1230 * and what Windows does (and what Microsoft prefers). The MS paper 1231 * also talks about preferring the CIS entry as well. 1232 */ 1233 static int 1234 cbb_do_power(device_t brdev) 1235 { 1236 int voltage; 1237 1238 /* Prefer lowest voltage supported */ 1239 voltage = cbb_detect_voltage(brdev); 1240 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 1241 if (voltage & CARD_YV_CARD) 1242 cbb_power(brdev, CARD_VCC_YV | CARD_VPP_VCC); 1243 else if (voltage & CARD_XV_CARD) 1244 cbb_power(brdev, CARD_VCC_XV | CARD_VPP_VCC); 1245 else if (voltage & CARD_3V_CARD) 1246 cbb_power(brdev, CARD_VCC_3V | CARD_VPP_VCC); 1247 else if (voltage & CARD_5V_CARD) 1248 cbb_power(brdev, CARD_VCC_5V | CARD_VPP_VCC); 1249 else { 1250 device_printf(brdev, "Unknown card voltage\n"); 1251 return (ENXIO); 1252 } 1253 return (0); 1254 } 1255 1256 /************************************************************************/ 1257 /* CardBus power functions */ 1258 /************************************************************************/ 1259 1260 static void 1261 cbb_cardbus_reset(device_t brdev) 1262 { 1263 struct cbb_softc *sc = device_get_softc(brdev); 1264 int delay_us; 1265 1266 delay_us = sc->chipset == CB_RF5C47X ? 400*1000 : 20*1000; 1267 1268 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 1269 1270 DELAY(delay_us); 1271 1272 /* If a card exists, unreset it! */ 1273 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) == 0) { 1274 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 1275 &~CBBM_BRIDGECTRL_RESET, 2); 1276 DELAY(delay_us); 1277 } 1278 } 1279 1280 static int 1281 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 1282 { 1283 struct cbb_softc *sc = device_get_softc(brdev); 1284 int err; 1285 1286 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) == 1287 CBB_SOCKET_STAT_CD) 1288 return (ENODEV); 1289 1290 err = cbb_do_power(brdev); 1291 if (err) 1292 return (err); 1293 cbb_cardbus_reset(brdev); 1294 return (0); 1295 } 1296 1297 static void 1298 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 1299 { 1300 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 1301 cbb_cardbus_reset(brdev); 1302 } 1303 1304 /************************************************************************/ 1305 /* CardBus Resource */ 1306 /************************************************************************/ 1307 1308 static int 1309 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 1310 { 1311 int basereg; 1312 int limitreg; 1313 1314 if ((win < 0) || (win > 1)) { 1315 DEVPRINTF((brdev, 1316 "cbb_cardbus_io_open: window out of range %d\n", win)); 1317 return (EINVAL); 1318 } 1319 1320 basereg = win * 8 + CBBR_IOBASE0; 1321 limitreg = win * 8 + CBBR_IOLIMIT0; 1322 1323 pci_write_config(brdev, basereg, start, 4); 1324 pci_write_config(brdev, limitreg, end, 4); 1325 return (0); 1326 } 1327 1328 static int 1329 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 1330 { 1331 int basereg; 1332 int limitreg; 1333 1334 if ((win < 0) || (win > 1)) { 1335 DEVPRINTF((brdev, 1336 "cbb_cardbus_mem_open: window out of range %d\n", win)); 1337 return (EINVAL); 1338 } 1339 1340 basereg = win*8 + CBBR_MEMBASE0; 1341 limitreg = win*8 + CBBR_MEMLIMIT0; 1342 1343 pci_write_config(brdev, basereg, start, 4); 1344 pci_write_config(brdev, limitreg, end, 4); 1345 return (0); 1346 } 1347 1348 /* 1349 * XXX The following function belongs in the pci bus layer. 1350 */ 1351 static void 1352 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1353 { 1354 uint32_t starts[2]; 1355 uint32_t ends[2]; 1356 struct cbb_reslist *rle; 1357 int align; 1358 int prefetchable[2]; 1359 uint32_t reg; 1360 1361 starts[0] = starts[1] = 0xffffffff; 1362 ends[0] = ends[1] = 0; 1363 1364 if (type == SYS_RES_MEMORY) 1365 align = CBB_MEMALIGN; 1366 else if (type == SYS_RES_IOPORT) 1367 align = CBB_IOALIGN; 1368 else 1369 align = 1; 1370 1371 SLIST_FOREACH(rle, &sc->rl, link) { 1372 if (rle->type != type) 1373 ; 1374 else if (rle->res == NULL) { 1375 device_printf(sc->dev, "WARNING: Resource not reserved? " 1376 "(type=%d, addr=%lx)\n", 1377 rle->type, rman_get_start(rle->res)); 1378 } else if (!(rman_get_flags(rle->res) & RF_ACTIVE)) { 1379 /* XXX */ 1380 } else if (starts[0] == 0xffffffff) { 1381 starts[0] = rman_get_start(rle->res); 1382 ends[0] = rman_get_end(rle->res); 1383 prefetchable[0] = 1384 rman_get_flags(rle->res) & RF_PREFETCHABLE; 1385 } else if (rman_get_end(rle->res) > ends[0] && 1386 rman_get_start(rle->res) - ends[0] < 1387 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] == 1388 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) { 1389 ends[0] = rman_get_end(rle->res); 1390 } else if (rman_get_start(rle->res) < starts[0] && 1391 starts[0] - rman_get_end(rle->res) < 1392 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] == 1393 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) { 1394 starts[0] = rman_get_start(rle->res); 1395 } else if (starts[1] == 0xffffffff) { 1396 starts[1] = rman_get_start(rle->res); 1397 ends[1] = rman_get_end(rle->res); 1398 prefetchable[1] = 1399 rman_get_flags(rle->res) & RF_PREFETCHABLE; 1400 } else if (rman_get_end(rle->res) > ends[1] && 1401 rman_get_start(rle->res) - ends[1] < 1402 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] == 1403 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) { 1404 ends[1] = rman_get_end(rle->res); 1405 } else if (rman_get_start(rle->res) < starts[1] && 1406 starts[1] - rman_get_end(rle->res) < 1407 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] == 1408 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) { 1409 starts[1] = rman_get_start(rle->res); 1410 } else { 1411 uint32_t diffs[2]; 1412 int win; 1413 1414 diffs[0] = diffs[1] = 0xffffffff; 1415 if (rman_get_start(rle->res) > ends[0]) 1416 diffs[0] = rman_get_start(rle->res) - ends[0]; 1417 else if (rman_get_end(rle->res) < starts[0]) 1418 diffs[0] = starts[0] - rman_get_end(rle->res); 1419 if (rman_get_start(rle->res) > ends[1]) 1420 diffs[1] = rman_get_start(rle->res) - ends[1]; 1421 else if (rman_get_end(rle->res) < starts[1]) 1422 diffs[1] = starts[1] - rman_get_end(rle->res); 1423 1424 win = (diffs[0] <= diffs[1])?0:1; 1425 if (rman_get_start(rle->res) > ends[win]) 1426 ends[win] = rman_get_end(rle->res); 1427 else if (rman_get_end(rle->res) < starts[win]) 1428 starts[win] = rman_get_start(rle->res); 1429 if (!(rman_get_flags(rle->res) & RF_PREFETCHABLE)) 1430 prefetchable[win] = 0; 1431 } 1432 1433 if (starts[0] != 0xffffffff) 1434 starts[0] -= starts[0] % align; 1435 if (starts[1] != 0xffffffff) 1436 starts[1] -= starts[1] % align; 1437 if (ends[0] % align != 0) 1438 ends[0] += align - ends[0]%align - 1; 1439 if (ends[1] % align != 0) 1440 ends[1] += align - ends[1]%align - 1; 1441 } 1442 1443 if (type == SYS_RES_MEMORY) { 1444 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1445 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1446 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1447 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0| 1448 CBBM_BRIDGECTRL_PREFETCH_1); 1449 reg |= (prefetchable[0]?CBBM_BRIDGECTRL_PREFETCH_0:0)| 1450 (prefetchable[1]?CBBM_BRIDGECTRL_PREFETCH_1:0); 1451 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1452 } else if (type == SYS_RES_IOPORT) { 1453 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1454 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1455 } 1456 } 1457 1458 static int 1459 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1460 int rid, struct resource *res) 1461 { 1462 int ret; 1463 1464 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1465 type, rid, res); 1466 if (ret != 0) 1467 return (ret); 1468 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1469 return (0); 1470 } 1471 1472 static int 1473 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1474 int rid, struct resource *res) 1475 { 1476 int ret; 1477 1478 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1479 type, rid, res); 1480 if (ret != 0) 1481 return (ret); 1482 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1483 return (0); 1484 } 1485 1486 static struct resource * 1487 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1488 int *rid, u_long start, u_long end, u_long count, uint flags) 1489 { 1490 struct cbb_softc *sc = device_get_softc(brdev); 1491 int tmp; 1492 struct resource *res; 1493 1494 switch (type) { 1495 case SYS_RES_IRQ: 1496 tmp = rman_get_start(sc->irq_res); 1497 if (start > tmp || end < tmp || count != 1) { 1498 device_printf(child, "requested interrupt %ld-%ld," 1499 "count = %ld not supported by cbb\n", 1500 start, end, count); 1501 return (NULL); 1502 } 1503 start = end = tmp; 1504 break; 1505 case SYS_RES_IOPORT: 1506 if (start <= cbb_start_32_io) 1507 start = cbb_start_32_io; 1508 if (end < start) 1509 end = start; 1510 break; 1511 case SYS_RES_MEMORY: 1512 if (start <= cbb_start_mem) 1513 start = cbb_start_mem; 1514 if (end < start) 1515 end = start; 1516 break; 1517 } 1518 1519 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1520 start, end, count, flags & ~RF_ACTIVE); 1521 if (res == NULL) { 1522 printf("cbb alloc res fail\n"); 1523 return (NULL); 1524 } 1525 if (cbb_insert_res(sc, res, type, *rid)) { 1526 BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, type, 1527 *rid, res); 1528 return (NULL); 1529 } 1530 if (flags & RF_ACTIVE) 1531 if (bus_activate_resource(child, type, *rid, res) != 0) { 1532 bus_release_resource(child, type, *rid, res); 1533 return (NULL); 1534 } 1535 1536 return (res); 1537 } 1538 1539 static int 1540 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1541 int rid, struct resource *res) 1542 { 1543 struct cbb_softc *sc = device_get_softc(brdev); 1544 int error; 1545 1546 if (rman_get_flags(res) & RF_ACTIVE) { 1547 error = bus_deactivate_resource(child, type, rid, res); 1548 if (error != 0) 1549 return (error); 1550 } 1551 cbb_remove_res(sc, res); 1552 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1553 type, rid, res)); 1554 } 1555 1556 /************************************************************************/ 1557 /* PC Card Power Functions */ 1558 /************************************************************************/ 1559 1560 static int 1561 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1562 { 1563 struct cbb_softc *sc = device_get_softc(brdev); 1564 int err; 1565 1566 DPRINTF(("cbb_pcic_socket_enable:\n")); 1567 1568 /* power down/up the socket to reset */ 1569 err = cbb_do_power(brdev); 1570 if (err) 1571 return (err); 1572 exca_reset(&sc->exca, child); 1573 1574 return (0); 1575 } 1576 1577 static void 1578 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1579 { 1580 struct cbb_softc *sc = device_get_softc(brdev); 1581 1582 DPRINTF(("cbb_pcic_socket_disable\n")); 1583 1584 /* reset signal asserting... */ 1585 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET); 1586 DELAY(2*1000); 1587 1588 /* power down the socket */ 1589 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 1590 exca_clrb(&sc->exca, EXCA_PWRCTL, EXCA_PWRCTL_OE); 1591 1592 /* wait 300ms until power fails (Tpf). */ 1593 DELAY(300 * 1000); 1594 } 1595 1596 /************************************************************************/ 1597 /* POWER methods */ 1598 /************************************************************************/ 1599 1600 static int 1601 cbb_power_enable_socket(device_t brdev, device_t child) 1602 { 1603 struct cbb_softc *sc = device_get_softc(brdev); 1604 1605 if (sc->flags & CBB_16BIT_CARD) 1606 return (cbb_pcic_power_enable_socket(brdev, child)); 1607 else 1608 return (cbb_cardbus_power_enable_socket(brdev, child)); 1609 } 1610 1611 static void 1612 cbb_power_disable_socket(device_t brdev, device_t child) 1613 { 1614 struct cbb_softc *sc = device_get_softc(brdev); 1615 if (sc->flags & CBB_16BIT_CARD) 1616 cbb_pcic_power_disable_socket(brdev, child); 1617 else 1618 cbb_cardbus_power_disable_socket(brdev, child); 1619 } 1620 static int 1621 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1622 struct resource *res) 1623 { 1624 int err; 1625 struct cbb_softc *sc = device_get_softc(brdev); 1626 if (!(rman_get_flags(res) & RF_ACTIVE)) { /* not already activated */ 1627 switch (type) { 1628 case SYS_RES_IOPORT: 1629 err = exca_io_map(&sc->exca, 0, res); 1630 break; 1631 case SYS_RES_MEMORY: 1632 err = exca_mem_map(&sc->exca, 0, res); 1633 break; 1634 default: 1635 err = 0; 1636 break; 1637 } 1638 if (err) 1639 return (err); 1640 1641 } 1642 return (BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1643 type, rid, res)); 1644 } 1645 1646 static int 1647 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1648 int rid, struct resource *res) 1649 { 1650 struct cbb_softc *sc = device_get_softc(brdev); 1651 1652 if (rman_get_flags(res) & RF_ACTIVE) { /* if activated */ 1653 switch (type) { 1654 case SYS_RES_IOPORT: 1655 if (exca_io_unmap_res(&sc->exca, res)) 1656 return (ENOENT); 1657 break; 1658 case SYS_RES_MEMORY: 1659 if (exca_mem_unmap_res(&sc->exca, res)) 1660 return (ENOENT); 1661 break; 1662 } 1663 } 1664 return (BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1665 type, rid, res)); 1666 } 1667 1668 static struct resource * 1669 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1670 u_long start, u_long end, u_long count, uint flags) 1671 { 1672 struct resource *res = NULL; 1673 struct cbb_softc *sc = device_get_softc(brdev); 1674 int tmp; 1675 1676 switch (type) { 1677 case SYS_RES_MEMORY: 1678 if (start < cbb_start_mem) 1679 start = cbb_start_mem; 1680 if (end < start) 1681 end = start; 1682 flags = (flags & ~RF_ALIGNMENT_MASK) | 1683 rman_make_alignment_flags(CBB_MEMALIGN); 1684 break; 1685 case SYS_RES_IOPORT: 1686 if (start < cbb_start_16_io) 1687 start = cbb_start_16_io; 1688 if (end < start) 1689 end = start; 1690 break; 1691 case SYS_RES_IRQ: 1692 tmp = rman_get_start(sc->irq_res); 1693 if (start > tmp || end < tmp || count != 1) { 1694 device_printf(child, "requested interrupt %ld-%ld," 1695 "count = %ld not supported by cbb\n", 1696 start, end, count); 1697 return (NULL); 1698 } 1699 flags |= RF_SHAREABLE; 1700 start = end = rman_get_start(sc->irq_res); 1701 break; 1702 } 1703 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1704 start, end, count, flags & ~RF_ACTIVE); 1705 if (res == NULL) 1706 return (NULL); 1707 if (cbb_insert_res(sc, res, type, *rid)) { 1708 BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, type, 1709 *rid, res); 1710 return (NULL); 1711 } 1712 if (flags & RF_ACTIVE) { 1713 if (bus_activate_resource(child, type, *rid, res) != 0) { 1714 bus_release_resource(child, type, *rid, res); 1715 return (NULL); 1716 } 1717 } 1718 1719 return (res); 1720 } 1721 1722 static int 1723 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1724 int rid, struct resource *res) 1725 { 1726 struct cbb_softc *sc = device_get_softc(brdev); 1727 int error; 1728 1729 if (rman_get_flags(res) & RF_ACTIVE) { 1730 error = bus_deactivate_resource(child, type, rid, res); 1731 if (error != 0) 1732 return (error); 1733 } 1734 cbb_remove_res(sc, res); 1735 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1736 type, rid, res)); 1737 } 1738 1739 /************************************************************************/ 1740 /* PC Card methods */ 1741 /************************************************************************/ 1742 1743 static int 1744 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1745 uint32_t flags) 1746 { 1747 struct cbb_softc *sc = device_get_softc(brdev); 1748 struct resource *res; 1749 1750 if (type != SYS_RES_MEMORY) 1751 return (EINVAL); 1752 res = cbb_find_res(sc, type, rid); 1753 if (res == NULL) { 1754 device_printf(brdev, 1755 "set_res_flags: specified rid not found\n"); 1756 return (ENOENT); 1757 } 1758 return (exca_mem_set_flags(&sc->exca, res, flags)); 1759 } 1760 1761 static int 1762 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1763 uint32_t cardaddr, uint32_t *deltap) 1764 { 1765 struct cbb_softc *sc = device_get_softc(brdev); 1766 struct resource *res; 1767 1768 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1769 if (res == NULL) { 1770 device_printf(brdev, 1771 "set_memory_offset: specified rid not found\n"); 1772 return (ENOENT); 1773 } 1774 return (exca_mem_set_offset(&sc->exca, res, cardaddr, deltap)); 1775 } 1776 1777 /************************************************************************/ 1778 /* BUS Methods */ 1779 /************************************************************************/ 1780 1781 1782 static int 1783 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1784 struct resource *r) 1785 { 1786 struct cbb_softc *sc = device_get_softc(brdev); 1787 1788 if (sc->flags & CBB_16BIT_CARD) 1789 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1790 else 1791 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1792 r)); 1793 } 1794 1795 static int 1796 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1797 int rid, struct resource *r) 1798 { 1799 struct cbb_softc *sc = device_get_softc(brdev); 1800 1801 if (sc->flags & CBB_16BIT_CARD) 1802 return (cbb_pcic_deactivate_resource(brdev, child, type, 1803 rid, r)); 1804 else 1805 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1806 rid, r)); 1807 } 1808 1809 static struct resource * 1810 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1811 u_long start, u_long end, u_long count, uint flags) 1812 { 1813 struct cbb_softc *sc = device_get_softc(brdev); 1814 1815 if (sc->flags & CBB_16BIT_CARD) 1816 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1817 start, end, count, flags)); 1818 else 1819 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1820 start, end, count, flags)); 1821 } 1822 1823 static int 1824 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1825 struct resource *r) 1826 { 1827 struct cbb_softc *sc = device_get_softc(brdev); 1828 1829 if (sc->flags & CBB_16BIT_CARD) 1830 return (cbb_pcic_release_resource(brdev, child, type, 1831 rid, r)); 1832 else 1833 return (cbb_cardbus_release_resource(brdev, child, type, 1834 rid, r)); 1835 } 1836 1837 static int 1838 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1839 { 1840 struct cbb_softc *sc = device_get_softc(brdev); 1841 1842 switch (which) { 1843 case PCIB_IVAR_BUS: 1844 *result = sc->secbus; 1845 return (0); 1846 } 1847 return (ENOENT); 1848 } 1849 1850 static int 1851 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1852 { 1853 struct cbb_softc *sc = device_get_softc(brdev); 1854 1855 switch (which) { 1856 case PCIB_IVAR_BUS: 1857 sc->secbus = value; 1858 break; 1859 } 1860 return (ENOENT); 1861 } 1862 1863 /************************************************************************/ 1864 /* PCI compat methods */ 1865 /************************************************************************/ 1866 1867 static int 1868 cbb_maxslots(device_t brdev) 1869 { 1870 return (0); 1871 } 1872 1873 static uint32_t 1874 cbb_read_config(device_t brdev, int b, int s, int f, int reg, int width) 1875 { 1876 /* 1877 * Pass through to the next ppb up the chain (i.e. our grandparent). 1878 */ 1879 return (PCIB_READ_CONFIG(device_get_parent(device_get_parent(brdev)), 1880 b, s, f, reg, width)); 1881 } 1882 1883 static void 1884 cbb_write_config(device_t brdev, int b, int s, int f, int reg, uint32_t val, 1885 int width) 1886 { 1887 /* 1888 * Pass through to the next ppb up the chain (i.e. our grandparent). 1889 */ 1890 PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(brdev)), 1891 b, s, f, reg, val, width); 1892 } 1893 1894 static int 1895 cbb_suspend(device_t self) 1896 { 1897 int error = 0; 1898 struct cbb_softc *sc = device_get_softc(self); 1899 1900 bus_teardown_intr(self, sc->irq_res, sc->intrhand); 1901 sc->flags &= ~CBB_CARD_OK; /* Card is bogus now */ 1902 error = bus_generic_suspend(self); 1903 return (error); 1904 } 1905 1906 static int 1907 cbb_resume(device_t self) 1908 { 1909 int error = 0; 1910 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1911 uint32_t tmp; 1912 1913 /* 1914 * Some BIOSes will not save the BARs for the pci chips, so we 1915 * must do it ourselves. If the BAR is reset to 0 for an I/O 1916 * device, it will read back as 0x1, so no explicit test for 1917 * memory devices are needed. 1918 * 1919 * Note: The PCI bus code should do this automatically for us on 1920 * suspend/resume, but until it does, we have to cope. 1921 */ 1922 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4); 1923 DEVPRINTF((self, "PCI Memory allocated: %08lx\n", 1924 rman_get_start(sc->base_res))); 1925 1926 cbb_chipinit(sc); 1927 1928 /* reset interrupt -- Do we really need to do this? */ 1929 tmp = cbb_get(sc, CBB_SOCKET_EVENT); 1930 cbb_set(sc, CBB_SOCKET_EVENT, tmp); 1931 1932 /* re-establish the interrupt. */ 1933 if (bus_setup_intr(self, sc->irq_res, 0, cbb_intr, sc, 1934 &sc->intrhand, NULL)) { 1935 device_printf(self, "couldn't re-establish interrupt"); 1936 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res); 1937 bus_release_resource(self, SYS_RES_MEMORY, CBBR_SOCKBASE, 1938 sc->base_res); 1939 sc->irq_res = NULL; 1940 sc->base_res = NULL; 1941 return (ENOMEM); 1942 } 1943 1944 /* CSC Interrupt: Card detect interrupt on */ 1945 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 1946 1947 /* Signal the thread to wakeup. */ 1948 wakeup(sc); 1949 1950 error = bus_generic_resume(self); 1951 1952 return (error); 1953 } 1954 1955 static int 1956 cbb_child_present(device_t self) 1957 { 1958 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1959 uint32_t sockstate; 1960 1961 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1962 return ((sockstate & CBB_SOCKET_STAT_CD) != 0 && 1963 (sc->flags & CBB_CARD_OK) != 0); 1964 } 1965 1966 static device_method_t cbb_methods[] = { 1967 /* Device interface */ 1968 DEVMETHOD(device_probe, cbb_probe), 1969 DEVMETHOD(device_attach, cbb_attach), 1970 DEVMETHOD(device_detach, cbb_detach), 1971 DEVMETHOD(device_shutdown, cbb_shutdown), 1972 DEVMETHOD(device_suspend, cbb_suspend), 1973 DEVMETHOD(device_resume, cbb_resume), 1974 1975 /* bus methods */ 1976 DEVMETHOD(bus_print_child, bus_generic_print_child), 1977 DEVMETHOD(bus_read_ivar, cbb_read_ivar), 1978 DEVMETHOD(bus_write_ivar, cbb_write_ivar), 1979 DEVMETHOD(bus_alloc_resource, cbb_alloc_resource), 1980 DEVMETHOD(bus_release_resource, cbb_release_resource), 1981 DEVMETHOD(bus_activate_resource, cbb_activate_resource), 1982 DEVMETHOD(bus_deactivate_resource, cbb_deactivate_resource), 1983 DEVMETHOD(bus_driver_added, cbb_driver_added), 1984 DEVMETHOD(bus_child_detached, cbb_child_detached), 1985 DEVMETHOD(bus_setup_intr, cbb_setup_intr), 1986 DEVMETHOD(bus_teardown_intr, cbb_teardown_intr), 1987 DEVMETHOD(bus_child_present, cbb_child_present), 1988 1989 /* 16-bit card interface */ 1990 DEVMETHOD(card_set_res_flags, cbb_pcic_set_res_flags), 1991 DEVMETHOD(card_set_memory_offset, cbb_pcic_set_memory_offset), 1992 1993 /* power interface */ 1994 DEVMETHOD(power_enable_socket, cbb_power_enable_socket), 1995 DEVMETHOD(power_disable_socket, cbb_power_disable_socket), 1996 1997 /* pcib compatibility interface */ 1998 DEVMETHOD(pcib_maxslots, cbb_maxslots), 1999 DEVMETHOD(pcib_read_config, cbb_read_config), 2000 DEVMETHOD(pcib_write_config, cbb_write_config), 2001 {0,0} 2002 }; 2003 2004 static driver_t cbb_driver = { 2005 "cbb", 2006 cbb_methods, 2007 sizeof(struct cbb_softc) 2008 }; 2009 2010 static devclass_t cbb_devclass; 2011 2012 DRIVER_MODULE(cbb, pci, cbb_driver, cbb_devclass, 0, 0); 2013 MODULE_VERSION(cbb, 1); 2014 MODULE_DEPEND(cbb, exca, 1, 1, 1); 2015