1 /* 2 * Copyright (c) 2002 M. Warner Losh. 3 * Copyright (c) 2000,2001 Jonathan Chen. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions, and the following disclaimer, 11 * without modification, immediately at the beginning of the file. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in 14 * the documentation and/or other materials provided with the 15 * distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/dev/pccbb/pccbb.c,v 1.64 2002/11/23 23:09:45 imp Exp $ 30 * $DragonFly: src/sys/dev/pccard/pccbb/pccbb.c,v 1.10 2005/08/27 10:20:27 corecode Exp $ 31 */ 32 33 /* 34 * Copyright (c) 1998, 1999 and 2000 35 * HAYAKAWA Koichi. All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by HAYAKAWA Koichi. 48 * 4. The name of the author may not be used to endorse or promote products 49 * derived from this software without specific prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 52 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 53 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 54 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 55 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 56 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 60 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 */ 62 63 /* 64 * Driver for PCI to CardBus Bridge chips 65 * 66 * References: 67 * TI Datasheets: 68 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 69 * 70 * Written by Jonathan Chen <jon@freebsd.org> 71 * The author would like to acknowledge: 72 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 73 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 74 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 75 * * David Cross: Author of the initial ugly hack for a specific cardbus card 76 */ 77 78 #include <sys/param.h> 79 #include <sys/systm.h> 80 #include <sys/proc.h> 81 #include <sys/errno.h> 82 #include <sys/kernel.h> 83 #include <sys/lock.h> 84 #include <sys/malloc.h> 85 #include <sys/sysctl.h> 86 #include <sys/kthread.h> 87 #include <sys/bus.h> 88 #include <machine/bus.h> 89 #include <sys/rman.h> 90 #include <machine/resource.h> 91 92 #include <bus/pci/pcireg.h> 93 #include <bus/pci/pcivar.h> 94 #include <machine/clock.h> 95 96 #include <bus/pccard/pccardreg.h> 97 #include <bus/pccard/pccardvar.h> 98 99 #include <dev/pccard/exca/excareg.h> 100 #include <dev/pccard/exca/excavar.h> 101 102 #include <dev/pccard/pccbb/pccbbreg.h> 103 #include <dev/pccard/pccbb/pccbbvar.h> 104 105 #include "power_if.h" 106 #include "card_if.h" 107 #include "pcib_if.h" 108 109 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 110 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 111 112 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 113 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 114 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 115 pci_write_config(DEV, REG, ( \ 116 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 117 118 #define CBB_START_MEM 0x88000000 119 #define CBB_START_32_IO 0x1000 120 #define CBB_START_16_IO 0x100 121 122 struct yenta_chipinfo { 123 uint32_t yc_id; 124 const char *yc_name; 125 int yc_chiptype; 126 } yc_chipsets[] = { 127 /* Texas Instruments chips */ 128 {PCIC_ID_TI1031, "TI1031 PCI-PC Card Bridge", CB_TI113X}, 129 {PCIC_ID_TI1130, "TI1130 PCI-CardBus Bridge", CB_TI113X}, 130 {PCIC_ID_TI1131, "TI1131 PCI-CardBus Bridge", CB_TI113X}, 131 132 {PCIC_ID_TI1210, "TI1210 PCI-CardBus Bridge", CB_TI12XX}, 133 {PCIC_ID_TI1211, "TI1211 PCI-CardBus Bridge", CB_TI12XX}, 134 {PCIC_ID_TI1220, "TI1220 PCI-CardBus Bridge", CB_TI12XX}, 135 {PCIC_ID_TI1221, "TI1221 PCI-CardBus Bridge", CB_TI12XX}, 136 {PCIC_ID_TI1225, "TI1225 PCI-CardBus Bridge", CB_TI12XX}, 137 {PCIC_ID_TI1250, "TI1250 PCI-CardBus Bridge", CB_TI125X}, 138 {PCIC_ID_TI1251, "TI1251 PCI-CardBus Bridge", CB_TI125X}, 139 {PCIC_ID_TI1251B,"TI1251B PCI-CardBus Bridge",CB_TI125X}, 140 {PCIC_ID_TI1260, "TI1260 PCI-CardBus Bridge", CB_TI12XX}, 141 {PCIC_ID_TI1260B,"TI1260B PCI-CardBus Bridge",CB_TI12XX}, 142 {PCIC_ID_TI1410, "TI1410 PCI-CardBus Bridge", CB_TI12XX}, 143 {PCIC_ID_TI1420, "TI1420 PCI-CardBus Bridge", CB_TI12XX}, 144 {PCIC_ID_TI1421, "TI1421 PCI-CardBus Bridge", CB_TI12XX}, 145 {PCIC_ID_TI1450, "TI1450 PCI-CardBus Bridge", CB_TI125X}, /*SIC!*/ 146 {PCIC_ID_TI1451, "TI1451 PCI-CardBus Bridge", CB_TI12XX}, 147 {PCIC_ID_TI1510, "TI1510 PCI-CardBus Bridge", CB_TI12XX}, 148 {PCIC_ID_TI1520, "TI1520 PCI-CardBus Bridge", CB_TI12XX}, 149 {PCIC_ID_TI4410, "TI4410 PCI-CardBus Bridge", CB_TI12XX}, 150 {PCIC_ID_TI4450, "TI4450 PCI-CardBus Bridge", CB_TI12XX}, 151 {PCIC_ID_TI4451, "TI4451 PCI-CardBus Bridge", CB_TI12XX}, 152 {PCIC_ID_TI4510, "TI4510 PCI-CardBus Bridge", CB_TI12XX}, 153 154 /* Ricoh chips */ 155 {PCIC_ID_RICOH_RL5C465, "RF5C465 PCI-CardBus Bridge", CB_RF5C46X}, 156 {PCIC_ID_RICOH_RL5C466, "RF5C466 PCI-CardBus Bridge", CB_RF5C46X}, 157 {PCIC_ID_RICOH_RL5C475, "RF5C475 PCI-CardBus Bridge", CB_RF5C47X}, 158 {PCIC_ID_RICOH_RL5C476, "RF5C476 PCI-CardBus Bridge", CB_RF5C47X}, 159 {PCIC_ID_RICOH_RL5C477, "RF5C477 PCI-CardBus Bridge", CB_RF5C47X}, 160 {PCIC_ID_RICOH_RL5C478, "RF5C478 PCI-CardBus Bridge", CB_RF5C47X}, 161 162 /* Toshiba products */ 163 {PCIC_ID_TOPIC95, "ToPIC95 PCI-CardBus Bridge", CB_TOPIC95}, 164 {PCIC_ID_TOPIC95B, "ToPIC95B PCI-CardBus Bridge", CB_TOPIC95}, 165 {PCIC_ID_TOPIC97, "ToPIC97 PCI-CardBus Bridge", CB_TOPIC97}, 166 {PCIC_ID_TOPIC100, "ToPIC100 PCI-CardBus Bridge", CB_TOPIC97}, 167 168 /* Cirrus Logic */ 169 {PCIC_ID_CLPD6832, "CLPD6832 PCI-CardBus Bridge", CB_CIRRUS}, 170 {PCIC_ID_CLPD6833, "CLPD6833 PCI-CardBus Bridge", CB_CIRRUS}, 171 {PCIC_ID_CLPD6834, "CLPD6834 PCI-CardBus Bridge", CB_CIRRUS}, 172 173 /* 02Micro */ 174 {PCIC_ID_OZ6832, "O2Micro OZ6832/6833 PCI-CardBus Bridge", CB_CIRRUS}, 175 {PCIC_ID_OZ6860, "O2Micro OZ6836/6860 PCI-CardBus Bridge", CB_CIRRUS}, 176 {PCIC_ID_OZ6872, "O2Micro OZ6812/6872 PCI-CardBus Bridge", CB_CIRRUS}, 177 {PCIC_ID_OZ6912, "O2Micro OZ6912/6972 PCI-CardBus Bridge", CB_CIRRUS}, 178 {PCIC_ID_OZ6922, "O2Micro OZ6922 PCI-CardBus Bridge", CB_CIRRUS}, 179 {PCIC_ID_OZ6933, "O2Micro OZ6933 PCI-CardBus Bridge", CB_CIRRUS}, 180 181 /* sentinel */ 182 {0 /* null id */, "unknown", CB_UNKNOWN}, 183 }; 184 185 /* sysctl vars */ 186 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters"); 187 188 /* There's no way to say TUNEABLE_LONG to get the right types */ 189 u_long cbb_start_mem = CBB_START_MEM; 190 TUNABLE_INT("hw.cbb.start_memory", (int *)&cbb_start_mem); 191 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW, 192 &cbb_start_mem, CBB_START_MEM, 193 "Starting address for memory allocations"); 194 195 u_long cbb_start_16_io = CBB_START_16_IO; 196 TUNABLE_INT("hw.cbb.start_16_io", (int *)&cbb_start_16_io); 197 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW, 198 &cbb_start_16_io, CBB_START_16_IO, 199 "Starting ioport for 16-bit cards"); 200 201 u_long cbb_start_32_io = CBB_START_32_IO; 202 TUNABLE_INT("hw.cbb.start_32_io", (int *)&cbb_start_32_io); 203 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW, 204 &cbb_start_32_io, CBB_START_32_IO, 205 "Starting ioport for 32-bit cards"); 206 207 int cbb_debug = 0; 208 TUNABLE_INT("hw.cbb.debug", &cbb_debug); 209 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0, 210 "Verbose cardbus bridge debugging"); 211 212 static int cbb_chipset(uint32_t pci_id, const char **namep); 213 static int cbb_probe(device_t brdev); 214 static void cbb_chipinit(struct cbb_softc *sc); 215 static int cbb_attach(device_t brdev); 216 static void cbb_release_helper(device_t brdev); 217 static int cbb_detach(device_t brdev); 218 static int cbb_shutdown(device_t brdev); 219 static void cbb_driver_added(device_t brdev, driver_t *driver); 220 static void cbb_child_detached(device_t brdev, device_t child); 221 static void cbb_event_thread(void *arg); 222 static void cbb_insert(struct cbb_softc *sc); 223 static void cbb_removal(struct cbb_softc *sc); 224 static void cbb_intr(void *arg); 225 static int cbb_detect_voltage(device_t brdev); 226 static int cbb_power(device_t brdev, int volts); 227 static void cbb_cardbus_reset(device_t brdev); 228 static int cbb_cardbus_power_enable_socket(device_t brdev, 229 device_t child); 230 static void cbb_cardbus_power_disable_socket(device_t brdev, 231 device_t child); 232 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 233 uint32_t end); 234 static int cbb_cardbus_mem_open(device_t brdev, int win, 235 uint32_t start, uint32_t end); 236 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 237 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 238 int type, int rid, struct resource *res); 239 static int cbb_cardbus_deactivate_resource(device_t brdev, 240 device_t child, int type, int rid, struct resource *res); 241 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 242 device_t child, int type, int *rid, u_long start, 243 u_long end, u_long count, uint flags); 244 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 245 int type, int rid, struct resource *res); 246 static int cbb_power_enable_socket(device_t brdev, device_t child); 247 static void cbb_power_disable_socket(device_t brdev, device_t child); 248 static int cbb_activate_resource(device_t brdev, device_t child, 249 int type, int rid, struct resource *r); 250 static int cbb_deactivate_resource(device_t brdev, device_t child, 251 int type, int rid, struct resource *r); 252 static struct resource *cbb_alloc_resource(device_t brdev, device_t child, 253 int type, int *rid, u_long start, u_long end, u_long count, 254 uint flags); 255 static int cbb_release_resource(device_t brdev, device_t child, 256 int type, int rid, struct resource *r); 257 static int cbb_read_ivar(device_t brdev, device_t child, int which, 258 uintptr_t *result); 259 static int cbb_write_ivar(device_t brdev, device_t child, int which, 260 uintptr_t value); 261 static int cbb_maxslots(device_t brdev); 262 static uint32_t cbb_read_config(device_t brdev, int b, int s, int f, 263 int reg, int width); 264 static void cbb_write_config(device_t brdev, int b, int s, int f, 265 int reg, uint32_t val, int width); 266 267 /* 268 */ 269 static __inline void 270 cbb_set(struct cbb_softc *sc, uint32_t reg, uint32_t val) 271 { 272 bus_space_write_4(sc->bst, sc->bsh, reg, val); 273 } 274 275 static __inline uint32_t 276 cbb_get(struct cbb_softc *sc, uint32_t reg) 277 { 278 return (bus_space_read_4(sc->bst, sc->bsh, reg)); 279 } 280 281 static __inline void 282 cbb_setb(struct cbb_softc *sc, uint32_t reg, uint32_t bits) 283 { 284 cbb_set(sc, reg, cbb_get(sc, reg) | bits); 285 } 286 287 static __inline void 288 cbb_clrb(struct cbb_softc *sc, uint32_t reg, uint32_t bits) 289 { 290 cbb_set(sc, reg, cbb_get(sc, reg) & ~bits); 291 } 292 293 static void 294 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 295 { 296 struct cbb_reslist *rle; 297 298 SLIST_FOREACH(rle, &sc->rl, link) { 299 if (rle->res == res) { 300 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 301 free(rle, M_DEVBUF); 302 return; 303 } 304 } 305 } 306 307 static struct resource * 308 cbb_find_res(struct cbb_softc *sc, int type, int rid) 309 { 310 struct cbb_reslist *rle; 311 312 SLIST_FOREACH(rle, &sc->rl, link) 313 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 314 return (rle->res); 315 return (NULL); 316 } 317 318 static int 319 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 320 int rid) 321 { 322 struct cbb_reslist *rle; 323 324 /* 325 * Need to record allocated resource so we can iterate through 326 * it later. 327 */ 328 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 329 if (rle == NULL) 330 return (ENOMEM); 331 rle->res = res; 332 rle->type = type; 333 rle->rid = rid; 334 SLIST_INSERT_HEAD(&sc->rl, rle, link); 335 return (0); 336 } 337 338 static void 339 cbb_destroy_res(struct cbb_softc *sc) 340 { 341 struct cbb_reslist *rle; 342 343 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 344 device_printf(sc->dev, "Danger Will Robinson: Resource " 345 "left allocated! This is a bug... " 346 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type, 347 rman_get_start(rle->res)); 348 SLIST_REMOVE_HEAD(&sc->rl, link); 349 free(rle, M_DEVBUF); 350 } 351 } 352 353 /************************************************************************/ 354 /* Probe/Attach */ 355 /************************************************************************/ 356 357 static int 358 cbb_chipset(uint32_t pci_id, const char **namep) 359 { 360 struct yenta_chipinfo *ycp; 361 362 for (ycp = yc_chipsets; ycp->yc_id != 0 && pci_id != ycp->yc_id; ++ycp) 363 continue; 364 if (namep != NULL) 365 *namep = ycp->yc_name; 366 return (ycp->yc_chiptype); 367 } 368 369 static int 370 cbb_probe(device_t brdev) 371 { 372 const char *name; 373 uint32_t progif; 374 uint32_t subclass; 375 376 /* 377 * Do we know that we support the chipset? If so, then we 378 * accept the device. 379 */ 380 if (cbb_chipset(pci_get_devid(brdev), &name) != CB_UNKNOWN) { 381 device_set_desc(brdev, name); 382 return (0); 383 } 384 385 /* 386 * We do support generic CardBus bridges. All that we've seen 387 * to date have progif 0 (the Yenta spec, and successors mandate 388 * this). We do not support PCI PCMCIA bridges (with one exception) 389 * with this driver since they generally are I/O mapped. Those 390 * are supported by the pcic driver. This should help us be more 391 * future proof. 392 */ 393 subclass = pci_get_subclass(brdev); 394 progif = pci_get_progif(brdev); 395 if (subclass == PCIS_BRIDGE_CARDBUS && progif == 0) { 396 device_set_desc(brdev, "PCI-CardBus Bridge"); 397 return (0); 398 } 399 return (ENXIO); 400 } 401 402 403 static void 404 cbb_chipinit(struct cbb_softc *sc) 405 { 406 uint32_t mux, sysctrl; 407 408 /* Set CardBus latency timer */ 409 if (pci_read_config(sc->dev, PCIR_SECLAT_1, 1) < 0x20) 410 pci_write_config(sc->dev, PCIR_SECLAT_1, 0x20, 1); 411 412 /* Set PCI latency timer */ 413 if (pci_read_config(sc->dev, PCIR_LATTIMER, 1) < 0x20) 414 pci_write_config(sc->dev, PCIR_LATTIMER, 0x20, 1); 415 416 /* Enable memory access */ 417 PCI_MASK_CONFIG(sc->dev, PCIR_COMMAND, 418 | PCIM_CMD_MEMEN 419 | PCIM_CMD_PORTEN 420 | PCIM_CMD_BUSMASTEREN, 2); 421 422 /* disable Legacy IO */ 423 switch (sc->chipset) { 424 case CB_RF5C46X: 425 PCI_MASK_CONFIG(sc->dev, CBBR_BRIDGECTRL, 426 & ~(CBBM_BRIDGECTRL_RL_3E0_EN | 427 CBBM_BRIDGECTRL_RL_3E2_EN), 2); 428 break; 429 default: 430 pci_write_config(sc->dev, CBBR_LEGACY, 0x0, 4); 431 break; 432 } 433 434 /* Use PCI interrupt for interrupt routing */ 435 PCI_MASK2_CONFIG(sc->dev, CBBR_BRIDGECTRL, 436 & ~(CBBM_BRIDGECTRL_MASTER_ABORT | 437 CBBM_BRIDGECTRL_INTR_IREQ_EN), 438 | CBBM_BRIDGECTRL_WRITE_POST_EN, 439 2); 440 441 /* 442 * XXX this should be a function table, ala OLDCARD. This means 443 * that we could more easily support ISA interrupts for pccard 444 * cards if we had to. 445 */ 446 switch (sc->chipset) { 447 case CB_TI113X: 448 /* 449 * The TI 1031, TI 1130 and TI 1131 all require another bit 450 * be set to enable PCI routing of interrupts, and then 451 * a bit for each of the CSC and Function interrupts we 452 * want routed. 453 */ 454 PCI_MASK_CONFIG(sc->dev, CBBR_CBCTRL, 455 | CBBM_CBCTRL_113X_PCI_INTR | 456 CBBM_CBCTRL_113X_PCI_CSC | CBBM_CBCTRL_113X_PCI_IRQ_EN, 457 1); 458 PCI_MASK_CONFIG(sc->dev, CBBR_DEVCTRL, 459 & ~(CBBM_DEVCTRL_INT_SERIAL | 460 CBBM_DEVCTRL_INT_PCI), 1); 461 break; 462 case CB_TI12XX: 463 /* 464 * Some TI 12xx (and [14][45]xx) based pci cards 465 * sometimes have issues with the MFUNC register not 466 * being initialized due to a bad EEPROM on board. 467 * Laptops that this matters on have this register 468 * properly initialized. 469 * 470 * The TI125X parts have a different register. 471 */ 472 mux = pci_read_config(sc->dev, CBBR_MFUNC, 4); 473 sysctrl = pci_read_config(sc->dev, CBBR_SYSCTRL, 4); 474 if (mux == 0) { 475 mux = (mux & ~CBBM_MFUNC_PIN0) | 476 CBBM_MFUNC_PIN0_INTA; 477 if ((sysctrl & CBBM_SYSCTRL_INTRTIE) == 0) 478 mux = (mux & ~CBBM_MFUNC_PIN1) | 479 CBBM_MFUNC_PIN1_INTB; 480 pci_write_config(sc->dev, CBBR_MFUNC, mux, 4); 481 } 482 /*FALLTHROUGH*/ 483 case CB_TI125X: 484 /* 485 * Disable zoom video. Some machines initialize this 486 * improperly and exerpience has shown that this helps 487 * on some machines. 488 */ 489 pci_write_config(sc->dev, CBBR_MMCTRL, 0, 4); 490 break; 491 case CB_TOPIC97: 492 /* 493 * Disable Zoom Video, ToPIC 97, 100. 494 */ 495 pci_write_config(sc->dev, CBBR_TOPIC_ZV_CONTROL, 0, 1); 496 /* 497 * ToPIC 97, 100 498 * At offset 0xa1: INTERRUPT CONTROL register 499 * 0x1: Turn on INT interrupts. 500 */ 501 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_INTCTRL, 502 | CBBM_TOPIC_INTCTRL_INTIRQSEL, 1); 503 goto topic_common; 504 case CB_TOPIC95: 505 /* 506 * SOCKETCTRL appears to be TOPIC 95/B specific 507 */ 508 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_SOCKETCTRL, 509 | CBBM_TOPIC_SOCKETCTRL_SCR_IRQSEL, 4); 510 511 topic_common:; 512 /* 513 * At offset 0xa0: SLOT CONTROL 514 * 0x80 Enable CardBus Functionality 515 * 0x40 Enable CardBus and PC Card registers 516 * 0x20 Lock ID in exca regs 517 * 0x10 Write protect ID in config regs 518 * Clear the rest of the bits, which defaults the slot 519 * in legacy mode to 0x3e0 and offset 0. (legacy 520 * mode is determined elsewhere) 521 */ 522 pci_write_config(sc->dev, CBBR_TOPIC_SLOTCTRL, 523 CBBM_TOPIC_SLOTCTRL_SLOTON | 524 CBBM_TOPIC_SLOTCTRL_SLOTEN | 525 CBBM_TOPIC_SLOTCTRL_ID_LOCK | 526 CBBM_TOPIC_SLOTCTRL_ID_WP, 1); 527 528 /* 529 * At offset 0xa3 Card Detect Control Register 530 * 0x80 CARDBUS enbale 531 * 0x01 Cleared for hardware change detect 532 */ 533 PCI_MASK2_CONFIG(sc->dev, CBBR_TOPIC_CDC, 534 | CBBM_TOPIC_CDC_CARDBUS, 535 & ~CBBM_TOPIC_CDC_SWDETECT, 4); 536 break; 537 } 538 539 /* 540 * Need to tell ExCA registers to route via PCI interrupts. There 541 * are two ways to do this. Once is to set INTR_ENABLE and the 542 * other is to set CSC to 0. Since both methods are mutually 543 * compatible, we do both. 544 */ 545 exca_write(&sc->exca, EXCA_INTR, EXCA_INTR_ENABLE); 546 exca_write(&sc->exca, EXCA_CSC_INTR, 0); 547 548 /* close all memory and io windows */ 549 pci_write_config(sc->dev, CBBR_MEMBASE0, 0xffffffff, 4); 550 pci_write_config(sc->dev, CBBR_MEMLIMIT0, 0, 4); 551 pci_write_config(sc->dev, CBBR_MEMBASE1, 0xffffffff, 4); 552 pci_write_config(sc->dev, CBBR_MEMLIMIT1, 0, 4); 553 pci_write_config(sc->dev, CBBR_IOBASE0, 0xffffffff, 4); 554 pci_write_config(sc->dev, CBBR_IOLIMIT0, 0, 4); 555 pci_write_config(sc->dev, CBBR_IOBASE1, 0xffffffff, 4); 556 pci_write_config(sc->dev, CBBR_IOLIMIT1, 0, 4); 557 } 558 559 static int 560 cbb_attach(device_t brdev) 561 { 562 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(brdev); 563 int rid; 564 565 lockinit(&sc->lock, 0, "cbb", 0, 0); 566 sc->chipset = cbb_chipset(pci_get_devid(brdev), NULL); 567 sc->dev = brdev; 568 sc->cbdev = NULL; 569 sc->pccarddev = NULL; 570 sc->secbus = pci_read_config(brdev, PCIR_SECBUS_2, 1); 571 sc->subbus = pci_read_config(brdev, PCIR_SUBBUS_2, 1); 572 SLIST_INIT(&sc->rl); 573 STAILQ_INIT(&sc->intr_handlers); 574 575 #ifndef BURN_THE_BOATS 576 /* 577 * The PCI bus code should assign us memory in the absense 578 * of the BIOS doing so. However, 'should' isn't 'is,' so we kludge 579 * up something here until the PCI/acpi code properly assigns the 580 * resource. 581 */ 582 #endif 583 rid = CBBR_SOCKBASE; 584 sc->base_res = bus_alloc_resource(brdev, SYS_RES_MEMORY, &rid, 585 0, ~0, 1, RF_ACTIVE); 586 if (!sc->base_res) { 587 #ifdef BURN_THE_BOATS 588 device_printf(brdev, "Could not map register memory\n"); 589 return (ENOMEM); 590 #else 591 uint32_t sockbase; 592 593 /* 594 * Generally, the BIOS will assign this memory for us. 595 * However, newer BIOSes do not because the MS design 596 * documents have mandated that this is for the OS 597 * to assign rather than the BIOS. This driver shouldn't 598 * be doing this, but until the pci bus code (or acpi) 599 * does this, we allow CardBus bridges to work on more 600 * machines. 601 */ 602 pci_write_config(brdev, rid, 0xffffffff, 4); 603 sockbase = pci_read_config(brdev, rid, 4); 604 sockbase = (sockbase & 0xfffffff0) & -(sockbase & 0xfffffff0); 605 sc->base_res = bus_generic_alloc_resource( 606 device_get_parent(brdev), brdev, SYS_RES_MEMORY, 607 &rid, cbb_start_mem, ~0, sockbase, 608 RF_ACTIVE|rman_make_alignment_flags(sockbase)); 609 if (!sc->base_res) { 610 device_printf(brdev, 611 "Could not grab register memory\n"); 612 return (ENOMEM); 613 } 614 sc->flags |= CBB_KLUDGE_ALLOC; 615 pci_write_config(brdev, CBBR_SOCKBASE, 616 rman_get_start(sc->base_res), 4); 617 #endif 618 } 619 DEVPRINTF((brdev, "PCI Memory allocated: %08lx\n", 620 rman_get_start(sc->base_res))); 621 622 sc->bst = rman_get_bustag(sc->base_res); 623 sc->bsh = rman_get_bushandle(sc->base_res); 624 exca_init(&sc->exca, brdev, sc->bst, sc->bsh, CBB_EXCA_OFFSET); 625 sc->exca.flags |= EXCA_HAS_MEMREG_WIN; 626 cbb_chipinit(sc); 627 628 /* attach children */ 629 sc->cbdev = device_add_child(brdev, "cardbus", -1); 630 if (sc->cbdev == NULL) 631 DEVPRINTF((brdev, "WARNING: cannot add cardbus bus.\n")); 632 else if (device_probe_and_attach(sc->cbdev) != 0) { 633 DEVPRINTF((brdev, "WARNING: cannot attach cardbus bus!\n")); 634 sc->cbdev = NULL; 635 } 636 637 sc->pccarddev = device_add_child(brdev, "pccard", -1); 638 if (sc->pccarddev == NULL) 639 DEVPRINTF((brdev, "WARNING: cannot add pccard bus.\n")); 640 else if (device_probe_and_attach(sc->pccarddev) != 0) { 641 DEVPRINTF((brdev, "WARNING: cannot attach pccard bus.\n")); 642 sc->pccarddev = NULL; 643 } 644 645 /* Map and establish the interrupt. */ 646 rid = 0; 647 sc->irq_res = bus_alloc_resource(brdev, SYS_RES_IRQ, &rid, 0, ~0, 1, 648 RF_SHAREABLE | RF_ACTIVE); 649 if (sc->irq_res == NULL) { 650 printf("cbb: Unable to map IRQ...\n"); 651 goto err; 652 } 653 654 if (bus_setup_intr(brdev, sc->irq_res, INTR_TYPE_NET, cbb_intr, sc, 655 &sc->intrhand, NULL)) { 656 device_printf(brdev, "couldn't establish interrupt"); 657 goto err; 658 } 659 660 /* reset 16-bit pcmcia bus */ 661 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET); 662 663 /* turn off power */ 664 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 665 666 /* CSC Interrupt: Card detect interrupt on */ 667 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 668 669 /* reset interrupt */ 670 cbb_set(sc, CBB_SOCKET_EVENT, cbb_get(sc, CBB_SOCKET_EVENT)); 671 672 /* Start the thread */ 673 if (kthread_create(cbb_event_thread, sc, &sc->event_thread, 674 "%s%d", device_get_name(sc->dev), device_get_unit(sc->dev))) { 675 device_printf (sc->dev, "unable to create event thread.\n"); 676 panic ("cbb_create_event_thread"); 677 } 678 679 return (0); 680 err: 681 if (sc->irq_res) 682 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 683 if (sc->base_res) { 684 if (sc->flags & CBB_KLUDGE_ALLOC) 685 bus_generic_release_resource(device_get_parent(brdev), 686 brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 687 sc->base_res); 688 else 689 bus_release_resource(brdev, SYS_RES_MEMORY, 690 CBBR_SOCKBASE, sc->base_res); 691 } 692 return (ENOMEM); 693 } 694 695 /* 696 * shutdown and detach both call the release helper to disable the interrupt 697 * and cleanup the resources. 698 */ 699 static 700 void 701 cbb_release_helper(device_t brdev) 702 { 703 struct cbb_softc *sc = device_get_softc(brdev); 704 705 lockmgr(&sc->lock, LK_EXCLUSIVE, NULL, curthread); 706 sc->flags |= CBB_KTHREAD_DONE; 707 lockmgr(&sc->lock, LK_RELEASE, NULL, curthread); 708 if (sc->flags & CBB_KTHREAD_RUNNING) { 709 wakeup(sc); 710 tsleep(cbb_detach, 0, "pccbb", 2); 711 } 712 713 /* 714 * Reset the bridge controller and reset the interrupt, then tear 715 * it down (which disables the interrupt) and de-power. 716 */ 717 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 718 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET); 719 720 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 721 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 722 723 /* 724 * Release interrupt and memory-mapped resources. Device memory 725 * cannot be safely accessed after we do this. 726 */ 727 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 728 if (sc->flags & CBB_KLUDGE_ALLOC) { 729 bus_generic_release_resource(device_get_parent(brdev), 730 brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 731 sc->base_res); 732 } else { 733 bus_release_resource(brdev, SYS_RES_MEMORY, 734 CBBR_SOCKBASE, sc->base_res); 735 } 736 } 737 738 static int 739 cbb_detach(device_t brdev) 740 { 741 device_t *devlist; 742 int numdevs; 743 int error; 744 int i; 745 746 device_get_children(brdev, &devlist, &numdevs); 747 748 error = 0; 749 for (i = 0; i < numdevs; i++) { 750 if (device_detach(devlist[i]) == 0) 751 device_delete_child(brdev, devlist[i]); 752 else 753 error++; 754 } 755 free (devlist, M_TEMP); 756 if (error == 0) 757 cbb_release_helper(brdev); 758 else 759 error = ENXIO; 760 return (error); 761 } 762 763 static int 764 cbb_shutdown(device_t brdev) 765 { 766 device_t *devlist; 767 int numdevs; 768 int i; 769 770 device_get_children(brdev, &devlist, &numdevs); 771 772 for (i = 0; i < numdevs; i++) { 773 if (device_shutdown(devlist[i]) == 0) 774 ; /* XXX delete the child without detach? */ 775 } 776 free (devlist, M_TEMP); 777 cbb_release_helper(brdev); 778 779 /* 780 * This may prevent bios confusion on reboot for some bioses 781 */ 782 pci_write_config(brdev, PCIR_COMMAND, 0, 2); 783 return (0); 784 } 785 786 static int 787 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 788 int flags, driver_intr_t *intr, void *arg, 789 void **cookiep, lwkt_serialize_t serializer) 790 { 791 struct cbb_intrhand *ih; 792 struct cbb_softc *sc = device_get_softc(dev); 793 794 /* 795 * You aren't allowed to have fast interrupts for pccard/cardbus 796 * things since those interrupts are PCI and shared. Since we use 797 * the PCI interrupt for the status change interrupts, it can't be 798 * free for use by the driver. Fast interrupts must not be shared. 799 */ 800 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_WAITOK|M_ZERO); 801 if (ih == NULL) 802 return (ENOMEM); 803 *cookiep = ih; 804 ih->intr = intr; 805 ih->arg = arg; 806 KKASSERT(serializer == NULL); /* not yet supported */ 807 STAILQ_INSERT_TAIL(&sc->intr_handlers, ih, entries); 808 /* 809 * XXX we should do what old card does to ensure that we don't 810 * XXX call the function's interrupt routine(s). 811 */ 812 /* 813 * XXX need to turn on ISA interrupts, if we ever support them, but 814 * XXX for now that's all we need to do. 815 */ 816 return (0); 817 } 818 819 static int 820 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 821 void *cookie) 822 { 823 struct cbb_intrhand *ih; 824 struct cbb_softc *sc = device_get_softc(dev); 825 826 cbb_setb(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */ 827 /* XXX Need to do different things for ISA interrupts. */ 828 ih = (struct cbb_intrhand *) cookie; 829 STAILQ_REMOVE(&sc->intr_handlers, ih, cbb_intrhand, entries); 830 free(ih, M_DEVBUF); 831 return (0); 832 } 833 834 835 static void 836 cbb_driver_added(device_t brdev, driver_t *driver) 837 { 838 struct cbb_softc *sc = device_get_softc(brdev); 839 device_t *devlist; 840 int tmp; 841 int numdevs; 842 int wake; 843 uint32_t sockstate; 844 845 DEVICE_IDENTIFY(driver, brdev); 846 device_get_children(brdev, &devlist, &numdevs); 847 wake = 0; 848 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 849 for (tmp = 0; tmp < numdevs; tmp++) { 850 if (device_get_state(devlist[tmp]) == DS_NOTPRESENT && 851 device_probe_and_attach(devlist[tmp]) == 0) { 852 if (devlist[tmp] == NULL) 853 /* NOTHING */; 854 else if (strcmp(driver->name, "cardbus") == 0) { 855 sc->cbdev = devlist[tmp]; 856 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) && 857 (sockstate & CBB_SOCKET_STAT_CB)) 858 wake++; 859 } else if (strcmp(driver->name, "pccard") == 0) { 860 sc->pccarddev = devlist[tmp]; 861 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) && 862 (sockstate & CBB_SOCKET_STAT_16BIT)) 863 wake++; 864 } else 865 device_printf(brdev, 866 "Unsupported child bus: %s\n", 867 driver->name); 868 } 869 } 870 free(devlist, M_TEMP); 871 872 if (wake > 0) { 873 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) 874 == 0) { 875 wakeup(sc); 876 } 877 } 878 } 879 880 static void 881 cbb_child_detached(device_t brdev, device_t child) 882 { 883 struct cbb_softc *sc = device_get_softc(brdev); 884 885 if (child == sc->cbdev) 886 sc->cbdev = NULL; 887 else if (child == sc->pccarddev) 888 sc->pccarddev = NULL; 889 else 890 device_printf(brdev, "Unknown child detached: %s %p/%p\n", 891 device_get_nameunit(child), sc->cbdev, sc->pccarddev); 892 } 893 894 /************************************************************************/ 895 /* Kthreads */ 896 /************************************************************************/ 897 898 static void 899 cbb_event_thread(void *arg) 900 { 901 struct cbb_softc *sc = arg; 902 uint32_t status; 903 int err; 904 905 /* 906 * We take out Giant here because we need it deep, down in 907 * the bowels of the vm system for mapping the memory we need 908 * to read the CIS. We also need it for kthread_exit, which 909 * drops it. 910 */ 911 sc->flags |= CBB_KTHREAD_RUNNING; 912 while (1) { 913 /* 914 * Check to see if we have anything first so that 915 * if there's a card already inserted, we do the 916 * right thing. 917 */ 918 lockmgr(&sc->lock, LK_EXCLUSIVE, NULL, curthread); 919 if (sc->flags & CBB_KTHREAD_DONE) 920 break; 921 922 status = cbb_get(sc, CBB_SOCKET_STATE); 923 /* mtx_lock(&Giant); */ 924 if ((status & CBB_SOCKET_STAT_CD) == 0) 925 cbb_insert(sc); 926 else 927 cbb_removal(sc); 928 lockmgr(&sc->lock, LK_RELEASE, NULL, curthread); 929 /* mtx_unlock(&Giant); */ 930 931 /* 932 * Wait until it has been 1s since the last time we 933 * get an interrupt. We handle the rest of the interrupt 934 * at the top of the loop. 935 */ 936 err = tsleep(sc, 0, "pccbb", 0); 937 while (err != EWOULDBLOCK && 938 (sc->flags & CBB_KTHREAD_DONE) == 0) 939 err = tsleep(sc, 0, "pccbb", 1 * hz); 940 } 941 sc->flags &= ~CBB_KTHREAD_RUNNING; 942 lockmgr(&sc->lock, LK_RELEASE, NULL, curthread); 943 /* mtx_lock(&Giant); */ 944 kthread_exit(); 945 } 946 947 /************************************************************************/ 948 /* Insert/removal */ 949 /************************************************************************/ 950 951 static void 952 cbb_insert(struct cbb_softc *sc) 953 { 954 uint32_t sockevent, sockstate; 955 956 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 957 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 958 959 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 960 sockevent, sockstate)); 961 962 if (sockstate & CBB_SOCKET_STAT_16BIT) { 963 if (sc->pccarddev != NULL) { 964 sc->flags |= CBB_16BIT_CARD; 965 sc->flags |= CBB_CARD_OK; 966 if (CARD_ATTACH_CARD(sc->pccarddev) != 0) { 967 device_printf(sc->dev, 968 "PC Card card activation failed\n"); 969 sc->flags &= ~CBB_CARD_OK; 970 } 971 } else { 972 device_printf(sc->dev, 973 "PC Card inserted, but no pccard bus.\n"); 974 } 975 } else if (sockstate & CBB_SOCKET_STAT_CB) { 976 if (sc->cbdev != NULL) { 977 sc->flags &= ~CBB_16BIT_CARD; 978 sc->flags |= CBB_CARD_OK; 979 if (CARD_ATTACH_CARD(sc->cbdev) != 0) { 980 device_printf(sc->dev, 981 "CardBus card activation failed\n"); 982 sc->flags &= ~CBB_CARD_OK; 983 } 984 } else { 985 device_printf(sc->dev, 986 "CardBus card inserted, but no cardbus bus.\n"); 987 } 988 } else { 989 /* 990 * We should power the card down, and try again a couple of 991 * times if this happens. XXX 992 */ 993 device_printf (sc->dev, "Unsupported card type detected\n"); 994 } 995 } 996 997 static void 998 cbb_removal(struct cbb_softc *sc) 999 { 1000 if (sc->flags & CBB_16BIT_CARD) { 1001 if (sc->pccarddev != NULL) 1002 CARD_DETACH_CARD(sc->pccarddev); 1003 } else { 1004 if (sc->cbdev != NULL) 1005 CARD_DETACH_CARD(sc->cbdev); 1006 } 1007 cbb_destroy_res(sc); 1008 } 1009 1010 /************************************************************************/ 1011 /* Interrupt Handler */ 1012 /************************************************************************/ 1013 1014 static void 1015 cbb_intr(void *arg) 1016 { 1017 struct cbb_softc *sc = arg; 1018 uint32_t sockevent; 1019 struct cbb_intrhand *ih; 1020 1021 /* 1022 * This ISR needs work XXX 1023 */ 1024 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 1025 if (sockevent) { 1026 /* ack the interrupt */ 1027 cbb_setb(sc, CBB_SOCKET_EVENT, sockevent); 1028 1029 /* 1030 * If anything has happened to the socket, we assume that 1031 * the card is no longer OK, and we shouldn't call its 1032 * ISR. We set CARD_OK as soon as we've attached the 1033 * card. This helps in a noisy eject, which happens 1034 * all too often when users are ejecting their PC Cards. 1035 * 1036 * We use this method in preference to checking to see if 1037 * the card is still there because the check suffers from 1038 * a race condition in the bouncing case. Prior versions 1039 * of the pccard software used a similar trick and achieved 1040 * excellent results. 1041 */ 1042 if (sockevent & CBB_SOCKET_EVENT_CD) { 1043 lockmgr(&sc->lock, LK_EXCLUSIVE, NULL, curthread); 1044 sc->flags &= ~CBB_CARD_OK; 1045 lockmgr(&sc->lock, LK_RELEASE, NULL, curthread); 1046 wakeup(sc); 1047 } 1048 if (sockevent & CBB_SOCKET_EVENT_CSTS) { 1049 DPRINTF((" cstsevent occured: 0x%08x\n", 1050 cbb_get(sc, CBB_SOCKET_STATE))); 1051 } 1052 if (sockevent & CBB_SOCKET_EVENT_POWER) { 1053 DPRINTF((" pwrevent occured: 0x%08x\n", 1054 cbb_get(sc, CBB_SOCKET_STATE))); 1055 } 1056 /* Other bits? */ 1057 } 1058 if (sc->flags & CBB_CARD_OK) { 1059 STAILQ_FOREACH(ih, &sc->intr_handlers, entries) { 1060 (*ih->intr)(ih->arg); 1061 } 1062 1063 } 1064 } 1065 1066 /************************************************************************/ 1067 /* Generic Power functions */ 1068 /************************************************************************/ 1069 1070 static int 1071 cbb_detect_voltage(device_t brdev) 1072 { 1073 struct cbb_softc *sc = device_get_softc(brdev); 1074 uint32_t psr; 1075 int vol = CARD_UKN_CARD; 1076 1077 psr = cbb_get(sc, CBB_SOCKET_STATE); 1078 1079 if (psr & CBB_SOCKET_STAT_5VCARD) 1080 vol |= CARD_5V_CARD; 1081 if (psr & CBB_SOCKET_STAT_3VCARD) 1082 vol |= CARD_3V_CARD; 1083 if (psr & CBB_SOCKET_STAT_XVCARD) 1084 vol |= CARD_XV_CARD; 1085 if (psr & CBB_SOCKET_STAT_YVCARD) 1086 vol |= CARD_YV_CARD; 1087 1088 return (vol); 1089 } 1090 1091 static int 1092 cbb_power(device_t brdev, int volts) 1093 { 1094 uint32_t status, sock_ctrl; 1095 struct cbb_softc *sc = device_get_softc(brdev); 1096 int timeout; 1097 uint32_t sockevent; 1098 1099 DEVPRINTF((sc->dev, "cbb_power: %s and %s [%x]\n", 1100 (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" : 1101 (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" : 1102 (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" : 1103 (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" : 1104 (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" : 1105 (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" : 1106 "VCC-UNKNOWN", 1107 (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" : 1108 (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V" : 1109 (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC" : 1110 (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" : 1111 "VPP-UNKNOWN", 1112 volts)); 1113 1114 status = cbb_get(sc, CBB_SOCKET_STATE); 1115 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 1116 1117 switch (volts & CARD_VCCMASK) { 1118 case CARD_VCC_UC: 1119 break; 1120 case CARD_VCC_5V: 1121 if (CBB_SOCKET_STAT_5VCARD & status) { /* check 5 V card */ 1122 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 1123 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 1124 } else { 1125 device_printf(sc->dev, 1126 "BAD voltage request: no 5 V card\n"); 1127 } 1128 break; 1129 case CARD_VCC_3V: 1130 if (CBB_SOCKET_STAT_3VCARD & status) { 1131 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 1132 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 1133 } else { 1134 device_printf(sc->dev, 1135 "BAD voltage request: no 3.3 V card\n"); 1136 } 1137 break; 1138 case CARD_VCC_0V: 1139 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 1140 break; 1141 default: 1142 return (0); /* power NEVER changed */ 1143 break; 1144 } 1145 1146 switch (volts & CARD_VPPMASK) { 1147 case CARD_VPP_UC: 1148 break; 1149 case CARD_VPP_0V: 1150 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 1151 break; 1152 case CARD_VPP_VCC: 1153 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 1154 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 1155 break; 1156 case CARD_VPP_12V: 1157 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 1158 sock_ctrl |= CBB_SOCKET_CTRL_VPP_12V; 1159 break; 1160 } 1161 1162 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 1163 return (1); /* no change necessary */ 1164 1165 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 1166 status = cbb_get(sc, CBB_SOCKET_STATE); 1167 1168 /* 1169 * XXX This busy wait is bogus. We should wait for a power 1170 * interrupt and then whine if the status is bad. If we're 1171 * worried about the card not coming up, then we should also 1172 * schedule a timeout which we can cacel in the power interrupt. 1173 */ 1174 timeout = 20; 1175 do { 1176 DELAY(20*1000); 1177 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 1178 } while (!(sockevent & CBB_SOCKET_EVENT_POWER) && --timeout > 0); 1179 /* reset event status */ 1180 /* XXX should only reset EVENT_POWER */ 1181 cbb_set(sc, CBB_SOCKET_EVENT, sockevent); 1182 if (timeout < 0) { 1183 printf ("VCC supply failed.\n"); 1184 return (0); 1185 } 1186 1187 /* XXX 1188 * delay 400 ms: thgough the standard defines that the Vcc set-up time 1189 * is 20 ms, some PC-Card bridge requires longer duration. 1190 * XXX Note: We should check the stutus AFTER the delay to give time 1191 * for things to stabilize. 1192 */ 1193 DELAY(400*1000); 1194 1195 if (status & CBB_SOCKET_STAT_BADVCC) { 1196 device_printf(sc->dev, 1197 "bad Vcc request. ctrl=0x%x, status=0x%x\n", 1198 sock_ctrl ,status); 1199 printf("cbb_power: %s and %s [%x]\n", 1200 (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" : 1201 (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" : 1202 (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" : 1203 (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" : 1204 (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" : 1205 (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" : 1206 "VCC-UNKNOWN", 1207 (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" : 1208 (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V": 1209 (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC": 1210 (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" : 1211 "VPP-UNKNOWN", 1212 volts); 1213 return (0); 1214 } 1215 return (1); /* power changed correctly */ 1216 } 1217 1218 /* 1219 * detect the voltage for the card, and set it. Since the power 1220 * used is the square of the voltage, lower voltages is a big win 1221 * and what Windows does (and what Microsoft prefers). The MS paper 1222 * also talks about preferring the CIS entry as well. 1223 */ 1224 static int 1225 cbb_do_power(device_t brdev) 1226 { 1227 int voltage; 1228 1229 /* Prefer lowest voltage supported */ 1230 voltage = cbb_detect_voltage(brdev); 1231 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 1232 if (voltage & CARD_YV_CARD) 1233 cbb_power(brdev, CARD_VCC_YV | CARD_VPP_VCC); 1234 else if (voltage & CARD_XV_CARD) 1235 cbb_power(brdev, CARD_VCC_XV | CARD_VPP_VCC); 1236 else if (voltage & CARD_3V_CARD) 1237 cbb_power(brdev, CARD_VCC_3V | CARD_VPP_VCC); 1238 else if (voltage & CARD_5V_CARD) 1239 cbb_power(brdev, CARD_VCC_5V | CARD_VPP_VCC); 1240 else { 1241 device_printf(brdev, "Unknown card voltage\n"); 1242 return (ENXIO); 1243 } 1244 return (0); 1245 } 1246 1247 /************************************************************************/ 1248 /* CardBus power functions */ 1249 /************************************************************************/ 1250 1251 static void 1252 cbb_cardbus_reset(device_t brdev) 1253 { 1254 struct cbb_softc *sc = device_get_softc(brdev); 1255 int delay_us; 1256 1257 delay_us = sc->chipset == CB_RF5C47X ? 400*1000 : 20*1000; 1258 1259 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 1260 1261 DELAY(delay_us); 1262 1263 /* If a card exists, unreset it! */ 1264 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) == 0) { 1265 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 1266 &~CBBM_BRIDGECTRL_RESET, 2); 1267 DELAY(delay_us); 1268 } 1269 } 1270 1271 static int 1272 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 1273 { 1274 struct cbb_softc *sc = device_get_softc(brdev); 1275 int err; 1276 1277 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) == 1278 CBB_SOCKET_STAT_CD) 1279 return (ENODEV); 1280 1281 err = cbb_do_power(brdev); 1282 if (err) 1283 return (err); 1284 cbb_cardbus_reset(brdev); 1285 return (0); 1286 } 1287 1288 static void 1289 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 1290 { 1291 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 1292 cbb_cardbus_reset(brdev); 1293 } 1294 1295 /************************************************************************/ 1296 /* CardBus Resource */ 1297 /************************************************************************/ 1298 1299 static int 1300 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 1301 { 1302 int basereg; 1303 int limitreg; 1304 1305 if ((win < 0) || (win > 1)) { 1306 DEVPRINTF((brdev, 1307 "cbb_cardbus_io_open: window out of range %d\n", win)); 1308 return (EINVAL); 1309 } 1310 1311 basereg = win * 8 + CBBR_IOBASE0; 1312 limitreg = win * 8 + CBBR_IOLIMIT0; 1313 1314 pci_write_config(brdev, basereg, start, 4); 1315 pci_write_config(brdev, limitreg, end, 4); 1316 return (0); 1317 } 1318 1319 static int 1320 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 1321 { 1322 int basereg; 1323 int limitreg; 1324 1325 if ((win < 0) || (win > 1)) { 1326 DEVPRINTF((brdev, 1327 "cbb_cardbus_mem_open: window out of range %d\n", win)); 1328 return (EINVAL); 1329 } 1330 1331 basereg = win*8 + CBBR_MEMBASE0; 1332 limitreg = win*8 + CBBR_MEMLIMIT0; 1333 1334 pci_write_config(brdev, basereg, start, 4); 1335 pci_write_config(brdev, limitreg, end, 4); 1336 return (0); 1337 } 1338 1339 /* 1340 * XXX The following function belongs in the pci bus layer. 1341 */ 1342 static void 1343 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1344 { 1345 uint32_t starts[2]; 1346 uint32_t ends[2]; 1347 struct cbb_reslist *rle; 1348 int align; 1349 int prefetchable[2]; 1350 uint32_t reg; 1351 1352 starts[0] = starts[1] = 0xffffffff; 1353 ends[0] = ends[1] = 0; 1354 1355 if (type == SYS_RES_MEMORY) 1356 align = CBB_MEMALIGN; 1357 else if (type == SYS_RES_IOPORT) 1358 align = CBB_IOALIGN; 1359 else 1360 align = 1; 1361 1362 SLIST_FOREACH(rle, &sc->rl, link) { 1363 if (rle->type != type) 1364 ; 1365 else if (rle->res == NULL) { 1366 device_printf(sc->dev, "WARNING: Resource not reserved? " 1367 "(type=%d, addr=%lx)\n", 1368 rle->type, rman_get_start(rle->res)); 1369 } else if (!(rman_get_flags(rle->res) & RF_ACTIVE)) { 1370 /* XXX */ 1371 } else if (starts[0] == 0xffffffff) { 1372 starts[0] = rman_get_start(rle->res); 1373 ends[0] = rman_get_end(rle->res); 1374 prefetchable[0] = 1375 rman_get_flags(rle->res) & RF_PREFETCHABLE; 1376 } else if (rman_get_end(rle->res) > ends[0] && 1377 rman_get_start(rle->res) - ends[0] < 1378 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] == 1379 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) { 1380 ends[0] = rman_get_end(rle->res); 1381 } else if (rman_get_start(rle->res) < starts[0] && 1382 starts[0] - rman_get_end(rle->res) < 1383 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] == 1384 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) { 1385 starts[0] = rman_get_start(rle->res); 1386 } else if (starts[1] == 0xffffffff) { 1387 starts[1] = rman_get_start(rle->res); 1388 ends[1] = rman_get_end(rle->res); 1389 prefetchable[1] = 1390 rman_get_flags(rle->res) & RF_PREFETCHABLE; 1391 } else if (rman_get_end(rle->res) > ends[1] && 1392 rman_get_start(rle->res) - ends[1] < 1393 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] == 1394 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) { 1395 ends[1] = rman_get_end(rle->res); 1396 } else if (rman_get_start(rle->res) < starts[1] && 1397 starts[1] - rman_get_end(rle->res) < 1398 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] == 1399 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) { 1400 starts[1] = rman_get_start(rle->res); 1401 } else { 1402 uint32_t diffs[2]; 1403 int win; 1404 1405 diffs[0] = diffs[1] = 0xffffffff; 1406 if (rman_get_start(rle->res) > ends[0]) 1407 diffs[0] = rman_get_start(rle->res) - ends[0]; 1408 else if (rman_get_end(rle->res) < starts[0]) 1409 diffs[0] = starts[0] - rman_get_end(rle->res); 1410 if (rman_get_start(rle->res) > ends[1]) 1411 diffs[1] = rman_get_start(rle->res) - ends[1]; 1412 else if (rman_get_end(rle->res) < starts[1]) 1413 diffs[1] = starts[1] - rman_get_end(rle->res); 1414 1415 win = (diffs[0] <= diffs[1])?0:1; 1416 if (rman_get_start(rle->res) > ends[win]) 1417 ends[win] = rman_get_end(rle->res); 1418 else if (rman_get_end(rle->res) < starts[win]) 1419 starts[win] = rman_get_start(rle->res); 1420 if (!(rman_get_flags(rle->res) & RF_PREFETCHABLE)) 1421 prefetchable[win] = 0; 1422 } 1423 1424 if (starts[0] != 0xffffffff) 1425 starts[0] -= starts[0] % align; 1426 if (starts[1] != 0xffffffff) 1427 starts[1] -= starts[1] % align; 1428 if (ends[0] % align != 0) 1429 ends[0] += align - ends[0]%align - 1; 1430 if (ends[1] % align != 0) 1431 ends[1] += align - ends[1]%align - 1; 1432 } 1433 1434 if (type == SYS_RES_MEMORY) { 1435 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1436 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1437 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1438 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0| 1439 CBBM_BRIDGECTRL_PREFETCH_1); 1440 reg |= (prefetchable[0]?CBBM_BRIDGECTRL_PREFETCH_0:0)| 1441 (prefetchable[1]?CBBM_BRIDGECTRL_PREFETCH_1:0); 1442 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1443 } else if (type == SYS_RES_IOPORT) { 1444 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1445 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1446 } 1447 } 1448 1449 static int 1450 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1451 int rid, struct resource *res) 1452 { 1453 int ret; 1454 1455 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1456 type, rid, res); 1457 if (ret != 0) 1458 return (ret); 1459 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1460 return (0); 1461 } 1462 1463 static int 1464 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1465 int rid, struct resource *res) 1466 { 1467 int ret; 1468 1469 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1470 type, rid, res); 1471 if (ret != 0) 1472 return (ret); 1473 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1474 return (0); 1475 } 1476 1477 static struct resource * 1478 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1479 int *rid, u_long start, u_long end, u_long count, uint flags) 1480 { 1481 struct cbb_softc *sc = device_get_softc(brdev); 1482 int tmp; 1483 struct resource *res; 1484 1485 switch (type) { 1486 case SYS_RES_IRQ: 1487 tmp = rman_get_start(sc->irq_res); 1488 if (start > tmp || end < tmp || count != 1) { 1489 device_printf(child, "requested interrupt %ld-%ld," 1490 "count = %ld not supported by cbb\n", 1491 start, end, count); 1492 return (NULL); 1493 } 1494 start = end = tmp; 1495 break; 1496 case SYS_RES_IOPORT: 1497 if (start <= cbb_start_32_io) 1498 start = cbb_start_32_io; 1499 if (end < start) 1500 end = start; 1501 break; 1502 case SYS_RES_MEMORY: 1503 if (start <= cbb_start_mem) 1504 start = cbb_start_mem; 1505 if (end < start) 1506 end = start; 1507 break; 1508 } 1509 1510 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1511 start, end, count, flags & ~RF_ACTIVE); 1512 if (res == NULL) { 1513 printf("cbb alloc res fail\n"); 1514 return (NULL); 1515 } 1516 if (cbb_insert_res(sc, res, type, *rid)) { 1517 BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, type, 1518 *rid, res); 1519 return (NULL); 1520 } 1521 if (flags & RF_ACTIVE) 1522 if (bus_activate_resource(child, type, *rid, res) != 0) { 1523 bus_release_resource(child, type, *rid, res); 1524 return (NULL); 1525 } 1526 1527 return (res); 1528 } 1529 1530 static int 1531 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1532 int rid, struct resource *res) 1533 { 1534 struct cbb_softc *sc = device_get_softc(brdev); 1535 int error; 1536 1537 if (rman_get_flags(res) & RF_ACTIVE) { 1538 error = bus_deactivate_resource(child, type, rid, res); 1539 if (error != 0) 1540 return (error); 1541 } 1542 cbb_remove_res(sc, res); 1543 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1544 type, rid, res)); 1545 } 1546 1547 /************************************************************************/ 1548 /* PC Card Power Functions */ 1549 /************************************************************************/ 1550 1551 static int 1552 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1553 { 1554 struct cbb_softc *sc = device_get_softc(brdev); 1555 int err; 1556 1557 DPRINTF(("cbb_pcic_socket_enable:\n")); 1558 1559 /* power down/up the socket to reset */ 1560 err = cbb_do_power(brdev); 1561 if (err) 1562 return (err); 1563 exca_reset(&sc->exca, child); 1564 1565 return (0); 1566 } 1567 1568 static void 1569 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1570 { 1571 struct cbb_softc *sc = device_get_softc(brdev); 1572 1573 DPRINTF(("cbb_pcic_socket_disable\n")); 1574 1575 /* reset signal asserting... */ 1576 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET); 1577 DELAY(2*1000); 1578 1579 /* power down the socket */ 1580 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 1581 exca_clrb(&sc->exca, EXCA_PWRCTL, EXCA_PWRCTL_OE); 1582 1583 /* wait 300ms until power fails (Tpf). */ 1584 DELAY(300 * 1000); 1585 } 1586 1587 /************************************************************************/ 1588 /* POWER methods */ 1589 /************************************************************************/ 1590 1591 static int 1592 cbb_power_enable_socket(device_t brdev, device_t child) 1593 { 1594 struct cbb_softc *sc = device_get_softc(brdev); 1595 1596 if (sc->flags & CBB_16BIT_CARD) 1597 return (cbb_pcic_power_enable_socket(brdev, child)); 1598 else 1599 return (cbb_cardbus_power_enable_socket(brdev, child)); 1600 } 1601 1602 static void 1603 cbb_power_disable_socket(device_t brdev, device_t child) 1604 { 1605 struct cbb_softc *sc = device_get_softc(brdev); 1606 if (sc->flags & CBB_16BIT_CARD) 1607 cbb_pcic_power_disable_socket(brdev, child); 1608 else 1609 cbb_cardbus_power_disable_socket(brdev, child); 1610 } 1611 static int 1612 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1613 struct resource *res) 1614 { 1615 int err; 1616 struct cbb_softc *sc = device_get_softc(brdev); 1617 if (!(rman_get_flags(res) & RF_ACTIVE)) { /* not already activated */ 1618 switch (type) { 1619 case SYS_RES_IOPORT: 1620 err = exca_io_map(&sc->exca, 0, res); 1621 break; 1622 case SYS_RES_MEMORY: 1623 err = exca_mem_map(&sc->exca, 0, res); 1624 break; 1625 default: 1626 err = 0; 1627 break; 1628 } 1629 if (err) 1630 return (err); 1631 1632 } 1633 return (BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1634 type, rid, res)); 1635 } 1636 1637 static int 1638 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1639 int rid, struct resource *res) 1640 { 1641 struct cbb_softc *sc = device_get_softc(brdev); 1642 1643 if (rman_get_flags(res) & RF_ACTIVE) { /* if activated */ 1644 switch (type) { 1645 case SYS_RES_IOPORT: 1646 if (exca_io_unmap_res(&sc->exca, res)) 1647 return (ENOENT); 1648 break; 1649 case SYS_RES_MEMORY: 1650 if (exca_mem_unmap_res(&sc->exca, res)) 1651 return (ENOENT); 1652 break; 1653 } 1654 } 1655 return (BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1656 type, rid, res)); 1657 } 1658 1659 static struct resource * 1660 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1661 u_long start, u_long end, u_long count, uint flags) 1662 { 1663 struct resource *res = NULL; 1664 struct cbb_softc *sc = device_get_softc(brdev); 1665 int tmp; 1666 1667 switch (type) { 1668 case SYS_RES_MEMORY: 1669 if (start < cbb_start_mem) 1670 start = cbb_start_mem; 1671 if (end < start) 1672 end = start; 1673 flags = (flags & ~RF_ALIGNMENT_MASK) | 1674 rman_make_alignment_flags(CBB_MEMALIGN); 1675 break; 1676 case SYS_RES_IOPORT: 1677 if (start < cbb_start_16_io) 1678 start = cbb_start_16_io; 1679 if (end < start) 1680 end = start; 1681 break; 1682 case SYS_RES_IRQ: 1683 tmp = rman_get_start(sc->irq_res); 1684 if (start > tmp || end < tmp || count != 1) { 1685 device_printf(child, "requested interrupt %ld-%ld," 1686 "count = %ld not supported by cbb\n", 1687 start, end, count); 1688 return (NULL); 1689 } 1690 flags |= RF_SHAREABLE; 1691 start = end = rman_get_start(sc->irq_res); 1692 break; 1693 } 1694 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1695 start, end, count, flags & ~RF_ACTIVE); 1696 if (res == NULL) 1697 return (NULL); 1698 if (cbb_insert_res(sc, res, type, *rid)) { 1699 BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, type, 1700 *rid, res); 1701 return (NULL); 1702 } 1703 if (flags & RF_ACTIVE) { 1704 if (bus_activate_resource(child, type, *rid, res) != 0) { 1705 bus_release_resource(child, type, *rid, res); 1706 return (NULL); 1707 } 1708 } 1709 1710 return (res); 1711 } 1712 1713 static int 1714 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1715 int rid, struct resource *res) 1716 { 1717 struct cbb_softc *sc = device_get_softc(brdev); 1718 int error; 1719 1720 if (rman_get_flags(res) & RF_ACTIVE) { 1721 error = bus_deactivate_resource(child, type, rid, res); 1722 if (error != 0) 1723 return (error); 1724 } 1725 cbb_remove_res(sc, res); 1726 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1727 type, rid, res)); 1728 } 1729 1730 /************************************************************************/ 1731 /* PC Card methods */ 1732 /************************************************************************/ 1733 1734 static int 1735 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1736 uint32_t flags) 1737 { 1738 struct cbb_softc *sc = device_get_softc(brdev); 1739 struct resource *res; 1740 1741 if (type != SYS_RES_MEMORY) 1742 return (EINVAL); 1743 res = cbb_find_res(sc, type, rid); 1744 if (res == NULL) { 1745 device_printf(brdev, 1746 "set_res_flags: specified rid not found\n"); 1747 return (ENOENT); 1748 } 1749 return (exca_mem_set_flags(&sc->exca, res, flags)); 1750 } 1751 1752 static int 1753 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1754 uint32_t cardaddr, uint32_t *deltap) 1755 { 1756 struct cbb_softc *sc = device_get_softc(brdev); 1757 struct resource *res; 1758 1759 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1760 if (res == NULL) { 1761 device_printf(brdev, 1762 "set_memory_offset: specified rid not found\n"); 1763 return (ENOENT); 1764 } 1765 return (exca_mem_set_offset(&sc->exca, res, cardaddr, deltap)); 1766 } 1767 1768 /************************************************************************/ 1769 /* BUS Methods */ 1770 /************************************************************************/ 1771 1772 1773 static int 1774 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1775 struct resource *r) 1776 { 1777 struct cbb_softc *sc = device_get_softc(brdev); 1778 1779 if (sc->flags & CBB_16BIT_CARD) 1780 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1781 else 1782 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1783 r)); 1784 } 1785 1786 static int 1787 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1788 int rid, struct resource *r) 1789 { 1790 struct cbb_softc *sc = device_get_softc(brdev); 1791 1792 if (sc->flags & CBB_16BIT_CARD) 1793 return (cbb_pcic_deactivate_resource(brdev, child, type, 1794 rid, r)); 1795 else 1796 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1797 rid, r)); 1798 } 1799 1800 static struct resource * 1801 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1802 u_long start, u_long end, u_long count, uint flags) 1803 { 1804 struct cbb_softc *sc = device_get_softc(brdev); 1805 1806 if (sc->flags & CBB_16BIT_CARD) 1807 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1808 start, end, count, flags)); 1809 else 1810 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1811 start, end, count, flags)); 1812 } 1813 1814 static int 1815 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1816 struct resource *r) 1817 { 1818 struct cbb_softc *sc = device_get_softc(brdev); 1819 1820 if (sc->flags & CBB_16BIT_CARD) 1821 return (cbb_pcic_release_resource(brdev, child, type, 1822 rid, r)); 1823 else 1824 return (cbb_cardbus_release_resource(brdev, child, type, 1825 rid, r)); 1826 } 1827 1828 static int 1829 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1830 { 1831 struct cbb_softc *sc = device_get_softc(brdev); 1832 1833 switch (which) { 1834 case PCIB_IVAR_BUS: 1835 *result = sc->secbus; 1836 return (0); 1837 } 1838 return (ENOENT); 1839 } 1840 1841 static int 1842 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1843 { 1844 struct cbb_softc *sc = device_get_softc(brdev); 1845 1846 switch (which) { 1847 case PCIB_IVAR_BUS: 1848 sc->secbus = value; 1849 break; 1850 } 1851 return (ENOENT); 1852 } 1853 1854 /************************************************************************/ 1855 /* PCI compat methods */ 1856 /************************************************************************/ 1857 1858 static int 1859 cbb_maxslots(device_t brdev) 1860 { 1861 return (0); 1862 } 1863 1864 static uint32_t 1865 cbb_read_config(device_t brdev, int b, int s, int f, int reg, int width) 1866 { 1867 /* 1868 * Pass through to the next ppb up the chain (i.e. our grandparent). 1869 */ 1870 return (PCIB_READ_CONFIG(device_get_parent(device_get_parent(brdev)), 1871 b, s, f, reg, width)); 1872 } 1873 1874 static void 1875 cbb_write_config(device_t brdev, int b, int s, int f, int reg, uint32_t val, 1876 int width) 1877 { 1878 /* 1879 * Pass through to the next ppb up the chain (i.e. our grandparent). 1880 */ 1881 PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(brdev)), 1882 b, s, f, reg, val, width); 1883 } 1884 1885 static int 1886 cbb_suspend(device_t self) 1887 { 1888 int error = 0; 1889 struct cbb_softc *sc = device_get_softc(self); 1890 1891 bus_teardown_intr(self, sc->irq_res, sc->intrhand); 1892 sc->flags &= ~CBB_CARD_OK; /* Card is bogus now */ 1893 error = bus_generic_suspend(self); 1894 return (error); 1895 } 1896 1897 static int 1898 cbb_resume(device_t self) 1899 { 1900 int error = 0; 1901 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1902 uint32_t tmp; 1903 1904 /* 1905 * Some BIOSes will not save the BARs for the pci chips, so we 1906 * must do it ourselves. If the BAR is reset to 0 for an I/O 1907 * device, it will read back as 0x1, so no explicit test for 1908 * memory devices are needed. 1909 * 1910 * Note: The PCI bus code should do this automatically for us on 1911 * suspend/resume, but until it does, we have to cope. 1912 */ 1913 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4); 1914 DEVPRINTF((self, "PCI Memory allocated: %08lx\n", 1915 rman_get_start(sc->base_res))); 1916 1917 cbb_chipinit(sc); 1918 1919 /* reset interrupt -- Do we really need to do this? */ 1920 tmp = cbb_get(sc, CBB_SOCKET_EVENT); 1921 cbb_set(sc, CBB_SOCKET_EVENT, tmp); 1922 1923 /* re-establish the interrupt. */ 1924 if (bus_setup_intr(self, sc->irq_res, INTR_TYPE_NET, cbb_intr, sc, 1925 &sc->intrhand, NULL)) { 1926 device_printf(self, "couldn't re-establish interrupt"); 1927 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res); 1928 bus_release_resource(self, SYS_RES_MEMORY, CBBR_SOCKBASE, 1929 sc->base_res); 1930 sc->irq_res = NULL; 1931 sc->base_res = NULL; 1932 return (ENOMEM); 1933 } 1934 1935 /* CSC Interrupt: Card detect interrupt on */ 1936 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 1937 1938 /* Signal the thread to wakeup. */ 1939 wakeup(sc); 1940 1941 error = bus_generic_resume(self); 1942 1943 return (error); 1944 } 1945 1946 static int 1947 cbb_child_present(device_t self) 1948 { 1949 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1950 uint32_t sockstate; 1951 1952 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1953 return ((sockstate & CBB_SOCKET_STAT_CD) != 0 && 1954 (sc->flags & CBB_CARD_OK) != 0); 1955 } 1956 1957 static device_method_t cbb_methods[] = { 1958 /* Device interface */ 1959 DEVMETHOD(device_probe, cbb_probe), 1960 DEVMETHOD(device_attach, cbb_attach), 1961 DEVMETHOD(device_detach, cbb_detach), 1962 DEVMETHOD(device_shutdown, cbb_shutdown), 1963 DEVMETHOD(device_suspend, cbb_suspend), 1964 DEVMETHOD(device_resume, cbb_resume), 1965 1966 /* bus methods */ 1967 DEVMETHOD(bus_print_child, bus_generic_print_child), 1968 DEVMETHOD(bus_read_ivar, cbb_read_ivar), 1969 DEVMETHOD(bus_write_ivar, cbb_write_ivar), 1970 DEVMETHOD(bus_alloc_resource, cbb_alloc_resource), 1971 DEVMETHOD(bus_release_resource, cbb_release_resource), 1972 DEVMETHOD(bus_activate_resource, cbb_activate_resource), 1973 DEVMETHOD(bus_deactivate_resource, cbb_deactivate_resource), 1974 DEVMETHOD(bus_driver_added, cbb_driver_added), 1975 DEVMETHOD(bus_child_detached, cbb_child_detached), 1976 DEVMETHOD(bus_setup_intr, cbb_setup_intr), 1977 DEVMETHOD(bus_teardown_intr, cbb_teardown_intr), 1978 DEVMETHOD(bus_child_present, cbb_child_present), 1979 1980 /* 16-bit card interface */ 1981 DEVMETHOD(card_set_res_flags, cbb_pcic_set_res_flags), 1982 DEVMETHOD(card_set_memory_offset, cbb_pcic_set_memory_offset), 1983 1984 /* power interface */ 1985 DEVMETHOD(power_enable_socket, cbb_power_enable_socket), 1986 DEVMETHOD(power_disable_socket, cbb_power_disable_socket), 1987 1988 /* pcib compatibility interface */ 1989 DEVMETHOD(pcib_maxslots, cbb_maxslots), 1990 DEVMETHOD(pcib_read_config, cbb_read_config), 1991 DEVMETHOD(pcib_write_config, cbb_write_config), 1992 {0,0} 1993 }; 1994 1995 static driver_t cbb_driver = { 1996 "cbb", 1997 cbb_methods, 1998 sizeof(struct cbb_softc) 1999 }; 2000 2001 static devclass_t cbb_devclass; 2002 2003 DRIVER_MODULE(cbb, pci, cbb_driver, cbb_devclass, 0, 0); 2004 MODULE_VERSION(cbb, 1); 2005 MODULE_DEPEND(cbb, exca, 1, 1, 1); 2006