1 /* 2 * Copyright (c) 2007 Rui Paulo <rpaulo@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 16 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 17 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 18 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 19 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 20 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 22 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 23 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 24 * POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/dev/coretemp/coretemp.c,v 1.2 2007/08/23 10:53:03 des Exp $ 27 */ 28 29 /* 30 * Device driver for Intel's On Die thermal sensor via MSR. 31 * First introduced in Intel's Core line of processors. 32 */ 33 34 #include <sys/param.h> 35 #include <sys/bus.h> 36 #include <sys/systm.h> 37 #include <sys/types.h> 38 #include <sys/module.h> 39 #include <sys/conf.h> 40 #include <sys/kernel.h> 41 #include <sys/sensors.h> 42 #include <sys/proc.h> /* for curthread */ 43 #include <sys/sched.h> 44 45 #include <machine/specialreg.h> 46 #include <machine/cpufunc.h> 47 #include <machine/md_var.h> 48 49 struct coretemp_softc { 50 struct ksensordev sc_sensordev; 51 struct ksensor sc_sensor; 52 device_t sc_dev; 53 int sc_tjmax; 54 }; 55 56 /* 57 * Device methods. 58 */ 59 static void coretemp_identify(driver_t *driver, device_t parent); 60 static int coretemp_probe(device_t dev); 61 static int coretemp_attach(device_t dev); 62 static int coretemp_detach(device_t dev); 63 64 static int coretemp_get_temp(device_t dev); 65 static void coretemp_refresh(void *arg); 66 67 static device_method_t coretemp_methods[] = { 68 /* Device interface */ 69 DEVMETHOD(device_identify, coretemp_identify), 70 DEVMETHOD(device_probe, coretemp_probe), 71 DEVMETHOD(device_attach, coretemp_attach), 72 DEVMETHOD(device_detach, coretemp_detach), 73 74 {0, 0} 75 }; 76 77 static driver_t coretemp_driver = { 78 "coretemp", 79 coretemp_methods, 80 sizeof(struct coretemp_softc), 81 }; 82 83 static devclass_t coretemp_devclass; 84 DRIVER_MODULE(coretemp, cpu, coretemp_driver, coretemp_devclass, NULL, NULL); 85 86 static void 87 coretemp_identify(driver_t *driver, device_t parent) 88 { 89 device_t child; 90 u_int regs[4]; 91 92 /* Make sure we're not being doubly invoked. */ 93 if (device_find_child(parent, "coretemp", -1) != NULL) 94 return; 95 96 /* Check that CPUID is supported and the vendor is Intel.*/ 97 if (cpu_high == 0 || strcmp(cpu_vendor, "GenuineIntel")) 98 return; 99 /* 100 * CPUID 0x06 returns 1 if the processor has on-die thermal 101 * sensors. EBX[0:3] contains the number of sensors. 102 */ 103 do_cpuid(0x06, regs); 104 if ((regs[0] & 0x1) != 1) 105 return; 106 107 /* 108 * We add a child for each CPU since settings must be performed 109 * on each CPU in the SMP case. 110 */ 111 child = device_add_child(parent, "coretemp", -1); 112 if (child == NULL) 113 device_printf(parent, "add coretemp child failed\n"); 114 } 115 116 static int 117 coretemp_probe(device_t dev) 118 { 119 if (resource_disabled("coretemp", 0)) 120 return (ENXIO); 121 122 device_set_desc(dev, "CPU On-Die Thermal Sensors"); 123 124 return (BUS_PROBE_GENERIC); 125 } 126 127 static int 128 coretemp_attach(device_t dev) 129 { 130 struct coretemp_softc *sc = device_get_softc(dev); 131 device_t pdev; 132 uint64_t msr; 133 int cpu_model; 134 int cpu_mask; 135 136 sc->sc_dev = dev; 137 pdev = device_get_parent(dev); 138 cpu_model = (cpu_id >> 4) & 15; 139 /* extended model */ 140 cpu_model += ((cpu_id >> 16) & 0xf) << 4; 141 cpu_mask = cpu_id & 15; 142 143 /* 144 * Check for errata AE18. 145 * "Processor Digital Thermal Sensor (DTS) Readout stops 146 * updating upon returning from C3/C4 state." 147 * 148 * Adapted from the Linux coretemp driver. 149 */ 150 if (cpu_model == 0xe && cpu_mask < 0xc) { 151 msr = rdmsr(MSR_BIOS_SIGN); 152 msr = msr >> 32; 153 if (msr < 0x39) { 154 device_printf(dev, "not supported (Intel errata " 155 "AE18), try updating your BIOS\n"); 156 return (ENXIO); 157 } 158 } 159 /* 160 * On some Core 2 CPUs, there's an undocumented MSR that 161 * can tell us if Tj(max) is 100 or 85. 162 * 163 * The if-clause for CPUs having the MSR_IA32_EXT_CONFIG was adapted 164 * from the Linux coretemp driver. 165 */ 166 sc->sc_tjmax = 100; 167 if ((cpu_model == 0xf && cpu_mask >= 2) || cpu_model == 0xe) { 168 msr = rdmsr(MSR_IA32_EXT_CONFIG); 169 if (msr & (1 << 30)) 170 sc->sc_tjmax = 85; 171 } 172 173 /* 174 * Add hw.sensors.cpuN.temp0 MIB. 175 */ 176 strlcpy(sc->sc_sensordev.xname, device_get_nameunit(pdev), 177 sizeof(sc->sc_sensordev.xname)); 178 sc->sc_sensor.type = SENSOR_TEMP; 179 sensor_attach(&sc->sc_sensordev, &sc->sc_sensor); 180 if (sensor_task_register(sc, coretemp_refresh, 2)) { 181 device_printf(dev, "unable to register update task\n"); 182 return (ENXIO); 183 } 184 sensordev_install(&sc->sc_sensordev); 185 186 return (0); 187 } 188 189 static int 190 coretemp_detach(device_t dev) 191 { 192 struct coretemp_softc *sc = device_get_softc(dev); 193 194 sensordev_deinstall(&sc->sc_sensordev); 195 sensor_task_unregister(sc); 196 197 return (0); 198 } 199 200 201 static int 202 coretemp_get_temp(device_t dev) 203 { 204 uint64_t msr; 205 int temp, cpu, origcpu; 206 struct coretemp_softc *sc = device_get_softc(dev); 207 char stemp[16]; 208 209 cpu = device_get_unit(device_get_parent(dev)); 210 211 /* 212 * Bind to specific CPU to read the correct temperature. 213 * If not all CPUs are initialised, then only read from 214 * cpu0, returning -1 on all other CPUs. 215 */ 216 if (ncpus > 1) { 217 origcpu = mycpuid; 218 lwkt_migratecpu(cpu); 219 220 msr = rdmsr(MSR_THERM_STATUS); 221 222 lwkt_migratecpu(origcpu); 223 } else if (cpu != 0) 224 return (-1); 225 else 226 msr = rdmsr(MSR_THERM_STATUS); 227 228 /* 229 * Check for Thermal Status and Thermal Status Log. 230 */ 231 if ((msr & 0x3) == 0x3) 232 device_printf(dev, "PROCHOT asserted\n"); 233 234 /* 235 * Bit 31 contains "Reading valid" 236 */ 237 if (((msr >> 31) & 0x1) == 1) { 238 /* 239 * Starting on bit 16 and ending on bit 22. 240 */ 241 temp = sc->sc_tjmax - ((msr >> 16) & 0x7f); 242 } else 243 temp = -1; 244 245 /* 246 * Check for Critical Temperature Status and Critical 247 * Temperature Log. 248 * It doesn't really matter if the current temperature is 249 * invalid because the "Critical Temperature Log" bit will 250 * tell us if the Critical Temperature has been reached in 251 * past. It's not directly related to the current temperature. 252 * 253 * If we reach a critical level, allow devctl(4) to catch this 254 * and shutdown the system. 255 */ 256 if (((msr >> 4) & 0x3) == 0x3) { 257 device_printf(dev, "critical temperature detected, " 258 "suggest system shutdown\n"); 259 ksnprintf(stemp, sizeof(stemp), "%d", temp); 260 devctl_notify("coretemp", "Thermal", stemp, "notify=0xcc"); 261 } 262 263 return (temp); 264 } 265 266 static void 267 coretemp_refresh(void *arg) 268 { 269 struct coretemp_softc *sc = arg; 270 device_t dev = sc->sc_dev; 271 struct ksensor *s = &sc->sc_sensor; 272 int temp; 273 274 temp = coretemp_get_temp(dev); 275 276 if (temp == -1) { 277 s->flags |= SENSOR_FINVALID; 278 s->value = 0; 279 } else { 280 s->flags &= ~SENSOR_FINVALID; 281 s->value = temp * 1000000 + 273150000; 282 } 283 } 284