1 /*- 2 * Copyright (c) 1999,2000 Michael Smith 3 * Copyright (c) 2000 BSDi 4 * Copyright (c) 2005 Scott Long 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 /*- 29 * Copyright (c) 2002 Eric Moore 30 * Copyright (c) 2002, 2004 LSI Logic Corporation 31 * All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. The party using or redistributing the source code and binary forms 42 * agrees to the disclaimer below and the terms and conditions set forth 43 * herein. 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 49 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 55 * SUCH DAMAGE. 56 * 57 * $FreeBSD: src/sys/dev/amr/amr.c,v 1.95 2010/01/07 21:01:37 mbr Exp $ 58 */ 59 60 /* 61 * Driver for the AMI MegaRaid family of controllers. 62 */ 63 64 #include <sys/param.h> 65 #include <sys/systm.h> 66 #include <sys/malloc.h> 67 #include <sys/kernel.h> 68 #include <sys/proc.h> 69 #include <sys/sysctl.h> 70 #include <sys/sysmsg.h> 71 72 #include <sys/bio.h> 73 #include <sys/bus.h> 74 #include <sys/conf.h> 75 #include <sys/stat.h> 76 77 #include <machine/cpu.h> 78 #include <sys/rman.h> 79 80 #include <bus/pci/pcireg.h> 81 #include <bus/pci/pcivar.h> 82 83 #include <dev/raid/amr/amrio.h> 84 #include <dev/raid/amr/amrreg.h> 85 #include <dev/raid/amr/amrvar.h> 86 #define AMR_DEFINE_TABLES 87 #include <dev/raid/amr/amr_tables.h> 88 89 SYSCTL_NODE(_hw, OID_AUTO, amr, CTLFLAG_RD, 0, "AMR driver parameters"); 90 91 static d_open_t amr_open; 92 static d_close_t amr_close; 93 static d_ioctl_t amr_ioctl; 94 95 static struct dev_ops amr_ops = { 96 { "amr", 0, 0 }, 97 .d_open = amr_open, 98 .d_close = amr_close, 99 .d_ioctl = amr_ioctl, 100 }; 101 102 int linux_no_adapter = 0; 103 /* 104 * Initialisation, bus interface. 105 */ 106 static void amr_startup(void *arg); 107 108 /* 109 * Command wrappers 110 */ 111 static int amr_query_controller(struct amr_softc *sc); 112 static void *amr_enquiry(struct amr_softc *sc, size_t bufsize, 113 u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual, int *status); 114 static void amr_completeio(struct amr_command *ac); 115 static int amr_support_ext_cdb(struct amr_softc *sc); 116 117 /* 118 * Command buffer allocation. 119 */ 120 static void amr_alloccmd_cluster(struct amr_softc *sc); 121 static void amr_freecmd_cluster(struct amr_command_cluster *acc); 122 123 /* 124 * Command processing. 125 */ 126 static int amr_bio_command(struct amr_softc *sc, struct amr_command **acp); 127 static int amr_wait_command(struct amr_command *ac) __unused; 128 static int amr_mapcmd(struct amr_command *ac); 129 static void amr_unmapcmd(struct amr_command *ac); 130 static int amr_start(struct amr_command *ac); 131 static void amr_complete(void *context, ac_qhead_t *head); 132 static void amr_setup_sg(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 133 static void amr_setup_data(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 134 static void amr_setup_ccb(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 135 static void amr_abort_load(struct amr_command *ac); 136 137 #if 0 138 /* 139 * Status monitoring 140 */ 141 static void amr_periodic(void *data); 142 #endif 143 144 /* 145 * Interface-specific shims 146 */ 147 static int amr_quartz_submit_command(struct amr_command *ac); 148 static int amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave); 149 static int amr_quartz_poll_command(struct amr_command *ac); 150 static int amr_quartz_poll_command1(struct amr_softc *sc, struct amr_command *ac); 151 152 static int amr_std_submit_command(struct amr_command *ac); 153 static int amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave); 154 static int amr_std_poll_command(struct amr_command *ac); 155 static void amr_std_attach_mailbox(struct amr_softc *sc); 156 157 #ifdef AMR_BOARD_INIT 158 static int amr_quartz_init(struct amr_softc *sc); 159 static int amr_std_init(struct amr_softc *sc); 160 #endif 161 162 /* 163 * Debugging 164 */ 165 static void amr_describe_controller(struct amr_softc *sc); 166 #ifdef AMR_DEBUG 167 #if 0 168 static void amr_printcommand(struct amr_command *ac); 169 #endif 170 #endif 171 172 static void amr_init_sysctl(struct amr_softc *sc); 173 static int amr_linux_ioctl_int(struct cdev *dev, u_long cmd, caddr_t addr, 174 int32_t flag, struct sysmsg *sm); 175 176 MALLOC_DEFINE(M_AMR, "amr", "AMR memory"); 177 178 /******************************************************************************** 179 ******************************************************************************** 180 Inline Glue 181 ******************************************************************************** 182 ********************************************************************************/ 183 184 /******************************************************************************** 185 ******************************************************************************** 186 Public Interfaces 187 ******************************************************************************** 188 ********************************************************************************/ 189 190 /******************************************************************************** 191 * Initialise the controller and softc. 192 */ 193 int 194 amr_attach(struct amr_softc *sc) 195 { 196 device_t child; 197 198 debug_called(1); 199 200 /* 201 * Initialise per-controller queues. 202 */ 203 amr_init_qhead(&sc->amr_freecmds); 204 amr_init_qhead(&sc->amr_ready); 205 TAILQ_INIT(&sc->amr_cmd_clusters); 206 bioq_init(&sc->amr_bioq); 207 208 debug(2, "queue init done"); 209 210 /* 211 * Configure for this controller type. 212 */ 213 if (AMR_IS_QUARTZ(sc)) { 214 sc->amr_submit_command = amr_quartz_submit_command; 215 sc->amr_get_work = amr_quartz_get_work; 216 sc->amr_poll_command = amr_quartz_poll_command; 217 sc->amr_poll_command1 = amr_quartz_poll_command1; 218 } else { 219 sc->amr_submit_command = amr_std_submit_command; 220 sc->amr_get_work = amr_std_get_work; 221 sc->amr_poll_command = amr_std_poll_command; 222 amr_std_attach_mailbox(sc); 223 } 224 225 #ifdef AMR_BOARD_INIT 226 if ((AMR_IS_QUARTZ(sc) ? amr_quartz_init(sc) : amr_std_init(sc))) 227 return(ENXIO); 228 #endif 229 230 /* 231 * Allocate initial commands. 232 */ 233 amr_alloccmd_cluster(sc); 234 235 /* 236 * Quiz controller for features and limits. 237 */ 238 if (amr_query_controller(sc)) 239 return(ENXIO); 240 241 debug(2, "controller query complete"); 242 243 /* 244 * preallocate the remaining commands. 245 */ 246 while (sc->amr_nextslot < sc->amr_maxio) 247 amr_alloccmd_cluster(sc); 248 249 /* 250 * Setup sysctls. 251 */ 252 sysctl_ctx_init(&sc->amr_sysctl_ctx); 253 sc->amr_sysctl_tree = SYSCTL_ADD_NODE(&sc->amr_sysctl_ctx, 254 SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO, 255 device_get_nameunit(sc->amr_dev), CTLFLAG_RD, 0, ""); 256 if (sc->amr_sysctl_tree == NULL) { 257 device_printf(sc->amr_dev, "can't add sysctl node\n"); 258 return (EINVAL); 259 } 260 amr_init_sysctl(sc); 261 262 /* 263 * Attach our 'real' SCSI channels to CAM. 264 */ 265 child = device_add_child(sc->amr_dev, "amrp", -1); 266 sc->amr_pass = child; 267 if (child != NULL) { 268 device_set_softc(child, sc); 269 device_set_desc(child, "SCSI Passthrough Bus"); 270 bus_generic_attach(sc->amr_dev); 271 } 272 273 /* 274 * Create the control device. 275 */ 276 sc->amr_dev_t = make_dev(&amr_ops, device_get_unit(sc->amr_dev), UID_ROOT, GID_OPERATOR, 277 S_IRUSR | S_IWUSR, "amr%d", device_get_unit(sc->amr_dev)); 278 sc->amr_dev_t->si_drv1 = sc; 279 linux_no_adapter++; 280 if (device_get_unit(sc->amr_dev) == 0) 281 make_dev_alias(sc->amr_dev_t, "megadev0"); 282 283 /* 284 * Schedule ourselves to bring the controller up once interrupts are 285 * available. 286 */ 287 bzero(&sc->amr_ich, sizeof(struct intr_config_hook)); 288 sc->amr_ich.ich_func = amr_startup; 289 sc->amr_ich.ich_arg = sc; 290 if (config_intrhook_establish(&sc->amr_ich) != 0) { 291 device_printf(sc->amr_dev, "can't establish configuration hook\n"); 292 return(ENOMEM); 293 } 294 295 /* 296 * Print a little information about the controller. 297 */ 298 amr_describe_controller(sc); 299 300 debug(2, "attach complete"); 301 return(0); 302 } 303 304 /******************************************************************************** 305 * Locate disk resources and attach children to them. 306 */ 307 static void 308 amr_startup(void *arg) 309 { 310 struct amr_softc *sc = (struct amr_softc *)arg; 311 struct amr_logdrive *dr; 312 int i, error; 313 314 debug_called(1); 315 callout_init(&sc->amr_timeout); 316 317 /* pull ourselves off the intrhook chain */ 318 if (sc->amr_ich.ich_func) 319 config_intrhook_disestablish(&sc->amr_ich); 320 sc->amr_ich.ich_func = NULL; 321 322 /* get up-to-date drive information */ 323 if (amr_query_controller(sc)) { 324 device_printf(sc->amr_dev, "can't scan controller for drives\n"); 325 return; 326 } 327 328 /* iterate over available drives */ 329 for (i = 0, dr = &sc->amr_drive[0]; (i < AMR_MAXLD) && (dr->al_size != 0xffffffff); i++, dr++) { 330 /* are we already attached to this drive? */ 331 if (dr->al_disk == 0) { 332 /* generate geometry information */ 333 if (dr->al_size > 0x200000) { /* extended translation? */ 334 dr->al_heads = 255; 335 dr->al_sectors = 63; 336 } else { 337 dr->al_heads = 64; 338 dr->al_sectors = 32; 339 } 340 dr->al_cylinders = dr->al_size / (dr->al_heads * dr->al_sectors); 341 342 dr->al_disk = device_add_child(sc->amr_dev, NULL, -1); 343 if (dr->al_disk == 0) 344 device_printf(sc->amr_dev, "device_add_child failed\n"); 345 device_set_ivars(dr->al_disk, dr); 346 } 347 } 348 349 if ((error = bus_generic_attach(sc->amr_dev)) != 0) 350 device_printf(sc->amr_dev, "bus_generic_attach returned %d\n", error); 351 352 /* mark controller back up */ 353 sc->amr_state &= ~AMR_STATE_SHUTDOWN; 354 355 /* interrupts will be enabled before we do anything more */ 356 sc->amr_state |= AMR_STATE_INTEN; 357 358 #if 0 359 /* 360 * Start the timeout routine. 361 */ 362 sc->amr_timeout = timeout(amr_periodic, sc, hz); 363 #endif 364 365 return; 366 } 367 368 static void 369 amr_init_sysctl(struct amr_softc *sc) 370 { 371 372 SYSCTL_ADD_INT(&sc->amr_sysctl_ctx, 373 SYSCTL_CHILDREN(sc->amr_sysctl_tree), 374 OID_AUTO, "allow_volume_configure", CTLFLAG_RW, &sc->amr_allow_vol_config, 0, 375 ""); 376 SYSCTL_ADD_INT(&sc->amr_sysctl_ctx, 377 SYSCTL_CHILDREN(sc->amr_sysctl_tree), 378 OID_AUTO, "nextslot", CTLFLAG_RD, &sc->amr_nextslot, 0, 379 ""); 380 SYSCTL_ADD_INT(&sc->amr_sysctl_ctx, 381 SYSCTL_CHILDREN(sc->amr_sysctl_tree), 382 OID_AUTO, "busyslots", CTLFLAG_RD, &sc->amr_busyslots, 0, 383 ""); 384 SYSCTL_ADD_INT(&sc->amr_sysctl_ctx, 385 SYSCTL_CHILDREN(sc->amr_sysctl_tree), 386 OID_AUTO, "maxio", CTLFLAG_RD, &sc->amr_maxio, 0, 387 ""); 388 } 389 390 391 /******************************************************************************* 392 * Free resources associated with a controller instance 393 */ 394 void 395 amr_free(struct amr_softc *sc) 396 { 397 struct amr_command_cluster *acc; 398 399 /* detach from CAM */ 400 if (sc->amr_pass != NULL) 401 device_delete_child(sc->amr_dev, sc->amr_pass); 402 403 /* cancel status timeout */ 404 callout_stop(&sc->amr_timeout); 405 406 /* throw away any command buffers */ 407 while ((acc = TAILQ_FIRST(&sc->amr_cmd_clusters)) != NULL) { 408 TAILQ_REMOVE(&sc->amr_cmd_clusters, acc, acc_link); 409 amr_freecmd_cluster(acc); 410 } 411 412 /* destroy control device */ 413 if(sc->amr_dev_t != (struct cdev *)NULL) 414 destroy_dev(sc->amr_dev_t); 415 dev_ops_remove_minor(&amr_ops, device_get_unit(sc->amr_dev)); 416 417 #if 0 /* XXX swildner */ 418 if (mtx_initialized(&sc->amr_hw_lock)) 419 mtx_destroy(&sc->amr_hw_lock); 420 421 if (mtx_initialized(&sc->amr_list_lock)) 422 mtx_destroy(&sc->amr_list_lock); 423 #endif 424 425 if (sc->amr_sysctl_tree != NULL) 426 sysctl_ctx_free(&sc->amr_sysctl_ctx); 427 428 lockuninit(&sc->amr_hw_lock); 429 lockuninit(&sc->amr_list_lock); 430 } 431 432 /******************************************************************************* 433 * Receive a bio structure from a child device and queue it on a particular 434 * disk resource, then poke the disk resource to start as much work as it can. 435 */ 436 int 437 amr_submit_bio(struct amr_softc *sc, struct bio *bio) 438 { 439 debug_called(2); 440 441 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 442 amr_enqueue_bio(sc, bio); 443 amr_startio(sc); 444 lockmgr(&sc->amr_list_lock, LK_RELEASE); 445 return(0); 446 } 447 448 /******************************************************************************** 449 * Accept an open operation on the control device. 450 */ 451 static int 452 amr_open(struct dev_open_args *ap) 453 { 454 cdev_t dev = ap->a_head.a_dev; 455 int unit = minor(dev); 456 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit); 457 458 debug_called(1); 459 460 sc->amr_state |= AMR_STATE_OPEN; 461 return(0); 462 } 463 464 #ifdef LSI 465 static int 466 amr_del_ld(struct amr_softc *sc, int drv_no, int status) 467 { 468 469 debug_called(1); 470 471 sc->amr_state &= ~AMR_STATE_QUEUE_FRZN; 472 sc->amr_state &= ~AMR_STATE_LD_DELETE; 473 sc->amr_state |= AMR_STATE_REMAP_LD; 474 debug(1, "State Set"); 475 476 if (!status) { 477 debug(1, "disk begin destroyed %d",drv_no); 478 if (--amr_disks_registered == 0) 479 cdevsw_remove(&amrddisk_cdevsw); 480 debug(1, "disk begin destroyed success"); 481 } 482 return 0; 483 } 484 485 static int 486 amr_prepare_ld_delete(struct amr_softc *sc) 487 { 488 489 debug_called(1); 490 if (sc->ld_del_supported == 0) 491 return(ENOIOCTL); 492 493 sc->amr_state |= AMR_STATE_QUEUE_FRZN; 494 sc->amr_state |= AMR_STATE_LD_DELETE; 495 496 /* 5 minutes for the all the commands to be flushed.*/ 497 tsleep((void *)&sc->ld_del_supported, PCATCH,"delete_logical_drv",hz * 60 * 1); 498 if ( sc->amr_busyslots ) 499 return(ENOIOCTL); 500 501 return 0; 502 } 503 #endif 504 505 /******************************************************************************** 506 * Accept the last close on the control device. 507 */ 508 static int 509 amr_close(struct dev_close_args *ap) 510 { 511 cdev_t dev = ap->a_head.a_dev; 512 int unit = minor(dev); 513 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit); 514 515 debug_called(1); 516 517 sc->amr_state &= ~AMR_STATE_OPEN; 518 return (0); 519 } 520 521 /******************************************************************************** 522 * Handle controller-specific control operations. 523 */ 524 static void 525 amr_rescan_drives(struct cdev *dev) 526 { 527 struct amr_softc *sc = (struct amr_softc *)dev->si_drv1; 528 int i, error = 0; 529 530 sc->amr_state |= AMR_STATE_REMAP_LD; 531 while (sc->amr_busyslots) { 532 device_printf(sc->amr_dev, "idle controller\n"); 533 amr_done(sc); 534 } 535 536 /* mark ourselves as in-shutdown */ 537 sc->amr_state |= AMR_STATE_SHUTDOWN; 538 539 /* flush controller */ 540 device_printf(sc->amr_dev, "flushing cache..."); 541 kprintf("%s\n", amr_flush(sc) ? "failed" : "done"); 542 543 /* delete all our child devices */ 544 for(i = 0 ; i < AMR_MAXLD; i++) { 545 if(sc->amr_drive[i].al_disk != 0) { 546 if((error = device_delete_child(sc->amr_dev, 547 sc->amr_drive[i].al_disk)) != 0) 548 goto shutdown_out; 549 550 sc->amr_drive[i].al_disk = 0; 551 } 552 } 553 554 shutdown_out: 555 amr_startup(sc); 556 } 557 558 int 559 amr_linux_ioctl_int(struct cdev *dev, u_long cmd, caddr_t addr, int32_t flag, 560 struct sysmsg *sm) 561 { 562 struct amr_softc *sc = (struct amr_softc *)dev->si_drv1; 563 struct amr_command *ac; 564 struct amr_mailbox *mb; 565 struct amr_linux_ioctl ali; 566 void *dp, *temp; 567 int error; 568 int adapter, len, ac_flags = 0; 569 int logical_drives_changed = 0; 570 u_int32_t linux_version = 0x02100000; 571 u_int8_t status; 572 struct amr_passthrough *ap; /* 60 bytes */ 573 574 error = 0; 575 dp = NULL; 576 ac = NULL; 577 ap = NULL; 578 579 if ((error = copyin(addr, &ali, sizeof(ali))) != 0) 580 return (error); 581 switch (ali.ui.fcs.opcode) { 582 case 0x82: 583 switch(ali.ui.fcs.subopcode) { 584 case 'e': 585 copyout(&linux_version, (void *)(uintptr_t)ali.data, 586 sizeof(linux_version)); 587 error = 0; 588 break; 589 590 case 'm': 591 copyout(&linux_no_adapter, (void *)(uintptr_t)ali.data, 592 sizeof(linux_no_adapter)); 593 sm->sm_result.iresult = linux_no_adapter; 594 error = 0; 595 break; 596 597 default: 598 kprintf("Unknown subopcode\n"); 599 error = ENOIOCTL; 600 break; 601 } 602 break; 603 604 case 0x80: 605 case 0x81: 606 if (ali.ui.fcs.opcode == 0x80) 607 len = max(ali.outlen, ali.inlen); 608 else 609 len = ali.ui.fcs.length; 610 611 adapter = (ali.ui.fcs.adapno) ^ 'm' << 8; 612 613 mb = (void *)&ali.mbox[0]; 614 615 if ((ali.mbox[0] == FC_DEL_LOGDRV && ali.mbox[2] == OP_DEL_LOGDRV) || /* delete */ 616 (ali.mbox[0] == AMR_CMD_CONFIG && ali.mbox[2] == 0x0d)) { /* create */ 617 if (sc->amr_allow_vol_config == 0) { 618 error = EPERM; 619 break; 620 } 621 logical_drives_changed = 1; 622 } 623 624 if (ali.mbox[0] == AMR_CMD_PASS) { 625 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 626 while ((ac = amr_alloccmd(sc)) == NULL) 627 lksleep(sc, &sc->amr_list_lock, 0, "amrioc", hz); 628 lockmgr(&sc->amr_list_lock, LK_RELEASE); 629 ap = &ac->ac_ccb->ccb_pthru; 630 631 error = copyin((void *)(uintptr_t)mb->mb_physaddr, ap, 632 sizeof(struct amr_passthrough)); 633 if (error) 634 break; 635 636 if (ap->ap_data_transfer_length) 637 dp = kmalloc(ap->ap_data_transfer_length, M_AMR, 638 M_WAITOK | M_ZERO); 639 640 if (ali.inlen) { 641 error = copyin((void *)(uintptr_t)ap->ap_data_transfer_address, 642 dp, ap->ap_data_transfer_length); 643 if (error) 644 break; 645 } 646 647 ac_flags = AMR_CMD_DATAIN|AMR_CMD_DATAOUT|AMR_CMD_CCB; 648 bzero(&ac->ac_mailbox, sizeof(ac->ac_mailbox)); 649 ac->ac_mailbox.mb_command = AMR_CMD_PASS; 650 ac->ac_flags = ac_flags; 651 652 ac->ac_data = dp; 653 ac->ac_length = ap->ap_data_transfer_length; 654 temp = (void *)(uintptr_t)ap->ap_data_transfer_address; 655 656 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 657 error = amr_wait_command(ac); 658 lockmgr(&sc->amr_list_lock, LK_RELEASE); 659 if (error) 660 break; 661 662 status = ac->ac_status; 663 error = copyout(&status, &((struct amr_passthrough *)(uintptr_t)mb->mb_physaddr)->ap_scsi_status, sizeof(status)); 664 if (error) 665 break; 666 667 if (ali.outlen) { 668 error = copyout(dp, temp, ap->ap_data_transfer_length); 669 if (error) 670 break; 671 } 672 error = copyout(ap->ap_request_sense_area, ((struct amr_passthrough *)(uintptr_t)mb->mb_physaddr)->ap_request_sense_area, ap->ap_request_sense_length); 673 if (error) 674 break; 675 676 error = 0; 677 break; 678 } else if (ali.mbox[0] == AMR_CMD_PASS_64) { 679 kprintf("No AMR_CMD_PASS_64\n"); 680 error = ENOIOCTL; 681 break; 682 } else if (ali.mbox[0] == AMR_CMD_EXTPASS) { 683 kprintf("No AMR_CMD_EXTPASS\n"); 684 error = ENOIOCTL; 685 break; 686 } else { 687 /* 688 * Bug-for-bug compatibility with Linux! 689 * Some apps will send commands with inlen and outlen set to 0, 690 * even though they expect data to be transfered to them from the 691 * card. Linux accidentally allows this by allocating a 4KB 692 * buffer for the transfer anyways, but it then throws it away 693 * without copying it back to the app. 694 */ 695 if (!len) 696 len = 4096; 697 698 dp = kmalloc(len, M_AMR, M_WAITOK | M_ZERO); 699 700 if (ali.inlen) { 701 error = copyin((void *)(uintptr_t)mb->mb_physaddr, dp, len); 702 if (error) 703 break; 704 } 705 706 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 707 while ((ac = amr_alloccmd(sc)) == NULL) 708 lksleep(sc, &sc->amr_list_lock, 0, "amrioc", hz); 709 710 ac_flags = AMR_CMD_DATAIN|AMR_CMD_DATAOUT; 711 bzero(&ac->ac_mailbox, sizeof(ac->ac_mailbox)); 712 bcopy(&ali.mbox[0], &ac->ac_mailbox, sizeof(ali.mbox)); 713 714 ac->ac_length = len; 715 ac->ac_data = dp; 716 ac->ac_flags = ac_flags; 717 718 error = amr_wait_command(ac); 719 lockmgr(&sc->amr_list_lock, LK_RELEASE); 720 if (error) 721 break; 722 723 status = ac->ac_status; 724 error = copyout(&status, &((struct amr_mailbox *)&((struct amr_linux_ioctl *)addr)->mbox[0])->mb_status, sizeof(status)); 725 if (ali.outlen) { 726 error = copyout(dp, (void *)(uintptr_t)mb->mb_physaddr, len); 727 if (error) 728 break; 729 } 730 731 error = 0; 732 if (logical_drives_changed) 733 amr_rescan_drives(dev); 734 break; 735 } 736 break; 737 738 default: 739 debug(1, "unknown linux ioctl 0x%lx", cmd); 740 kprintf("unknown linux ioctl 0x%lx\n", cmd); 741 error = ENOIOCTL; 742 break; 743 } 744 745 /* 746 * At this point, we know that there is a lock held and that these 747 * objects have been allocated. 748 */ 749 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 750 if (ac != NULL) 751 amr_releasecmd(ac); 752 lockmgr(&sc->amr_list_lock, LK_RELEASE); 753 if (dp != NULL) 754 kfree(dp, M_AMR); 755 return(error); 756 } 757 758 static int 759 amr_ioctl(struct dev_ioctl_args *ap) 760 { 761 cdev_t dev = ap->a_head.a_dev; 762 caddr_t addr = ap->a_data; 763 u_long cmd = ap->a_cmd; 764 struct amr_softc *sc = (struct amr_softc *)dev->si_drv1; 765 union { 766 void *_p; 767 struct amr_user_ioctl *au; 768 #ifdef AMR_IO_COMMAND32 769 struct amr_user_ioctl32 *au32; 770 #endif 771 int *result; 772 } arg; 773 struct amr_command *ac; 774 struct amr_mailbox_ioctl *mbi; 775 void *dp, *au_buffer; 776 unsigned long au_length; 777 unsigned char *au_cmd; 778 int *au_statusp, au_direction; 779 int error; 780 struct amr_passthrough *_ap; /* 60 bytes */ 781 int logical_drives_changed = 0; 782 783 debug_called(1); 784 785 arg._p = (void *)addr; 786 787 error = 0; 788 dp = NULL; 789 ac = NULL; 790 _ap = NULL; 791 792 switch(cmd) { 793 794 case AMR_IO_VERSION: 795 debug(1, "AMR_IO_VERSION"); 796 *arg.result = AMR_IO_VERSION_NUMBER; 797 return(0); 798 799 #ifdef AMR_IO_COMMAND32 800 /* 801 * Accept ioctl-s from 32-bit binaries on non-32-bit 802 * platforms, such as AMD. LSI's MEGAMGR utility is 803 * the only example known today... -mi 804 */ 805 case AMR_IO_COMMAND32: 806 debug(1, "AMR_IO_COMMAND32 0x%x", arg.au32->au_cmd[0]); 807 au_cmd = arg.au32->au_cmd; 808 au_buffer = (void *)(u_int64_t)arg.au32->au_buffer; 809 au_length = arg.au32->au_length; 810 au_direction = arg.au32->au_direction; 811 au_statusp = &arg.au32->au_status; 812 break; 813 #endif 814 815 case AMR_IO_COMMAND: 816 debug(1, "AMR_IO_COMMAND 0x%x", arg.au->au_cmd[0]); 817 au_cmd = arg.au->au_cmd; 818 au_buffer = (void *)arg.au->au_buffer; 819 au_length = arg.au->au_length; 820 au_direction = arg.au->au_direction; 821 au_statusp = &arg.au->au_status; 822 break; 823 824 case 0xc0046d00: 825 case 0xc06e6d00: /* Linux emulation */ 826 { 827 devclass_t devclass; 828 struct amr_linux_ioctl ali; 829 int adapter, error; 830 831 devclass = devclass_find("amr"); 832 if (devclass == NULL) 833 return (ENOENT); 834 835 error = copyin(addr, &ali, sizeof(ali)); 836 if (error) 837 return (error); 838 if (ali.ui.fcs.opcode == 0x82) 839 adapter = 0; 840 else 841 adapter = (ali.ui.fcs.adapno) ^ 'm' << 8; 842 843 sc = devclass_get_softc(devclass, adapter); 844 if (sc == NULL) 845 return (ENOENT); 846 847 return (amr_linux_ioctl_int(sc->amr_dev_t, cmd, addr, 0, ap->a_sysmsg)); 848 } 849 default: 850 debug(1, "unknown ioctl 0x%lx", cmd); 851 return(ENOIOCTL); 852 } 853 854 if ((au_cmd[0] == FC_DEL_LOGDRV && au_cmd[1] == OP_DEL_LOGDRV) || /* delete */ 855 (au_cmd[0] == AMR_CMD_CONFIG && au_cmd[1] == 0x0d)) { /* create */ 856 if (sc->amr_allow_vol_config == 0) { 857 error = EPERM; 858 goto out; 859 } 860 logical_drives_changed = 1; 861 #ifdef LSI 862 if ((error = amr_prepare_ld_delete(sc)) != 0) 863 return (error); 864 #endif 865 } 866 867 /* handle inbound data buffer */ 868 if (au_length != 0 && au_cmd[0] != 0x06) { 869 if ((dp = kmalloc(au_length, M_AMR, M_WAITOK|M_ZERO)) == NULL) { 870 error = ENOMEM; 871 goto out; 872 } 873 if ((error = copyin(au_buffer, dp, au_length)) != 0) { 874 kfree(dp, M_AMR); 875 return (error); 876 } 877 debug(2, "copyin %ld bytes from %p -> %p", au_length, au_buffer, dp); 878 } 879 880 /* Allocate this now before the mutex gets held */ 881 882 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 883 while ((ac = amr_alloccmd(sc)) == NULL) 884 lksleep(sc, &sc->amr_list_lock, 0, "amrioc", hz); 885 886 /* handle SCSI passthrough command */ 887 if (au_cmd[0] == AMR_CMD_PASS) { 888 int len; 889 890 _ap = &ac->ac_ccb->ccb_pthru; 891 bzero(_ap, sizeof(struct amr_passthrough)); 892 893 /* copy cdb */ 894 len = au_cmd[2]; 895 _ap->ap_cdb_length = len; 896 bcopy(au_cmd + 3, _ap->ap_cdb, len); 897 898 /* build passthrough */ 899 _ap->ap_timeout = au_cmd[len + 3] & 0x07; 900 _ap->ap_ars = (au_cmd[len + 3] & 0x08) ? 1 : 0; 901 _ap->ap_islogical = (au_cmd[len + 3] & 0x80) ? 1 : 0; 902 _ap->ap_logical_drive_no = au_cmd[len + 4]; 903 _ap->ap_channel = au_cmd[len + 5]; 904 _ap->ap_scsi_id = au_cmd[len + 6]; 905 _ap->ap_request_sense_length = 14; 906 _ap->ap_data_transfer_length = au_length; 907 /* XXX what about the request-sense area? does the caller want it? */ 908 909 /* build command */ 910 ac->ac_mailbox.mb_command = AMR_CMD_PASS; 911 ac->ac_flags = AMR_CMD_CCB; 912 913 } else { 914 /* direct command to controller */ 915 mbi = (struct amr_mailbox_ioctl *)&ac->ac_mailbox; 916 917 /* copy pertinent mailbox items */ 918 mbi->mb_command = au_cmd[0]; 919 mbi->mb_channel = au_cmd[1]; 920 mbi->mb_param = au_cmd[2]; 921 mbi->mb_pad[0] = au_cmd[3]; 922 mbi->mb_drive = au_cmd[4]; 923 ac->ac_flags = 0; 924 } 925 926 /* build the command */ 927 ac->ac_data = dp; 928 ac->ac_length = au_length; 929 ac->ac_flags |= AMR_CMD_DATAIN|AMR_CMD_DATAOUT; 930 931 /* run the command */ 932 error = amr_wait_command(ac); 933 lockmgr(&sc->amr_list_lock, LK_RELEASE); 934 if (error) 935 goto out; 936 937 /* copy out data and set status */ 938 if (au_length != 0) { 939 error = copyout(dp, au_buffer, au_length); 940 } 941 debug(2, "copyout %ld bytes from %p -> %p", au_length, dp, au_buffer); 942 if (dp != NULL) 943 debug(2, "%p status 0x%x", dp, ac->ac_status); 944 *au_statusp = ac->ac_status; 945 946 out: 947 /* 948 * At this point, we know that there is a lock held and that these 949 * objects have been allocated. 950 */ 951 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 952 if (ac != NULL) 953 amr_releasecmd(ac); 954 lockmgr(&sc->amr_list_lock, LK_RELEASE); 955 if (dp != NULL) 956 kfree(dp, M_AMR); 957 958 #ifndef LSI 959 if (logical_drives_changed) 960 amr_rescan_drives(dev); 961 #endif 962 963 return(error); 964 } 965 966 #if 0 967 /******************************************************************************** 968 ******************************************************************************** 969 Status Monitoring 970 ******************************************************************************** 971 ********************************************************************************/ 972 973 /******************************************************************************** 974 * Perform a periodic check of the controller status 975 */ 976 static void 977 amr_periodic(void *data) 978 { 979 struct amr_softc *sc = (struct amr_softc *)data; 980 981 debug_called(2); 982 983 /* XXX perform periodic status checks here */ 984 985 /* compensate for missed interrupts */ 986 amr_done(sc); 987 988 /* reschedule */ 989 callout_reset(&sc->amr_timeout, hz, amr_periodic, sc); 990 } 991 #endif 992 993 /******************************************************************************** 994 ******************************************************************************** 995 Command Wrappers 996 ******************************************************************************** 997 ********************************************************************************/ 998 999 /******************************************************************************** 1000 * Interrogate the controller for the operational parameters we require. 1001 */ 1002 static int 1003 amr_query_controller(struct amr_softc *sc) 1004 { 1005 struct amr_enquiry3 *aex; 1006 struct amr_prodinfo *ap; 1007 struct amr_enquiry *ae; 1008 int ldrv; 1009 int status; 1010 1011 /* 1012 * Greater than 10 byte cdb support 1013 */ 1014 sc->support_ext_cdb = amr_support_ext_cdb(sc); 1015 1016 if(sc->support_ext_cdb) { 1017 debug(2,"supports extended CDBs."); 1018 } 1019 1020 /* 1021 * Try to issue an ENQUIRY3 command 1022 */ 1023 if ((aex = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_ENQ3, 1024 AMR_CONFIG_ENQ3_SOLICITED_FULL, &status)) != NULL) { 1025 1026 /* 1027 * Fetch current state of logical drives. 1028 */ 1029 for (ldrv = 0; ldrv < aex->ae_numldrives; ldrv++) { 1030 sc->amr_drive[ldrv].al_size = aex->ae_drivesize[ldrv]; 1031 sc->amr_drive[ldrv].al_state = aex->ae_drivestate[ldrv]; 1032 sc->amr_drive[ldrv].al_properties = aex->ae_driveprop[ldrv]; 1033 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size, 1034 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties); 1035 } 1036 kfree(aex, M_AMR); 1037 1038 /* 1039 * Get product info for channel count. 1040 */ 1041 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0, &status)) == NULL) { 1042 device_printf(sc->amr_dev, "can't obtain product data from controller\n"); 1043 return(1); 1044 } 1045 sc->amr_maxdrives = 40; 1046 sc->amr_maxchan = ap->ap_nschan; 1047 sc->amr_maxio = ap->ap_maxio; 1048 sc->amr_type |= AMR_TYPE_40LD; 1049 kfree(ap, M_AMR); 1050 1051 ap = amr_enquiry(sc, 0, FC_DEL_LOGDRV, OP_SUP_DEL_LOGDRV, 0, &status); 1052 if (ap != NULL) 1053 kfree(ap, M_AMR); 1054 if (!status) { 1055 sc->amr_ld_del_supported = 1; 1056 device_printf(sc->amr_dev, "delete logical drives supported by controller\n"); 1057 } 1058 } else { 1059 1060 /* failed, try the 8LD ENQUIRY commands */ 1061 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0, &status)) == NULL) { 1062 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0, &status)) == NULL) { 1063 device_printf(sc->amr_dev, "can't obtain configuration data from controller\n"); 1064 return(1); 1065 } 1066 ae->ae_signature = 0; 1067 } 1068 1069 /* 1070 * Fetch current state of logical drives. 1071 */ 1072 for (ldrv = 0; ldrv < ae->ae_ldrv.al_numdrives; ldrv++) { 1073 sc->amr_drive[ldrv].al_size = ae->ae_ldrv.al_size[ldrv]; 1074 sc->amr_drive[ldrv].al_state = ae->ae_ldrv.al_state[ldrv]; 1075 sc->amr_drive[ldrv].al_properties = ae->ae_ldrv.al_properties[ldrv]; 1076 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size, 1077 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties); 1078 } 1079 1080 sc->amr_maxdrives = 8; 1081 sc->amr_maxchan = ae->ae_adapter.aa_channels; 1082 sc->amr_maxio = ae->ae_adapter.aa_maxio; 1083 kfree(ae, M_AMR); 1084 } 1085 1086 /* 1087 * Mark remaining drives as unused. 1088 */ 1089 for (; ldrv < AMR_MAXLD; ldrv++) 1090 sc->amr_drive[ldrv].al_size = 0xffffffff; 1091 1092 /* 1093 * Cap the maximum number of outstanding I/Os. AMI's Linux driver doesn't trust 1094 * the controller's reported value, and lockups have been seen when we do. 1095 */ 1096 sc->amr_maxio = imin(sc->amr_maxio, AMR_LIMITCMD); 1097 1098 return(0); 1099 } 1100 1101 /******************************************************************************** 1102 * Run a generic enquiry-style command. 1103 */ 1104 static void * 1105 amr_enquiry(struct amr_softc *sc, size_t bufsize, u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual, int *status) 1106 { 1107 struct amr_command *ac; 1108 void *result; 1109 u_int8_t *mbox; 1110 int error; 1111 1112 debug_called(1); 1113 1114 error = 1; 1115 result = NULL; 1116 1117 /* get ourselves a command buffer */ 1118 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1119 ac = amr_alloccmd(sc); 1120 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1121 if (ac == NULL) 1122 goto out; 1123 /* allocate the response structure */ 1124 if ((result = kmalloc(bufsize, M_AMR, M_ZERO|M_NOWAIT)) == NULL) 1125 goto out; 1126 /* set command flags */ 1127 1128 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAIN; 1129 1130 /* point the command at our data */ 1131 ac->ac_data = result; 1132 ac->ac_length = bufsize; 1133 1134 /* build the command proper */ 1135 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */ 1136 mbox[0] = cmd; 1137 mbox[2] = cmdsub; 1138 mbox[3] = cmdqual; 1139 *status = 0; 1140 1141 /* can't assume that interrupts are going to work here, so play it safe */ 1142 if (sc->amr_poll_command(ac)) 1143 goto out; 1144 error = ac->ac_status; 1145 *status = ac->ac_status; 1146 1147 out: 1148 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1149 if (ac != NULL) 1150 amr_releasecmd(ac); 1151 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1152 if ((error != 0) && (result != NULL)) { 1153 kfree(result, M_AMR); 1154 result = NULL; 1155 } 1156 return(result); 1157 } 1158 1159 /******************************************************************************** 1160 * Flush the controller's internal cache, return status. 1161 */ 1162 int 1163 amr_flush(struct amr_softc *sc) 1164 { 1165 struct amr_command *ac; 1166 int error; 1167 1168 /* get ourselves a command buffer */ 1169 error = 1; 1170 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1171 ac = amr_alloccmd(sc); 1172 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1173 if (ac == NULL) 1174 goto out; 1175 /* set command flags */ 1176 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 1177 1178 /* build the command proper */ 1179 ac->ac_mailbox.mb_command = AMR_CMD_FLUSH; 1180 1181 /* we have to poll, as the system may be going down or otherwise damaged */ 1182 if (sc->amr_poll_command(ac)) 1183 goto out; 1184 error = ac->ac_status; 1185 1186 out: 1187 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1188 if (ac != NULL) 1189 amr_releasecmd(ac); 1190 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1191 return(error); 1192 } 1193 1194 /******************************************************************************** 1195 * Detect extented cdb >> greater than 10 byte cdb support 1196 * returns '1' means this support exist 1197 * returns '0' means this support doesn't exist 1198 */ 1199 static int 1200 amr_support_ext_cdb(struct amr_softc *sc) 1201 { 1202 struct amr_command *ac; 1203 u_int8_t *mbox; 1204 int error; 1205 1206 /* get ourselves a command buffer */ 1207 error = 0; 1208 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1209 ac = amr_alloccmd(sc); 1210 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1211 if (ac == NULL) 1212 goto out; 1213 /* set command flags */ 1214 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 1215 1216 /* build the command proper */ 1217 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */ 1218 mbox[0] = 0xA4; 1219 mbox[2] = 0x16; 1220 1221 1222 /* we have to poll, as the system may be going down or otherwise damaged */ 1223 if (sc->amr_poll_command(ac)) 1224 goto out; 1225 if( ac->ac_status == AMR_STATUS_SUCCESS ) { 1226 error = 1; 1227 } 1228 1229 out: 1230 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1231 if (ac != NULL) 1232 amr_releasecmd(ac); 1233 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1234 return(error); 1235 } 1236 1237 /******************************************************************************** 1238 * Try to find I/O work for the controller from one or more of the work queues. 1239 * 1240 * We make the assumption that if the controller is not ready to take a command 1241 * at some given time, it will generate an interrupt at some later time when 1242 * it is. 1243 */ 1244 void 1245 amr_startio(struct amr_softc *sc) 1246 { 1247 struct amr_command *ac; 1248 1249 /* spin until something prevents us from doing any work */ 1250 for (;;) { 1251 1252 /* Don't bother to queue commands no bounce buffers are available. */ 1253 if (sc->amr_state & AMR_STATE_QUEUE_FRZN) 1254 break; 1255 1256 /* try to get a ready command */ 1257 ac = amr_dequeue_ready(sc); 1258 1259 /* if that failed, build a command from a bio */ 1260 if (ac == NULL) 1261 (void)amr_bio_command(sc, &ac); 1262 1263 /* if that failed, build a command from a ccb */ 1264 if ((ac == NULL) && (sc->amr_cam_command != NULL)) 1265 sc->amr_cam_command(sc, &ac); 1266 1267 /* if we don't have anything to do, give up */ 1268 if (ac == NULL) 1269 break; 1270 1271 /* try to give the command to the controller; if this fails save it for later and give up */ 1272 if (amr_start(ac)) { 1273 debug(2, "controller busy, command deferred"); 1274 amr_requeue_ready(ac); /* XXX schedule retry very soon? */ 1275 break; 1276 } 1277 } 1278 } 1279 1280 /******************************************************************************** 1281 * Handle completion of an I/O command. 1282 */ 1283 static void 1284 amr_completeio(struct amr_command *ac) 1285 { 1286 struct amr_softc *sc = ac->ac_sc; 1287 static struct timeval lastfail; 1288 static int curfail; 1289 struct buf *bp = ac->ac_bio->bio_buf; 1290 1291 if (ac->ac_status != AMR_STATUS_SUCCESS) { /* could be more verbose here? */ 1292 bp->b_error = EIO; 1293 bp->b_flags |= B_ERROR; 1294 1295 if (ppsratecheck(&lastfail, &curfail, 1)) 1296 device_printf(sc->amr_dev, "I/O error - 0x%x\n", ac->ac_status); 1297 /* amr_printcommand(ac);*/ 1298 } 1299 amrd_intr(ac->ac_bio); 1300 lockmgr(&ac->ac_sc->amr_list_lock, LK_EXCLUSIVE); 1301 amr_releasecmd(ac); 1302 lockmgr(&ac->ac_sc->amr_list_lock, LK_RELEASE); 1303 } 1304 1305 /******************************************************************************** 1306 ******************************************************************************** 1307 Command Processing 1308 ******************************************************************************** 1309 ********************************************************************************/ 1310 1311 /******************************************************************************** 1312 * Convert a bio off the top of the bio queue into a command. 1313 */ 1314 static int 1315 amr_bio_command(struct amr_softc *sc, struct amr_command **acp) 1316 { 1317 struct amr_command *ac; 1318 struct amrd_softc *amrd; 1319 struct bio *bio; 1320 struct buf *bp; 1321 int error; 1322 int blkcount; 1323 int driveno; 1324 int cmd; 1325 1326 ac = NULL; 1327 error = 0; 1328 1329 /* get a command */ 1330 if ((ac = amr_alloccmd(sc)) == NULL) 1331 return (ENOMEM); 1332 1333 /* get a bio to work on */ 1334 if ((bio = amr_dequeue_bio(sc)) == NULL) { 1335 amr_releasecmd(ac); 1336 return (0); 1337 } 1338 1339 /* connect the bio to the command */ 1340 bp = bio->bio_buf; 1341 ac->ac_complete = amr_completeio; 1342 ac->ac_bio = bio; 1343 ac->ac_data = bp->b_data; 1344 ac->ac_length = bp->b_bcount; 1345 cmd = 0; 1346 switch (bp->b_cmd) { 1347 case BUF_CMD_READ: 1348 ac->ac_flags |= AMR_CMD_DATAIN; 1349 if (AMR_IS_SG64(sc)) { 1350 cmd = AMR_CMD_LREAD64; 1351 ac->ac_flags |= AMR_CMD_SG64; 1352 } else 1353 cmd = AMR_CMD_LREAD; 1354 break; 1355 case BUF_CMD_WRITE: 1356 ac->ac_flags |= AMR_CMD_DATAOUT; 1357 if (AMR_IS_SG64(sc)) { 1358 cmd = AMR_CMD_LWRITE64; 1359 ac->ac_flags |= AMR_CMD_SG64; 1360 } else 1361 cmd = AMR_CMD_LWRITE; 1362 break; 1363 case BUF_CMD_FLUSH: 1364 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 1365 cmd = AMR_CMD_FLUSH; 1366 break; 1367 default: 1368 panic("Invalid bio command"); 1369 } 1370 amrd = (struct amrd_softc *)bio->bio_driver_info; 1371 driveno = amrd->amrd_drive - sc->amr_drive; 1372 blkcount = (bp->b_bcount + AMR_BLKSIZE - 1) / AMR_BLKSIZE; 1373 1374 ac->ac_mailbox.mb_command = cmd; 1375 if (bp->b_cmd & (BUF_CMD_READ|BUF_CMD_WRITE)) { 1376 ac->ac_mailbox.mb_blkcount = blkcount; 1377 ac->ac_mailbox.mb_lba = bio->bio_offset / AMR_BLKSIZE; 1378 if (((bio->bio_offset / AMR_BLKSIZE) + blkcount) > sc->amr_drive[driveno].al_size) { 1379 device_printf(sc->amr_dev, 1380 "I/O beyond end of unit (%lld,%d > %lu)\n", 1381 (long long)(bio->bio_offset / AMR_BLKSIZE), blkcount, 1382 (u_long)sc->amr_drive[driveno].al_size); 1383 } 1384 } 1385 ac->ac_mailbox.mb_drive = driveno; 1386 if (sc->amr_state & AMR_STATE_REMAP_LD) 1387 ac->ac_mailbox.mb_drive |= 0x80; 1388 1389 /* we fill in the s/g related data when the command is mapped */ 1390 1391 1392 *acp = ac; 1393 return(error); 1394 } 1395 1396 /******************************************************************************** 1397 * Take a command, submit it to the controller and sleep until it completes 1398 * or fails. Interrupts must be enabled, returns nonzero on error. 1399 */ 1400 static int 1401 amr_wait_command(struct amr_command *ac) 1402 { 1403 int error = 0; 1404 struct amr_softc *sc = ac->ac_sc; 1405 1406 debug_called(1); 1407 1408 ac->ac_complete = NULL; 1409 ac->ac_flags |= AMR_CMD_SLEEP; 1410 if ((error = amr_start(ac)) != 0) { 1411 return(error); 1412 } 1413 1414 while ((ac->ac_flags & AMR_CMD_BUSY) && (error != EWOULDBLOCK)) { 1415 error = lksleep(ac,&sc->amr_list_lock, 0, "amrwcmd", 0); 1416 } 1417 1418 return(error); 1419 } 1420 1421 /******************************************************************************** 1422 * Take a command, submit it to the controller and busy-wait for it to return. 1423 * Returns nonzero on error. Can be safely called with interrupts enabled. 1424 */ 1425 static int 1426 amr_std_poll_command(struct amr_command *ac) 1427 { 1428 struct amr_softc *sc = ac->ac_sc; 1429 int error, count; 1430 1431 debug_called(2); 1432 1433 ac->ac_complete = NULL; 1434 if ((error = amr_start(ac)) != 0) 1435 return(error); 1436 1437 count = 0; 1438 do { 1439 /* 1440 * Poll for completion, although the interrupt handler may beat us to it. 1441 * Note that the timeout here is somewhat arbitrary. 1442 */ 1443 amr_done(sc); 1444 DELAY(1000); 1445 } while ((ac->ac_flags & AMR_CMD_BUSY) && (count++ < 1000)); 1446 if (!(ac->ac_flags & AMR_CMD_BUSY)) { 1447 error = 0; 1448 } else { 1449 /* XXX the slot is now marked permanently busy */ 1450 error = EIO; 1451 device_printf(sc->amr_dev, "polled command timeout\n"); 1452 } 1453 return(error); 1454 } 1455 1456 static void 1457 amr_setup_polled_dmamap(void *arg, bus_dma_segment_t *segs, int nsegs, int err) 1458 { 1459 struct amr_command *ac = arg; 1460 struct amr_softc *sc = ac->ac_sc; 1461 int mb_channel; 1462 1463 if (err) { 1464 device_printf(sc->amr_dev, "error %d in %s", err, __FUNCTION__); 1465 ac->ac_status = AMR_STATUS_ABORTED; 1466 return; 1467 } 1468 1469 amr_setup_sg(arg, segs, nsegs, err); 1470 1471 /* for AMR_CMD_CONFIG Read/Write the s/g count goes elsewhere */ 1472 mb_channel = ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_channel; 1473 if (ac->ac_mailbox.mb_command == AMR_CMD_CONFIG && 1474 ((mb_channel == AMR_CONFIG_READ_NVRAM_CONFIG) || 1475 (mb_channel == AMR_CONFIG_WRITE_NVRAM_CONFIG))) 1476 ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_param = ac->ac_nsegments; 1477 1478 ac->ac_mailbox.mb_nsgelem = ac->ac_nsegments; 1479 ac->ac_mailbox.mb_physaddr = ac->ac_mb_physaddr; 1480 if (AC_IS_SG64(ac)) { 1481 ac->ac_sg64_hi = 0; 1482 ac->ac_sg64_lo = ac->ac_sgbusaddr; 1483 } 1484 1485 sc->amr_poll_command1(sc, ac); 1486 } 1487 1488 /******************************************************************************** 1489 * Take a command, submit it to the controller and busy-wait for it to return. 1490 * Returns nonzero on error. Can be safely called with interrupts enabled. 1491 */ 1492 static int 1493 amr_quartz_poll_command(struct amr_command *ac) 1494 { 1495 struct amr_softc *sc = ac->ac_sc; 1496 int error; 1497 1498 debug_called(2); 1499 1500 error = 0; 1501 1502 if (AC_IS_SG64(ac)) { 1503 ac->ac_tag = sc->amr_buffer64_dmat; 1504 ac->ac_datamap = ac->ac_dma64map; 1505 } else { 1506 ac->ac_tag = sc->amr_buffer_dmat; 1507 ac->ac_datamap = ac->ac_dmamap; 1508 } 1509 1510 /* now we have a slot, we can map the command (unmapped in amr_complete) */ 1511 if (ac->ac_data != NULL && ac->ac_length != 0) { 1512 if (bus_dmamap_load(ac->ac_tag, ac->ac_datamap, ac->ac_data, 1513 ac->ac_length, amr_setup_polled_dmamap, ac, BUS_DMA_NOWAIT) != 0) { 1514 error = 1; 1515 } 1516 } else { 1517 error = amr_quartz_poll_command1(sc, ac); 1518 } 1519 1520 return (error); 1521 } 1522 1523 static int 1524 amr_quartz_poll_command1(struct amr_softc *sc, struct amr_command *ac) 1525 { 1526 int count, error; 1527 1528 lockmgr(&sc->amr_hw_lock, LK_EXCLUSIVE); 1529 if ((sc->amr_state & AMR_STATE_INTEN) == 0) { 1530 count=0; 1531 while (sc->amr_busyslots) { 1532 lksleep(sc, &sc->amr_hw_lock, PCATCH, "amrpoll", hz); 1533 if(count++>10) { 1534 break; 1535 } 1536 } 1537 1538 if(sc->amr_busyslots) { 1539 device_printf(sc->amr_dev, "adapter is busy\n"); 1540 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 1541 if (ac->ac_data != NULL) { 1542 bus_dmamap_unload(ac->ac_tag, ac->ac_datamap); 1543 } 1544 ac->ac_status=0; 1545 return(1); 1546 } 1547 } 1548 1549 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, AMR_MBOX_CMDSIZE); 1550 1551 /* clear the poll/ack fields in the mailbox */ 1552 sc->amr_mailbox->mb_ident = 0xFE; 1553 sc->amr_mailbox->mb_nstatus = 0xFF; 1554 sc->amr_mailbox->mb_status = 0xFF; 1555 sc->amr_mailbox->mb_poll = 0; 1556 sc->amr_mailbox->mb_ack = 0; 1557 sc->amr_mailbox->mb_busy = 1; 1558 1559 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT); 1560 1561 while(sc->amr_mailbox->mb_nstatus == 0xFF) 1562 DELAY(1); 1563 while(sc->amr_mailbox->mb_status == 0xFF) 1564 DELAY(1); 1565 ac->ac_status=sc->amr_mailbox->mb_status; 1566 error = (ac->ac_status !=AMR_STATUS_SUCCESS) ? 1:0; 1567 while(sc->amr_mailbox->mb_poll != 0x77) 1568 DELAY(1); 1569 sc->amr_mailbox->mb_poll = 0; 1570 sc->amr_mailbox->mb_ack = 0x77; 1571 1572 /* acknowledge that we have the commands */ 1573 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_ACK); 1574 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK) 1575 DELAY(1); 1576 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 1577 1578 /* unmap the command's data buffer */ 1579 if (ac->ac_flags & AMR_CMD_DATAIN) { 1580 bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, BUS_DMASYNC_POSTREAD); 1581 } 1582 if (ac->ac_flags & AMR_CMD_DATAOUT) { 1583 bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, BUS_DMASYNC_POSTWRITE); 1584 } 1585 bus_dmamap_unload(ac->ac_tag, ac->ac_datamap); 1586 1587 return(error); 1588 } 1589 1590 static __inline int 1591 amr_freeslot(struct amr_command *ac) 1592 { 1593 struct amr_softc *sc = ac->ac_sc; 1594 int slot; 1595 1596 debug_called(3); 1597 1598 slot = ac->ac_slot; 1599 if (sc->amr_busycmd[slot] == NULL) 1600 panic("amr: slot %d not busy?\n", slot); 1601 1602 sc->amr_busycmd[slot] = NULL; 1603 atomic_subtract_int(&sc->amr_busyslots, 1); 1604 1605 return (0); 1606 } 1607 1608 /******************************************************************************** 1609 * Map/unmap (ac)'s data in the controller's addressable space as required. 1610 * 1611 * These functions may be safely called multiple times on a given command. 1612 */ 1613 static void 1614 amr_setup_sg(void *arg, bus_dma_segment_t *segs, int nsegments, int error) 1615 { 1616 struct amr_command *ac = (struct amr_command *)arg; 1617 struct amr_sgentry *sg; 1618 struct amr_sg64entry *sg64; 1619 int flags, i; 1620 1621 debug_called(3); 1622 1623 /* get base address of s/g table */ 1624 sg = ac->ac_sg.sg32; 1625 sg64 = ac->ac_sg.sg64; 1626 1627 if (AC_IS_SG64(ac)) { 1628 ac->ac_nsegments = nsegments; 1629 ac->ac_mb_physaddr = 0xffffffff; 1630 for (i = 0; i < nsegments; i++, sg64++) { 1631 sg64->sg_addr = segs[i].ds_addr; 1632 sg64->sg_count = segs[i].ds_len; 1633 } 1634 } else { 1635 /* decide whether we need to populate the s/g table */ 1636 if (nsegments < 2) { 1637 ac->ac_nsegments = 0; 1638 ac->ac_mb_physaddr = segs[0].ds_addr; 1639 } else { 1640 ac->ac_nsegments = nsegments; 1641 ac->ac_mb_physaddr = ac->ac_sgbusaddr; 1642 for (i = 0; i < nsegments; i++, sg++) { 1643 sg->sg_addr = segs[i].ds_addr; 1644 sg->sg_count = segs[i].ds_len; 1645 } 1646 } 1647 } 1648 1649 flags = 0; 1650 if (ac->ac_flags & AMR_CMD_DATAIN) 1651 flags |= BUS_DMASYNC_PREREAD; 1652 if (ac->ac_flags & AMR_CMD_DATAOUT) 1653 flags |= BUS_DMASYNC_PREWRITE; 1654 bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, flags); 1655 ac->ac_flags |= AMR_CMD_MAPPED; 1656 } 1657 1658 static void 1659 amr_setup_data(void *arg, bus_dma_segment_t *segs, int nsegs, int err) 1660 { 1661 struct amr_command *ac = arg; 1662 struct amr_softc *sc = ac->ac_sc; 1663 int mb_channel; 1664 1665 if (err) { 1666 device_printf(sc->amr_dev, "error %d in %s", err, __FUNCTION__); 1667 amr_abort_load(ac); 1668 return; 1669 } 1670 1671 amr_setup_sg(arg, segs, nsegs, err); 1672 1673 /* for AMR_CMD_CONFIG Read/Write the s/g count goes elsewhere */ 1674 mb_channel = ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_channel; 1675 if (ac->ac_mailbox.mb_command == AMR_CMD_CONFIG && 1676 ((mb_channel == AMR_CONFIG_READ_NVRAM_CONFIG) || 1677 (mb_channel == AMR_CONFIG_WRITE_NVRAM_CONFIG))) 1678 ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_param = ac->ac_nsegments; 1679 1680 ac->ac_mailbox.mb_nsgelem = ac->ac_nsegments; 1681 ac->ac_mailbox.mb_physaddr = ac->ac_mb_physaddr; 1682 if (AC_IS_SG64(ac)) { 1683 ac->ac_sg64_hi = 0; 1684 ac->ac_sg64_lo = ac->ac_sgbusaddr; 1685 } 1686 1687 if (sc->amr_submit_command(ac) == EBUSY) { 1688 amr_freeslot(ac); 1689 amr_requeue_ready(ac); 1690 } 1691 } 1692 1693 static void 1694 amr_setup_ccb(void *arg, bus_dma_segment_t *segs, int nsegs, int err) 1695 { 1696 struct amr_command *ac = arg; 1697 struct amr_softc *sc = ac->ac_sc; 1698 struct amr_passthrough *ap = &ac->ac_ccb->ccb_pthru; 1699 struct amr_ext_passthrough *aep = &ac->ac_ccb->ccb_epthru; 1700 1701 if (err) { 1702 device_printf(sc->amr_dev, "error %d in %s", err, __FUNCTION__); 1703 amr_abort_load(ac); 1704 return; 1705 } 1706 1707 /* Set up the mailbox portion of the command to point at the ccb */ 1708 ac->ac_mailbox.mb_nsgelem = 0; 1709 ac->ac_mailbox.mb_physaddr = ac->ac_ccb_busaddr; 1710 1711 amr_setup_sg(arg, segs, nsegs, err); 1712 1713 switch (ac->ac_mailbox.mb_command) { 1714 case AMR_CMD_EXTPASS: 1715 aep->ap_no_sg_elements = ac->ac_nsegments; 1716 aep->ap_data_transfer_address = ac->ac_mb_physaddr; 1717 break; 1718 case AMR_CMD_PASS: 1719 ap->ap_no_sg_elements = ac->ac_nsegments; 1720 ap->ap_data_transfer_address = ac->ac_mb_physaddr; 1721 break; 1722 default: 1723 panic("Unknown ccb command"); 1724 } 1725 1726 if (sc->amr_submit_command(ac) == EBUSY) { 1727 amr_freeslot(ac); 1728 amr_requeue_ready(ac); 1729 } 1730 } 1731 1732 static int 1733 amr_mapcmd(struct amr_command *ac) 1734 { 1735 bus_dmamap_callback_t *cb; 1736 struct amr_softc *sc = ac->ac_sc; 1737 1738 debug_called(3); 1739 1740 if (AC_IS_SG64(ac)) { 1741 ac->ac_tag = sc->amr_buffer64_dmat; 1742 ac->ac_datamap = ac->ac_dma64map; 1743 } else { 1744 ac->ac_tag = sc->amr_buffer_dmat; 1745 ac->ac_datamap = ac->ac_dmamap; 1746 } 1747 1748 if (ac->ac_flags & AMR_CMD_CCB) 1749 cb = amr_setup_ccb; 1750 else 1751 cb = amr_setup_data; 1752 1753 /* if the command involves data at all, and hasn't been mapped */ 1754 if ((ac->ac_flags & AMR_CMD_MAPPED) == 0 && (ac->ac_data != NULL)) { 1755 /* map the data buffers into bus space and build the s/g list */ 1756 if (bus_dmamap_load(ac->ac_tag, ac->ac_datamap, ac->ac_data, 1757 ac->ac_length, cb, ac, 0) == EINPROGRESS) { 1758 sc->amr_state |= AMR_STATE_QUEUE_FRZN; 1759 } 1760 } else { 1761 if (sc->amr_submit_command(ac) == EBUSY) { 1762 amr_freeslot(ac); 1763 amr_requeue_ready(ac); 1764 } 1765 } 1766 1767 return (0); 1768 } 1769 1770 static void 1771 amr_unmapcmd(struct amr_command *ac) 1772 { 1773 int flag; 1774 1775 debug_called(3); 1776 1777 /* if the command involved data at all and was mapped */ 1778 if (ac->ac_flags & AMR_CMD_MAPPED) { 1779 1780 if (ac->ac_data != NULL) { 1781 1782 flag = 0; 1783 if (ac->ac_flags & AMR_CMD_DATAIN) 1784 flag |= BUS_DMASYNC_POSTREAD; 1785 if (ac->ac_flags & AMR_CMD_DATAOUT) 1786 flag |= BUS_DMASYNC_POSTWRITE; 1787 1788 bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, flag); 1789 bus_dmamap_unload(ac->ac_tag, ac->ac_datamap); 1790 } 1791 1792 ac->ac_flags &= ~AMR_CMD_MAPPED; 1793 } 1794 } 1795 1796 static void 1797 amr_abort_load(struct amr_command *ac) 1798 { 1799 ac_qhead_t head; 1800 struct amr_softc *sc = ac->ac_sc; 1801 1802 KKASSERT(lockstatus(&sc->amr_list_lock, curthread) != 0); 1803 1804 ac->ac_status = AMR_STATUS_ABORTED; 1805 amr_init_qhead(&head); 1806 amr_enqueue_completed(ac, &head); 1807 1808 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1809 amr_complete(sc, &head); 1810 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1811 } 1812 1813 /******************************************************************************** 1814 * Take a command and give it to the controller, returns 0 if successful, or 1815 * EBUSY if the command should be retried later. 1816 */ 1817 static int 1818 amr_start(struct amr_command *ac) 1819 { 1820 struct amr_softc *sc; 1821 int error = 0; 1822 int slot; 1823 1824 debug_called(3); 1825 1826 /* mark command as busy so that polling consumer can tell */ 1827 sc = ac->ac_sc; 1828 ac->ac_flags |= AMR_CMD_BUSY; 1829 1830 /* get a command slot (freed in amr_done) */ 1831 slot = ac->ac_slot; 1832 if (sc->amr_busycmd[slot] != NULL) 1833 panic("amr: slot %d busy?\n", slot); 1834 sc->amr_busycmd[slot] = ac; 1835 atomic_add_int(&sc->amr_busyslots, 1); 1836 1837 /* Now we have a slot, we can map the command (unmapped in amr_complete). */ 1838 if ((error = amr_mapcmd(ac)) == ENOMEM) { 1839 /* 1840 * Memroy resources are short, so free the slot and let this be tried 1841 * later. 1842 */ 1843 amr_freeslot(ac); 1844 } 1845 1846 return (error); 1847 } 1848 1849 /******************************************************************************** 1850 * Extract one or more completed commands from the controller (sc) 1851 * 1852 * Returns nonzero if any commands on the work queue were marked as completed. 1853 */ 1854 1855 int 1856 amr_done(struct amr_softc *sc) 1857 { 1858 ac_qhead_t head; 1859 struct amr_command *ac; 1860 struct amr_mailbox mbox; 1861 int i, idx, result; 1862 1863 debug_called(3); 1864 1865 /* See if there's anything for us to do */ 1866 result = 0; 1867 amr_init_qhead(&head); 1868 1869 /* loop collecting completed commands */ 1870 for (;;) { 1871 /* poll for a completed command's identifier and status */ 1872 if (sc->amr_get_work(sc, &mbox)) { 1873 result = 1; 1874 1875 /* iterate over completed commands in this result */ 1876 for (i = 0; i < mbox.mb_nstatus; i++) { 1877 /* get pointer to busy command */ 1878 idx = mbox.mb_completed[i] - 1; 1879 ac = sc->amr_busycmd[idx]; 1880 1881 /* really a busy command? */ 1882 if (ac != NULL) { 1883 1884 /* pull the command from the busy index */ 1885 amr_freeslot(ac); 1886 1887 /* save status for later use */ 1888 ac->ac_status = mbox.mb_status; 1889 amr_enqueue_completed(ac, &head); 1890 debug(3, "completed command with status %x", mbox.mb_status); 1891 } else { 1892 device_printf(sc->amr_dev, "bad slot %d completed\n", idx); 1893 } 1894 } 1895 } else 1896 break; /* no work */ 1897 } 1898 1899 /* handle completion and timeouts */ 1900 amr_complete(sc, &head); 1901 1902 return(result); 1903 } 1904 1905 /******************************************************************************** 1906 * Do completion processing on done commands on (sc) 1907 */ 1908 1909 static void 1910 amr_complete(void *context, ac_qhead_t *head) 1911 { 1912 struct amr_softc *sc = (struct amr_softc *)context; 1913 struct amr_command *ac; 1914 1915 debug_called(3); 1916 1917 /* pull completed commands off the queue */ 1918 for (;;) { 1919 ac = amr_dequeue_completed(sc, head); 1920 if (ac == NULL) 1921 break; 1922 1923 /* unmap the command's data buffer */ 1924 amr_unmapcmd(ac); 1925 1926 /* 1927 * Is there a completion handler? 1928 */ 1929 if (ac->ac_complete != NULL) { 1930 /* unbusy the command */ 1931 ac->ac_flags &= ~AMR_CMD_BUSY; 1932 ac->ac_complete(ac); 1933 1934 /* 1935 * Is someone sleeping on this one? 1936 */ 1937 } else { 1938 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1939 ac->ac_flags &= ~AMR_CMD_BUSY; 1940 if (ac->ac_flags & AMR_CMD_SLEEP) { 1941 /* unbusy the command */ 1942 wakeup(ac); 1943 } 1944 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1945 } 1946 1947 if(!sc->amr_busyslots) { 1948 wakeup(sc); 1949 } 1950 } 1951 1952 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1953 sc->amr_state &= ~AMR_STATE_QUEUE_FRZN; 1954 amr_startio(sc); 1955 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1956 } 1957 1958 /******************************************************************************** 1959 ******************************************************************************** 1960 Command Buffer Management 1961 ******************************************************************************** 1962 ********************************************************************************/ 1963 1964 /******************************************************************************** 1965 * Get a new command buffer. 1966 * 1967 * This may return NULL in low-memory cases. 1968 * 1969 * If possible, we recycle a command buffer that's been used before. 1970 */ 1971 struct amr_command * 1972 amr_alloccmd(struct amr_softc *sc) 1973 { 1974 struct amr_command *ac; 1975 1976 debug_called(3); 1977 1978 ac = amr_dequeue_free(sc); 1979 if (ac == NULL) { 1980 sc->amr_state |= AMR_STATE_QUEUE_FRZN; 1981 return(NULL); 1982 } 1983 1984 /* clear out significant fields */ 1985 ac->ac_status = 0; 1986 bzero(&ac->ac_mailbox, sizeof(struct amr_mailbox)); 1987 ac->ac_flags = 0; 1988 ac->ac_bio = NULL; 1989 ac->ac_data = NULL; 1990 ac->ac_complete = NULL; 1991 ac->ac_retries = 0; 1992 ac->ac_tag = NULL; 1993 ac->ac_datamap = NULL; 1994 return(ac); 1995 } 1996 1997 /******************************************************************************** 1998 * Release a command buffer for recycling. 1999 */ 2000 void 2001 amr_releasecmd(struct amr_command *ac) 2002 { 2003 debug_called(3); 2004 2005 amr_enqueue_free(ac); 2006 } 2007 2008 /******************************************************************************** 2009 * Allocate a new command cluster and initialise it. 2010 */ 2011 static void 2012 amr_alloccmd_cluster(struct amr_softc *sc) 2013 { 2014 struct amr_command_cluster *acc; 2015 struct amr_command *ac; 2016 int i, nextslot; 2017 2018 /* 2019 * If we haven't found the real limit yet, let us have a couple of 2020 * commands in order to be able to probe. 2021 */ 2022 if (sc->amr_maxio == 0) 2023 sc->amr_maxio = 2; 2024 2025 if (sc->amr_nextslot > sc->amr_maxio) 2026 return; 2027 acc = kmalloc(AMR_CMD_CLUSTERSIZE, M_AMR, M_NOWAIT | M_ZERO); 2028 if (acc != NULL) { 2029 nextslot = sc->amr_nextslot; 2030 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 2031 TAILQ_INSERT_TAIL(&sc->amr_cmd_clusters, acc, acc_link); 2032 lockmgr(&sc->amr_list_lock, LK_RELEASE); 2033 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) { 2034 ac = &acc->acc_command[i]; 2035 ac->ac_sc = sc; 2036 ac->ac_slot = nextslot; 2037 2038 /* 2039 * The SG table for each slot is a fixed size and is assumed to 2040 * to hold 64-bit s/g objects when the driver is configured to do 2041 * 64-bit DMA. 32-bit DMA commands still use the same table, but 2042 * cast down to 32-bit objects. 2043 */ 2044 if (AMR_IS_SG64(sc)) { 2045 ac->ac_sgbusaddr = sc->amr_sgbusaddr + 2046 (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sg64entry)); 2047 ac->ac_sg.sg64 = sc->amr_sg64table + (ac->ac_slot * AMR_NSEG); 2048 } else { 2049 ac->ac_sgbusaddr = sc->amr_sgbusaddr + 2050 (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry)); 2051 ac->ac_sg.sg32 = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG); 2052 } 2053 2054 ac->ac_ccb = sc->amr_ccb + ac->ac_slot; 2055 ac->ac_ccb_busaddr = sc->amr_ccb_busaddr + 2056 (ac->ac_slot * sizeof(union amr_ccb)); 2057 2058 if (bus_dmamap_create(sc->amr_buffer_dmat, 0, &ac->ac_dmamap)) 2059 break; 2060 if (AMR_IS_SG64(sc) && 2061 (bus_dmamap_create(sc->amr_buffer64_dmat, 0,&ac->ac_dma64map))) 2062 break; 2063 amr_releasecmd(ac); 2064 if (++nextslot > sc->amr_maxio) 2065 break; 2066 } 2067 sc->amr_nextslot = nextslot; 2068 } 2069 } 2070 2071 /******************************************************************************** 2072 * Free a command cluster 2073 */ 2074 static void 2075 amr_freecmd_cluster(struct amr_command_cluster *acc) 2076 { 2077 struct amr_softc *sc = acc->acc_command[0].ac_sc; 2078 int i; 2079 2080 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) { 2081 if (acc->acc_command[i].ac_sc == NULL) 2082 break; 2083 bus_dmamap_destroy(sc->amr_buffer_dmat, acc->acc_command[i].ac_dmamap); 2084 if (AMR_IS_SG64(sc)) 2085 bus_dmamap_destroy(sc->amr_buffer64_dmat, acc->acc_command[i].ac_dma64map); 2086 } 2087 kfree(acc, M_AMR); 2088 } 2089 2090 /******************************************************************************** 2091 ******************************************************************************** 2092 Interface-specific Shims 2093 ******************************************************************************** 2094 ********************************************************************************/ 2095 2096 /******************************************************************************** 2097 * Tell the controller that the mailbox contains a valid command 2098 */ 2099 static int 2100 amr_quartz_submit_command(struct amr_command *ac) 2101 { 2102 struct amr_softc *sc = ac->ac_sc; 2103 static struct timeval lastfail; 2104 static int curfail; 2105 int i = 0; 2106 2107 lockmgr(&sc->amr_hw_lock, LK_EXCLUSIVE); 2108 while (sc->amr_mailbox->mb_busy && (i++ < 10)) { 2109 DELAY(1); 2110 /* This is a no-op read that flushes pending mailbox updates */ 2111 AMR_QGET_ODB(sc); 2112 } 2113 if (sc->amr_mailbox->mb_busy) { 2114 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 2115 if (ac->ac_retries++ > 1000) { 2116 if (ppsratecheck(&lastfail, &curfail, 1)) 2117 device_printf(sc->amr_dev, "Too many retries on command %p. " 2118 "Controller is likely dead\n", ac); 2119 ac->ac_retries = 0; 2120 } 2121 return (EBUSY); 2122 } 2123 2124 /* 2125 * Save the slot number so that we can locate this command when complete. 2126 * Note that ident = 0 seems to be special, so we don't use it. 2127 */ 2128 ac->ac_mailbox.mb_ident = ac->ac_slot + 1; /* will be coppied into mbox */ 2129 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, 14); 2130 sc->amr_mailbox->mb_busy = 1; 2131 sc->amr_mailbox->mb_poll = 0; 2132 sc->amr_mailbox->mb_ack = 0; 2133 sc->amr_mailbox64->sg64_hi = ac->ac_sg64_hi; 2134 sc->amr_mailbox64->sg64_lo = ac->ac_sg64_lo; 2135 2136 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT); 2137 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 2138 return(0); 2139 } 2140 2141 static int 2142 amr_std_submit_command(struct amr_command *ac) 2143 { 2144 struct amr_softc *sc = ac->ac_sc; 2145 static struct timeval lastfail; 2146 static int curfail; 2147 2148 lockmgr(&sc->amr_hw_lock, LK_EXCLUSIVE); 2149 if (AMR_SGET_MBSTAT(sc) & AMR_SMBOX_BUSYFLAG) { 2150 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 2151 if (ac->ac_retries++ > 1000) { 2152 if (ppsratecheck(&lastfail, &curfail, 1)) 2153 device_printf(sc->amr_dev, "Too many retries on command %p. " 2154 "Controller is likely dead\n", ac); 2155 ac->ac_retries = 0; 2156 } 2157 return (EBUSY); 2158 } 2159 2160 /* 2161 * Save the slot number so that we can locate this command when complete. 2162 * Note that ident = 0 seems to be special, so we don't use it. 2163 */ 2164 ac->ac_mailbox.mb_ident = ac->ac_slot + 1; /* will be coppied into mbox */ 2165 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, 14); 2166 sc->amr_mailbox->mb_busy = 1; 2167 sc->amr_mailbox->mb_poll = 0; 2168 sc->amr_mailbox->mb_ack = 0; 2169 2170 AMR_SPOST_COMMAND(sc); 2171 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 2172 return(0); 2173 } 2174 2175 /******************************************************************************** 2176 * Claim any work that the controller has completed; acknowledge completion, 2177 * save details of the completion in (mbsave) 2178 */ 2179 static int 2180 amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave) 2181 { 2182 int worked, i; 2183 u_int32_t outd; 2184 u_int8_t nstatus; 2185 u_int8_t completed[46]; 2186 2187 debug_called(3); 2188 2189 worked = 0; 2190 2191 /* work waiting for us? */ 2192 if ((outd = AMR_QGET_ODB(sc)) == AMR_QODB_READY) { 2193 2194 /* acknowledge interrupt */ 2195 AMR_QPUT_ODB(sc, AMR_QODB_READY); 2196 2197 while ((nstatus = sc->amr_mailbox->mb_nstatus) == 0xff) 2198 DELAY(1); 2199 sc->amr_mailbox->mb_nstatus = 0xff; 2200 2201 /* wait until fw wrote out all completions */ 2202 for (i = 0; i < nstatus; i++) { 2203 while ((completed[i] = sc->amr_mailbox->mb_completed[i]) == 0xff) 2204 DELAY(1); 2205 sc->amr_mailbox->mb_completed[i] = 0xff; 2206 } 2207 2208 /* Save information for later processing */ 2209 mbsave->mb_nstatus = nstatus; 2210 mbsave->mb_status = sc->amr_mailbox->mb_status; 2211 sc->amr_mailbox->mb_status = 0xff; 2212 2213 for (i = 0; i < nstatus; i++) 2214 mbsave->mb_completed[i] = completed[i]; 2215 2216 /* acknowledge that we have the commands */ 2217 AMR_QPUT_IDB(sc, AMR_QIDB_ACK); 2218 2219 #if 0 2220 #ifndef AMR_QUARTZ_GOFASTER 2221 /* 2222 * This waits for the controller to notice that we've taken the 2223 * command from it. It's very inefficient, and we shouldn't do it, 2224 * but if we remove this code, we stop completing commands under 2225 * load. 2226 * 2227 * Peter J says we shouldn't do this. The documentation says we 2228 * should. Who is right? 2229 */ 2230 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK) 2231 ; /* XXX aiee! what if it dies? */ 2232 #endif 2233 #endif 2234 2235 worked = 1; /* got some work */ 2236 } 2237 2238 return(worked); 2239 } 2240 2241 static int 2242 amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave) 2243 { 2244 int worked; 2245 u_int8_t istat; 2246 2247 debug_called(3); 2248 2249 worked = 0; 2250 2251 /* check for valid interrupt status */ 2252 istat = AMR_SGET_ISTAT(sc); 2253 if ((istat & AMR_SINTR_VALID) != 0) { 2254 AMR_SPUT_ISTAT(sc, istat); /* ack interrupt status */ 2255 2256 /* save mailbox, which contains a list of completed commands */ 2257 bcopy((void *)(uintptr_t)(volatile void *)sc->amr_mailbox, mbsave, sizeof(*mbsave)); 2258 2259 AMR_SACK_INTERRUPT(sc); /* acknowledge we have the mailbox */ 2260 worked = 1; 2261 } 2262 2263 return(worked); 2264 } 2265 2266 /******************************************************************************** 2267 * Notify the controller of the mailbox location. 2268 */ 2269 static void 2270 amr_std_attach_mailbox(struct amr_softc *sc) 2271 { 2272 2273 /* program the mailbox physical address */ 2274 AMR_SBYTE_SET(sc, AMR_SMBOX_0, sc->amr_mailboxphys & 0xff); 2275 AMR_SBYTE_SET(sc, AMR_SMBOX_1, (sc->amr_mailboxphys >> 8) & 0xff); 2276 AMR_SBYTE_SET(sc, AMR_SMBOX_2, (sc->amr_mailboxphys >> 16) & 0xff); 2277 AMR_SBYTE_SET(sc, AMR_SMBOX_3, (sc->amr_mailboxphys >> 24) & 0xff); 2278 AMR_SBYTE_SET(sc, AMR_SMBOX_ENABLE, AMR_SMBOX_ADDR); 2279 2280 /* clear any outstanding interrupt and enable interrupts proper */ 2281 AMR_SACK_INTERRUPT(sc); 2282 AMR_SENABLE_INTR(sc); 2283 } 2284 2285 #ifdef AMR_BOARD_INIT 2286 /******************************************************************************** 2287 * Initialise the controller 2288 */ 2289 static int 2290 amr_quartz_init(struct amr_softc *sc) 2291 { 2292 int status, ostatus; 2293 2294 device_printf(sc->amr_dev, "initial init status %x\n", AMR_QGET_INITSTATUS(sc)); 2295 2296 AMR_QRESET(sc); 2297 2298 ostatus = 0xff; 2299 while ((status = AMR_QGET_INITSTATUS(sc)) != AMR_QINIT_DONE) { 2300 if (status != ostatus) { 2301 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_qinit, status)); 2302 ostatus = status; 2303 } 2304 switch (status) { 2305 case AMR_QINIT_NOMEM: 2306 return(ENOMEM); 2307 2308 case AMR_QINIT_SCAN: 2309 /* XXX we could print channel/target here */ 2310 break; 2311 } 2312 } 2313 return(0); 2314 } 2315 2316 static int 2317 amr_std_init(struct amr_softc *sc) 2318 { 2319 int status, ostatus; 2320 2321 device_printf(sc->amr_dev, "initial init status %x\n", AMR_SGET_INITSTATUS(sc)); 2322 2323 AMR_SRESET(sc); 2324 2325 ostatus = 0xff; 2326 while ((status = AMR_SGET_INITSTATUS(sc)) != AMR_SINIT_DONE) { 2327 if (status != ostatus) { 2328 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_sinit, status)); 2329 ostatus = status; 2330 } 2331 switch (status) { 2332 case AMR_SINIT_NOMEM: 2333 return(ENOMEM); 2334 2335 case AMR_SINIT_INPROG: 2336 /* XXX we could print channel/target here? */ 2337 break; 2338 } 2339 } 2340 return(0); 2341 } 2342 #endif 2343 2344 /******************************************************************************** 2345 ******************************************************************************** 2346 Debugging 2347 ******************************************************************************** 2348 ********************************************************************************/ 2349 2350 /******************************************************************************** 2351 * Identify the controller and print some information about it. 2352 */ 2353 static void 2354 amr_describe_controller(struct amr_softc *sc) 2355 { 2356 struct amr_prodinfo *ap; 2357 struct amr_enquiry *ae; 2358 char *prod; 2359 int status; 2360 2361 /* 2362 * Try to get 40LD product info, which tells us what the card is labelled as. 2363 */ 2364 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0, &status)) != NULL) { 2365 device_printf(sc->amr_dev, "<LSILogic %.80s> Firmware %.16s, BIOS %.16s, %dMB RAM\n", 2366 ap->ap_product, ap->ap_firmware, ap->ap_bios, 2367 ap->ap_memsize); 2368 2369 kfree(ap, M_AMR); 2370 return; 2371 } 2372 2373 /* 2374 * Try 8LD extended ENQUIRY to get controller signature, and use lookup table. 2375 */ 2376 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0, &status)) != NULL) { 2377 prod = amr_describe_code(amr_table_adaptertype, ae->ae_signature); 2378 2379 } else if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0, &status)) != NULL) { 2380 2381 /* 2382 * Try to work it out based on the PCI signatures. 2383 */ 2384 switch (pci_get_device(sc->amr_dev)) { 2385 case 0x9010: 2386 prod = "Series 428"; 2387 break; 2388 case 0x9060: 2389 prod = "Series 434"; 2390 break; 2391 default: 2392 prod = "unknown controller"; 2393 break; 2394 } 2395 } else { 2396 device_printf(sc->amr_dev, "<unsupported controller>\n"); 2397 return; 2398 } 2399 2400 /* 2401 * HP NetRaid controllers have a special encoding of the firmware and 2402 * BIOS versions. The AMI version seems to have it as strings whereas 2403 * the HP version does it with a leading uppercase character and two 2404 * binary numbers. 2405 */ 2406 2407 if(ae->ae_adapter.aa_firmware[2] >= 'A' && 2408 ae->ae_adapter.aa_firmware[2] <= 'Z' && 2409 ae->ae_adapter.aa_firmware[1] < ' ' && 2410 ae->ae_adapter.aa_firmware[0] < ' ' && 2411 ae->ae_adapter.aa_bios[2] >= 'A' && 2412 ae->ae_adapter.aa_bios[2] <= 'Z' && 2413 ae->ae_adapter.aa_bios[1] < ' ' && 2414 ae->ae_adapter.aa_bios[0] < ' ') { 2415 2416 /* this looks like we have an HP NetRaid version of the MegaRaid */ 2417 2418 if(ae->ae_signature == AMR_SIG_438) { 2419 /* the AMI 438 is a NetRaid 3si in HP-land */ 2420 prod = "HP NetRaid 3si"; 2421 } 2422 2423 device_printf(sc->amr_dev, "<%s> Firmware %c.%02d.%02d, BIOS %c.%02d.%02d, %dMB RAM\n", 2424 prod, ae->ae_adapter.aa_firmware[2], 2425 ae->ae_adapter.aa_firmware[1], 2426 ae->ae_adapter.aa_firmware[0], 2427 ae->ae_adapter.aa_bios[2], 2428 ae->ae_adapter.aa_bios[1], 2429 ae->ae_adapter.aa_bios[0], 2430 ae->ae_adapter.aa_memorysize); 2431 } else { 2432 device_printf(sc->amr_dev, "<%s> Firmware %.4s, BIOS %.4s, %dMB RAM\n", 2433 prod, ae->ae_adapter.aa_firmware, ae->ae_adapter.aa_bios, 2434 ae->ae_adapter.aa_memorysize); 2435 } 2436 kfree(ae, M_AMR); 2437 } 2438 2439 int 2440 amr_dump_blocks(struct amr_softc *sc, int unit, u_int32_t lba, void *data, int blks) 2441 { 2442 struct amr_command *ac; 2443 int error = EIO; 2444 2445 debug_called(1); 2446 2447 sc->amr_state |= AMR_STATE_INTEN; 2448 2449 /* get ourselves a command buffer */ 2450 if ((ac = amr_alloccmd(sc)) == NULL) 2451 goto out; 2452 /* set command flags */ 2453 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 2454 2455 /* point the command at our data */ 2456 ac->ac_data = data; 2457 ac->ac_length = blks * AMR_BLKSIZE; 2458 2459 /* build the command proper */ 2460 ac->ac_mailbox.mb_command = AMR_CMD_LWRITE; 2461 ac->ac_mailbox.mb_blkcount = blks; 2462 ac->ac_mailbox.mb_lba = lba; 2463 ac->ac_mailbox.mb_drive = unit; 2464 2465 /* can't assume that interrupts are going to work here, so play it safe */ 2466 if (sc->amr_poll_command(ac)) 2467 goto out; 2468 error = ac->ac_status; 2469 2470 out: 2471 if (ac != NULL) 2472 amr_releasecmd(ac); 2473 2474 sc->amr_state &= ~AMR_STATE_INTEN; 2475 return (error); 2476 } 2477 2478 2479 2480 #ifdef AMR_DEBUG 2481 /******************************************************************************** 2482 * Print the command (ac) in human-readable format 2483 */ 2484 #if 0 2485 static void 2486 amr_printcommand(struct amr_command *ac) 2487 { 2488 struct amr_softc *sc = ac->ac_sc; 2489 struct amr_sgentry *sg; 2490 int i; 2491 2492 device_printf(sc->amr_dev, "cmd %x ident %d drive %d\n", 2493 ac->ac_mailbox.mb_command, ac->ac_mailbox.mb_ident, ac->ac_mailbox.mb_drive); 2494 device_printf(sc->amr_dev, "blkcount %d lba %d\n", 2495 ac->ac_mailbox.mb_blkcount, ac->ac_mailbox.mb_lba); 2496 device_printf(sc->amr_dev, "virtaddr %p length %lu\n", ac->ac_data, (unsigned long)ac->ac_length); 2497 device_printf(sc->amr_dev, "sg physaddr %08x nsg %d\n", 2498 ac->ac_mailbox.mb_physaddr, ac->ac_mailbox.mb_nsgelem); 2499 device_printf(sc->amr_dev, "ccb %p bio %p\n", ac->ac_ccb_data, ac->ac_bio); 2500 2501 /* get base address of s/g table */ 2502 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG); 2503 for (i = 0; i < ac->ac_mailbox.mb_nsgelem; i++, sg++) 2504 device_printf(sc->amr_dev, " %x/%d\n", sg->sg_addr, sg->sg_count); 2505 } 2506 #endif 2507 #endif 2508