1 /*- 2 * Copyright (c) 1999,2000 Michael Smith 3 * Copyright (c) 2000 BSDi 4 * Copyright (c) 2005 Scott Long 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 /*- 29 * Copyright (c) 2002 Eric Moore 30 * Copyright (c) 2002, 2004 LSI Logic Corporation 31 * All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. The party using or redistributing the source code and binary forms 42 * agrees to the disclaimer below and the terms and conditions set forth 43 * herein. 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 49 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 55 * SUCH DAMAGE. 56 * 57 * $FreeBSD: src/sys/dev/amr/amr.c,v 1.95 2010/01/07 21:01:37 mbr Exp $ 58 */ 59 60 /* 61 * Driver for the AMI MegaRaid family of controllers. 62 */ 63 64 #include <sys/param.h> 65 #include <sys/systm.h> 66 #include <sys/malloc.h> 67 #include <sys/kernel.h> 68 #include <sys/proc.h> 69 #include <sys/sysctl.h> 70 #include <sys/sysmsg.h> 71 72 #include <sys/bio.h> 73 #include <sys/bus.h> 74 #include <sys/conf.h> 75 #include <sys/stat.h> 76 77 #include <machine/cpu.h> 78 #include <sys/rman.h> 79 80 #include <bus/pci/pcireg.h> 81 #include <bus/pci/pcivar.h> 82 83 #include <dev/raid/amr/amrio.h> 84 #include <dev/raid/amr/amrreg.h> 85 #include <dev/raid/amr/amrvar.h> 86 #define AMR_DEFINE_TABLES 87 #include <dev/raid/amr/amr_tables.h> 88 89 SYSCTL_NODE(_hw, OID_AUTO, amr, CTLFLAG_RD, 0, "AMR driver parameters"); 90 91 static d_open_t amr_open; 92 static d_close_t amr_close; 93 static d_ioctl_t amr_ioctl; 94 95 static struct dev_ops amr_ops = { 96 { "amr", 0, 0 }, 97 .d_open = amr_open, 98 .d_close = amr_close, 99 .d_ioctl = amr_ioctl, 100 }; 101 102 int linux_no_adapter = 0; 103 /* 104 * Initialisation, bus interface. 105 */ 106 static void amr_startup(void *arg); 107 108 /* 109 * Command wrappers 110 */ 111 static int amr_query_controller(struct amr_softc *sc); 112 static void *amr_enquiry(struct amr_softc *sc, size_t bufsize, 113 u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual, int *status); 114 static void amr_completeio(struct amr_command *ac); 115 static int amr_support_ext_cdb(struct amr_softc *sc); 116 117 /* 118 * Command buffer allocation. 119 */ 120 static void amr_alloccmd_cluster(struct amr_softc *sc); 121 static void amr_freecmd_cluster(struct amr_command_cluster *acc); 122 123 /* 124 * Command processing. 125 */ 126 static int amr_bio_command(struct amr_softc *sc, struct amr_command **acp); 127 static int amr_wait_command(struct amr_command *ac) __unused; 128 static int amr_mapcmd(struct amr_command *ac); 129 static void amr_unmapcmd(struct amr_command *ac); 130 static int amr_start(struct amr_command *ac); 131 static void amr_complete(void *context, ac_qhead_t *head); 132 static void amr_setup_sg(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 133 static void amr_setup_data(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 134 static void amr_setup_ccb(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 135 static void amr_abort_load(struct amr_command *ac); 136 137 /* 138 * Status monitoring 139 */ 140 static void amr_periodic(void *data); 141 142 /* 143 * Interface-specific shims 144 */ 145 static int amr_quartz_submit_command(struct amr_command *ac); 146 static int amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave); 147 static int amr_quartz_poll_command(struct amr_command *ac); 148 static int amr_quartz_poll_command1(struct amr_softc *sc, struct amr_command *ac); 149 150 static int amr_std_submit_command(struct amr_command *ac); 151 static int amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave); 152 static int amr_std_poll_command(struct amr_command *ac); 153 static void amr_std_attach_mailbox(struct amr_softc *sc); 154 155 #ifdef AMR_BOARD_INIT 156 static int amr_quartz_init(struct amr_softc *sc); 157 static int amr_std_init(struct amr_softc *sc); 158 #endif 159 160 /* 161 * Debugging 162 */ 163 static void amr_describe_controller(struct amr_softc *sc); 164 #ifdef AMR_DEBUG 165 #if 0 166 static void amr_printcommand(struct amr_command *ac); 167 #endif 168 #endif 169 170 static void amr_init_sysctl(struct amr_softc *sc); 171 static int amr_linux_ioctl_int(struct cdev *dev, u_long cmd, caddr_t addr, 172 int32_t flag, struct sysmsg *sm); 173 174 MALLOC_DEFINE(M_AMR, "amr", "AMR memory"); 175 176 /******************************************************************************** 177 ******************************************************************************** 178 Inline Glue 179 ******************************************************************************** 180 ********************************************************************************/ 181 182 /******************************************************************************** 183 ******************************************************************************** 184 Public Interfaces 185 ******************************************************************************** 186 ********************************************************************************/ 187 188 /******************************************************************************** 189 * Initialise the controller and softc. 190 */ 191 int 192 amr_attach(struct amr_softc *sc) 193 { 194 device_t child; 195 196 debug_called(1); 197 198 /* 199 * Initialise per-controller queues. 200 */ 201 amr_init_qhead(&sc->amr_freecmds); 202 amr_init_qhead(&sc->amr_ready); 203 TAILQ_INIT(&sc->amr_cmd_clusters); 204 bioq_init(&sc->amr_bioq); 205 206 debug(2, "queue init done"); 207 208 /* 209 * Configure for this controller type. 210 */ 211 if (AMR_IS_QUARTZ(sc)) { 212 sc->amr_submit_command = amr_quartz_submit_command; 213 sc->amr_get_work = amr_quartz_get_work; 214 sc->amr_poll_command = amr_quartz_poll_command; 215 sc->amr_poll_command1 = amr_quartz_poll_command1; 216 } else { 217 sc->amr_submit_command = amr_std_submit_command; 218 sc->amr_get_work = amr_std_get_work; 219 sc->amr_poll_command = amr_std_poll_command; 220 amr_std_attach_mailbox(sc); 221 } 222 223 #ifdef AMR_BOARD_INIT 224 if ((AMR_IS_QUARTZ(sc) ? amr_quartz_init(sc) : amr_std_init(sc))) 225 return(ENXIO); 226 #endif 227 228 /* 229 * Allocate initial commands. 230 */ 231 amr_alloccmd_cluster(sc); 232 233 /* 234 * Quiz controller for features and limits. 235 */ 236 if (amr_query_controller(sc)) 237 return(ENXIO); 238 239 debug(2, "controller query complete"); 240 241 /* 242 * preallocate the remaining commands. 243 */ 244 while (sc->amr_nextslot < sc->amr_maxio) 245 amr_alloccmd_cluster(sc); 246 247 /* 248 * Setup sysctls. 249 */ 250 sysctl_ctx_init(&sc->amr_sysctl_ctx); 251 sc->amr_sysctl_tree = SYSCTL_ADD_NODE(&sc->amr_sysctl_ctx, 252 SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO, 253 device_get_nameunit(sc->amr_dev), CTLFLAG_RD, 0, ""); 254 if (sc->amr_sysctl_tree == NULL) { 255 device_printf(sc->amr_dev, "can't add sysctl node\n"); 256 return (EINVAL); 257 } 258 amr_init_sysctl(sc); 259 260 /* 261 * Attach our 'real' SCSI channels to CAM. 262 */ 263 child = device_add_child(sc->amr_dev, "amrp", -1); 264 sc->amr_pass = child; 265 if (child != NULL) { 266 device_set_softc(child, sc); 267 device_set_desc(child, "SCSI Passthrough Bus"); 268 bus_generic_attach(sc->amr_dev); 269 } 270 271 /* 272 * Create the control device. 273 */ 274 sc->amr_dev_t = make_dev(&amr_ops, device_get_unit(sc->amr_dev), UID_ROOT, GID_OPERATOR, 275 S_IRUSR | S_IWUSR, "amr%d", device_get_unit(sc->amr_dev)); 276 sc->amr_dev_t->si_drv1 = sc; 277 linux_no_adapter++; 278 if (device_get_unit(sc->amr_dev) == 0) 279 make_dev_alias(sc->amr_dev_t, "megadev0"); 280 281 /* 282 * Schedule ourselves to bring the controller up once interrupts are 283 * available. 284 */ 285 bzero(&sc->amr_ich, sizeof(struct intr_config_hook)); 286 sc->amr_ich.ich_func = amr_startup; 287 sc->amr_ich.ich_arg = sc; 288 if (config_intrhook_establish(&sc->amr_ich) != 0) { 289 device_printf(sc->amr_dev, "can't establish configuration hook\n"); 290 return(ENOMEM); 291 } 292 293 /* 294 * Print a little information about the controller. 295 */ 296 amr_describe_controller(sc); 297 298 debug(2, "attach complete"); 299 return(0); 300 } 301 302 /******************************************************************************** 303 * Locate disk resources and attach children to them. 304 */ 305 static void 306 amr_startup(void *arg) 307 { 308 struct amr_softc *sc = (struct amr_softc *)arg; 309 struct amr_logdrive *dr; 310 int i, error; 311 312 debug_called(1); 313 callout_init(&sc->amr_timeout); 314 315 /* pull ourselves off the intrhook chain */ 316 if (sc->amr_ich.ich_func) 317 config_intrhook_disestablish(&sc->amr_ich); 318 sc->amr_ich.ich_func = NULL; 319 320 /* get up-to-date drive information */ 321 if (amr_query_controller(sc)) { 322 device_printf(sc->amr_dev, "can't scan controller for drives\n"); 323 return; 324 } 325 326 /* iterate over available drives */ 327 for (i = 0, dr = &sc->amr_drive[0]; (i < AMR_MAXLD) && (dr->al_size != 0xffffffff); i++, dr++) { 328 /* are we already attached to this drive? */ 329 if (dr->al_disk == 0) { 330 /* generate geometry information */ 331 if (dr->al_size > 0x200000) { /* extended translation? */ 332 dr->al_heads = 255; 333 dr->al_sectors = 63; 334 } else { 335 dr->al_heads = 64; 336 dr->al_sectors = 32; 337 } 338 dr->al_cylinders = dr->al_size / (dr->al_heads * dr->al_sectors); 339 340 dr->al_disk = device_add_child(sc->amr_dev, NULL, -1); 341 if (dr->al_disk == 0) 342 device_printf(sc->amr_dev, "device_add_child failed\n"); 343 device_set_ivars(dr->al_disk, dr); 344 } 345 } 346 347 if ((error = bus_generic_attach(sc->amr_dev)) != 0) 348 device_printf(sc->amr_dev, "bus_generic_attach returned %d\n", error); 349 350 /* mark controller back up */ 351 sc->amr_state &= ~AMR_STATE_SHUTDOWN; 352 353 /* interrupts will be enabled before we do anything more */ 354 sc->amr_state |= AMR_STATE_INTEN; 355 356 /* 357 * Start the timeout routine. 358 */ 359 /* sc->amr_timeout = timeout(amr_periodic, sc, hz);*/ 360 361 return; 362 } 363 364 static void 365 amr_init_sysctl(struct amr_softc *sc) 366 { 367 368 SYSCTL_ADD_INT(&sc->amr_sysctl_ctx, 369 SYSCTL_CHILDREN(sc->amr_sysctl_tree), 370 OID_AUTO, "allow_volume_configure", CTLFLAG_RW, &sc->amr_allow_vol_config, 0, 371 ""); 372 SYSCTL_ADD_INT(&sc->amr_sysctl_ctx, 373 SYSCTL_CHILDREN(sc->amr_sysctl_tree), 374 OID_AUTO, "nextslot", CTLFLAG_RD, &sc->amr_nextslot, 0, 375 ""); 376 SYSCTL_ADD_INT(&sc->amr_sysctl_ctx, 377 SYSCTL_CHILDREN(sc->amr_sysctl_tree), 378 OID_AUTO, "busyslots", CTLFLAG_RD, &sc->amr_busyslots, 0, 379 ""); 380 SYSCTL_ADD_INT(&sc->amr_sysctl_ctx, 381 SYSCTL_CHILDREN(sc->amr_sysctl_tree), 382 OID_AUTO, "maxio", CTLFLAG_RD, &sc->amr_maxio, 0, 383 ""); 384 } 385 386 387 /******************************************************************************* 388 * Free resources associated with a controller instance 389 */ 390 void 391 amr_free(struct amr_softc *sc) 392 { 393 struct amr_command_cluster *acc; 394 395 /* detach from CAM */ 396 if (sc->amr_pass != NULL) 397 device_delete_child(sc->amr_dev, sc->amr_pass); 398 399 /* cancel status timeout */ 400 callout_stop(&sc->amr_timeout); 401 402 /* throw away any command buffers */ 403 while ((acc = TAILQ_FIRST(&sc->amr_cmd_clusters)) != NULL) { 404 TAILQ_REMOVE(&sc->amr_cmd_clusters, acc, acc_link); 405 amr_freecmd_cluster(acc); 406 } 407 408 /* destroy control device */ 409 if(sc->amr_dev_t != (struct cdev *)NULL) 410 destroy_dev(sc->amr_dev_t); 411 dev_ops_remove_minor(&amr_ops, device_get_unit(sc->amr_dev)); 412 413 #if 0 /* XXX swildner */ 414 if (mtx_initialized(&sc->amr_hw_lock)) 415 mtx_destroy(&sc->amr_hw_lock); 416 417 if (mtx_initialized(&sc->amr_list_lock)) 418 mtx_destroy(&sc->amr_list_lock); 419 #endif 420 421 if (sc->amr_sysctl_tree != NULL) 422 sysctl_ctx_free(&sc->amr_sysctl_ctx); 423 424 lockuninit(&sc->amr_hw_lock); 425 lockuninit(&sc->amr_list_lock); 426 } 427 428 /******************************************************************************* 429 * Receive a bio structure from a child device and queue it on a particular 430 * disk resource, then poke the disk resource to start as much work as it can. 431 */ 432 int 433 amr_submit_bio(struct amr_softc *sc, struct bio *bio) 434 { 435 debug_called(2); 436 437 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 438 amr_enqueue_bio(sc, bio); 439 amr_startio(sc); 440 lockmgr(&sc->amr_list_lock, LK_RELEASE); 441 return(0); 442 } 443 444 /******************************************************************************** 445 * Accept an open operation on the control device. 446 */ 447 static int 448 amr_open(struct dev_open_args *ap) 449 { 450 cdev_t dev = ap->a_head.a_dev; 451 int unit = minor(dev); 452 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit); 453 454 debug_called(1); 455 456 sc->amr_state |= AMR_STATE_OPEN; 457 return(0); 458 } 459 460 #ifdef LSI 461 static int 462 amr_del_ld(struct amr_softc *sc, int drv_no, int status) 463 { 464 465 debug_called(1); 466 467 sc->amr_state &= ~AMR_STATE_QUEUE_FRZN; 468 sc->amr_state &= ~AMR_STATE_LD_DELETE; 469 sc->amr_state |= AMR_STATE_REMAP_LD; 470 debug(1, "State Set"); 471 472 if (!status) { 473 debug(1, "disk begin destroyed %d",drv_no); 474 if (--amr_disks_registered == 0) 475 cdevsw_remove(&amrddisk_cdevsw); 476 debug(1, "disk begin destroyed success"); 477 } 478 return 0; 479 } 480 481 static int 482 amr_prepare_ld_delete(struct amr_softc *sc) 483 { 484 485 debug_called(1); 486 if (sc->ld_del_supported == 0) 487 return(ENOIOCTL); 488 489 sc->amr_state |= AMR_STATE_QUEUE_FRZN; 490 sc->amr_state |= AMR_STATE_LD_DELETE; 491 492 /* 5 minutes for the all the commands to be flushed.*/ 493 tsleep((void *)&sc->ld_del_supported, PCATCH,"delete_logical_drv",hz * 60 * 1); 494 if ( sc->amr_busyslots ) 495 return(ENOIOCTL); 496 497 return 0; 498 } 499 #endif 500 501 /******************************************************************************** 502 * Accept the last close on the control device. 503 */ 504 static int 505 amr_close(struct dev_close_args *ap) 506 { 507 cdev_t dev = ap->a_head.a_dev; 508 int unit = minor(dev); 509 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit); 510 511 debug_called(1); 512 513 sc->amr_state &= ~AMR_STATE_OPEN; 514 return (0); 515 } 516 517 /******************************************************************************** 518 * Handle controller-specific control operations. 519 */ 520 static void 521 amr_rescan_drives(struct cdev *dev) 522 { 523 struct amr_softc *sc = (struct amr_softc *)dev->si_drv1; 524 int i, error = 0; 525 526 sc->amr_state |= AMR_STATE_REMAP_LD; 527 while (sc->amr_busyslots) { 528 device_printf(sc->amr_dev, "idle controller\n"); 529 amr_done(sc); 530 } 531 532 /* mark ourselves as in-shutdown */ 533 sc->amr_state |= AMR_STATE_SHUTDOWN; 534 535 /* flush controller */ 536 device_printf(sc->amr_dev, "flushing cache..."); 537 kprintf("%s\n", amr_flush(sc) ? "failed" : "done"); 538 539 /* delete all our child devices */ 540 for(i = 0 ; i < AMR_MAXLD; i++) { 541 if(sc->amr_drive[i].al_disk != 0) { 542 if((error = device_delete_child(sc->amr_dev, 543 sc->amr_drive[i].al_disk)) != 0) 544 goto shutdown_out; 545 546 sc->amr_drive[i].al_disk = 0; 547 } 548 } 549 550 shutdown_out: 551 amr_startup(sc); 552 } 553 554 int 555 amr_linux_ioctl_int(struct cdev *dev, u_long cmd, caddr_t addr, int32_t flag, 556 struct sysmsg *sm) 557 { 558 struct amr_softc *sc = (struct amr_softc *)dev->si_drv1; 559 struct amr_command *ac; 560 struct amr_mailbox *mb; 561 struct amr_linux_ioctl ali; 562 void *dp, *temp; 563 int error; 564 int adapter, len, ac_flags = 0; 565 int logical_drives_changed = 0; 566 u_int32_t linux_version = 0x02100000; 567 u_int8_t status; 568 struct amr_passthrough *ap; /* 60 bytes */ 569 570 error = 0; 571 dp = NULL; 572 ac = NULL; 573 ap = NULL; 574 575 if ((error = copyin(addr, &ali, sizeof(ali))) != 0) 576 return (error); 577 switch (ali.ui.fcs.opcode) { 578 case 0x82: 579 switch(ali.ui.fcs.subopcode) { 580 case 'e': 581 copyout(&linux_version, (void *)(uintptr_t)ali.data, 582 sizeof(linux_version)); 583 error = 0; 584 break; 585 586 case 'm': 587 copyout(&linux_no_adapter, (void *)(uintptr_t)ali.data, 588 sizeof(linux_no_adapter)); 589 sm->sm_result.iresult = linux_no_adapter; 590 error = 0; 591 break; 592 593 default: 594 kprintf("Unknown subopcode\n"); 595 error = ENOIOCTL; 596 break; 597 } 598 break; 599 600 case 0x80: 601 case 0x81: 602 if (ali.ui.fcs.opcode == 0x80) 603 len = max(ali.outlen, ali.inlen); 604 else 605 len = ali.ui.fcs.length; 606 607 adapter = (ali.ui.fcs.adapno) ^ 'm' << 8; 608 609 mb = (void *)&ali.mbox[0]; 610 611 if ((ali.mbox[0] == FC_DEL_LOGDRV && ali.mbox[2] == OP_DEL_LOGDRV) || /* delete */ 612 (ali.mbox[0] == AMR_CMD_CONFIG && ali.mbox[2] == 0x0d)) { /* create */ 613 if (sc->amr_allow_vol_config == 0) { 614 error = EPERM; 615 break; 616 } 617 logical_drives_changed = 1; 618 } 619 620 if (ali.mbox[0] == AMR_CMD_PASS) { 621 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 622 while ((ac = amr_alloccmd(sc)) == NULL) 623 lksleep(sc, &sc->amr_list_lock, 0, "amrioc", hz); 624 lockmgr(&sc->amr_list_lock, LK_RELEASE); 625 ap = &ac->ac_ccb->ccb_pthru; 626 627 error = copyin((void *)(uintptr_t)mb->mb_physaddr, ap, 628 sizeof(struct amr_passthrough)); 629 if (error) 630 break; 631 632 if (ap->ap_data_transfer_length) 633 dp = kmalloc(ap->ap_data_transfer_length, M_AMR, 634 M_WAITOK | M_ZERO); 635 636 if (ali.inlen) { 637 error = copyin((void *)(uintptr_t)ap->ap_data_transfer_address, 638 dp, ap->ap_data_transfer_length); 639 if (error) 640 break; 641 } 642 643 ac_flags = AMR_CMD_DATAIN|AMR_CMD_DATAOUT|AMR_CMD_CCB; 644 bzero(&ac->ac_mailbox, sizeof(ac->ac_mailbox)); 645 ac->ac_mailbox.mb_command = AMR_CMD_PASS; 646 ac->ac_flags = ac_flags; 647 648 ac->ac_data = dp; 649 ac->ac_length = ap->ap_data_transfer_length; 650 temp = (void *)(uintptr_t)ap->ap_data_transfer_address; 651 652 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 653 error = amr_wait_command(ac); 654 lockmgr(&sc->amr_list_lock, LK_RELEASE); 655 if (error) 656 break; 657 658 status = ac->ac_status; 659 error = copyout(&status, &((struct amr_passthrough *)(uintptr_t)mb->mb_physaddr)->ap_scsi_status, sizeof(status)); 660 if (error) 661 break; 662 663 if (ali.outlen) { 664 error = copyout(dp, temp, ap->ap_data_transfer_length); 665 if (error) 666 break; 667 } 668 error = copyout(ap->ap_request_sense_area, ((struct amr_passthrough *)(uintptr_t)mb->mb_physaddr)->ap_request_sense_area, ap->ap_request_sense_length); 669 if (error) 670 break; 671 672 error = 0; 673 break; 674 } else if (ali.mbox[0] == AMR_CMD_PASS_64) { 675 kprintf("No AMR_CMD_PASS_64\n"); 676 error = ENOIOCTL; 677 break; 678 } else if (ali.mbox[0] == AMR_CMD_EXTPASS) { 679 kprintf("No AMR_CMD_EXTPASS\n"); 680 error = ENOIOCTL; 681 break; 682 } else { 683 /* 684 * Bug-for-bug compatibility with Linux! 685 * Some apps will send commands with inlen and outlen set to 0, 686 * even though they expect data to be transfered to them from the 687 * card. Linux accidentally allows this by allocating a 4KB 688 * buffer for the transfer anyways, but it then throws it away 689 * without copying it back to the app. 690 */ 691 if (!len) 692 len = 4096; 693 694 dp = kmalloc(len, M_AMR, M_WAITOK | M_ZERO); 695 696 if (ali.inlen) { 697 error = copyin((void *)(uintptr_t)mb->mb_physaddr, dp, len); 698 if (error) 699 break; 700 } 701 702 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 703 while ((ac = amr_alloccmd(sc)) == NULL) 704 lksleep(sc, &sc->amr_list_lock, 0, "amrioc", hz); 705 706 ac_flags = AMR_CMD_DATAIN|AMR_CMD_DATAOUT; 707 bzero(&ac->ac_mailbox, sizeof(ac->ac_mailbox)); 708 bcopy(&ali.mbox[0], &ac->ac_mailbox, sizeof(ali.mbox)); 709 710 ac->ac_length = len; 711 ac->ac_data = dp; 712 ac->ac_flags = ac_flags; 713 714 error = amr_wait_command(ac); 715 lockmgr(&sc->amr_list_lock, LK_RELEASE); 716 if (error) 717 break; 718 719 status = ac->ac_status; 720 error = copyout(&status, &((struct amr_mailbox *)&((struct amr_linux_ioctl *)addr)->mbox[0])->mb_status, sizeof(status)); 721 if (ali.outlen) { 722 error = copyout(dp, (void *)(uintptr_t)mb->mb_physaddr, len); 723 if (error) 724 break; 725 } 726 727 error = 0; 728 if (logical_drives_changed) 729 amr_rescan_drives(dev); 730 break; 731 } 732 break; 733 734 default: 735 debug(1, "unknown linux ioctl 0x%lx", cmd); 736 kprintf("unknown linux ioctl 0x%lx\n", cmd); 737 error = ENOIOCTL; 738 break; 739 } 740 741 /* 742 * At this point, we know that there is a lock held and that these 743 * objects have been allocated. 744 */ 745 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 746 if (ac != NULL) 747 amr_releasecmd(ac); 748 lockmgr(&sc->amr_list_lock, LK_RELEASE); 749 if (dp != NULL) 750 kfree(dp, M_AMR); 751 return(error); 752 } 753 754 static int 755 amr_ioctl(struct dev_ioctl_args *ap) 756 { 757 cdev_t dev = ap->a_head.a_dev; 758 caddr_t addr = ap->a_data; 759 u_long cmd = ap->a_cmd; 760 struct amr_softc *sc = (struct amr_softc *)dev->si_drv1; 761 union { 762 void *_p; 763 struct amr_user_ioctl *au; 764 #ifdef AMR_IO_COMMAND32 765 struct amr_user_ioctl32 *au32; 766 #endif 767 int *result; 768 } arg; 769 struct amr_command *ac; 770 struct amr_mailbox_ioctl *mbi; 771 void *dp, *au_buffer; 772 unsigned long au_length; 773 unsigned char *au_cmd; 774 int *au_statusp, au_direction; 775 int error; 776 struct amr_passthrough *_ap; /* 60 bytes */ 777 int logical_drives_changed = 0; 778 779 debug_called(1); 780 781 arg._p = (void *)addr; 782 783 error = 0; 784 dp = NULL; 785 ac = NULL; 786 _ap = NULL; 787 788 switch(cmd) { 789 790 case AMR_IO_VERSION: 791 debug(1, "AMR_IO_VERSION"); 792 *arg.result = AMR_IO_VERSION_NUMBER; 793 return(0); 794 795 #ifdef AMR_IO_COMMAND32 796 /* 797 * Accept ioctl-s from 32-bit binaries on non-32-bit 798 * platforms, such as AMD. LSI's MEGAMGR utility is 799 * the only example known today... -mi 800 */ 801 case AMR_IO_COMMAND32: 802 debug(1, "AMR_IO_COMMAND32 0x%x", arg.au32->au_cmd[0]); 803 au_cmd = arg.au32->au_cmd; 804 au_buffer = (void *)(u_int64_t)arg.au32->au_buffer; 805 au_length = arg.au32->au_length; 806 au_direction = arg.au32->au_direction; 807 au_statusp = &arg.au32->au_status; 808 break; 809 #endif 810 811 case AMR_IO_COMMAND: 812 debug(1, "AMR_IO_COMMAND 0x%x", arg.au->au_cmd[0]); 813 au_cmd = arg.au->au_cmd; 814 au_buffer = (void *)arg.au->au_buffer; 815 au_length = arg.au->au_length; 816 au_direction = arg.au->au_direction; 817 au_statusp = &arg.au->au_status; 818 break; 819 820 case 0xc0046d00: 821 case 0xc06e6d00: /* Linux emulation */ 822 { 823 devclass_t devclass; 824 struct amr_linux_ioctl ali; 825 int adapter, error; 826 827 devclass = devclass_find("amr"); 828 if (devclass == NULL) 829 return (ENOENT); 830 831 error = copyin(addr, &ali, sizeof(ali)); 832 if (error) 833 return (error); 834 if (ali.ui.fcs.opcode == 0x82) 835 adapter = 0; 836 else 837 adapter = (ali.ui.fcs.adapno) ^ 'm' << 8; 838 839 sc = devclass_get_softc(devclass, adapter); 840 if (sc == NULL) 841 return (ENOENT); 842 843 return (amr_linux_ioctl_int(sc->amr_dev_t, cmd, addr, 0, ap->a_sysmsg)); 844 } 845 default: 846 debug(1, "unknown ioctl 0x%lx", cmd); 847 return(ENOIOCTL); 848 } 849 850 if ((au_cmd[0] == FC_DEL_LOGDRV && au_cmd[1] == OP_DEL_LOGDRV) || /* delete */ 851 (au_cmd[0] == AMR_CMD_CONFIG && au_cmd[1] == 0x0d)) { /* create */ 852 if (sc->amr_allow_vol_config == 0) { 853 error = EPERM; 854 goto out; 855 } 856 logical_drives_changed = 1; 857 #ifdef LSI 858 if ((error = amr_prepare_ld_delete(sc)) != 0) 859 return (error); 860 #endif 861 } 862 863 /* handle inbound data buffer */ 864 if (au_length != 0 && au_cmd[0] != 0x06) { 865 if ((dp = kmalloc(au_length, M_AMR, M_WAITOK|M_ZERO)) == NULL) { 866 error = ENOMEM; 867 goto out; 868 } 869 if ((error = copyin(au_buffer, dp, au_length)) != 0) { 870 kfree(dp, M_AMR); 871 return (error); 872 } 873 debug(2, "copyin %ld bytes from %p -> %p", au_length, au_buffer, dp); 874 } 875 876 /* Allocate this now before the mutex gets held */ 877 878 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 879 while ((ac = amr_alloccmd(sc)) == NULL) 880 lksleep(sc, &sc->amr_list_lock, 0, "amrioc", hz); 881 882 /* handle SCSI passthrough command */ 883 if (au_cmd[0] == AMR_CMD_PASS) { 884 int len; 885 886 _ap = &ac->ac_ccb->ccb_pthru; 887 bzero(_ap, sizeof(struct amr_passthrough)); 888 889 /* copy cdb */ 890 len = au_cmd[2]; 891 _ap->ap_cdb_length = len; 892 bcopy(au_cmd + 3, _ap->ap_cdb, len); 893 894 /* build passthrough */ 895 _ap->ap_timeout = au_cmd[len + 3] & 0x07; 896 _ap->ap_ars = (au_cmd[len + 3] & 0x08) ? 1 : 0; 897 _ap->ap_islogical = (au_cmd[len + 3] & 0x80) ? 1 : 0; 898 _ap->ap_logical_drive_no = au_cmd[len + 4]; 899 _ap->ap_channel = au_cmd[len + 5]; 900 _ap->ap_scsi_id = au_cmd[len + 6]; 901 _ap->ap_request_sense_length = 14; 902 _ap->ap_data_transfer_length = au_length; 903 /* XXX what about the request-sense area? does the caller want it? */ 904 905 /* build command */ 906 ac->ac_mailbox.mb_command = AMR_CMD_PASS; 907 ac->ac_flags = AMR_CMD_CCB; 908 909 } else { 910 /* direct command to controller */ 911 mbi = (struct amr_mailbox_ioctl *)&ac->ac_mailbox; 912 913 /* copy pertinent mailbox items */ 914 mbi->mb_command = au_cmd[0]; 915 mbi->mb_channel = au_cmd[1]; 916 mbi->mb_param = au_cmd[2]; 917 mbi->mb_pad[0] = au_cmd[3]; 918 mbi->mb_drive = au_cmd[4]; 919 ac->ac_flags = 0; 920 } 921 922 /* build the command */ 923 ac->ac_data = dp; 924 ac->ac_length = au_length; 925 ac->ac_flags |= AMR_CMD_DATAIN|AMR_CMD_DATAOUT; 926 927 /* run the command */ 928 error = amr_wait_command(ac); 929 lockmgr(&sc->amr_list_lock, LK_RELEASE); 930 if (error) 931 goto out; 932 933 /* copy out data and set status */ 934 if (au_length != 0) { 935 error = copyout(dp, au_buffer, au_length); 936 } 937 debug(2, "copyout %ld bytes from %p -> %p", au_length, dp, au_buffer); 938 if (dp != NULL) 939 debug(2, "%p status 0x%x", dp, ac->ac_status); 940 *au_statusp = ac->ac_status; 941 942 out: 943 /* 944 * At this point, we know that there is a lock held and that these 945 * objects have been allocated. 946 */ 947 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 948 if (ac != NULL) 949 amr_releasecmd(ac); 950 lockmgr(&sc->amr_list_lock, LK_RELEASE); 951 if (dp != NULL) 952 kfree(dp, M_AMR); 953 954 #ifndef LSI 955 if (logical_drives_changed) 956 amr_rescan_drives(dev); 957 #endif 958 959 return(error); 960 } 961 962 /******************************************************************************** 963 ******************************************************************************** 964 Status Monitoring 965 ******************************************************************************** 966 ********************************************************************************/ 967 968 /******************************************************************************** 969 * Perform a periodic check of the controller status 970 */ 971 static void 972 amr_periodic(void *data) 973 { 974 struct amr_softc *sc = (struct amr_softc *)data; 975 976 debug_called(2); 977 978 /* XXX perform periodic status checks here */ 979 980 /* compensate for missed interrupts */ 981 amr_done(sc); 982 983 /* reschedule */ 984 callout_reset(&sc->amr_timeout, hz, amr_periodic, sc); 985 } 986 987 /******************************************************************************** 988 ******************************************************************************** 989 Command Wrappers 990 ******************************************************************************** 991 ********************************************************************************/ 992 993 /******************************************************************************** 994 * Interrogate the controller for the operational parameters we require. 995 */ 996 static int 997 amr_query_controller(struct amr_softc *sc) 998 { 999 struct amr_enquiry3 *aex; 1000 struct amr_prodinfo *ap; 1001 struct amr_enquiry *ae; 1002 int ldrv; 1003 int status; 1004 1005 /* 1006 * Greater than 10 byte cdb support 1007 */ 1008 sc->support_ext_cdb = amr_support_ext_cdb(sc); 1009 1010 if(sc->support_ext_cdb) { 1011 debug(2,"supports extended CDBs."); 1012 } 1013 1014 /* 1015 * Try to issue an ENQUIRY3 command 1016 */ 1017 if ((aex = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_ENQ3, 1018 AMR_CONFIG_ENQ3_SOLICITED_FULL, &status)) != NULL) { 1019 1020 /* 1021 * Fetch current state of logical drives. 1022 */ 1023 for (ldrv = 0; ldrv < aex->ae_numldrives; ldrv++) { 1024 sc->amr_drive[ldrv].al_size = aex->ae_drivesize[ldrv]; 1025 sc->amr_drive[ldrv].al_state = aex->ae_drivestate[ldrv]; 1026 sc->amr_drive[ldrv].al_properties = aex->ae_driveprop[ldrv]; 1027 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size, 1028 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties); 1029 } 1030 kfree(aex, M_AMR); 1031 1032 /* 1033 * Get product info for channel count. 1034 */ 1035 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0, &status)) == NULL) { 1036 device_printf(sc->amr_dev, "can't obtain product data from controller\n"); 1037 return(1); 1038 } 1039 sc->amr_maxdrives = 40; 1040 sc->amr_maxchan = ap->ap_nschan; 1041 sc->amr_maxio = ap->ap_maxio; 1042 sc->amr_type |= AMR_TYPE_40LD; 1043 kfree(ap, M_AMR); 1044 1045 ap = amr_enquiry(sc, 0, FC_DEL_LOGDRV, OP_SUP_DEL_LOGDRV, 0, &status); 1046 if (ap != NULL) 1047 kfree(ap, M_AMR); 1048 if (!status) { 1049 sc->amr_ld_del_supported = 1; 1050 device_printf(sc->amr_dev, "delete logical drives supported by controller\n"); 1051 } 1052 } else { 1053 1054 /* failed, try the 8LD ENQUIRY commands */ 1055 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0, &status)) == NULL) { 1056 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0, &status)) == NULL) { 1057 device_printf(sc->amr_dev, "can't obtain configuration data from controller\n"); 1058 return(1); 1059 } 1060 ae->ae_signature = 0; 1061 } 1062 1063 /* 1064 * Fetch current state of logical drives. 1065 */ 1066 for (ldrv = 0; ldrv < ae->ae_ldrv.al_numdrives; ldrv++) { 1067 sc->amr_drive[ldrv].al_size = ae->ae_ldrv.al_size[ldrv]; 1068 sc->amr_drive[ldrv].al_state = ae->ae_ldrv.al_state[ldrv]; 1069 sc->amr_drive[ldrv].al_properties = ae->ae_ldrv.al_properties[ldrv]; 1070 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size, 1071 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties); 1072 } 1073 1074 sc->amr_maxdrives = 8; 1075 sc->amr_maxchan = ae->ae_adapter.aa_channels; 1076 sc->amr_maxio = ae->ae_adapter.aa_maxio; 1077 kfree(ae, M_AMR); 1078 } 1079 1080 /* 1081 * Mark remaining drives as unused. 1082 */ 1083 for (; ldrv < AMR_MAXLD; ldrv++) 1084 sc->amr_drive[ldrv].al_size = 0xffffffff; 1085 1086 /* 1087 * Cap the maximum number of outstanding I/Os. AMI's Linux driver doesn't trust 1088 * the controller's reported value, and lockups have been seen when we do. 1089 */ 1090 sc->amr_maxio = imin(sc->amr_maxio, AMR_LIMITCMD); 1091 1092 return(0); 1093 } 1094 1095 /******************************************************************************** 1096 * Run a generic enquiry-style command. 1097 */ 1098 static void * 1099 amr_enquiry(struct amr_softc *sc, size_t bufsize, u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual, int *status) 1100 { 1101 struct amr_command *ac; 1102 void *result; 1103 u_int8_t *mbox; 1104 int error; 1105 1106 debug_called(1); 1107 1108 error = 1; 1109 result = NULL; 1110 1111 /* get ourselves a command buffer */ 1112 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1113 ac = amr_alloccmd(sc); 1114 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1115 if (ac == NULL) 1116 goto out; 1117 /* allocate the response structure */ 1118 if ((result = kmalloc(bufsize, M_AMR, M_ZERO|M_NOWAIT)) == NULL) 1119 goto out; 1120 /* set command flags */ 1121 1122 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAIN; 1123 1124 /* point the command at our data */ 1125 ac->ac_data = result; 1126 ac->ac_length = bufsize; 1127 1128 /* build the command proper */ 1129 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */ 1130 mbox[0] = cmd; 1131 mbox[2] = cmdsub; 1132 mbox[3] = cmdqual; 1133 *status = 0; 1134 1135 /* can't assume that interrupts are going to work here, so play it safe */ 1136 if (sc->amr_poll_command(ac)) 1137 goto out; 1138 error = ac->ac_status; 1139 *status = ac->ac_status; 1140 1141 out: 1142 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1143 if (ac != NULL) 1144 amr_releasecmd(ac); 1145 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1146 if ((error != 0) && (result != NULL)) { 1147 kfree(result, M_AMR); 1148 result = NULL; 1149 } 1150 return(result); 1151 } 1152 1153 /******************************************************************************** 1154 * Flush the controller's internal cache, return status. 1155 */ 1156 int 1157 amr_flush(struct amr_softc *sc) 1158 { 1159 struct amr_command *ac; 1160 int error; 1161 1162 /* get ourselves a command buffer */ 1163 error = 1; 1164 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1165 ac = amr_alloccmd(sc); 1166 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1167 if (ac == NULL) 1168 goto out; 1169 /* set command flags */ 1170 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 1171 1172 /* build the command proper */ 1173 ac->ac_mailbox.mb_command = AMR_CMD_FLUSH; 1174 1175 /* we have to poll, as the system may be going down or otherwise damaged */ 1176 if (sc->amr_poll_command(ac)) 1177 goto out; 1178 error = ac->ac_status; 1179 1180 out: 1181 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1182 if (ac != NULL) 1183 amr_releasecmd(ac); 1184 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1185 return(error); 1186 } 1187 1188 /******************************************************************************** 1189 * Detect extented cdb >> greater than 10 byte cdb support 1190 * returns '1' means this support exist 1191 * returns '0' means this support doesn't exist 1192 */ 1193 static int 1194 amr_support_ext_cdb(struct amr_softc *sc) 1195 { 1196 struct amr_command *ac; 1197 u_int8_t *mbox; 1198 int error; 1199 1200 /* get ourselves a command buffer */ 1201 error = 0; 1202 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1203 ac = amr_alloccmd(sc); 1204 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1205 if (ac == NULL) 1206 goto out; 1207 /* set command flags */ 1208 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 1209 1210 /* build the command proper */ 1211 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */ 1212 mbox[0] = 0xA4; 1213 mbox[2] = 0x16; 1214 1215 1216 /* we have to poll, as the system may be going down or otherwise damaged */ 1217 if (sc->amr_poll_command(ac)) 1218 goto out; 1219 if( ac->ac_status == AMR_STATUS_SUCCESS ) { 1220 error = 1; 1221 } 1222 1223 out: 1224 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1225 if (ac != NULL) 1226 amr_releasecmd(ac); 1227 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1228 return(error); 1229 } 1230 1231 /******************************************************************************** 1232 * Try to find I/O work for the controller from one or more of the work queues. 1233 * 1234 * We make the assumption that if the controller is not ready to take a command 1235 * at some given time, it will generate an interrupt at some later time when 1236 * it is. 1237 */ 1238 void 1239 amr_startio(struct amr_softc *sc) 1240 { 1241 struct amr_command *ac; 1242 1243 /* spin until something prevents us from doing any work */ 1244 for (;;) { 1245 1246 /* Don't bother to queue commands no bounce buffers are available. */ 1247 if (sc->amr_state & AMR_STATE_QUEUE_FRZN) 1248 break; 1249 1250 /* try to get a ready command */ 1251 ac = amr_dequeue_ready(sc); 1252 1253 /* if that failed, build a command from a bio */ 1254 if (ac == NULL) 1255 (void)amr_bio_command(sc, &ac); 1256 1257 /* if that failed, build a command from a ccb */ 1258 if ((ac == NULL) && (sc->amr_cam_command != NULL)) 1259 sc->amr_cam_command(sc, &ac); 1260 1261 /* if we don't have anything to do, give up */ 1262 if (ac == NULL) 1263 break; 1264 1265 /* try to give the command to the controller; if this fails save it for later and give up */ 1266 if (amr_start(ac)) { 1267 debug(2, "controller busy, command deferred"); 1268 amr_requeue_ready(ac); /* XXX schedule retry very soon? */ 1269 break; 1270 } 1271 } 1272 } 1273 1274 /******************************************************************************** 1275 * Handle completion of an I/O command. 1276 */ 1277 static void 1278 amr_completeio(struct amr_command *ac) 1279 { 1280 struct amr_softc *sc = ac->ac_sc; 1281 static struct timeval lastfail; 1282 static int curfail; 1283 struct buf *bp = ac->ac_bio->bio_buf; 1284 1285 if (ac->ac_status != AMR_STATUS_SUCCESS) { /* could be more verbose here? */ 1286 bp->b_error = EIO; 1287 bp->b_flags |= B_ERROR; 1288 1289 if (ppsratecheck(&lastfail, &curfail, 1)) 1290 device_printf(sc->amr_dev, "I/O error - 0x%x\n", ac->ac_status); 1291 /* amr_printcommand(ac);*/ 1292 } 1293 amrd_intr(ac->ac_bio); 1294 lockmgr(&ac->ac_sc->amr_list_lock, LK_EXCLUSIVE); 1295 amr_releasecmd(ac); 1296 lockmgr(&ac->ac_sc->amr_list_lock, LK_RELEASE); 1297 } 1298 1299 /******************************************************************************** 1300 ******************************************************************************** 1301 Command Processing 1302 ******************************************************************************** 1303 ********************************************************************************/ 1304 1305 /******************************************************************************** 1306 * Convert a bio off the top of the bio queue into a command. 1307 */ 1308 static int 1309 amr_bio_command(struct amr_softc *sc, struct amr_command **acp) 1310 { 1311 struct amr_command *ac; 1312 struct amrd_softc *amrd; 1313 struct bio *bio; 1314 struct buf *bp; 1315 int error; 1316 int blkcount; 1317 int driveno; 1318 int cmd; 1319 1320 ac = NULL; 1321 error = 0; 1322 1323 /* get a command */ 1324 if ((ac = amr_alloccmd(sc)) == NULL) 1325 return (ENOMEM); 1326 1327 /* get a bio to work on */ 1328 if ((bio = amr_dequeue_bio(sc)) == NULL) { 1329 amr_releasecmd(ac); 1330 return (0); 1331 } 1332 1333 /* connect the bio to the command */ 1334 bp = bio->bio_buf; 1335 ac->ac_complete = amr_completeio; 1336 ac->ac_bio = bio; 1337 ac->ac_data = bp->b_data; 1338 ac->ac_length = bp->b_bcount; 1339 cmd = 0; 1340 switch (bp->b_cmd) { 1341 case BUF_CMD_READ: 1342 ac->ac_flags |= AMR_CMD_DATAIN; 1343 if (AMR_IS_SG64(sc)) { 1344 cmd = AMR_CMD_LREAD64; 1345 ac->ac_flags |= AMR_CMD_SG64; 1346 } else 1347 cmd = AMR_CMD_LREAD; 1348 break; 1349 case BUF_CMD_WRITE: 1350 ac->ac_flags |= AMR_CMD_DATAOUT; 1351 if (AMR_IS_SG64(sc)) { 1352 cmd = AMR_CMD_LWRITE64; 1353 ac->ac_flags |= AMR_CMD_SG64; 1354 } else 1355 cmd = AMR_CMD_LWRITE; 1356 break; 1357 case BUF_CMD_FLUSH: 1358 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 1359 cmd = AMR_CMD_FLUSH; 1360 break; 1361 default: 1362 panic("Invalid bio command"); 1363 } 1364 amrd = (struct amrd_softc *)bio->bio_driver_info; 1365 driveno = amrd->amrd_drive - sc->amr_drive; 1366 blkcount = (bp->b_bcount + AMR_BLKSIZE - 1) / AMR_BLKSIZE; 1367 1368 ac->ac_mailbox.mb_command = cmd; 1369 if (bp->b_cmd & (BUF_CMD_READ|BUF_CMD_WRITE)) { 1370 ac->ac_mailbox.mb_blkcount = blkcount; 1371 ac->ac_mailbox.mb_lba = bio->bio_offset / AMR_BLKSIZE; 1372 if (((bio->bio_offset / AMR_BLKSIZE) + blkcount) > sc->amr_drive[driveno].al_size) { 1373 device_printf(sc->amr_dev, 1374 "I/O beyond end of unit (%lld,%d > %lu)\n", 1375 (long long)(bio->bio_offset / AMR_BLKSIZE), blkcount, 1376 (u_long)sc->amr_drive[driveno].al_size); 1377 } 1378 } 1379 ac->ac_mailbox.mb_drive = driveno; 1380 if (sc->amr_state & AMR_STATE_REMAP_LD) 1381 ac->ac_mailbox.mb_drive |= 0x80; 1382 1383 /* we fill in the s/g related data when the command is mapped */ 1384 1385 1386 *acp = ac; 1387 return(error); 1388 } 1389 1390 /******************************************************************************** 1391 * Take a command, submit it to the controller and sleep until it completes 1392 * or fails. Interrupts must be enabled, returns nonzero on error. 1393 */ 1394 static int 1395 amr_wait_command(struct amr_command *ac) 1396 { 1397 int error = 0; 1398 struct amr_softc *sc = ac->ac_sc; 1399 1400 debug_called(1); 1401 1402 ac->ac_complete = NULL; 1403 ac->ac_flags |= AMR_CMD_SLEEP; 1404 if ((error = amr_start(ac)) != 0) { 1405 return(error); 1406 } 1407 1408 while ((ac->ac_flags & AMR_CMD_BUSY) && (error != EWOULDBLOCK)) { 1409 error = lksleep(ac,&sc->amr_list_lock, 0, "amrwcmd", 0); 1410 } 1411 1412 return(error); 1413 } 1414 1415 /******************************************************************************** 1416 * Take a command, submit it to the controller and busy-wait for it to return. 1417 * Returns nonzero on error. Can be safely called with interrupts enabled. 1418 */ 1419 static int 1420 amr_std_poll_command(struct amr_command *ac) 1421 { 1422 struct amr_softc *sc = ac->ac_sc; 1423 int error, count; 1424 1425 debug_called(2); 1426 1427 ac->ac_complete = NULL; 1428 if ((error = amr_start(ac)) != 0) 1429 return(error); 1430 1431 count = 0; 1432 do { 1433 /* 1434 * Poll for completion, although the interrupt handler may beat us to it. 1435 * Note that the timeout here is somewhat arbitrary. 1436 */ 1437 amr_done(sc); 1438 DELAY(1000); 1439 } while ((ac->ac_flags & AMR_CMD_BUSY) && (count++ < 1000)); 1440 if (!(ac->ac_flags & AMR_CMD_BUSY)) { 1441 error = 0; 1442 } else { 1443 /* XXX the slot is now marked permanently busy */ 1444 error = EIO; 1445 device_printf(sc->amr_dev, "polled command timeout\n"); 1446 } 1447 return(error); 1448 } 1449 1450 static void 1451 amr_setup_polled_dmamap(void *arg, bus_dma_segment_t *segs, int nsegs, int err) 1452 { 1453 struct amr_command *ac = arg; 1454 struct amr_softc *sc = ac->ac_sc; 1455 int mb_channel; 1456 1457 if (err) { 1458 device_printf(sc->amr_dev, "error %d in %s", err, __FUNCTION__); 1459 ac->ac_status = AMR_STATUS_ABORTED; 1460 return; 1461 } 1462 1463 amr_setup_sg(arg, segs, nsegs, err); 1464 1465 /* for AMR_CMD_CONFIG Read/Write the s/g count goes elsewhere */ 1466 mb_channel = ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_channel; 1467 if (ac->ac_mailbox.mb_command == AMR_CMD_CONFIG && 1468 ((mb_channel == AMR_CONFIG_READ_NVRAM_CONFIG) || 1469 (mb_channel == AMR_CONFIG_WRITE_NVRAM_CONFIG))) 1470 ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_param = ac->ac_nsegments; 1471 1472 ac->ac_mailbox.mb_nsgelem = ac->ac_nsegments; 1473 ac->ac_mailbox.mb_physaddr = ac->ac_mb_physaddr; 1474 if (AC_IS_SG64(ac)) { 1475 ac->ac_sg64_hi = 0; 1476 ac->ac_sg64_lo = ac->ac_sgbusaddr; 1477 } 1478 1479 sc->amr_poll_command1(sc, ac); 1480 } 1481 1482 /******************************************************************************** 1483 * Take a command, submit it to the controller and busy-wait for it to return. 1484 * Returns nonzero on error. Can be safely called with interrupts enabled. 1485 */ 1486 static int 1487 amr_quartz_poll_command(struct amr_command *ac) 1488 { 1489 struct amr_softc *sc = ac->ac_sc; 1490 int error; 1491 1492 debug_called(2); 1493 1494 error = 0; 1495 1496 if (AC_IS_SG64(ac)) { 1497 ac->ac_tag = sc->amr_buffer64_dmat; 1498 ac->ac_datamap = ac->ac_dma64map; 1499 } else { 1500 ac->ac_tag = sc->amr_buffer_dmat; 1501 ac->ac_datamap = ac->ac_dmamap; 1502 } 1503 1504 /* now we have a slot, we can map the command (unmapped in amr_complete) */ 1505 if (ac->ac_data != NULL && ac->ac_length != 0) { 1506 if (bus_dmamap_load(ac->ac_tag, ac->ac_datamap, ac->ac_data, 1507 ac->ac_length, amr_setup_polled_dmamap, ac, BUS_DMA_NOWAIT) != 0) { 1508 error = 1; 1509 } 1510 } else { 1511 error = amr_quartz_poll_command1(sc, ac); 1512 } 1513 1514 return (error); 1515 } 1516 1517 static int 1518 amr_quartz_poll_command1(struct amr_softc *sc, struct amr_command *ac) 1519 { 1520 int count, error; 1521 1522 lockmgr(&sc->amr_hw_lock, LK_EXCLUSIVE); 1523 if ((sc->amr_state & AMR_STATE_INTEN) == 0) { 1524 count=0; 1525 while (sc->amr_busyslots) { 1526 lksleep(sc, &sc->amr_hw_lock, PCATCH, "amrpoll", hz); 1527 if(count++>10) { 1528 break; 1529 } 1530 } 1531 1532 if(sc->amr_busyslots) { 1533 device_printf(sc->amr_dev, "adapter is busy\n"); 1534 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 1535 if (ac->ac_data != NULL) { 1536 bus_dmamap_unload(ac->ac_tag, ac->ac_datamap); 1537 } 1538 ac->ac_status=0; 1539 return(1); 1540 } 1541 } 1542 1543 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, AMR_MBOX_CMDSIZE); 1544 1545 /* clear the poll/ack fields in the mailbox */ 1546 sc->amr_mailbox->mb_ident = 0xFE; 1547 sc->amr_mailbox->mb_nstatus = 0xFF; 1548 sc->amr_mailbox->mb_status = 0xFF; 1549 sc->amr_mailbox->mb_poll = 0; 1550 sc->amr_mailbox->mb_ack = 0; 1551 sc->amr_mailbox->mb_busy = 1; 1552 1553 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT); 1554 1555 while(sc->amr_mailbox->mb_nstatus == 0xFF) 1556 DELAY(1); 1557 while(sc->amr_mailbox->mb_status == 0xFF) 1558 DELAY(1); 1559 ac->ac_status=sc->amr_mailbox->mb_status; 1560 error = (ac->ac_status !=AMR_STATUS_SUCCESS) ? 1:0; 1561 while(sc->amr_mailbox->mb_poll != 0x77) 1562 DELAY(1); 1563 sc->amr_mailbox->mb_poll = 0; 1564 sc->amr_mailbox->mb_ack = 0x77; 1565 1566 /* acknowledge that we have the commands */ 1567 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_ACK); 1568 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK) 1569 DELAY(1); 1570 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 1571 1572 /* unmap the command's data buffer */ 1573 if (ac->ac_flags & AMR_CMD_DATAIN) { 1574 bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, BUS_DMASYNC_POSTREAD); 1575 } 1576 if (ac->ac_flags & AMR_CMD_DATAOUT) { 1577 bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, BUS_DMASYNC_POSTWRITE); 1578 } 1579 bus_dmamap_unload(ac->ac_tag, ac->ac_datamap); 1580 1581 return(error); 1582 } 1583 1584 static __inline int 1585 amr_freeslot(struct amr_command *ac) 1586 { 1587 struct amr_softc *sc = ac->ac_sc; 1588 int slot; 1589 1590 debug_called(3); 1591 1592 slot = ac->ac_slot; 1593 if (sc->amr_busycmd[slot] == NULL) 1594 panic("amr: slot %d not busy?\n", slot); 1595 1596 sc->amr_busycmd[slot] = NULL; 1597 atomic_subtract_int(&sc->amr_busyslots, 1); 1598 1599 return (0); 1600 } 1601 1602 /******************************************************************************** 1603 * Map/unmap (ac)'s data in the controller's addressable space as required. 1604 * 1605 * These functions may be safely called multiple times on a given command. 1606 */ 1607 static void 1608 amr_setup_sg(void *arg, bus_dma_segment_t *segs, int nsegments, int error) 1609 { 1610 struct amr_command *ac = (struct amr_command *)arg; 1611 struct amr_sgentry *sg; 1612 struct amr_sg64entry *sg64; 1613 int flags, i; 1614 1615 debug_called(3); 1616 1617 /* get base address of s/g table */ 1618 sg = ac->ac_sg.sg32; 1619 sg64 = ac->ac_sg.sg64; 1620 1621 if (AC_IS_SG64(ac)) { 1622 ac->ac_nsegments = nsegments; 1623 ac->ac_mb_physaddr = 0xffffffff; 1624 for (i = 0; i < nsegments; i++, sg64++) { 1625 sg64->sg_addr = segs[i].ds_addr; 1626 sg64->sg_count = segs[i].ds_len; 1627 } 1628 } else { 1629 /* decide whether we need to populate the s/g table */ 1630 if (nsegments < 2) { 1631 ac->ac_nsegments = 0; 1632 ac->ac_mb_physaddr = segs[0].ds_addr; 1633 } else { 1634 ac->ac_nsegments = nsegments; 1635 ac->ac_mb_physaddr = ac->ac_sgbusaddr; 1636 for (i = 0; i < nsegments; i++, sg++) { 1637 sg->sg_addr = segs[i].ds_addr; 1638 sg->sg_count = segs[i].ds_len; 1639 } 1640 } 1641 } 1642 1643 flags = 0; 1644 if (ac->ac_flags & AMR_CMD_DATAIN) 1645 flags |= BUS_DMASYNC_PREREAD; 1646 if (ac->ac_flags & AMR_CMD_DATAOUT) 1647 flags |= BUS_DMASYNC_PREWRITE; 1648 bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, flags); 1649 ac->ac_flags |= AMR_CMD_MAPPED; 1650 } 1651 1652 static void 1653 amr_setup_data(void *arg, bus_dma_segment_t *segs, int nsegs, int err) 1654 { 1655 struct amr_command *ac = arg; 1656 struct amr_softc *sc = ac->ac_sc; 1657 int mb_channel; 1658 1659 if (err) { 1660 device_printf(sc->amr_dev, "error %d in %s", err, __FUNCTION__); 1661 amr_abort_load(ac); 1662 return; 1663 } 1664 1665 amr_setup_sg(arg, segs, nsegs, err); 1666 1667 /* for AMR_CMD_CONFIG Read/Write the s/g count goes elsewhere */ 1668 mb_channel = ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_channel; 1669 if (ac->ac_mailbox.mb_command == AMR_CMD_CONFIG && 1670 ((mb_channel == AMR_CONFIG_READ_NVRAM_CONFIG) || 1671 (mb_channel == AMR_CONFIG_WRITE_NVRAM_CONFIG))) 1672 ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_param = ac->ac_nsegments; 1673 1674 ac->ac_mailbox.mb_nsgelem = ac->ac_nsegments; 1675 ac->ac_mailbox.mb_physaddr = ac->ac_mb_physaddr; 1676 if (AC_IS_SG64(ac)) { 1677 ac->ac_sg64_hi = 0; 1678 ac->ac_sg64_lo = ac->ac_sgbusaddr; 1679 } 1680 1681 if (sc->amr_submit_command(ac) == EBUSY) { 1682 amr_freeslot(ac); 1683 amr_requeue_ready(ac); 1684 } 1685 } 1686 1687 static void 1688 amr_setup_ccb(void *arg, bus_dma_segment_t *segs, int nsegs, int err) 1689 { 1690 struct amr_command *ac = arg; 1691 struct amr_softc *sc = ac->ac_sc; 1692 struct amr_passthrough *ap = &ac->ac_ccb->ccb_pthru; 1693 struct amr_ext_passthrough *aep = &ac->ac_ccb->ccb_epthru; 1694 1695 if (err) { 1696 device_printf(sc->amr_dev, "error %d in %s", err, __FUNCTION__); 1697 amr_abort_load(ac); 1698 return; 1699 } 1700 1701 /* Set up the mailbox portion of the command to point at the ccb */ 1702 ac->ac_mailbox.mb_nsgelem = 0; 1703 ac->ac_mailbox.mb_physaddr = ac->ac_ccb_busaddr; 1704 1705 amr_setup_sg(arg, segs, nsegs, err); 1706 1707 switch (ac->ac_mailbox.mb_command) { 1708 case AMR_CMD_EXTPASS: 1709 aep->ap_no_sg_elements = ac->ac_nsegments; 1710 aep->ap_data_transfer_address = ac->ac_mb_physaddr; 1711 break; 1712 case AMR_CMD_PASS: 1713 ap->ap_no_sg_elements = ac->ac_nsegments; 1714 ap->ap_data_transfer_address = ac->ac_mb_physaddr; 1715 break; 1716 default: 1717 panic("Unknown ccb command"); 1718 } 1719 1720 if (sc->amr_submit_command(ac) == EBUSY) { 1721 amr_freeslot(ac); 1722 amr_requeue_ready(ac); 1723 } 1724 } 1725 1726 static int 1727 amr_mapcmd(struct amr_command *ac) 1728 { 1729 bus_dmamap_callback_t *cb; 1730 struct amr_softc *sc = ac->ac_sc; 1731 1732 debug_called(3); 1733 1734 if (AC_IS_SG64(ac)) { 1735 ac->ac_tag = sc->amr_buffer64_dmat; 1736 ac->ac_datamap = ac->ac_dma64map; 1737 } else { 1738 ac->ac_tag = sc->amr_buffer_dmat; 1739 ac->ac_datamap = ac->ac_dmamap; 1740 } 1741 1742 if (ac->ac_flags & AMR_CMD_CCB) 1743 cb = amr_setup_ccb; 1744 else 1745 cb = amr_setup_data; 1746 1747 /* if the command involves data at all, and hasn't been mapped */ 1748 if ((ac->ac_flags & AMR_CMD_MAPPED) == 0 && (ac->ac_data != NULL)) { 1749 /* map the data buffers into bus space and build the s/g list */ 1750 if (bus_dmamap_load(ac->ac_tag, ac->ac_datamap, ac->ac_data, 1751 ac->ac_length, cb, ac, 0) == EINPROGRESS) { 1752 sc->amr_state |= AMR_STATE_QUEUE_FRZN; 1753 } 1754 } else { 1755 if (sc->amr_submit_command(ac) == EBUSY) { 1756 amr_freeslot(ac); 1757 amr_requeue_ready(ac); 1758 } 1759 } 1760 1761 return (0); 1762 } 1763 1764 static void 1765 amr_unmapcmd(struct amr_command *ac) 1766 { 1767 int flag; 1768 1769 debug_called(3); 1770 1771 /* if the command involved data at all and was mapped */ 1772 if (ac->ac_flags & AMR_CMD_MAPPED) { 1773 1774 if (ac->ac_data != NULL) { 1775 1776 flag = 0; 1777 if (ac->ac_flags & AMR_CMD_DATAIN) 1778 flag |= BUS_DMASYNC_POSTREAD; 1779 if (ac->ac_flags & AMR_CMD_DATAOUT) 1780 flag |= BUS_DMASYNC_POSTWRITE; 1781 1782 bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, flag); 1783 bus_dmamap_unload(ac->ac_tag, ac->ac_datamap); 1784 } 1785 1786 ac->ac_flags &= ~AMR_CMD_MAPPED; 1787 } 1788 } 1789 1790 static void 1791 amr_abort_load(struct amr_command *ac) 1792 { 1793 ac_qhead_t head; 1794 struct amr_softc *sc = ac->ac_sc; 1795 1796 KKASSERT(lockstatus(&sc->amr_list_lock, curthread) != 0); 1797 1798 ac->ac_status = AMR_STATUS_ABORTED; 1799 amr_init_qhead(&head); 1800 amr_enqueue_completed(ac, &head); 1801 1802 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1803 amr_complete(sc, &head); 1804 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1805 } 1806 1807 /******************************************************************************** 1808 * Take a command and give it to the controller, returns 0 if successful, or 1809 * EBUSY if the command should be retried later. 1810 */ 1811 static int 1812 amr_start(struct amr_command *ac) 1813 { 1814 struct amr_softc *sc; 1815 int error = 0; 1816 int slot; 1817 1818 debug_called(3); 1819 1820 /* mark command as busy so that polling consumer can tell */ 1821 sc = ac->ac_sc; 1822 ac->ac_flags |= AMR_CMD_BUSY; 1823 1824 /* get a command slot (freed in amr_done) */ 1825 slot = ac->ac_slot; 1826 if (sc->amr_busycmd[slot] != NULL) 1827 panic("amr: slot %d busy?\n", slot); 1828 sc->amr_busycmd[slot] = ac; 1829 atomic_add_int(&sc->amr_busyslots, 1); 1830 1831 /* Now we have a slot, we can map the command (unmapped in amr_complete). */ 1832 if ((error = amr_mapcmd(ac)) == ENOMEM) { 1833 /* 1834 * Memroy resources are short, so free the slot and let this be tried 1835 * later. 1836 */ 1837 amr_freeslot(ac); 1838 } 1839 1840 return (error); 1841 } 1842 1843 /******************************************************************************** 1844 * Extract one or more completed commands from the controller (sc) 1845 * 1846 * Returns nonzero if any commands on the work queue were marked as completed. 1847 */ 1848 1849 int 1850 amr_done(struct amr_softc *sc) 1851 { 1852 ac_qhead_t head; 1853 struct amr_command *ac; 1854 struct amr_mailbox mbox; 1855 int i, idx, result; 1856 1857 debug_called(3); 1858 1859 /* See if there's anything for us to do */ 1860 result = 0; 1861 amr_init_qhead(&head); 1862 1863 /* loop collecting completed commands */ 1864 for (;;) { 1865 /* poll for a completed command's identifier and status */ 1866 if (sc->amr_get_work(sc, &mbox)) { 1867 result = 1; 1868 1869 /* iterate over completed commands in this result */ 1870 for (i = 0; i < mbox.mb_nstatus; i++) { 1871 /* get pointer to busy command */ 1872 idx = mbox.mb_completed[i] - 1; 1873 ac = sc->amr_busycmd[idx]; 1874 1875 /* really a busy command? */ 1876 if (ac != NULL) { 1877 1878 /* pull the command from the busy index */ 1879 amr_freeslot(ac); 1880 1881 /* save status for later use */ 1882 ac->ac_status = mbox.mb_status; 1883 amr_enqueue_completed(ac, &head); 1884 debug(3, "completed command with status %x", mbox.mb_status); 1885 } else { 1886 device_printf(sc->amr_dev, "bad slot %d completed\n", idx); 1887 } 1888 } 1889 } else 1890 break; /* no work */ 1891 } 1892 1893 /* handle completion and timeouts */ 1894 amr_complete(sc, &head); 1895 1896 return(result); 1897 } 1898 1899 /******************************************************************************** 1900 * Do completion processing on done commands on (sc) 1901 */ 1902 1903 static void 1904 amr_complete(void *context, ac_qhead_t *head) 1905 { 1906 struct amr_softc *sc = (struct amr_softc *)context; 1907 struct amr_command *ac; 1908 1909 debug_called(3); 1910 1911 /* pull completed commands off the queue */ 1912 for (;;) { 1913 ac = amr_dequeue_completed(sc, head); 1914 if (ac == NULL) 1915 break; 1916 1917 /* unmap the command's data buffer */ 1918 amr_unmapcmd(ac); 1919 1920 /* 1921 * Is there a completion handler? 1922 */ 1923 if (ac->ac_complete != NULL) { 1924 /* unbusy the command */ 1925 ac->ac_flags &= ~AMR_CMD_BUSY; 1926 ac->ac_complete(ac); 1927 1928 /* 1929 * Is someone sleeping on this one? 1930 */ 1931 } else { 1932 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1933 ac->ac_flags &= ~AMR_CMD_BUSY; 1934 if (ac->ac_flags & AMR_CMD_SLEEP) { 1935 /* unbusy the command */ 1936 wakeup(ac); 1937 } 1938 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1939 } 1940 1941 if(!sc->amr_busyslots) { 1942 wakeup(sc); 1943 } 1944 } 1945 1946 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1947 sc->amr_state &= ~AMR_STATE_QUEUE_FRZN; 1948 amr_startio(sc); 1949 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1950 } 1951 1952 /******************************************************************************** 1953 ******************************************************************************** 1954 Command Buffer Management 1955 ******************************************************************************** 1956 ********************************************************************************/ 1957 1958 /******************************************************************************** 1959 * Get a new command buffer. 1960 * 1961 * This may return NULL in low-memory cases. 1962 * 1963 * If possible, we recycle a command buffer that's been used before. 1964 */ 1965 struct amr_command * 1966 amr_alloccmd(struct amr_softc *sc) 1967 { 1968 struct amr_command *ac; 1969 1970 debug_called(3); 1971 1972 ac = amr_dequeue_free(sc); 1973 if (ac == NULL) { 1974 sc->amr_state |= AMR_STATE_QUEUE_FRZN; 1975 return(NULL); 1976 } 1977 1978 /* clear out significant fields */ 1979 ac->ac_status = 0; 1980 bzero(&ac->ac_mailbox, sizeof(struct amr_mailbox)); 1981 ac->ac_flags = 0; 1982 ac->ac_bio = NULL; 1983 ac->ac_data = NULL; 1984 ac->ac_complete = NULL; 1985 ac->ac_retries = 0; 1986 ac->ac_tag = NULL; 1987 ac->ac_datamap = NULL; 1988 return(ac); 1989 } 1990 1991 /******************************************************************************** 1992 * Release a command buffer for recycling. 1993 */ 1994 void 1995 amr_releasecmd(struct amr_command *ac) 1996 { 1997 debug_called(3); 1998 1999 amr_enqueue_free(ac); 2000 } 2001 2002 /******************************************************************************** 2003 * Allocate a new command cluster and initialise it. 2004 */ 2005 static void 2006 amr_alloccmd_cluster(struct amr_softc *sc) 2007 { 2008 struct amr_command_cluster *acc; 2009 struct amr_command *ac; 2010 int i, nextslot; 2011 2012 /* 2013 * If we haven't found the real limit yet, let us have a couple of 2014 * commands in order to be able to probe. 2015 */ 2016 if (sc->amr_maxio == 0) 2017 sc->amr_maxio = 2; 2018 2019 if (sc->amr_nextslot > sc->amr_maxio) 2020 return; 2021 acc = kmalloc(AMR_CMD_CLUSTERSIZE, M_AMR, M_NOWAIT | M_ZERO); 2022 if (acc != NULL) { 2023 nextslot = sc->amr_nextslot; 2024 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 2025 TAILQ_INSERT_TAIL(&sc->amr_cmd_clusters, acc, acc_link); 2026 lockmgr(&sc->amr_list_lock, LK_RELEASE); 2027 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) { 2028 ac = &acc->acc_command[i]; 2029 ac->ac_sc = sc; 2030 ac->ac_slot = nextslot; 2031 2032 /* 2033 * The SG table for each slot is a fixed size and is assumed to 2034 * to hold 64-bit s/g objects when the driver is configured to do 2035 * 64-bit DMA. 32-bit DMA commands still use the same table, but 2036 * cast down to 32-bit objects. 2037 */ 2038 if (AMR_IS_SG64(sc)) { 2039 ac->ac_sgbusaddr = sc->amr_sgbusaddr + 2040 (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sg64entry)); 2041 ac->ac_sg.sg64 = sc->amr_sg64table + (ac->ac_slot * AMR_NSEG); 2042 } else { 2043 ac->ac_sgbusaddr = sc->amr_sgbusaddr + 2044 (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry)); 2045 ac->ac_sg.sg32 = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG); 2046 } 2047 2048 ac->ac_ccb = sc->amr_ccb + ac->ac_slot; 2049 ac->ac_ccb_busaddr = sc->amr_ccb_busaddr + 2050 (ac->ac_slot * sizeof(union amr_ccb)); 2051 2052 if (bus_dmamap_create(sc->amr_buffer_dmat, 0, &ac->ac_dmamap)) 2053 break; 2054 if (AMR_IS_SG64(sc) && 2055 (bus_dmamap_create(sc->amr_buffer64_dmat, 0,&ac->ac_dma64map))) 2056 break; 2057 amr_releasecmd(ac); 2058 if (++nextslot > sc->amr_maxio) 2059 break; 2060 } 2061 sc->amr_nextslot = nextslot; 2062 } 2063 } 2064 2065 /******************************************************************************** 2066 * Free a command cluster 2067 */ 2068 static void 2069 amr_freecmd_cluster(struct amr_command_cluster *acc) 2070 { 2071 struct amr_softc *sc = acc->acc_command[0].ac_sc; 2072 int i; 2073 2074 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) { 2075 if (acc->acc_command[i].ac_sc == NULL) 2076 break; 2077 bus_dmamap_destroy(sc->amr_buffer_dmat, acc->acc_command[i].ac_dmamap); 2078 if (AMR_IS_SG64(sc)) 2079 bus_dmamap_destroy(sc->amr_buffer64_dmat, acc->acc_command[i].ac_dma64map); 2080 } 2081 kfree(acc, M_AMR); 2082 } 2083 2084 /******************************************************************************** 2085 ******************************************************************************** 2086 Interface-specific Shims 2087 ******************************************************************************** 2088 ********************************************************************************/ 2089 2090 /******************************************************************************** 2091 * Tell the controller that the mailbox contains a valid command 2092 */ 2093 static int 2094 amr_quartz_submit_command(struct amr_command *ac) 2095 { 2096 struct amr_softc *sc = ac->ac_sc; 2097 static struct timeval lastfail; 2098 static int curfail; 2099 int i = 0; 2100 2101 lockmgr(&sc->amr_hw_lock, LK_EXCLUSIVE); 2102 while (sc->amr_mailbox->mb_busy && (i++ < 10)) { 2103 DELAY(1); 2104 /* This is a no-op read that flushes pending mailbox updates */ 2105 AMR_QGET_ODB(sc); 2106 } 2107 if (sc->amr_mailbox->mb_busy) { 2108 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 2109 if (ac->ac_retries++ > 1000) { 2110 if (ppsratecheck(&lastfail, &curfail, 1)) 2111 device_printf(sc->amr_dev, "Too many retries on command %p. " 2112 "Controller is likely dead\n", ac); 2113 ac->ac_retries = 0; 2114 } 2115 return (EBUSY); 2116 } 2117 2118 /* 2119 * Save the slot number so that we can locate this command when complete. 2120 * Note that ident = 0 seems to be special, so we don't use it. 2121 */ 2122 ac->ac_mailbox.mb_ident = ac->ac_slot + 1; /* will be coppied into mbox */ 2123 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, 14); 2124 sc->amr_mailbox->mb_busy = 1; 2125 sc->amr_mailbox->mb_poll = 0; 2126 sc->amr_mailbox->mb_ack = 0; 2127 sc->amr_mailbox64->sg64_hi = ac->ac_sg64_hi; 2128 sc->amr_mailbox64->sg64_lo = ac->ac_sg64_lo; 2129 2130 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT); 2131 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 2132 return(0); 2133 } 2134 2135 static int 2136 amr_std_submit_command(struct amr_command *ac) 2137 { 2138 struct amr_softc *sc = ac->ac_sc; 2139 static struct timeval lastfail; 2140 static int curfail; 2141 2142 lockmgr(&sc->amr_hw_lock, LK_EXCLUSIVE); 2143 if (AMR_SGET_MBSTAT(sc) & AMR_SMBOX_BUSYFLAG) { 2144 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 2145 if (ac->ac_retries++ > 1000) { 2146 if (ppsratecheck(&lastfail, &curfail, 1)) 2147 device_printf(sc->amr_dev, "Too many retries on command %p. " 2148 "Controller is likely dead\n", ac); 2149 ac->ac_retries = 0; 2150 } 2151 return (EBUSY); 2152 } 2153 2154 /* 2155 * Save the slot number so that we can locate this command when complete. 2156 * Note that ident = 0 seems to be special, so we don't use it. 2157 */ 2158 ac->ac_mailbox.mb_ident = ac->ac_slot + 1; /* will be coppied into mbox */ 2159 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, 14); 2160 sc->amr_mailbox->mb_busy = 1; 2161 sc->amr_mailbox->mb_poll = 0; 2162 sc->amr_mailbox->mb_ack = 0; 2163 2164 AMR_SPOST_COMMAND(sc); 2165 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 2166 return(0); 2167 } 2168 2169 /******************************************************************************** 2170 * Claim any work that the controller has completed; acknowledge completion, 2171 * save details of the completion in (mbsave) 2172 */ 2173 static int 2174 amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave) 2175 { 2176 int worked, i; 2177 u_int32_t outd; 2178 u_int8_t nstatus; 2179 u_int8_t completed[46]; 2180 2181 debug_called(3); 2182 2183 worked = 0; 2184 2185 /* work waiting for us? */ 2186 if ((outd = AMR_QGET_ODB(sc)) == AMR_QODB_READY) { 2187 2188 /* acknowledge interrupt */ 2189 AMR_QPUT_ODB(sc, AMR_QODB_READY); 2190 2191 while ((nstatus = sc->amr_mailbox->mb_nstatus) == 0xff) 2192 DELAY(1); 2193 sc->amr_mailbox->mb_nstatus = 0xff; 2194 2195 /* wait until fw wrote out all completions */ 2196 for (i = 0; i < nstatus; i++) { 2197 while ((completed[i] = sc->amr_mailbox->mb_completed[i]) == 0xff) 2198 DELAY(1); 2199 sc->amr_mailbox->mb_completed[i] = 0xff; 2200 } 2201 2202 /* Save information for later processing */ 2203 mbsave->mb_nstatus = nstatus; 2204 mbsave->mb_status = sc->amr_mailbox->mb_status; 2205 sc->amr_mailbox->mb_status = 0xff; 2206 2207 for (i = 0; i < nstatus; i++) 2208 mbsave->mb_completed[i] = completed[i]; 2209 2210 /* acknowledge that we have the commands */ 2211 AMR_QPUT_IDB(sc, AMR_QIDB_ACK); 2212 2213 #if 0 2214 #ifndef AMR_QUARTZ_GOFASTER 2215 /* 2216 * This waits for the controller to notice that we've taken the 2217 * command from it. It's very inefficient, and we shouldn't do it, 2218 * but if we remove this code, we stop completing commands under 2219 * load. 2220 * 2221 * Peter J says we shouldn't do this. The documentation says we 2222 * should. Who is right? 2223 */ 2224 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK) 2225 ; /* XXX aiee! what if it dies? */ 2226 #endif 2227 #endif 2228 2229 worked = 1; /* got some work */ 2230 } 2231 2232 return(worked); 2233 } 2234 2235 static int 2236 amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave) 2237 { 2238 int worked; 2239 u_int8_t istat; 2240 2241 debug_called(3); 2242 2243 worked = 0; 2244 2245 /* check for valid interrupt status */ 2246 istat = AMR_SGET_ISTAT(sc); 2247 if ((istat & AMR_SINTR_VALID) != 0) { 2248 AMR_SPUT_ISTAT(sc, istat); /* ack interrupt status */ 2249 2250 /* save mailbox, which contains a list of completed commands */ 2251 bcopy((void *)(uintptr_t)(volatile void *)sc->amr_mailbox, mbsave, sizeof(*mbsave)); 2252 2253 AMR_SACK_INTERRUPT(sc); /* acknowledge we have the mailbox */ 2254 worked = 1; 2255 } 2256 2257 return(worked); 2258 } 2259 2260 /******************************************************************************** 2261 * Notify the controller of the mailbox location. 2262 */ 2263 static void 2264 amr_std_attach_mailbox(struct amr_softc *sc) 2265 { 2266 2267 /* program the mailbox physical address */ 2268 AMR_SBYTE_SET(sc, AMR_SMBOX_0, sc->amr_mailboxphys & 0xff); 2269 AMR_SBYTE_SET(sc, AMR_SMBOX_1, (sc->amr_mailboxphys >> 8) & 0xff); 2270 AMR_SBYTE_SET(sc, AMR_SMBOX_2, (sc->amr_mailboxphys >> 16) & 0xff); 2271 AMR_SBYTE_SET(sc, AMR_SMBOX_3, (sc->amr_mailboxphys >> 24) & 0xff); 2272 AMR_SBYTE_SET(sc, AMR_SMBOX_ENABLE, AMR_SMBOX_ADDR); 2273 2274 /* clear any outstanding interrupt and enable interrupts proper */ 2275 AMR_SACK_INTERRUPT(sc); 2276 AMR_SENABLE_INTR(sc); 2277 } 2278 2279 #ifdef AMR_BOARD_INIT 2280 /******************************************************************************** 2281 * Initialise the controller 2282 */ 2283 static int 2284 amr_quartz_init(struct amr_softc *sc) 2285 { 2286 int status, ostatus; 2287 2288 device_printf(sc->amr_dev, "initial init status %x\n", AMR_QGET_INITSTATUS(sc)); 2289 2290 AMR_QRESET(sc); 2291 2292 ostatus = 0xff; 2293 while ((status = AMR_QGET_INITSTATUS(sc)) != AMR_QINIT_DONE) { 2294 if (status != ostatus) { 2295 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_qinit, status)); 2296 ostatus = status; 2297 } 2298 switch (status) { 2299 case AMR_QINIT_NOMEM: 2300 return(ENOMEM); 2301 2302 case AMR_QINIT_SCAN: 2303 /* XXX we could print channel/target here */ 2304 break; 2305 } 2306 } 2307 return(0); 2308 } 2309 2310 static int 2311 amr_std_init(struct amr_softc *sc) 2312 { 2313 int status, ostatus; 2314 2315 device_printf(sc->amr_dev, "initial init status %x\n", AMR_SGET_INITSTATUS(sc)); 2316 2317 AMR_SRESET(sc); 2318 2319 ostatus = 0xff; 2320 while ((status = AMR_SGET_INITSTATUS(sc)) != AMR_SINIT_DONE) { 2321 if (status != ostatus) { 2322 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_sinit, status)); 2323 ostatus = status; 2324 } 2325 switch (status) { 2326 case AMR_SINIT_NOMEM: 2327 return(ENOMEM); 2328 2329 case AMR_SINIT_INPROG: 2330 /* XXX we could print channel/target here? */ 2331 break; 2332 } 2333 } 2334 return(0); 2335 } 2336 #endif 2337 2338 /******************************************************************************** 2339 ******************************************************************************** 2340 Debugging 2341 ******************************************************************************** 2342 ********************************************************************************/ 2343 2344 /******************************************************************************** 2345 * Identify the controller and print some information about it. 2346 */ 2347 static void 2348 amr_describe_controller(struct amr_softc *sc) 2349 { 2350 struct amr_prodinfo *ap; 2351 struct amr_enquiry *ae; 2352 char *prod; 2353 int status; 2354 2355 /* 2356 * Try to get 40LD product info, which tells us what the card is labelled as. 2357 */ 2358 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0, &status)) != NULL) { 2359 device_printf(sc->amr_dev, "<LSILogic %.80s> Firmware %.16s, BIOS %.16s, %dMB RAM\n", 2360 ap->ap_product, ap->ap_firmware, ap->ap_bios, 2361 ap->ap_memsize); 2362 2363 kfree(ap, M_AMR); 2364 return; 2365 } 2366 2367 /* 2368 * Try 8LD extended ENQUIRY to get controller signature, and use lookup table. 2369 */ 2370 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0, &status)) != NULL) { 2371 prod = amr_describe_code(amr_table_adaptertype, ae->ae_signature); 2372 2373 } else if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0, &status)) != NULL) { 2374 2375 /* 2376 * Try to work it out based on the PCI signatures. 2377 */ 2378 switch (pci_get_device(sc->amr_dev)) { 2379 case 0x9010: 2380 prod = "Series 428"; 2381 break; 2382 case 0x9060: 2383 prod = "Series 434"; 2384 break; 2385 default: 2386 prod = "unknown controller"; 2387 break; 2388 } 2389 } else { 2390 device_printf(sc->amr_dev, "<unsupported controller>\n"); 2391 return; 2392 } 2393 2394 /* 2395 * HP NetRaid controllers have a special encoding of the firmware and 2396 * BIOS versions. The AMI version seems to have it as strings whereas 2397 * the HP version does it with a leading uppercase character and two 2398 * binary numbers. 2399 */ 2400 2401 if(ae->ae_adapter.aa_firmware[2] >= 'A' && 2402 ae->ae_adapter.aa_firmware[2] <= 'Z' && 2403 ae->ae_adapter.aa_firmware[1] < ' ' && 2404 ae->ae_adapter.aa_firmware[0] < ' ' && 2405 ae->ae_adapter.aa_bios[2] >= 'A' && 2406 ae->ae_adapter.aa_bios[2] <= 'Z' && 2407 ae->ae_adapter.aa_bios[1] < ' ' && 2408 ae->ae_adapter.aa_bios[0] < ' ') { 2409 2410 /* this looks like we have an HP NetRaid version of the MegaRaid */ 2411 2412 if(ae->ae_signature == AMR_SIG_438) { 2413 /* the AMI 438 is a NetRaid 3si in HP-land */ 2414 prod = "HP NetRaid 3si"; 2415 } 2416 2417 device_printf(sc->amr_dev, "<%s> Firmware %c.%02d.%02d, BIOS %c.%02d.%02d, %dMB RAM\n", 2418 prod, ae->ae_adapter.aa_firmware[2], 2419 ae->ae_adapter.aa_firmware[1], 2420 ae->ae_adapter.aa_firmware[0], 2421 ae->ae_adapter.aa_bios[2], 2422 ae->ae_adapter.aa_bios[1], 2423 ae->ae_adapter.aa_bios[0], 2424 ae->ae_adapter.aa_memorysize); 2425 } else { 2426 device_printf(sc->amr_dev, "<%s> Firmware %.4s, BIOS %.4s, %dMB RAM\n", 2427 prod, ae->ae_adapter.aa_firmware, ae->ae_adapter.aa_bios, 2428 ae->ae_adapter.aa_memorysize); 2429 } 2430 kfree(ae, M_AMR); 2431 } 2432 2433 int 2434 amr_dump_blocks(struct amr_softc *sc, int unit, u_int32_t lba, void *data, int blks) 2435 { 2436 struct amr_command *ac; 2437 int error = EIO; 2438 2439 debug_called(1); 2440 2441 sc->amr_state |= AMR_STATE_INTEN; 2442 2443 /* get ourselves a command buffer */ 2444 if ((ac = amr_alloccmd(sc)) == NULL) 2445 goto out; 2446 /* set command flags */ 2447 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 2448 2449 /* point the command at our data */ 2450 ac->ac_data = data; 2451 ac->ac_length = blks * AMR_BLKSIZE; 2452 2453 /* build the command proper */ 2454 ac->ac_mailbox.mb_command = AMR_CMD_LWRITE; 2455 ac->ac_mailbox.mb_blkcount = blks; 2456 ac->ac_mailbox.mb_lba = lba; 2457 ac->ac_mailbox.mb_drive = unit; 2458 2459 /* can't assume that interrupts are going to work here, so play it safe */ 2460 if (sc->amr_poll_command(ac)) 2461 goto out; 2462 error = ac->ac_status; 2463 2464 out: 2465 if (ac != NULL) 2466 amr_releasecmd(ac); 2467 2468 sc->amr_state &= ~AMR_STATE_INTEN; 2469 return (error); 2470 } 2471 2472 2473 2474 #ifdef AMR_DEBUG 2475 /******************************************************************************** 2476 * Print the command (ac) in human-readable format 2477 */ 2478 #if 0 2479 static void 2480 amr_printcommand(struct amr_command *ac) 2481 { 2482 struct amr_softc *sc = ac->ac_sc; 2483 struct amr_sgentry *sg; 2484 int i; 2485 2486 device_printf(sc->amr_dev, "cmd %x ident %d drive %d\n", 2487 ac->ac_mailbox.mb_command, ac->ac_mailbox.mb_ident, ac->ac_mailbox.mb_drive); 2488 device_printf(sc->amr_dev, "blkcount %d lba %d\n", 2489 ac->ac_mailbox.mb_blkcount, ac->ac_mailbox.mb_lba); 2490 device_printf(sc->amr_dev, "virtaddr %p length %lu\n", ac->ac_data, (unsigned long)ac->ac_length); 2491 device_printf(sc->amr_dev, "sg physaddr %08x nsg %d\n", 2492 ac->ac_mailbox.mb_physaddr, ac->ac_mailbox.mb_nsgelem); 2493 device_printf(sc->amr_dev, "ccb %p bio %p\n", ac->ac_ccb_data, ac->ac_bio); 2494 2495 /* get base address of s/g table */ 2496 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG); 2497 for (i = 0; i < ac->ac_mailbox.mb_nsgelem; i++, sg++) 2498 device_printf(sc->amr_dev, " %x/%d\n", sg->sg_addr, sg->sg_count); 2499 } 2500 #endif 2501 #endif 2502