1 /*- 2 * Copyright (c) 1999,2000 Michael Smith 3 * Copyright (c) 2000 BSDi 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 /*- 28 * Copyright (c) 2002 Eric Moore 29 * Copyright (c) 2002, 2004 LSI Logic Corporation 30 * All rights reserved. 31 * 32 * Redistribution and use in source and binary forms, with or without 33 * modification, are permitted provided that the following conditions 34 * are met: 35 * 1. Redistributions of source code must retain the above copyright 36 * notice, this list of conditions and the following disclaimer. 37 * 2. Redistributions in binary form must reproduce the above copyright 38 * notice, this list of conditions and the following disclaimer in the 39 * documentation and/or other materials provided with the distribution. 40 * 3. The party using or redistributing the source code and binary forms 41 * agrees to the disclaimer below and the terms and conditions set forth 42 * herein. 43 * 44 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 45 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 46 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 47 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 48 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 50 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 51 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 52 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 53 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 54 * SUCH DAMAGE. 55 * 56 * $FreeBSD: src/sys/dev/amr/amr_pci.c,v 1.40 2007/12/12 05:55:03 scottl Exp $ 57 */ 58 59 #include <sys/param.h> 60 #include <sys/systm.h> 61 #include <sys/kernel.h> 62 #include <sys/module.h> 63 #include <sys/sysctl.h> 64 65 #include <sys/bio.h> 66 #include <sys/bus.h> 67 #include <sys/conf.h> 68 69 #include <sys/rman.h> 70 71 #include <bus/pci/pcireg.h> 72 #include <bus/pci/pcivar.h> 73 74 #include <dev/raid/amr/amrio.h> 75 #include <dev/raid/amr/amrreg.h> 76 #include <dev/raid/amr/amrvar.h> 77 78 static int amr_pci_probe(device_t dev); 79 static int amr_pci_attach(device_t dev); 80 static int amr_pci_detach(device_t dev); 81 static int amr_pci_shutdown(device_t dev); 82 static int amr_pci_suspend(device_t dev); 83 static int amr_pci_resume(device_t dev); 84 static void amr_pci_intr(void *arg); 85 static void amr_pci_free(struct amr_softc *sc); 86 static void amr_sglist_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error); 87 static int amr_sglist_map(struct amr_softc *sc); 88 static int amr_setup_mbox(struct amr_softc *sc); 89 static int amr_ccb_map(struct amr_softc *sc); 90 91 static u_int amr_force_sg32 = 0; 92 TUNABLE_INT("hw.amr.force_sg32", &amr_force_sg32); 93 SYSCTL_DECL(_hw_amr); 94 SYSCTL_UINT(_hw_amr, OID_AUTO, force_sg32, CTLFLAG_RD, &amr_force_sg32, 0, 95 "Force the AMR driver to use 32bit scatter gather"); 96 97 static device_method_t amr_methods[] = { 98 /* Device interface */ 99 DEVMETHOD(device_probe, amr_pci_probe), 100 DEVMETHOD(device_attach, amr_pci_attach), 101 DEVMETHOD(device_detach, amr_pci_detach), 102 DEVMETHOD(device_shutdown, amr_pci_shutdown), 103 DEVMETHOD(device_suspend, amr_pci_suspend), 104 DEVMETHOD(device_resume, amr_pci_resume), 105 106 DEVMETHOD(bus_print_child, bus_generic_print_child), 107 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 108 DEVMETHOD_END 109 }; 110 111 static driver_t amr_pci_driver = { 112 "amr", 113 amr_methods, 114 sizeof(struct amr_softc) 115 }; 116 117 static devclass_t amr_devclass; 118 DRIVER_MODULE(amr, pci, amr_pci_driver, amr_devclass, NULL, NULL); 119 MODULE_VERSION(amr, 1); 120 MODULE_DEPEND(amr, pci, 1, 1, 1); 121 MODULE_DEPEND(amr, cam, 1, 1, 1); 122 123 static struct amr_ident 124 { 125 int vendor; 126 int device; 127 int flags; 128 #define AMR_ID_PROBE_SIG (1<<0) /* generic i960RD, check signature */ 129 #define AMR_ID_DO_SG64 (1<<1) 130 #define AMR_ID_QUARTZ (1<<2) 131 } amr_device_ids[] = { 132 {0x101e, 0x9010, 0}, 133 {0x101e, 0x9060, 0}, 134 {0x8086, 0x1960, AMR_ID_QUARTZ | AMR_ID_PROBE_SIG}, 135 {0x101e, 0x1960, AMR_ID_QUARTZ}, 136 {0x1000, 0x1960, AMR_ID_QUARTZ | AMR_ID_DO_SG64 | AMR_ID_PROBE_SIG}, 137 {0x1000, 0x0407, AMR_ID_QUARTZ | AMR_ID_DO_SG64}, 138 {0x1000, 0x0408, AMR_ID_QUARTZ | AMR_ID_DO_SG64}, 139 {0x1000, 0x0409, AMR_ID_QUARTZ | AMR_ID_DO_SG64}, 140 {0x1028, 0x000e, AMR_ID_QUARTZ | AMR_ID_DO_SG64 | AMR_ID_PROBE_SIG}, /* perc4/di i960 */ 141 {0x1028, 0x000f, AMR_ID_QUARTZ | AMR_ID_DO_SG64}, /* perc4/di Verde*/ 142 {0x1028, 0x0013, AMR_ID_QUARTZ | AMR_ID_DO_SG64}, /* perc4/di */ 143 {0, 0, 0} 144 }; 145 146 static struct amr_ident * 147 amr_find_ident(device_t dev) 148 { 149 struct amr_ident *id; 150 int sig; 151 152 for (id = amr_device_ids; id->vendor != 0; id++) { 153 if ((pci_get_vendor(dev) == id->vendor) && 154 (pci_get_device(dev) == id->device)) { 155 156 /* do we need to test for a signature? */ 157 if (id->flags & AMR_ID_PROBE_SIG) { 158 sig = pci_read_config(dev, AMR_CFG_SIG, 2); 159 if ((sig != AMR_SIGNATURE_1) && (sig != AMR_SIGNATURE_2)) 160 continue; 161 } 162 return (id); 163 } 164 } 165 return (NULL); 166 } 167 168 static int 169 amr_pci_probe(device_t dev) 170 { 171 172 debug_called(1); 173 174 if (amr_find_ident(dev) != NULL) { 175 device_set_desc(dev, LSI_DESC_PCI); 176 return(BUS_PROBE_DEFAULT); 177 } 178 return(ENXIO); 179 } 180 181 static int 182 amr_pci_attach(device_t dev) 183 { 184 struct amr_softc *sc; 185 struct amr_ident *id; 186 int rid, rtype, error; 187 u_int32_t command; 188 189 debug_called(1); 190 191 /* 192 * Initialise softc. 193 */ 194 sc = device_get_softc(dev); 195 bzero(sc, sizeof(*sc)); 196 sc->amr_dev = dev; 197 198 /* assume failure is 'not configured' */ 199 error = ENXIO; 200 201 /* 202 * Determine board type. 203 */ 204 if ((id = amr_find_ident(dev)) == NULL) 205 return (ENXIO); 206 207 command = pci_read_config(dev, PCIR_COMMAND, 1); 208 if (id->flags & AMR_ID_QUARTZ) { 209 /* 210 * Make sure we are going to be able to talk to this board. 211 */ 212 if ((command & PCIM_CMD_MEMEN) == 0) { 213 device_printf(dev, "memory window not available\n"); 214 return (ENXIO); 215 } 216 sc->amr_type |= AMR_TYPE_QUARTZ; 217 } else { 218 /* 219 * Make sure we are going to be able to talk to this board. 220 */ 221 if ((command & PCIM_CMD_PORTEN) == 0) { 222 device_printf(dev, "I/O window not available\n"); 223 return (ENXIO); 224 } 225 } 226 227 if ((amr_force_sg32 == 0) && (id->flags & AMR_ID_DO_SG64) && 228 (sizeof(vm_paddr_t) > 4)) { 229 device_printf(dev, "Using 64-bit DMA\n"); 230 sc->amr_type |= AMR_TYPE_SG64; 231 } 232 233 /* force the busmaster enable bit on */ 234 if (!(command & PCIM_CMD_BUSMASTEREN)) { 235 device_printf(dev, "busmaster bit not set, enabling\n"); 236 command |= PCIM_CMD_BUSMASTEREN; 237 pci_write_config(dev, PCIR_COMMAND, command, 2); 238 } 239 240 /* 241 * Allocate the PCI register window. 242 */ 243 rid = PCIR_BAR(0); 244 rtype = AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT; 245 sc->amr_reg = bus_alloc_resource_any(dev, rtype, &rid, RF_ACTIVE); 246 if (sc->amr_reg == NULL) { 247 device_printf(sc->amr_dev, "can't allocate register window\n"); 248 goto out; 249 } 250 sc->amr_btag = rman_get_bustag(sc->amr_reg); 251 sc->amr_bhandle = rman_get_bushandle(sc->amr_reg); 252 253 /* 254 * Allocate and connect our interrupt. 255 */ 256 rid = 0; 257 sc->amr_irq = bus_alloc_resource_any(sc->amr_dev, SYS_RES_IRQ, &rid, 258 RF_SHAREABLE | RF_ACTIVE); 259 if (sc->amr_irq == NULL) { 260 device_printf(sc->amr_dev, "can't allocate interrupt\n"); 261 goto out; 262 } 263 if (bus_setup_intr(sc->amr_dev, sc->amr_irq, 264 INTR_MPSAFE, amr_pci_intr, 265 sc, &sc->amr_intr, NULL)) { 266 device_printf(sc->amr_dev, "can't set up interrupt\n"); 267 goto out; 268 } 269 270 debug(2, "interrupt attached"); 271 272 /* assume failure is 'out of memory' */ 273 error = ENOMEM; 274 275 /* 276 * Allocate the parent bus DMA tag appropriate for PCI. 277 */ 278 if (bus_dma_tag_create(NULL, /* parent */ 279 1, 0, /* alignment,boundary */ 280 AMR_IS_SG64(sc) ? 281 BUS_SPACE_MAXADDR : 282 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 283 BUS_SPACE_MAXADDR, /* highaddr */ 284 MAXBSIZE, AMR_NSEG, /* maxsize, nsegments */ 285 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 286 0, /* flags */ 287 &sc->amr_parent_dmat)) { 288 device_printf(dev, "can't allocate parent DMA tag\n"); 289 goto out; 290 } 291 292 /* 293 * Create DMA tag for mapping buffers into controller-addressable space. 294 */ 295 if (bus_dma_tag_create(sc->amr_parent_dmat, /* parent */ 296 1, 0, /* alignment,boundary */ 297 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 298 BUS_SPACE_MAXADDR, /* highaddr */ 299 MAXBSIZE, AMR_NSEG, /* maxsize, nsegments */ 300 MAXBSIZE, /* maxsegsize */ 301 0, /* flags */ 302 &sc->amr_buffer_dmat)) { 303 device_printf(sc->amr_dev, "can't allocate buffer DMA tag\n"); 304 goto out; 305 } 306 307 if (bus_dma_tag_create(sc->amr_parent_dmat, /* parent */ 308 1, 0, /* alignment,boundary */ 309 BUS_SPACE_MAXADDR, /* lowaddr */ 310 BUS_SPACE_MAXADDR, /* highaddr */ 311 MAXBSIZE, AMR_NSEG, /* maxsize, nsegments */ 312 MAXBSIZE, /* maxsegsize */ 313 0, /* flags */ 314 &sc->amr_buffer64_dmat)) { 315 device_printf(sc->amr_dev, "can't allocate buffer DMA tag\n"); 316 goto out; 317 } 318 319 debug(2, "dma tag done"); 320 321 /* 322 * Allocate and set up mailbox in a bus-visible fashion. 323 */ 324 lockinit(&sc->amr_list_lock, "AMR List Lock", 0, LK_CANRECURSE); 325 lockinit(&sc->amr_hw_lock, "AMR HW Lock", 0, LK_CANRECURSE); 326 if ((error = amr_setup_mbox(sc)) != 0) 327 goto out; 328 329 debug(2, "mailbox setup"); 330 331 /* 332 * Build the scatter/gather buffers. 333 */ 334 if ((error = amr_sglist_map(sc)) != 0) 335 goto out; 336 debug(2, "s/g list mapped"); 337 338 if ((error = amr_ccb_map(sc)) != 0) 339 goto out; 340 debug(2, "ccb mapped"); 341 342 343 /* 344 * Do bus-independant initialisation, bring controller online. 345 */ 346 error = amr_attach(sc); 347 348 out: 349 if (error) 350 amr_pci_free(sc); 351 return(error); 352 } 353 354 /******************************************************************************** 355 * Disconnect from the controller completely, in preparation for unload. 356 */ 357 static int 358 amr_pci_detach(device_t dev) 359 { 360 struct amr_softc *sc = device_get_softc(dev); 361 int error; 362 363 debug_called(1); 364 365 if (sc->amr_state & AMR_STATE_OPEN) 366 return(EBUSY); 367 368 if ((error = amr_pci_shutdown(dev))) 369 return(error); 370 371 amr_pci_free(sc); 372 373 return(0); 374 } 375 376 /******************************************************************************** 377 * Bring the controller down to a dormant state and detach all child devices. 378 * 379 * This function is called before detach, system shutdown, or before performing 380 * an operation which may add or delete system disks. (Call amr_startup to 381 * resume normal operation.) 382 * 383 * Note that we can assume that the bioq on the controller is empty, as we won't 384 * allow shutdown if any device is open. 385 */ 386 static int 387 amr_pci_shutdown(device_t dev) 388 { 389 struct amr_softc *sc = device_get_softc(dev); 390 int i,error; 391 392 debug_called(1); 393 394 /* mark ourselves as in-shutdown */ 395 sc->amr_state |= AMR_STATE_SHUTDOWN; 396 397 398 /* flush controller */ 399 device_printf(sc->amr_dev, "flushing cache..."); 400 kprintf("%s\n", amr_flush(sc) ? "failed" : "done"); 401 402 error = 0; 403 404 /* delete all our child devices */ 405 for(i = 0 ; i < AMR_MAXLD; i++) { 406 if( sc->amr_drive[i].al_disk != NULL) { 407 if((error = device_delete_child(sc->amr_dev,sc->amr_drive[i].al_disk)) != 0) 408 goto shutdown_out; 409 sc->amr_drive[i].al_disk = NULL; 410 } 411 } 412 413 /* XXX disable interrupts? */ 414 415 shutdown_out: 416 return(error); 417 } 418 419 /******************************************************************************** 420 * Bring the controller to a quiescent state, ready for system suspend. 421 */ 422 static int 423 amr_pci_suspend(device_t dev) 424 { 425 struct amr_softc *sc = device_get_softc(dev); 426 427 debug_called(1); 428 429 sc->amr_state |= AMR_STATE_SUSPEND; 430 431 /* flush controller */ 432 device_printf(sc->amr_dev, "flushing cache..."); 433 kprintf("%s\n", amr_flush(sc) ? "failed" : "done"); 434 435 /* XXX disable interrupts? */ 436 437 return(0); 438 } 439 440 /******************************************************************************** 441 * Bring the controller back to a state ready for operation. 442 */ 443 static int 444 amr_pci_resume(device_t dev) 445 { 446 struct amr_softc *sc = device_get_softc(dev); 447 448 debug_called(1); 449 450 sc->amr_state &= ~AMR_STATE_SUSPEND; 451 452 /* XXX enable interrupts? */ 453 454 return(0); 455 } 456 457 /******************************************************************************* 458 * Take an interrupt, or be poked by other code to look for interrupt-worthy 459 * status. 460 */ 461 static void 462 amr_pci_intr(void *arg) 463 { 464 struct amr_softc *sc = (struct amr_softc *)arg; 465 466 debug_called(3); 467 468 /* collect finished commands, queue anything waiting */ 469 amr_done(sc); 470 } 471 472 /******************************************************************************** 473 * Free all of the resources associated with (sc) 474 * 475 * Should not be called if the controller is active. 476 */ 477 static void 478 amr_pci_free(struct amr_softc *sc) 479 { 480 void *p; 481 482 debug_called(1); 483 484 amr_free(sc); 485 486 /* destroy data-transfer DMA tag */ 487 if (sc->amr_buffer_dmat) 488 bus_dma_tag_destroy(sc->amr_buffer_dmat); 489 if (sc->amr_buffer64_dmat) 490 bus_dma_tag_destroy(sc->amr_buffer64_dmat); 491 492 /* free and destroy DMA memory and tag for passthrough pool */ 493 if (sc->amr_ccb) 494 bus_dmamem_free(sc->amr_ccb_dmat, sc->amr_ccb, sc->amr_ccb_dmamap); 495 if (sc->amr_ccb_dmat) 496 bus_dma_tag_destroy(sc->amr_ccb_dmat); 497 498 /* free and destroy DMA memory and tag for s/g lists */ 499 if (sc->amr_sgtable) 500 bus_dmamem_free(sc->amr_sg_dmat, sc->amr_sgtable, sc->amr_sg_dmamap); 501 if (sc->amr_sg_dmat) 502 bus_dma_tag_destroy(sc->amr_sg_dmat); 503 504 /* free and destroy DMA memory and tag for mailbox */ 505 p = (void *)(uintptr_t)(volatile void *)sc->amr_mailbox64; 506 if (sc->amr_mailbox) { 507 bus_dmamem_free(sc->amr_mailbox_dmat, p, sc->amr_mailbox_dmamap); 508 } 509 if (sc->amr_mailbox_dmat) 510 bus_dma_tag_destroy(sc->amr_mailbox_dmat); 511 512 /* disconnect the interrupt handler */ 513 if (sc->amr_intr) 514 bus_teardown_intr(sc->amr_dev, sc->amr_irq, sc->amr_intr); 515 if (sc->amr_irq != NULL) 516 bus_release_resource(sc->amr_dev, SYS_RES_IRQ, 0, sc->amr_irq); 517 518 /* destroy the parent DMA tag */ 519 if (sc->amr_parent_dmat) 520 bus_dma_tag_destroy(sc->amr_parent_dmat); 521 522 /* release the register window mapping */ 523 if (sc->amr_reg != NULL) 524 bus_release_resource(sc->amr_dev, 525 AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT, 526 PCIR_BAR(0), sc->amr_reg); 527 } 528 529 /******************************************************************************** 530 * Allocate and map the scatter/gather table in bus space. 531 */ 532 static void 533 amr_sglist_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error) 534 { 535 uint32_t *addr; 536 537 debug_called(1); 538 539 addr = arg; 540 *addr = segs[0].ds_addr; 541 } 542 543 static int 544 amr_sglist_map(struct amr_softc *sc) 545 { 546 size_t segsize; 547 void *p; 548 int error; 549 550 debug_called(1); 551 552 /* 553 * Create a single tag describing a region large enough to hold all of 554 * the s/g lists we will need. 555 * 556 * Note that we could probably use AMR_LIMITCMD here, but that may become 557 * tunable. 558 */ 559 if (AMR_IS_SG64(sc)) 560 segsize = sizeof(struct amr_sg64entry) * AMR_NSEG * AMR_MAXCMD; 561 else 562 segsize = sizeof(struct amr_sgentry) * AMR_NSEG * AMR_MAXCMD; 563 564 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */ 565 512, 0, /* alignment,boundary */ 566 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 567 BUS_SPACE_MAXADDR, /* highaddr */ 568 segsize, 1, /* maxsize, nsegments */ 569 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 570 0, /* flags */ 571 &sc->amr_sg_dmat); 572 if (error != 0) { 573 device_printf(sc->amr_dev, "can't allocate scatter/gather DMA tag\n"); 574 return(ENOMEM); 575 } 576 577 /* 578 * Allocate enough s/g maps for all commands and permanently map them into 579 * controller-visible space. 580 * 581 * XXX this assumes we can get enough space for all the s/g maps in one 582 * contiguous slab. We may need to switch to a more complex arrangement 583 * where we allocate in smaller chunks and keep a lookup table from slot 584 * to bus address. 585 * 586 * XXX HACK ALERT: at least some controllers don't like the s/g memory 587 * being allocated below 0x2000. We leak some memory if 588 * we get some below this mark and allocate again. We 589 * should be able to avoid this with the tag setup, but 590 * that does't seem to work. 591 */ 592 retry: 593 error = bus_dmamem_alloc(sc->amr_sg_dmat, &p, BUS_DMA_NOWAIT, 594 &sc->amr_sg_dmamap); 595 if (error) { 596 device_printf(sc->amr_dev, "can't allocate s/g table\n"); 597 return(ENOMEM); 598 } 599 bus_dmamap_load(sc->amr_sg_dmat, sc->amr_sg_dmamap, p, segsize, amr_sglist_helper, &sc->amr_sgbusaddr, 0); 600 if (sc->amr_sgbusaddr < 0x2000) { 601 debug(1, "s/g table too low (0x%x), reallocating\n", sc->amr_sgbusaddr); 602 goto retry; 603 } 604 605 if (AMR_IS_SG64(sc)) 606 sc->amr_sg64table = (struct amr_sg64entry *)p; 607 sc->amr_sgtable = (struct amr_sgentry *)p; 608 609 return(0); 610 } 611 612 /******************************************************************************** 613 * Allocate and set up mailbox areas for the controller (sc) 614 * 615 * The basic mailbox structure should be 16-byte aligned. 616 */ 617 static int 618 amr_setup_mbox(struct amr_softc *sc) 619 { 620 int error; 621 void *p; 622 uint32_t baddr; 623 624 debug_called(1); 625 626 /* 627 * Create a single tag describing a region large enough to hold the entire 628 * mailbox. 629 */ 630 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */ 631 16, 0, /* alignment,boundary */ 632 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 633 BUS_SPACE_MAXADDR, /* highaddr */ 634 sizeof(struct amr_mailbox64), /* maxsize */ 635 1, /* nsegments */ 636 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 637 0, /* flags */ 638 &sc->amr_mailbox_dmat); 639 if (error != 0) { 640 device_printf(sc->amr_dev, "can't allocate mailbox tag\n"); 641 return(ENOMEM); 642 } 643 644 /* 645 * Allocate the mailbox structure and permanently map it into 646 * controller-visible space. 647 */ 648 error = bus_dmamem_alloc(sc->amr_mailbox_dmat, &p, BUS_DMA_NOWAIT, 649 &sc->amr_mailbox_dmamap); 650 if (error) { 651 device_printf(sc->amr_dev, "can't allocate mailbox memory\n"); 652 return(ENOMEM); 653 } 654 bus_dmamap_load(sc->amr_mailbox_dmat, sc->amr_mailbox_dmamap, p, 655 sizeof(struct amr_mailbox64), amr_sglist_helper, &baddr, 0); 656 /* 657 * Conventional mailbox is inside the mailbox64 region. 658 */ 659 /* save physical base of the basic mailbox structure */ 660 sc->amr_mailboxphys = baddr + offsetof(struct amr_mailbox64, mb); 661 bzero(p, sizeof(struct amr_mailbox64)); 662 sc->amr_mailbox64 = (struct amr_mailbox64 *)p; 663 sc->amr_mailbox = &sc->amr_mailbox64->mb; 664 665 return(0); 666 } 667 668 static int 669 amr_ccb_map(struct amr_softc *sc) 670 { 671 int ccbsize, error; 672 673 /* 674 * Passthrough and Extended passthrough structures will share the same 675 * memory. 676 */ 677 ccbsize = sizeof(union amr_ccb) * AMR_MAXCMD; 678 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */ 679 128, 0, /* alignment,boundary */ 680 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 681 BUS_SPACE_MAXADDR, /* highaddr */ 682 ccbsize, /* maxsize */ 683 1, /* nsegments */ 684 ccbsize, /* maxsegsize */ 685 0, /* flags */ 686 &sc->amr_ccb_dmat); 687 if (error != 0) { 688 device_printf(sc->amr_dev, "can't allocate ccb tag\n"); 689 return (ENOMEM); 690 } 691 692 error = bus_dmamem_alloc(sc->amr_ccb_dmat, (void **)&sc->amr_ccb, 693 BUS_DMA_NOWAIT, &sc->amr_ccb_dmamap); 694 if (error) { 695 device_printf(sc->amr_dev, "can't allocate ccb memory\n"); 696 return (ENOMEM); 697 } 698 bus_dmamap_load(sc->amr_ccb_dmat, sc->amr_ccb_dmamap, sc->amr_ccb, 699 ccbsize, amr_sglist_helper, &sc->amr_ccb_busaddr, 0); 700 bzero(sc->amr_ccb, ccbsize); 701 702 return (0); 703 } 704