1 /*- 2 * Copyright (c) 1999,2000 Michael Smith 3 * Copyright (c) 2000 BSDi 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * Copyright (c) 2002 Eric Moore 28 * Copyright (c) 2002 LSI Logic Corporation 29 * All rights reserved. 30 * 31 * Redistribution and use in source and binary forms, with or without 32 * modification, are permitted provided that the following conditions 33 * are met: 34 * 1. Redistributions of source code must retain the above copyright 35 * notice, this list of conditions and the following disclaimer. 36 * 2. Redistributions in binary form must reproduce the above copyright 37 * notice, this list of conditions and the following disclaimer in the 38 * documentation and/or other materials provided with the distribution. 39 * 3. The party using or redistributing the source code and binary forms 40 * agrees to the disclaimer below and the terms and conditions set forth 41 * herein. 42 * 43 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 44 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 45 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 46 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 47 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 48 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 49 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 50 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 51 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 52 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 53 * SUCH DAMAGE. 54 * 55 * $FreeBSD: src/sys/dev/amr/amr_pci.c,v 1.1.2.9 2002/12/20 15:12:04 emoore Exp $ 56 * $DragonFly: src/sys/dev/raid/amr/amr_pci.c,v 1.3 2003/08/07 21:17:08 dillon Exp $ 57 */ 58 59 #include <sys/param.h> 60 #include <sys/systm.h> 61 #include <sys/kernel.h> 62 63 #include "amr_compat.h" 64 #include <sys/bus.h> 65 #include <sys/conf.h> 66 #include <sys/devicestat.h> 67 #include <sys/disk.h> 68 69 #include <machine/bus_memio.h> 70 #include <machine/bus_pio.h> 71 #include <machine/bus.h> 72 #include <machine/resource.h> 73 #include <sys/rman.h> 74 75 #include <bus/pci/pcireg.h> 76 #include <bus/pci/pcivar.h> 77 78 #include "amrio.h" 79 #include "amrreg.h" 80 #include "amrvar.h" 81 82 static int amr_pci_probe(device_t dev); 83 static int amr_pci_attach(device_t dev); 84 static int amr_pci_detach(device_t dev); 85 static int amr_pci_shutdown(device_t dev); 86 static int amr_pci_suspend(device_t dev); 87 static int amr_pci_resume(device_t dev); 88 static void amr_pci_intr(void *arg); 89 static void amr_pci_free(struct amr_softc *sc); 90 static void amr_sglist_map_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error); 91 static int amr_sglist_map(struct amr_softc *sc); 92 static void amr_setup_mbox_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error); 93 static int amr_setup_mbox(struct amr_softc *sc); 94 95 static device_method_t amr_methods[] = { 96 /* Device interface */ 97 DEVMETHOD(device_probe, amr_pci_probe), 98 DEVMETHOD(device_attach, amr_pci_attach), 99 DEVMETHOD(device_detach, amr_pci_detach), 100 DEVMETHOD(device_shutdown, amr_pci_shutdown), 101 DEVMETHOD(device_suspend, amr_pci_suspend), 102 DEVMETHOD(device_resume, amr_pci_resume), 103 104 DEVMETHOD(bus_print_child, bus_generic_print_child), 105 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 106 { 0, 0 } 107 }; 108 109 static driver_t amr_pci_driver = { 110 "amr", 111 amr_methods, 112 sizeof(struct amr_softc) 113 }; 114 115 static devclass_t amr_devclass; 116 DRIVER_MODULE(amr, pci, amr_pci_driver, amr_devclass, 0, 0); 117 118 static struct 119 { 120 int vendor; 121 int device; 122 int flag; 123 #define PROBE_SIGNATURE (1<<0) 124 } amr_device_ids[] = { 125 {0x101e, 0x9010, 0}, 126 {0x101e, 0x9060, 0}, 127 {0x8086, 0x1960, PROBE_SIGNATURE},/* generic i960RD, check for signature */ 128 {0x101e, 0x1960, 0}, 129 {0x1000, 0x1960, PROBE_SIGNATURE}, 130 {0x1000, 0x0407, 0}, 131 {0x1028, 0x000e, PROBE_SIGNATURE}, /* perc4/di i960 */ 132 {0x1028, 0x000f, 0}, /* perc4/di Verde*/ 133 {0, 0, 0} 134 }; 135 136 static int 137 amr_pci_probe(device_t dev) 138 { 139 int i, sig; 140 141 debug_called(1); 142 143 for (i = 0; amr_device_ids[i].vendor != 0; i++) { 144 if ((pci_get_vendor(dev) == amr_device_ids[i].vendor) && 145 (pci_get_device(dev) == amr_device_ids[i].device)) { 146 147 /* do we need to test for a signature? */ 148 if (amr_device_ids[i].flag & PROBE_SIGNATURE) { 149 sig = pci_read_config(dev, AMR_CFG_SIG, 2); 150 if ((sig != AMR_SIGNATURE_1) && (sig != AMR_SIGNATURE_2)) 151 continue; 152 } 153 device_set_desc(dev, "LSILogic MegaRAID"); 154 return(-10); /* allow room to be overridden */ 155 } 156 } 157 return(ENXIO); 158 } 159 160 static int 161 amr_pci_attach(device_t dev) 162 { 163 struct amr_softc *sc; 164 int rid, rtype, error; 165 u_int32_t command; 166 167 debug_called(1); 168 169 /* 170 * Initialise softc. 171 */ 172 sc = device_get_softc(dev); 173 bzero(sc, sizeof(*sc)); 174 sc->amr_dev = dev; 175 176 /* assume failure is 'not configured' */ 177 error = ENXIO; 178 179 /* 180 * Determine board type. 181 */ 182 command = pci_read_config(dev, PCIR_COMMAND, 1); 183 if ((pci_get_device(dev) == 0x1960) || (pci_get_device(dev) == 0x0407) || 184 (pci_get_device(dev) == 0x000e) || (pci_get_device(dev) == 0x000f)) { 185 /* 186 * Make sure we are going to be able to talk to this board. 187 */ 188 if ((command & PCIM_CMD_MEMEN) == 0) { 189 device_printf(dev, "memory window not available\n"); 190 goto out; 191 } 192 sc->amr_type |= AMR_TYPE_QUARTZ; 193 194 } else { 195 /* 196 * Make sure we are going to be able to talk to this board. 197 */ 198 if ((command & PCIM_CMD_PORTEN) == 0) { 199 device_printf(dev, "I/O window not available\n"); 200 goto out; 201 } 202 } 203 204 /* force the busmaster enable bit on */ 205 if (!(command & PCIM_CMD_BUSMASTEREN)) { 206 device_printf(dev, "busmaster bit not set, enabling\n"); 207 command |= PCIM_CMD_BUSMASTEREN; 208 pci_write_config(dev, PCIR_COMMAND, command, 2); 209 } 210 211 /* 212 * Allocate the PCI register window. 213 */ 214 rid = PCIR_MAPS; 215 rtype = AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT; 216 sc->amr_reg = bus_alloc_resource(dev, rtype, &rid, 0, ~0, 1, RF_ACTIVE); 217 if (sc->amr_reg == NULL) { 218 device_printf(sc->amr_dev, "can't allocate register window\n"); 219 goto out; 220 } 221 sc->amr_btag = rman_get_bustag(sc->amr_reg); 222 sc->amr_bhandle = rman_get_bushandle(sc->amr_reg); 223 224 /* 225 * Allocate and connect our interrupt. 226 */ 227 rid = 0; 228 sc->amr_irq = bus_alloc_resource(sc->amr_dev, SYS_RES_IRQ, &rid, 0, ~0, 1, RF_SHAREABLE | RF_ACTIVE); 229 if (sc->amr_irq == NULL) { 230 device_printf(sc->amr_dev, "can't allocate interrupt\n"); 231 goto out; 232 } 233 if (bus_setup_intr(sc->amr_dev, sc->amr_irq, INTR_TYPE_BIO | INTR_ENTROPY, amr_pci_intr, sc, &sc->amr_intr)) { 234 device_printf(sc->amr_dev, "can't set up interrupt\n"); 235 goto out; 236 } 237 238 debug(2, "interrupt attached"); 239 240 /* assume failure is 'out of memory' */ 241 error = ENOMEM; 242 243 /* 244 * Allocate the parent bus DMA tag appropriate for PCI. 245 */ 246 if (bus_dma_tag_create(NULL, /* parent */ 247 1, 0, /* alignment, boundary */ 248 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 249 BUS_SPACE_MAXADDR, /* highaddr */ 250 NULL, NULL, /* filter, filterarg */ 251 MAXBSIZE, AMR_NSEG, /* maxsize, nsegments */ 252 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 253 BUS_DMA_ALLOCNOW, /* flags */ 254 &sc->amr_parent_dmat)) { 255 device_printf(dev, "can't allocate parent DMA tag\n"); 256 goto out; 257 } 258 259 /* 260 * Create DMA tag for mapping buffers into controller-addressable space. 261 */ 262 if (bus_dma_tag_create(sc->amr_parent_dmat, /* parent */ 263 1, 0, /* alignment, boundary */ 264 BUS_SPACE_MAXADDR, /* lowaddr */ 265 BUS_SPACE_MAXADDR, /* highaddr */ 266 NULL, NULL, /* filter, filterarg */ 267 MAXBSIZE, AMR_NSEG, /* maxsize, nsegments */ 268 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 269 0, /* flags */ 270 &sc->amr_buffer_dmat)) { 271 device_printf(sc->amr_dev, "can't allocate buffer DMA tag\n"); 272 goto out; 273 } 274 275 debug(2, "dma tag done"); 276 277 /* 278 * Allocate and set up mailbox in a bus-visible fashion. 279 */ 280 if ((error = amr_setup_mbox(sc)) != 0) 281 goto out; 282 283 debug(2, "mailbox setup"); 284 285 /* 286 * Build the scatter/gather buffers. 287 */ 288 if (amr_sglist_map(sc)) 289 goto out; 290 291 debug(2, "s/g list mapped"); 292 293 /* 294 * Do bus-independant initialisation, bring controller online. 295 */ 296 error = amr_attach(sc); 297 298 out: 299 if (error) 300 amr_pci_free(sc); 301 return(error); 302 } 303 304 /******************************************************************************** 305 * Disconnect from the controller completely, in preparation for unload. 306 */ 307 static int 308 amr_pci_detach(device_t dev) 309 { 310 struct amr_softc *sc = device_get_softc(dev); 311 int error; 312 313 debug_called(1); 314 315 if (sc->amr_state & AMR_STATE_OPEN) 316 return(EBUSY); 317 318 if ((error = amr_pci_shutdown(dev))) 319 return(error); 320 321 amr_pci_free(sc); 322 323 return(0); 324 } 325 326 /******************************************************************************** 327 * Bring the controller down to a dormant state and detach all child devices. 328 * 329 * This function is called before detach, system shutdown, or before performing 330 * an operation which may add or delete system disks. (Call amr_startup to 331 * resume normal operation.) 332 * 333 * Note that we can assume that the bioq on the controller is empty, as we won't 334 * allow shutdown if any device is open. 335 */ 336 static int 337 amr_pci_shutdown(device_t dev) 338 { 339 struct amr_softc *sc = device_get_softc(dev); 340 int i,error,s; 341 342 debug_called(1); 343 344 /* mark ourselves as in-shutdown */ 345 sc->amr_state |= AMR_STATE_SHUTDOWN; 346 347 348 /* flush controller */ 349 device_printf(sc->amr_dev, "flushing cache..."); 350 printf("%s\n", amr_flush(sc) ? "failed" : "done"); 351 352 s = splbio(); 353 error = 0; 354 355 /* delete all our child devices */ 356 for(i = 0 ; i < AMR_MAXLD; i++) { 357 if( sc->amr_drive[i].al_disk != 0) { 358 if((error = device_delete_child(sc->amr_dev,sc->amr_drive[i].al_disk)) != 0) 359 goto shutdown_out; 360 sc->amr_drive[i].al_disk = 0; 361 } 362 } 363 364 /* XXX disable interrupts? */ 365 366 shutdown_out: 367 splx(s); 368 return(error); 369 } 370 371 /******************************************************************************** 372 * Bring the controller to a quiescent state, ready for system suspend. 373 */ 374 static int 375 amr_pci_suspend(device_t dev) 376 { 377 struct amr_softc *sc = device_get_softc(dev); 378 379 debug_called(1); 380 381 sc->amr_state |= AMR_STATE_SUSPEND; 382 383 /* flush controller */ 384 device_printf(sc->amr_dev, "flushing cache..."); 385 printf("%s\n", amr_flush(sc) ? "failed" : "done"); 386 387 /* XXX disable interrupts? */ 388 389 return(0); 390 } 391 392 /******************************************************************************** 393 * Bring the controller back to a state ready for operation. 394 */ 395 static int 396 amr_pci_resume(device_t dev) 397 { 398 struct amr_softc *sc = device_get_softc(dev); 399 400 debug_called(1); 401 402 sc->amr_state &= ~AMR_STATE_SUSPEND; 403 404 /* XXX enable interrupts? */ 405 406 return(0); 407 } 408 409 /******************************************************************************* 410 * Take an interrupt, or be poked by other code to look for interrupt-worthy 411 * status. 412 */ 413 static void 414 amr_pci_intr(void *arg) 415 { 416 struct amr_softc *sc = (struct amr_softc *)arg; 417 418 debug_called(2); 419 420 /* collect finished commands, queue anything waiting */ 421 amr_done(sc); 422 } 423 424 /******************************************************************************** 425 * Free all of the resources associated with (sc) 426 * 427 * Should not be called if the controller is active. 428 */ 429 static void 430 amr_pci_free(struct amr_softc *sc) 431 { 432 u_int8_t *p; 433 434 debug_called(1); 435 436 amr_free(sc); 437 438 /* destroy data-transfer DMA tag */ 439 if (sc->amr_buffer_dmat) 440 bus_dma_tag_destroy(sc->amr_buffer_dmat); 441 442 /* free and destroy DMA memory and tag for s/g lists */ 443 if (sc->amr_sgtable) 444 bus_dmamem_free(sc->amr_sg_dmat, sc->amr_sgtable, sc->amr_sg_dmamap); 445 if (sc->amr_sg_dmat) 446 bus_dma_tag_destroy(sc->amr_sg_dmat); 447 448 /* free and destroy DMA memory and tag for mailbox */ 449 if (sc->amr_mailbox) { 450 p = (u_int8_t *)(uintptr_t)(volatile void *)sc->amr_mailbox; 451 bus_dmamem_free(sc->amr_mailbox_dmat, p - 16, sc->amr_mailbox_dmamap); 452 } 453 if (sc->amr_mailbox_dmat) 454 bus_dma_tag_destroy(sc->amr_mailbox_dmat); 455 456 /* disconnect the interrupt handler */ 457 if (sc->amr_intr) 458 bus_teardown_intr(sc->amr_dev, sc->amr_irq, sc->amr_intr); 459 if (sc->amr_irq != NULL) 460 bus_release_resource(sc->amr_dev, SYS_RES_IRQ, 0, sc->amr_irq); 461 462 /* destroy the parent DMA tag */ 463 if (sc->amr_parent_dmat) 464 bus_dma_tag_destroy(sc->amr_parent_dmat); 465 466 /* release the register window mapping */ 467 if (sc->amr_reg != NULL) 468 bus_release_resource(sc->amr_dev, 469 AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT, 470 PCIR_MAPS, sc->amr_reg); 471 } 472 473 /******************************************************************************** 474 * Allocate and map the scatter/gather table in bus space. 475 */ 476 static void 477 amr_sglist_map_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error) 478 { 479 struct amr_softc *sc = (struct amr_softc *)arg; 480 481 debug_called(1); 482 483 /* save base of s/g table's address in bus space */ 484 sc->amr_sgbusaddr = segs->ds_addr; 485 } 486 487 static int 488 amr_sglist_map(struct amr_softc *sc) 489 { 490 size_t segsize; 491 int error; 492 493 debug_called(1); 494 495 /* 496 * Create a single tag describing a region large enough to hold all of 497 * the s/g lists we will need. 498 * 499 * Note that we could probably use AMR_LIMITCMD here, but that may become tunable. 500 */ 501 segsize = sizeof(struct amr_sgentry) * AMR_NSEG * AMR_MAXCMD; 502 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */ 503 1, 0, /* alignment, boundary */ 504 BUS_SPACE_MAXADDR, /* lowaddr */ 505 BUS_SPACE_MAXADDR, /* highaddr */ 506 NULL, NULL, /* filter, filterarg */ 507 segsize, 1, /* maxsize, nsegments */ 508 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 509 0, /* flags */ 510 &sc->amr_sg_dmat); 511 if (error != 0) { 512 device_printf(sc->amr_dev, "can't allocate scatter/gather DMA tag\n"); 513 return(ENOMEM); 514 } 515 516 /* 517 * Allocate enough s/g maps for all commands and permanently map them into 518 * controller-visible space. 519 * 520 * XXX this assumes we can get enough space for all the s/g maps in one 521 * contiguous slab. We may need to switch to a more complex arrangement where 522 * we allocate in smaller chunks and keep a lookup table from slot to bus address. 523 * 524 * XXX HACK ALERT: at least some controllers don't like the s/g memory being 525 * allocated below 0x2000. We leak some memory if we get some 526 * below this mark and allocate again. We should be able to 527 * avoid this with the tag setup, but that does't seem to work. 528 */ 529 retry: 530 error = bus_dmamem_alloc(sc->amr_sg_dmat, (void **)&sc->amr_sgtable, BUS_DMA_NOWAIT, &sc->amr_sg_dmamap); 531 if (error) { 532 device_printf(sc->amr_dev, "can't allocate s/g table\n"); 533 return(ENOMEM); 534 } 535 bus_dmamap_load(sc->amr_sg_dmat, sc->amr_sg_dmamap, sc->amr_sgtable, segsize, amr_sglist_map_helper, sc, 0); 536 if (sc->amr_sgbusaddr < 0x2000) { 537 debug(1, "s/g table too low (0x%x), reallocating\n", sc->amr_sgbusaddr); 538 goto retry; 539 } 540 return(0); 541 } 542 543 /******************************************************************************** 544 * Allocate and set up mailbox areas for the controller (sc) 545 * 546 * The basic mailbox structure should be 16-byte aligned. This means that the 547 * mailbox64 structure has 4 bytes hanging off the bottom. 548 */ 549 static void 550 amr_setup_mbox_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error) 551 { 552 struct amr_softc *sc = (struct amr_softc *)arg; 553 554 debug_called(1); 555 556 /* save phsyical base of the basic mailbox structure */ 557 sc->amr_mailboxphys = segs->ds_addr + 16; 558 } 559 560 static int 561 amr_setup_mbox(struct amr_softc *sc) 562 { 563 int error; 564 u_int8_t *p; 565 566 debug_called(1); 567 568 /* 569 * Create a single tag describing a region large enough to hold the entire 570 * mailbox. 571 */ 572 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */ 573 16, 0, /* alignment, boundary */ 574 BUS_SPACE_MAXADDR, /* lowaddr */ 575 BUS_SPACE_MAXADDR, /* highaddr */ 576 NULL, NULL, /* filter, filterarg */ 577 sizeof(struct amr_mailbox) + 16, 1, /* maxsize, nsegments */ 578 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 579 0, /* flags */ 580 &sc->amr_mailbox_dmat); 581 if (error != 0) { 582 device_printf(sc->amr_dev, "can't allocate mailbox tag\n"); 583 return(ENOMEM); 584 } 585 586 /* 587 * Allocate the mailbox structure and permanently map it into 588 * controller-visible space. 589 */ 590 error = bus_dmamem_alloc(sc->amr_mailbox_dmat, (void **)&p, BUS_DMA_NOWAIT, 591 &sc->amr_mailbox_dmamap); 592 if (error) { 593 device_printf(sc->amr_dev, "can't allocate mailbox memory\n"); 594 return(ENOMEM); 595 } 596 bus_dmamap_load(sc->amr_mailbox_dmat, sc->amr_mailbox_dmamap, p, 597 sizeof(struct amr_mailbox64), amr_setup_mbox_helper, sc, 0); 598 /* 599 * Conventional mailbox is inside the mailbox64 region. 600 */ 601 bzero(p, sizeof(struct amr_mailbox64)); 602 sc->amr_mailbox64 = (struct amr_mailbox64 *)(p + 12); 603 sc->amr_mailbox = (struct amr_mailbox *)(p + 16); 604 605 return(0); 606 } 607