1 /* 2 * Copyright (c) 1997 by Simon Shapiro 3 * All Rights Reserved 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions, and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/dev/dpt/dpt.h,v 1.8.2.1 2000/08/07 18:48:14 peter Exp $ 30 */ 31 32 /* 33 * 34 * dpt.h: Definitions and constants used by the SCSI side of the DPT 35 * 36 * credits: Mike Neuffer; DPT low level code and in other areas as well. 37 * Mark Salyzyn; Many vital bits of info and diagnostics. 38 * Justin Gibbs; FreeBSD API, debugging and style 39 * Ron McDaniels; SCSI Software Interrupts 40 * FreeBSD.ORG; Great O/S to work on and for. 41 */ 42 43 44 #ifndef _DPT_H 45 #define _DPT_H 46 47 #include <sys/ioccom.h> 48 49 #undef DPT_USE_DLM_SWI 50 51 extern u_long dpt_unit; 52 53 #define DPT_RELEASE 1 54 #define DPT_VERSION 4 55 #define DPT_PATCH 5 56 #define DPT_MONTH 8 57 #define DPT_DAY 3 58 #define DPT_YEAR 18 /* 1998 - 1980 */ 59 60 #define DPT_CTL_RELEASE 1 61 #define DPT_CTL_VERSION 0 62 #define DPT_CTL_PATCH 6 63 64 #ifndef PAGESIZ 65 #define PAGESIZ 4096 66 #endif 67 68 #ifndef physaddr 69 typedef void *physaddr; 70 #endif 71 72 #undef DPT_INQUIRE_DEVICES /* We have no buyers for this function */ 73 #define DPT_SUPPORT_POLLING /* Use polled mode at boot (must be ON!) */ 74 #define DPT_OPENNINGS 8 /* Commands-in-progress per device */ 75 76 #define DPT_RETRIES 5 /* Times to retry failed commands */ 77 #undef DPT_DISABLE_SG 78 #define DPT_HAS_OPEN 79 80 /* Arguments to dpt_run_queue() can be: */ 81 82 #define DPT_MAX_TARGET_MODE_BUFFER_SIZE 8192 83 #define DPT_FREE_LIST_INCREMENT 64 84 #define DPT_CMD_LEN 12 85 86 /* 87 * How many segments do we want in a Scatter/Gather list? 88 * Some HBA's can do 16, Some 8192. Since we pre-allocate 89 * them in fixed increments, we need to put a practical limit on 90 * these. A passed parameter (from kernel boot or lkm) would help 91 */ 92 #define DPT_MAX_SEGS 32 93 94 /* Debug levels */ 95 96 #undef DPT_DEBUG_PCI 97 #undef DPT_DEBUG_INIT 98 #undef DPT_DEBUG_SETUP 99 #undef DPT_DEBUG_STATES 100 #undef DPT_DEBUG_CONFIG 101 #undef DPT_DEBUG_QUEUES 102 #undef DPT_DEBUG_SCSI_CMD 103 #undef DPT_DEBUG_SOFTINTR 104 #undef DPT_DEBUG_HARDINTR 105 #undef DPT_DEBUG_HEX_DUMPS 106 #undef DPT_DEBUG_POLLING 107 #undef DPT_DEBUG_INQUIRE 108 #undef DPT_DEBUG_COMPLETION 109 #undef DPT_DEBUG_COMPLETION_ERRORS 110 #define DPT_DEBUG_MINPHYS 111 #undef DPT_DEBUG_SG 112 #undef DPT_DEBUG_SG_SHOW_DATA 113 #undef DPT_DEBUG_SCSI_CMD_NAME 114 #undef DPT_DEBUG_CONTROL 115 #undef DPT_DEBUG_TIMEOUTS 116 #undef DPT_DEBUG_SHUTDOWN 117 #define DPT_DEBUG_USER_CMD 118 119 /* 120 * Misc. definitions 121 */ 122 #undef TRUE 123 #undef FALSE 124 #define TRUE 1 125 #define FALSE 0 126 127 #define MAX_CHANNELS 3 128 #define MAX_TARGETS 16 129 #define MAX_LUNS 8 130 131 /* Map minor numbers to device identity */ 132 #define TARGET_MASK 0x000f 133 #define BUS_MASK 0x0030 134 #define HBA_MASK 0x01c0 135 #define LUN_MASK 0x0e00 136 137 #define minor2target(minor) ( minor & TARGET_MASK ) 138 #define minor2bus(minor) ( (minor & BUS_MASK) >> 4 ) 139 #define minor2hba(minor) ( (minor & HBA_MASK) >> 6 ) 140 #define minor2lun(minor) ( (minor & LUN_MASK) >> 9 ) 141 142 /* 143 * Valid values for cache_type 144 */ 145 #define DPT_NO_CACHE 0 146 #define DPT_CACHE_WRITETHROUGH 1 147 #define DPT_CACHE_WRITEBACK -2 148 149 #define min(a,b) ((a<b)?(a):(b)) 150 151 #define MAXISA 4 152 #define MAXEISA 16 153 #define MAXPCI 16 154 #define MAXIRQ 16 155 #define MAXTARGET 16 156 157 #define IS_ISA 'I' 158 #define IS_EISA 'E' 159 #define IS_PCI 'P' 160 161 #define BROKEN_INQUIRY 1 162 163 #define BUSMASTER 0xff 164 #define PIO 0xfe 165 166 #define EATA_SIGNATURE 0x41544145 /* little ENDIAN "EATA" */ 167 #define DPT_BLINK_INDICATOR 0x42445054 168 169 #define DPT_ID1 0x12 170 #define DPT_ID2 0x1 171 #define ATT_ID1 0x06 172 #define ATT_ID2 0x94 173 #define ATT_ID3 0x0 174 175 #define NEC_ID1 0x38 176 #define NEC_ID2 0xa3 177 #define NEC_ID3 0x82 178 179 #define MAX_PCI_DEVICES 32 /* Maximum # Of Devices Per Bus */ 180 #define MAX_METHOD_2 16 /* Max Devices For Method 2 */ 181 #define MAX_PCI_BUS 16 /* Maximum # Of Busses Allowed */ 182 183 #define DPT_MAX_RETRIES 2 184 185 #define READ 0 186 #define WRITE 1 187 #define OTHER 2 188 189 #define HD(cmd) ((hostdata *)&(cmd->host->hostdata)) 190 #define CD(cmd) ((struct eata_ccb *)(cmd->host_scribble)) 191 #define SD(host) ((hostdata *)&(host->hostdata)) 192 193 /* 194 * EATA Command & Register definitions 195 */ 196 197 #define PCI_REG_DPTconfig 0x40 198 #define PCI_REG_PumpModeAddress 0x44 199 #define PCI_REG_PumpModeData 0x48 200 #define PCI_REG_ConfigParam1 0x50 201 #define PCI_REG_ConfigParam2 0x54 202 203 #define EATA_CMD_PIO_SETUPTEST 0xc6 204 #define EATA_CMD_PIO_READ_CONFIG 0xf0 205 #define EATA_CMD_PIO_SET_CONFIG 0xf1 206 #define EATA_CMD_PIO_SEND_CP 0xf2 207 #define EATA_CMD_PIO_RECEIVE_SP 0xf3 208 #define EATA_CMD_PIO_TRUNC 0xf4 209 210 #define EATA_CMD_RESET 0xf9 211 #define EATA_COLD_BOOT 0x06 /* Last resort only! */ 212 213 #define EATA_CMD_IMMEDIATE 0xfa 214 215 #define EATA_CMD_DMA_READ_CONFIG 0xfd 216 #define EATA_CMD_DMA_SET_CONFIG 0xfe 217 #define EATA_CMD_DMA_SEND_CP 0xff 218 219 #define ECS_EMULATE_SENSE 0xd4 220 221 /* 222 * Immediate Commands 223 * Beware of this enumeration. Not all commands are in sequence! 224 */ 225 226 enum dpt_immediate_cmd { 227 EATA_GENERIC_ABORT, 228 EATA_SPECIFIC_RESET, 229 EATA_BUS_RESET, 230 EATA_SPECIFIC_ABORT, 231 EATA_QUIET_INTR, 232 EATA_SMART_ROM_DL_EN, 233 EATA_COLD_BOOT_HBA, /* Only as a last resort */ 234 EATA_FORCE_IO, 235 EATA_SCSI_BUS_OFFLINE, 236 EATA_RESET_MASKED_BUS, 237 EATA_POWER_OFF_WARN 238 }; 239 240 extern enum dpt_immediate_cmd dpt_immediate_cmd; 241 242 #define HA_CTRLREG 0x206 /* control register for HBA */ 243 #define HA_CTRL_DISINT 0x02 /* CTRLREG: disable interrupts */ 244 #define HA_CTRL_RESCPU 0x04 /* CTRLREG: reset processo */ 245 #define HA_CTRL_8HEADS 0x08 /* 246 * CTRLREG: set for drives with 247 * >=8 heads 248 * (WD1003 rudimentary :-) 249 */ 250 251 #define HA_WCOMMAND 0x07 /* command register offset */ 252 #define HA_WIFC 0x06 /* immediate command offset */ 253 #define HA_WCODE 0x05 254 #define HA_WCODE2 0x04 255 #define HA_WDMAADDR 0x02 /* DMA address LSB offset */ 256 #define HA_RERROR 0x01 /* Error Register, offset 1 from base */ 257 #define HA_RAUXSTAT 0x08 /* aux status register offset */ 258 #define HA_RSTATUS 0x07 /* status register offset */ 259 #define HA_RDATA 0x00 /* data register (16bit) */ 260 #define HA_WDATA 0x00 /* data register (16bit) */ 261 262 #define HA_ABUSY 0x01 /* aux busy bit */ 263 #define HA_AIRQ 0x02 /* aux IRQ pending bit */ 264 #define HA_SERROR 0x01 /* pr. command ended in error */ 265 #define HA_SMORE 0x02 /* more data soon to come */ 266 #define HA_SCORR 0x04 /* datio_addra corrected */ 267 #define HA_SDRQ 0x08 /* data request active */ 268 #define HA_SSC 0x10 /* seek complete */ 269 #define HA_SFAULT 0x20 /* write fault */ 270 #define HA_SREADY 0x40 /* drive ready */ 271 #define HA_SBUSY 0x80 /* drive busy */ 272 #define HA_SDRDY (HA_SSC|HA_SREADY|HA_SDRQ) 273 274 /* 275 * Message definitions 276 */ 277 278 enum dpt_message { 279 HA_NO_ERROR, /* No Error */ 280 HA_ERR_SEL_TO, /* Selection Timeout */ 281 HA_ERR_CMD_TO, /* Command Timeout */ 282 HA_SCSIBUS_RESET, 283 HA_HBA_POWER_UP, /* Initial Controller Power-up */ 284 HA_UNX_BUSPHASE, /* Unexpected Bus Phase */ 285 HA_UNX_BUS_FREE, /* Unexpected Bus Free */ 286 HA_BUS_PARITY, /* Bus Parity Error */ 287 HA_SCSI_HUNG, /* SCSI Hung */ 288 HA_UNX_MSGRJCT, /* Unexpected Message Rejected */ 289 HA_RESET_STUCK, /* SCSI Bus Reset Stuck */ 290 HA_RSENSE_FAIL, /* Auto Request-Sense Failed */ 291 HA_PARITY_ERR, /* Controller Ram Parity Error */ 292 HA_CP_ABORT_NA, /* Abort Message sent to non-active cmd */ 293 HA_CP_ABORTED, /* Abort Message sent to active cmd */ 294 HA_CP_RESET_NA, /* Reset Message sent to non-active cmd */ 295 HA_CP_RESET, /* Reset Message sent to active cmd */ 296 HA_ECC_ERR, /* Controller Ram ECC Error */ 297 HA_PCI_PARITY, /* PCI Parity Error */ 298 HA_PCI_MABORT, /* PCI Master Abort */ 299 HA_PCI_TABORT, /* PCI Target Abort */ 300 HA_PCI_STABORT /* PCI Signaled Target Abort */ 301 }; 302 303 extern enum dpt_message dpt_message; 304 305 #define HA_STATUS_MASK 0x7F 306 #define HA_IDENTIFY_MSG 0x80 307 #define HA_DISCO_RECO 0x40 /* Disconnect/Reconnect */ 308 309 #define DPT_RW_BUFF_HEART 0X00 310 #define DPT_RW_BUFF_DLM 0x02 311 #define DPT_RW_BUFF_ACCESS 0x03 312 313 #define HA_INTR_OFF 1 314 #define HA_INTR_ON 0 315 316 /* This is really a one-time shot through some black magic */ 317 #define DPT_EATA_REVA 0x1c 318 #define DPT_EATA_REVB 0x1e 319 #define DPT_EATA_REVC 0x22 320 #define DPT_EATA_REVZ 0x24 321 322 323 /* IOCTL List */ 324 325 #define DPT_RW_CMD_LEN 32 326 #define DPT_RW_CMD_DUMP_SOFTC "dump softc" 327 #define DPT_RW_CMD_DUMP_SYSINFO "dump sysinfo" 328 #define DPT_RW_CMD_DUMP_METRICS "dump metrics" 329 #define DPT_RW_CMD_CLEAR_METRICS "clear metrics" 330 #define DPT_RW_CMD_SHOW_LED "show LED" 331 332 #define DPT_IOCTL_INTERNAL_METRICS _IOR('D', 1, dpt_perf_t) 333 #define DPT_IOCTL_SOFTC _IOR('D', 2, dpt_user_softc_t) 334 #define DPT_IOCTL_SEND _IOWR('D', 3, eata_pt_t) 335 #define SDI_SEND 0x40044444 /* Observed from dptmgr */ 336 337 /* 338 * Other definitions 339 */ 340 341 #define DPT_HCP_LENGTH(page) (ntohs(*(int16_t *)(void *)(&page[2]))+4) 342 #define DPT_HCP_FIRST(page) (&page[4]) 343 #define DPT_HCP_NEXT(param) (¶m[3 + param[3] + 1]) 344 #define DPT_HCP_CODE(param) (ntohs(*(int16_t *)(void *)param)) 345 346 347 /* Possible return values from dpt_register_buffer() */ 348 349 #define SCSI_TM_READ_BUFFER 0x3c 350 #define SCSI_TM_WRITE_BUFFER 0x3b 351 352 #define SCSI_TM_MODE_MASK 0x07 /* Strip off reserved and LUN */ 353 #define SCSI_TM_LUN_MASK 0xe0 /* Strip off reserved and LUN */ 354 355 typedef enum { 356 SUCCESSFULLY_REGISTERED, 357 DRIVER_DOWN, 358 ALREADY_REGISTERED, 359 REGISTERED_TO_ANOTHER, 360 NOT_REGISTERED, 361 INVALID_UNIT, 362 INVALID_SENDER, 363 INVALID_CALLBACK, 364 NO_RESOURCES 365 } dpt_rb_t; 366 367 typedef enum { 368 REGISTER_BUFFER, 369 RELEASE_BUFFER 370 } dpt_rb_op_t; 371 372 /* 373 * New way for completion routines to reliably copmplete processing. 374 * Should take properly typed dpt_softc_t and dpt_ccb_t, 375 * but interdependencies preclude that. 376 */ 377 typedef void (*ccb_callback)(void *dpt, int bus, void *ccb); 378 379 typedef void (*buff_wr_done)(int unit, u_int8_t channel, u_int8_t target, 380 u_int8_t lun, u_int16_t offset, u_int16_t length, 381 int result); 382 383 typedef void (*dpt_rec_buff)(int unit, u_int8_t channel, u_int8_t target, 384 u_int8_t lun, void *buffer, u_int16_t offset, 385 u_int16_t length); 386 387 /* HBA's Status port (register) bitmap */ 388 typedef struct reg_bit { /* reading this one will clear the interrupt */ 389 u_int8_t error :1, /* previous command ended in an error */ 390 more :1, /* More DATA coming soon Poll BSY & DRQ (PIO) */ 391 corr :1, /* data read was successfully corrected with ECC */ 392 drq :1, /* data request active */ 393 sc :1, /* seek complete */ 394 fault :1, /* write fault */ 395 ready :1, /* drive ready */ 396 busy :1; /* controller busy */ 397 } dpt_status_reg_t; 398 399 /* HBA's Auxiliary status port (register) bitmap */ 400 typedef struct reg_abit { /* reading this won't clear the interrupt */ 401 u_int8_t abusy :1, /* auxiliary busy */ 402 irq :1, /* set when drive interrupt is asserted */ 403 :6; 404 } dpt_aux_status_t; 405 406 /* The EATA Register Set as a structure */ 407 typedef struct eata_register { 408 u_int8_t data_reg[2]; /* R, couldn't figure this one out */ 409 u_int8_t cp_addr[4]; /* W, CP address register */ 410 union { 411 u_int8_t command; /* 412 * W, command code: 413 * [read|set] conf, send CP 414 */ 415 struct reg_bit status; /* R, see register_bit1 */ 416 u_int8_t statusbyte; 417 } ovr; 418 struct reg_abit aux_stat; /* R, see register_bit2 */ 419 } eata_reg_t; 420 421 /* 422 * Holds the results of a READ_CONFIGURATION command 423 * Beware of data items which are larger than 1 byte. 424 * these come from the DPT in network order. 425 * On an Intel ``CPU'' they will be upside down and backwards! 426 * The dpt_get_conf function is normally responsible for flipping 427 * Everything back. 428 */ 429 typedef struct get_conf { /* Read Configuration Array */ 430 union { 431 struct { 432 u_int8_t foo_DevType; 433 u_int8_t foo_PageCode; 434 u_int8_t foo_Reserved0; 435 u_int8_t foo_len; 436 } foo; 437 u_int32_t foo_length; /* Should return 0x22, 0x24, etc */ 438 } bar; 439 #define gcs_length bar.foo_length 440 #define gcs_PageCode bar.foo.foo_DevType 441 #define gcs_reserved0 bar.foo.foo_Reserved0 442 #define gcs_len bar.foo.foo_len 443 444 u_int32_t signature; /* Signature MUST be "EATA". ntohl()`ed */ 445 446 u_int8_t version2 :4, 447 version :4; /* EATA Version level */ 448 449 u_int8_t OCS_enabled :1, /* Overlap Command Support enabled */ 450 TAR_support :1, /* SCSI Target Mode supported */ 451 TRNXFR :1, /* Truncate Transfer Cmd Used in PIO Mode */ 452 MORE_support:1, /* MORE supported (PIO Mode Only) */ 453 DMA_support :1, /* DMA supported */ 454 DMA_valid :1, /* DRQ value in Byte 30 is valid */ 455 ATA :1, /* ATA device connected (not supported) */ 456 HAA_valid :1; /* Hostadapter Address is valid */ 457 458 u_int16_t cppadlen; /* 459 * Number of pad bytes send after CD data set 460 * to zero for DMA commands. Ntohl()`ed 461 */ 462 u_int8_t scsi_idS; /* SCSI ID of controller 2-0 Byte 0 res. */ 463 u_int8_t scsi_id2; /* If not, zero is returned */ 464 u_int8_t scsi_id1; 465 u_int8_t scsi_id0; 466 u_int32_t cplen; /* CP length: number of valid cp bytes */ 467 468 u_int32_t splen; /* Returned bytes for a received SP command */ 469 u_int16_t queuesiz; /* max number of queueable CPs */ 470 471 u_int16_t dummy; 472 u_int16_t SGsiz; /* max number of SG table entrie */ 473 474 u_int8_t IRQ :4,/* IRQ used this HBA */ 475 IRQ_TR :1,/* IRQ Trigger: 0=edge, 1=level */ 476 SECOND :1,/* This is a secondary controller */ 477 DMA_channel:2;/* DRQ index, DRQ is 2comp of DRQX */ 478 479 u_int8_t sync; /* 0-7 sync active bitmask (deprecated) */ 480 u_int8_t DSBLE :1, /* ISA i/o addressing is disabled */ 481 FORCADR :1, /* i/o address has been forced */ 482 SG_64K :1, 483 SG_UAE :1, 484 :4; 485 486 u_int8_t MAX_ID :5, /* Max number of SCSI target IDs */ 487 MAX_CHAN :3; /* Number of SCSI busses on HBA */ 488 489 u_int8_t MAX_LUN; /* Max number of LUNs */ 490 u_int8_t :3, 491 AUTOTRM :1, 492 M1_inst :1, 493 ID_qest :1, /* Raidnum ID is questionable */ 494 is_PCI :1, /* HBA is PCI */ 495 is_EISA :1; /* HBA is EISA */ 496 497 u_int8_t RAIDNUM; /* unique HBA identifier */ 498 u_int8_t unused[4]; /* When doing PIO, you GET 512 bytes */ 499 500 /* >>------>> End of The DPT structure <<------<< */ 501 502 u_int32_t length; /* True length, after ntohl conversion */ 503 } dpt_conf_t; 504 505 /* Scatter-Gather list entry */ 506 typedef struct dpt_sg_segment { 507 u_int32_t seg_addr; /* All fields in network byte order */ 508 u_int32_t seg_len; 509 } dpt_sg_t; 510 511 512 /* Status Packet */ 513 typedef struct eata_sp { 514 u_int8_t hba_stat :7, /* HBA status */ 515 EOC :1; /* True if command finished */ 516 517 u_int8_t scsi_stat; /* Target SCSI status */ 518 519 u_int8_t reserved[2]; 520 521 u_int32_t residue_len; /* Number of bytes not transferred */ 522 523 u_int32_t ccb_busaddr; 524 525 u_int8_t sp_ID_Message; 526 u_int8_t sp_Que_Message; 527 u_int8_t sp_Tag_Message; 528 u_int8_t msg[9]; 529 } dpt_sp_t; 530 531 /* 532 * A strange collection of O/S-Hardware releated bits and pieces. 533 * Used by the dpt_ioctl() entry point to return DPT_SYSINFO command. 534 */ 535 typedef struct dpt_drive_parameters { 536 u_int16_t cylinders; /* Up to 1024 */ 537 u_int8_t heads; /* Up to 255 */ 538 u_int8_t sectors; /* Up to 63 */ 539 } dpt_drive_t; 540 541 typedef struct driveParam_S driveParam_T; 542 543 #define SI_CMOS_Valid 0x0001 544 #define SI_NumDrivesValid 0x0002 545 #define SI_ProcessorValid 0x0004 546 #define SI_MemorySizeValid 0x0008 547 #define SI_DriveParamsValid 0x0010 548 #define SI_SmartROMverValid 0x0020 549 #define SI_OSversionValid 0x0040 550 #define SI_OSspecificValid 0x0080 551 #define SI_BusTypeValid 0x0100 552 553 #define SI_ALL_VALID 0x0FFF 554 #define SI_NO_SmartROM 0x8000 555 556 #define SI_ISA_BUS 0x00 557 #define SI_MCA_BUS 0x01 558 #define SI_EISA_BUS 0x02 559 #define SI_PCI_BUS 0x04 560 561 #define HBA_BUS_ISA 0x00 562 #define HBA_BUS_EISA 0x01 563 #define HBA_BUS_PCI 0x02 564 565 typedef struct dpt_sysinfo { 566 u_int8_t drive0CMOS; /* CMOS Drive 0 Type */ 567 u_int8_t drive1CMOS; /* CMOS Drive 1 Type */ 568 u_int8_t numDrives; /* 0040:0075 contents */ 569 u_int8_t processorFamily; /* Same as DPTSIG definition */ 570 u_int8_t processorType; /* Same as DPTSIG definition */ 571 u_int8_t smartROMMajorVersion; 572 u_int8_t smartROMMinorVersion; /* SmartROM version */ 573 u_int8_t smartROMRevision; 574 u_int16_t flags; /* See bit definitions above */ 575 u_int16_t conventionalMemSize; /* in KB */ 576 u_int32_t extendedMemSize; /* in KB */ 577 u_int32_t osType; /* Same as DPTSIG definition */ 578 u_int8_t osMajorVersion; 579 u_int8_t osMinorVersion; /* The OS version */ 580 u_int8_t osRevision; 581 u_int8_t osSubRevision; 582 u_int8_t busType; /* See defininitions above */ 583 u_int8_t pad[3]; /* For alignment */ 584 dpt_drive_t drives[16]; /* SmartROM Logical Drives */ 585 } dpt_sysinfo_t; 586 587 /* SEND_COMMAND packet structure */ 588 typedef struct eata_ccb { 589 u_int8_t SCSI_Reset :1, /* Cause a SCSI Bus reset on the cmd */ 590 HBA_Init :1, /* Cause Controller to reinitialize */ 591 Auto_Req_Sen :1, /* Do Auto Request Sense on errors */ 592 scatter :1, /* Data Ptr points to a SG Packet */ 593 Quick :1, /* Set this one for NO Status PAcket */ 594 Interpret :1, /* Interpret the SCSI cdb for own use */ 595 DataOut :1, /* Data Out phase with command */ 596 DataIn :1; /* Data In phase with command */ 597 598 u_int8_t reqlen; /* Request Sense Length, if Auto_Req_Sen=1 */ 599 u_int8_t unused[3]; 600 u_int8_t FWNEST :1, /* send cmd to phys RAID component */ 601 unused2 :7; 602 603 u_int8_t Phsunit :1, /* physical unit on mirrored pair */ 604 I_AT :1, /* inhibit address translation */ 605 Disable_Cache :1, /* HBA inhibit caching */ 606 :5; 607 608 u_int8_t cp_id :5, /* SCSI Device ID of target */ 609 cp_channel :3; /* SCSI Channel # of HBA */ 610 611 u_int8_t cp_LUN :5, 612 cp_luntar :1, /* CP is for target ROUTINE */ 613 cp_dispri :1, /* Grant disconnect privilege */ 614 cp_identify :1; /* Always TRUE */ 615 616 u_int8_t cp_msg[3]; /* Message bytes 0-3 */ 617 618 union { 619 struct { 620 u_int8_t x_scsi_cmd; /* Partial SCSI CDB def */ 621 622 u_int8_t x_extent :1, 623 x_bytchk :1, 624 x_reladr :1, 625 x_cmplst :1, 626 x_fmtdata :1, 627 x_lun :3; 628 629 u_int8_t x_page; 630 u_int8_t reserved4; 631 u_int8_t x_len; 632 u_int8_t x_link :1; 633 u_int8_t x_flag :1; 634 u_int8_t reserved5 :4; 635 u_int8_t x_vendor :2; 636 } x; 637 u_int8_t z[12]; /* Command Descriptor Block (= 12) */ 638 } cp_w; 639 640 #define cp_cdb cp_w.z 641 #define cp_scsi_cmd cp_w.x.x_scsi_cmd 642 #define cp_extent cp_w.x.x_extent 643 #define cp_lun cp_w.x.x_lun 644 #define cp_page cp_w.x.x_page 645 #define cp_len cp_w.x.x_len 646 647 #define MULTIFUNCTION_CMD 0x0e /* SCSI Multi Function Cmd */ 648 #define BUS_QUIET 0x04 /* Quite Scsi Bus Code */ 649 #define BUS_UNQUIET 0x05 /* Un Quiet Scsi Bus Code */ 650 651 u_int32_t cp_datalen; /* 652 * Data Transfer Length. If scatter=1 len (IN 653 * BYTES!) of the S/G array 654 */ 655 656 u_int32_t cp_busaddr; /* Unique identifier. Busaddr works well */ 657 u_int32_t cp_dataDMA; /* 658 * Data Address, if scatter=1 then it is the 659 * address of scatter packet 660 */ 661 u_int32_t cp_statDMA; /* address for Status Packet */ 662 u_int32_t cp_reqDMA; /* 663 * Request Sense Address, used if CP command 664 * ends with error 665 */ 666 u_int8_t CP_OpCode; 667 668 } eata_ccb_t; 669 670 /* 671 * DPT Signature Structure. 672 * Used by /dev/dpt to directly pass commands to the HBA 673 * We have more information here than we care for... 674 */ 675 676 /* Current Signature Version - sigBYTE dsSigVersion; */ 677 #define SIG_VERSION 1 678 679 /* 680 * Processor Family - sigBYTE dsProcessorFamily; DISTINCT VALUE 681 * 682 * What type of processor the file is meant to run on. 683 * This will let us know whether to read sigWORDs as high/low or low/high. 684 */ 685 #define PROC_INTEL 0x00 /* Intel 80x86 */ 686 #define PROC_MOTOROLA 0x01 /* Motorola 68K */ 687 #define PROC_MIPS4000 0x02 /* MIPS RISC 4000 */ 688 #define PROC_ALPHA 0x03 /* DEC Alpha */ 689 690 /* 691 * Specific Minimim Processor - sigBYTE dsProcessor; FLAG BITS 692 * 693 * Different bit definitions dependent on processor_family 694 */ 695 696 /* PROC_INTEL: */ 697 #define PROC_8086 0x01 /* Intel 8086 */ 698 #define PROC_286 0x02 /* Intel 80286 */ 699 #define PROC_386 0x04 /* Intel 80386 */ 700 #define PROC_486 0x08 /* Intel 80486 */ 701 #define PROC_PENTIUM 0x10 /* Intel 586 aka P5 aka Pentium */ 702 #define PROC_P6 0x20 /* Intel 686 aka P6 */ 703 704 /* PROC_MOTOROLA: */ 705 #define PROC_68000 0x01 /* Motorola 68000 */ 706 #define PROC_68020 0x02 /* Motorola 68020 */ 707 #define PROC_68030 0x04 /* Motorola 68030 */ 708 #define PROC_68040 0x08 /* Motorola 68040 */ 709 710 /* Filetype - sigBYTE dsFiletype; DISTINCT VALUES */ 711 #define FT_EXECUTABLE 0 /* Executable Program */ 712 #define FT_SCRIPT 1 /* Script/Batch File??? */ 713 #define FT_HBADRVR 2 /* HBA Driver */ 714 #define FT_OTHERDRVR 3 /* Other Driver */ 715 #define FT_IFS 4 /* Installable Filesystem Driver */ 716 #define FT_ENGINE 5 /* DPT Engine */ 717 #define FT_COMPDRVR 6 /* Compressed Driver Disk */ 718 #define FT_LANGUAGE 7 /* Foreign Language file */ 719 #define FT_FIRMWARE 8 /* Downloadable or actual Firmware */ 720 #define FT_COMMMODL 9 /* Communications Module */ 721 #define FT_INT13 10 /* INT 13 style HBA Driver */ 722 #define FT_HELPFILE 11 /* Help file */ 723 #define FT_LOGGER 12 /* Event Logger */ 724 #define FT_INSTALL 13 /* An Install Program */ 725 #define FT_LIBRARY 14 /* Storage Manager Real-Mode Calls */ 726 #define FT_RESOURCE 15 /* Storage Manager Resource File */ 727 #define FT_MODEM_DB 16 /* Storage Manager Modem Database */ 728 729 /* Filetype flags - sigBYTE dsFiletypeFlags; FLAG BITS */ 730 #define FTF_DLL 0x01 /* Dynamic Link Library */ 731 #define FTF_NLM 0x02 /* Netware Loadable Module */ 732 #define FTF_OVERLAYS 0x04 /* Uses overlays */ 733 #define FTF_DEBUG 0x08 /* Debug version */ 734 #define FTF_TSR 0x10 /* TSR */ 735 #define FTF_SYS 0x20 /* DOS Lodable driver */ 736 #define FTF_PROTECTED 0x40 /* Runs in protected mode */ 737 #define FTF_APP_SPEC 0x80 /* Application Specific */ 738 739 /* OEM - sigBYTE dsOEM; DISTINCT VALUES */ 740 #define OEM_DPT 0 /* DPT */ 741 #define OEM_ATT 1 /* ATT */ 742 #define OEM_NEC 2 /* NEC */ 743 #define OEM_ALPHA 3 /* Alphatronix */ 744 #define OEM_AST 4 /* AST */ 745 #define OEM_OLIVETTI 5 /* Olivetti */ 746 #define OEM_SNI 6 /* Siemens/Nixdorf */ 747 748 /* Operating System - sigLONG dsOS; FLAG BITS */ 749 #define OS_DOS 0x00000001 /* PC/MS-DOS */ 750 #define OS_WINDOWS 0x00000002 /* Microsoft Windows 3.x */ 751 #define OS_WINDOWS_NT 0x00000004 /* Microsoft Windows NT */ 752 #define OS_OS2M 0x00000008 /* OS/2 1.2.x,MS 1.3.0,IBM 1.3.x */ 753 #define OS_OS2L 0x00000010 /* Microsoft OS/2 1.301 - LADDR */ 754 #define OS_OS22x 0x00000020 /* IBM OS/2 2.x */ 755 #define OS_NW286 0x00000040 /* Novell NetWare 286 */ 756 #define OS_NW386 0x00000080 /* Novell NetWare 386 */ 757 #define OS_GEN_UNIX 0x00000100 /* Generic Unix */ 758 #define OS_SCO_UNIX 0x00000200 /* SCO Unix */ 759 #define OS_ATT_UNIX 0x00000400 /* ATT Unix */ 760 #define OS_UNIXWARE 0x00000800 /* UnixWare Unix */ 761 #define OS_INT_UNIX 0x00001000 /* Interactive Unix */ 762 #define OS_SOLARIS 0x00002000 /* SunSoft Solaris */ 763 #define OS_QN 0x00004000 /* QNX for Tom Moch */ 764 #define OS_NEXTSTEP 0x00008000 /* NeXTSTEP */ 765 #define OS_BANYAN 0x00010000 /* Banyan Vines */ 766 #define OS_OLIVETTI_UNIX 0x00020000 /* Olivetti Unix */ 767 #define OS_FREEBSD 0x00040000 /* FreeBSD 2.2 and later */ 768 #define OS_OTHER 0x80000000 /* Other */ 769 770 /* Capabilities - sigWORD dsCapabilities; FLAG BITS */ 771 #define CAP_RAID0 0x0001 /* RAID-0 */ 772 #define CAP_RAID1 0x0002 /* RAID-1 */ 773 #define CAP_RAID3 0x0004 /* RAID-3 */ 774 #define CAP_RAID5 0x0008 /* RAID-5 */ 775 #define CAP_SPAN 0x0010 /* Spanning */ 776 #define CAP_PASS 0x0020 /* Provides passthrough */ 777 #define CAP_OVERLAP 0x0040 /* Passthrough supports overlapped commands */ 778 #define CAP_ASPI 0x0080 /* Supports ASPI Command Requests */ 779 #define CAP_ABOVE16MB 0x0100 /* ISA Driver supports greater than 16MB */ 780 #define CAP_EXTEND 0x8000 /* Extended info appears after description */ 781 782 /* Devices Supported - sigWORD dsDeviceSupp; FLAG BITS */ 783 #define DEV_DASD 0x0001 /* DASD (hard drives) */ 784 #define DEV_TAPE 0x0002 /* Tape drives */ 785 #define DEV_PRINTER 0x0004 /* Printers */ 786 #define DEV_PROC 0x0008 /* Processors */ 787 #define DEV_WORM 0x0010 /* WORM drives */ 788 #define DEV_CDROM 0x0020 /* CD-ROM drives */ 789 #define DEV_SCANNER 0x0040 /* Scanners */ 790 #define DEV_OPTICAL 0x0080 /* Optical Drives */ 791 #define DEV_JUKEBOX 0x0100 /* Jukebox */ 792 #define DEV_COMM 0x0200 /* Communications Devices */ 793 #define DEV_OTHER 0x0400 /* Other Devices */ 794 #define DEV_ALL 0xFFFF /* All SCSI Devices */ 795 796 /* Adapters Families Supported - sigWORD dsAdapterSupp; FLAG BITS */ 797 #define ADF_2001 0x0001 /* PM2001 */ 798 #define ADF_2012A 0x0002 /* PM2012A */ 799 #define ADF_PLUS_ISA 0x0004 /* PM2011,PM2021 */ 800 #define ADF_PLUS_EISA 0x0008 /* PM2012B,PM2022 */ 801 #define ADF_SC3_ISA 0x0010 /* PM2021 */ 802 #define ADF_SC3_EISA 0x0020 /* PM2022,PM2122, etc */ 803 #define ADF_SC3_PCI 0x0040 /* SmartCache III PCI */ 804 #define ADF_SC4_ISA 0x0080 /* SmartCache IV ISA */ 805 #define ADF_SC4_EISA 0x0100 /* SmartCache IV EISA */ 806 #define ADF_SC4_PCI 0x0200 /* SmartCache IV PCI */ 807 #define ADF_ALL_MASTER 0xFFFE /* All bus mastering */ 808 #define ADF_ALL_CACHE 0xFFFC /* All caching */ 809 #define ADF_ALL 0xFFFF /* ALL DPT adapters */ 810 811 /* Application - sigWORD dsApplication; FLAG BITS */ 812 #define APP_DPTMGR 0x0001 /* DPT Storage Manager */ 813 #define APP_ENGINE 0x0002 /* DPT Engine */ 814 #define APP_SYTOS 0x0004 /* Sytron Sytos Plus */ 815 #define APP_CHEYENNE 0x0008 /* Cheyenne ARCServe + ARCSolo */ 816 #define APP_MSCDEX 0x0010 /* Microsoft CD-ROM extensions */ 817 #define APP_NOVABACK 0x0020 /* NovaStor Novaback */ 818 #define APP_AIM 0x0040 /* Archive Information Manager */ 819 820 /* Requirements - sigBYTE dsRequirements; FLAG BITS */ 821 #define REQ_SMARTROM 0x01 /* Requires SmartROM to be present */ 822 #define REQ_DPTDDL 0x02 /* Requires DPTDDL.SYS to be loaded */ 823 #define REQ_HBA_DRIVER 0x04 /* Requires an HBA driver to be loaded */ 824 #define REQ_ASPI_TRAN 0x08 /* Requires an ASPI Transport Modules */ 825 #define REQ_ENGINE 0x10 /* Requires a DPT Engine to be loaded */ 826 #define REQ_COMM_ENG 0x20 /* Requires a DPT Communications Engine */ 827 828 typedef struct dpt_sig { 829 char dsSignature[6]; /* ALWAYS "dPtSiG" */ 830 u_int8_t SigVersion; /* signature version (currently 1) */ 831 u_int8_t ProcessorFamily; /* what type of processor */ 832 u_int8_t Processor; /* precise processor */ 833 u_int8_t Filetype; /* type of file */ 834 u_int8_t FiletypeFlags; /* flags to specify load type, etc. */ 835 u_int8_t OEM; /* OEM file was created for */ 836 u_int32_t OS; /* which Operating systems */ 837 u_int16_t Capabilities; /* RAID levels, etc. */ 838 u_int16_t DeviceSupp; /* Types of SCSI devices supported */ 839 u_int16_t AdapterSupp; /* DPT adapter families supported */ 840 u_int16_t Application; /* applications file is for */ 841 u_int8_t Requirements; /* Other driver dependencies */ 842 u_int8_t Version; /* 1 */ 843 u_int8_t Revision; /* 'J' */ 844 u_int8_t SubRevision; /* '9', ' ' if N/A */ 845 u_int8_t Month; /* creation month */ 846 u_int8_t Day; /* creation day */ 847 u_int8_t Year; /* creation year since 1980 */ 848 char *Description; /* description (NULL terminated) */ 849 } dpt_sig_t; 850 851 /* 32 bytes minimum - with no description. Put NULL at description[0] */ 852 /* 81 bytes maximum - with 49 character description plus NULL. */ 853 854 /* This line added at Roycroft's request */ 855 /* Microsoft's NT compiler gets confused if you do a pack and don't */ 856 /* restore it. */ 857 typedef struct eata_pass_through { 858 u_int8_t eataID[4]; 859 u_int32_t command; 860 861 #define EATAUSRCMD (('D'<<8)|65) /* EATA PassThrough Command */ 862 #define DPT_SIGNATURE (('D'<<8)|67) /* Get Signature Structure */ 863 #define DPT_NUMCTRLS (('D'<<8)|68) /* Get Number Of DPT Adapters */ 864 #define DPT_CTRLINFO (('D'<<8)|69) /* Get Adapter Info Structure */ 865 #define DPT_SYSINFO (('D'<<8)|72) /* Get System Info Structure */ 866 #define DPT_BLINKLED (('D'<<8)|75) /* Get The BlinkLED Status */ 867 868 u_int8_t *command_buffer; 869 eata_ccb_t command_packet; 870 u_int32_t timeout; 871 u_int8_t host_status; 872 u_int8_t target_status; 873 u_int8_t retries; 874 } eata_pt_t; 875 876 typedef enum { 877 DCCB_FREE = 0x00, 878 DCCB_ACTIVE = 0x01, 879 DCCB_RELEASE_SIMQ = 0x02 880 } dccb_state; 881 882 typedef struct dpt_ccb { 883 eata_ccb_t eata_ccb; 884 bus_dmamap_t dmamap; 885 dpt_sg_t *sg_list; 886 u_int32_t sg_busaddr; 887 dccb_state state; 888 union ccb *ccb; 889 struct scsi_sense_data sense_data; 890 u_int8_t tag; 891 u_int8_t retries; 892 u_int8_t status; /* status of this queueslot */ 893 u_int8_t *cmd; /* address of cmd */ 894 895 u_int32_t transaction_id; 896 u_int32_t result; 897 caddr_t data; 898 SLIST_ENTRY(dpt_ccb) links; 899 900 #ifdef DPT_MEASURE_PERFORMANCE 901 u_int32_t submitted_time; 902 struct timeval command_started; 903 struct timeval command_ended; 904 #endif 905 } dpt_ccb_t; 906 907 /* 908 * This is provided for compatibility with UnixWare only. 909 * Some of the fields may be bogus. 910 * Others may have a totally different meaning. 911 */ 912 typedef struct dpt_scsi_ha { 913 u_int32_t ha_state; /* Operational state */ 914 u_int8_t ha_id[MAX_CHANNELS]; /* Host adapter SCSI ids */ 915 int32_t ha_base; /* Base I/O address */ 916 int ha_max_jobs; /* Max number of Active Jobs */ 917 int ha_cache:2; /* Cache parameters */ 918 int ha_cachesize:30; /* In meg, only if cache present*/ 919 int ha_nbus; /* Number Of Busses on HBA */ 920 int ha_ntargets; /* Number Of Targets Supported */ 921 int ha_nluns; /* Number Of LUNs Supported */ 922 int ha_tshift; /* Shift value for target */ 923 int ha_bshift; /* Shift value for bus */ 924 int ha_npend; /* # of jobs sent to HBA */ 925 int ha_active_jobs; /* Number Of Active Jobs */ 926 char ha_fw_version[4]; /* Firmware Revision Level */ 927 void *ha_ccb; /* Controller command blocks */ 928 void *ha_cblist; /* Command block free list */ 929 void *ha_dev; /* Logical unit queues */ 930 void *ha_StPkt_lock; /* Status Packet Lock */ 931 void *ha_ccb_lock; /* CCB Lock */ 932 void *ha_LuQWaiting; /* Lu Queue Waiting List */ 933 void *ha_QWait_lock; /* Device Que Waiting Lock */ 934 int ha_QWait_opri; /* Saved Priority Level */ 935 #ifdef DPT_TARGET_MODE 936 dpt_ccb_t *target_ccb[MAX_CHANNELS]; /* Command block waiting writebuf */ 937 #endif 938 } dpt_compat_ha_t; 939 940 /* 941 * Describe the Inquiry Data returned on Page 0 from the Adapter. The 942 * Page C1 Inquiry Data is described in the DptConfig_t structure above. 943 */ 944 typedef struct { 945 u_int8_t deviceType; 946 u_int8_t rm_dtq; 947 u_int8_t otherData[6]; 948 u_int8_t vendor[8]; 949 u_int8_t modelNum[16]; 950 u_int8_t firmware[4]; 951 u_int8_t protocol[4]; 952 } dpt_inq_t; 953 954 /* 955 * sp_EOC is not `safe', so I will check sp_Messages[0] instead! 956 */ 957 #define DptStat_BUSY(x) ((x)->sp_ID_Message) 958 #define DptStat_Reset_BUSY(x) \ 959 ((x)->msg[0] = 0xA5, (x)->EOC = 0, \ 960 (x)->ccb_busaddr = ~0) 961 962 #ifdef DPT_MEASURE_PERFORMANCE 963 #define BIG_ENOUGH 0x8fffffff 964 typedef struct dpt_metrics { 965 u_int32_t command_count[256]; /* We assume MAX 256 SCSI commands */ 966 u_int32_t max_command_time[256]; 967 u_int32_t min_command_time[256]; 968 969 u_int32_t min_intr_time; 970 u_int32_t max_intr_time; 971 u_int32_t aborted_interrupts; 972 u_int32_t spurious_interrupts; 973 974 u_int32_t max_waiting_count; 975 u_int32_t max_submit_count; 976 u_int32_t max_complete_count; 977 978 u_int32_t min_waiting_time; 979 u_int32_t min_submit_time; 980 u_int32_t min_complete_time; 981 982 u_int32_t max_waiting_time; 983 u_int32_t max_submit_time; 984 u_int32_t max_complete_time; 985 986 u_int32_t command_collisions; 987 u_int32_t command_too_busy; 988 u_int32_t max_eata_tries; 989 u_int32_t min_eata_tries; 990 991 u_int32_t read_by_size_count[10]; 992 u_int32_t write_by_size_count[10]; 993 u_int32_t read_by_size_min_time[10]; 994 u_int32_t read_by_size_max_time[10]; 995 u_int32_t write_by_size_min_time[10]; 996 u_int32_t write_by_size_max_time[10]; 997 998 #define SIZE_512 0 999 #define SIZE_1K 1 1000 #define SIZE_2K 2 1001 #define SIZE_4K 3 1002 #define SIZE_8K 4 1003 #define SIZE_16K 5 1004 #define SIZE_32K 6 1005 #define SIZE_64K 7 1006 #define SIZE_BIGGER 8 1007 #define SIZE_OTHER 9 1008 1009 struct timeval intr_started; 1010 1011 u_int32_t warm_starts; 1012 u_int32_t cold_boots; 1013 } dpt_perf_t; 1014 #endif 1015 1016 struct sg_map_node { 1017 bus_dmamap_t sg_dmamap; 1018 bus_addr_t sg_physaddr; 1019 dpt_sg_t* sg_vaddr; 1020 SLIST_ENTRY(sg_map_node) links; 1021 }; 1022 1023 /* Main state machine and interface structure */ 1024 typedef struct dpt_softc { 1025 bus_space_tag_t tag; 1026 bus_space_handle_t bsh; 1027 bus_dma_tag_t buffer_dmat; /* dmat for buffer I/O */ 1028 dpt_ccb_t *dpt_dccbs; /* Array of dpt ccbs */ 1029 bus_addr_t dpt_ccb_busbase; /* phys base address of array */ 1030 bus_addr_t dpt_ccb_busend; /* phys end address of array */ 1031 1032 u_int32_t handle_interrupts :1, /* Are we ready for real work? */ 1033 target_mode_enabled :1, 1034 resource_shortage :1, 1035 cache_type :2, 1036 spare :28; 1037 1038 int total_dccbs; 1039 int free_dccbs; 1040 int pending_ccbs; 1041 int completed_ccbs; 1042 1043 SLIST_HEAD(, dpt_ccb) free_dccb_list; 1044 LIST_HEAD(, ccb_hdr) pending_ccb_list; 1045 1046 bus_dma_tag_t parent_dmat; 1047 bus_dma_tag_t dccb_dmat; /* dmat for our ccb array */ 1048 bus_dmamap_t dccb_dmamap; 1049 bus_dma_tag_t sg_dmat; /* dmat for our sg maps */ 1050 SLIST_HEAD(, sg_map_node) sg_maps; 1051 1052 struct cam_sim *sims[MAX_CHANNELS]; 1053 struct cam_path *paths[MAX_CHANNELS]; 1054 u_int32_t commands_processed; 1055 u_int32_t lost_interrupts; 1056 1057 /* 1058 * These three parameters can be used to allow for wide scsi, and 1059 * for host adapters that support multiple busses. The first two 1060 * should be set to 1 more than the actual max id or lun (i.e. 8 for 1061 * normal systems). 1062 * 1063 * There is a FAT assumption here; We assume that these will never 1064 * exceed MAX_CHANNELS, MAX_TARGETS, MAX_LUNS 1065 */ 1066 u_int channels; /* # of avail scsi chan. */ 1067 u_int32_t max_id; 1068 u_int32_t max_lun; 1069 1070 u_int8_t irq; 1071 u_int8_t dma_channel; 1072 1073 TAILQ_ENTRY(dpt_softc) links; 1074 int unit; 1075 int init_level; 1076 1077 /* 1078 * Every object on a unit can have a receiver, if it treats 1079 * us as a target. We do that so that separate and independant 1080 * clients can consume received buffers. 1081 */ 1082 1083 #define DPT_RW_BUFFER_SIZE (8 * 1024) 1084 dpt_ccb_t *target_ccb[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS]; 1085 u_int8_t *rw_buffer[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS]; 1086 dpt_rec_buff buffer_receiver[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS]; 1087 1088 dpt_inq_t board_data; 1089 u_int8_t EATA_revision; 1090 u_int8_t bustype; /* bustype of HBA */ 1091 u_int32_t state; /* state of HBA */ 1092 1093 #define DPT_HA_FREE 0x00000000 1094 #define DPT_HA_OK 0x00000000 1095 #define DPT_HA_NO_TIMEOUT 0x00000000 1096 #define DPT_HA_BUSY 0x00000001 1097 #define DPT_HA_TIMEOUT 0x00000002 1098 #define DPT_HA_RESET 0x00000004 1099 #define DPT_HA_LOCKED 0x00000008 1100 #define DPT_HA_ABORTED 0x00000010 1101 #define DPT_HA_CONTROL_ACTIVE 0x00000020 1102 #define DPT_HA_SHUTDOWN_ACTIVE 0x00000040 1103 #define DPT_HA_COMMAND_ACTIVE 0x00000080 1104 #define DPT_HA_QUIET 0x00000100 1105 1106 #ifdef DPT_LOST_IRQ 1107 #define DPT_LOST_IRQ_SET 0x10000000 1108 #define DPT_LOST_IRQ_ACTIVE 0x20000000 1109 #endif 1110 1111 #ifdef DPT_HANDLE_TIMEOUTS 1112 #define DPT_HA_TIMEOUTS_SET 0x40000000 1113 #define DPT_HA_TIMEOUTS_ACTIVE 0x80000000 1114 #endif 1115 1116 u_int8_t primary; /* true if primary */ 1117 1118 u_int8_t more_support :1, /* HBA supports MORE flag */ 1119 immediate_support :1, /* HBA supports IMMEDIATE */ 1120 broken_INQUIRY :1, /* EISA HBA w/broken INQUIRY */ 1121 spare2 :5; 1122 1123 u_int8_t resetlevel[MAX_CHANNELS]; 1124 u_int32_t last_ccb; /* Last used ccb */ 1125 u_int32_t cplen; /* size of CP in words */ 1126 u_int16_t cppadlen; /* pad length of cp */ 1127 u_int16_t max_dccbs; 1128 u_int16_t sgsize; /* Entries in the SG list */ 1129 u_int8_t hostid[MAX_CHANNELS]; /* SCSI ID of HBA */ 1130 u_int32_t cache_size; 1131 1132 volatile dpt_sp_t *sp; /* status packet */ 1133 /* Copied from the status packet during interrupt handler */ 1134 u_int8_t hba_stat; 1135 u_int8_t scsi_stat; /* Target SCSI status */ 1136 u_int32_t residue_len; /* Number of bytes not transferred */ 1137 bus_addr_t sp_physaddr; /* phys address of status packet */ 1138 1139 /* 1140 * We put ALL conditional elements at the tail for the structure. 1141 * If we do not, then userland code will crash or trash based on which 1142 * kernel it is running with. 1143 * This isi most visible with usr/sbin/dpt_softc(8) 1144 */ 1145 1146 #ifdef DPT_MEASURE_PERFORMANCE 1147 dpt_perf_t performance; 1148 #endif 1149 1150 #ifdef DPT_RESET_HBA 1151 struct timeval last_contact; 1152 #endif 1153 } dpt_softc_t; 1154 1155 /* 1156 * This structure is used to pass dpt_softc contents to userland via the 1157 * ioctl DPT_IOCTL_SOFTC. The reason for this maddness, is that FreeBSD 1158 * (all BSDs ?) chose to actually assign a nasty meaning to the IOCTL word, 1159 * encoding 13 bits of it as size. As dpt_softc_t is somewhere between 1160 * 8,594 and 8,600 (depends on options), we have to copy the data to 1161 * something less than 4KB long. This siliness also solves the problem of 1162 * varying definition of dpt_softc_t, As the variants are exluded from 1163 * dpt_user_softc. 1164 * 1165 * See dpt_softc_t above for enumerations, comments and such. 1166 */ 1167 typedef struct dpt_user_softc { 1168 int unit; 1169 u_int32_t handle_interrupts :1, /* Are we ready for real work? */ 1170 target_mode_enabled :1, 1171 spare :30; 1172 1173 int total_ccbs_count; 1174 int free_ccbs_count; 1175 int waiting_ccbs_count; 1176 int submitted_ccbs_count; 1177 int completed_ccbs_count; 1178 1179 u_int32_t queue_status; 1180 u_int32_t free_lock; 1181 u_int32_t waiting_lock; 1182 u_int32_t submitted_lock; 1183 u_int32_t completed_lock; 1184 1185 u_int32_t commands_processed; 1186 u_int32_t lost_interrupts; 1187 1188 u_int8_t channels; 1189 u_int32_t max_id; 1190 u_int32_t max_lun; 1191 1192 u_int16_t io_base; 1193 u_int8_t *v_membase; 1194 u_int8_t *p_membase; 1195 1196 u_int8_t irq; 1197 u_int8_t dma_channel; 1198 1199 dpt_inq_t board_data; 1200 u_int8_t EATA_revision; 1201 u_int8_t bustype; 1202 u_int32_t state; 1203 1204 u_int8_t primary; 1205 u_int8_t more_support :1, 1206 immediate_support :1, 1207 broken_INQUIRY :1, 1208 spare2 :5; 1209 1210 u_int8_t resetlevel[MAX_CHANNELS]; 1211 u_int32_t last_ccb; 1212 u_int32_t cplen; 1213 u_int16_t cppadlen; 1214 u_int16_t queuesize; 1215 u_int16_t sgsize; 1216 u_int8_t hostid[MAX_CHANNELS]; 1217 u_int32_t cache_type :2, 1218 cache_size :30; 1219 } dpt_user_softc_t; 1220 1221 /* 1222 * Externals: 1223 * These all come from dpt_scsi.c 1224 * 1225 */ 1226 #ifdef _KERNEL 1227 /* This function gets the current hi-res time and returns it to the caller */ 1228 static __inline struct timeval 1229 dpt_time_now(void) 1230 { 1231 struct timeval now; 1232 1233 microtime(&now); 1234 return(now); 1235 } 1236 1237 /* 1238 * Given a minor device number, get its SCSI Unit. 1239 */ 1240 static __inline int 1241 dpt_minor2unit(int minor) 1242 { 1243 return(minor2hba(minor)); 1244 } 1245 1246 dpt_softc_t *dpt_minor2softc(int minor_no); 1247 1248 #endif /* _KERNEL */ 1249 1250 /* 1251 * This function substracts one timval structure from another, 1252 * Returning the result in usec. 1253 * It assumes that less than 4 billion usecs passed form start to end. 1254 * If times are sensless, ~0 is returned. 1255 */ 1256 static __inline u_int32_t 1257 dpt_time_delta(struct timeval start, 1258 struct timeval end) 1259 { 1260 if (start.tv_sec > end.tv_sec) 1261 return(~0); 1262 1263 if ( (start.tv_sec == end.tv_sec) && (start.tv_usec > end.tv_usec) ) 1264 return(~0); 1265 1266 return ( (end.tv_sec - start.tv_sec) * 1000000 + 1267 (end.tv_usec - start.tv_usec) ); 1268 } 1269 1270 extern TAILQ_HEAD(dpt_softc_list, dpt_softc) dpt_softcs; 1271 1272 extern int dpt_controllers_present; 1273 1274 #ifdef _KERNEL 1275 dpt_softc_t * dpt_alloc(device_t, bus_space_tag_t, bus_space_handle_t); 1276 #endif 1277 void dpt_free(struct dpt_softc *dpt); 1278 int dpt_init(struct dpt_softc *dpt); 1279 int dpt_attach(dpt_softc_t * dpt); 1280 void dpt_intr(void *arg); 1281 1282 dpt_conf_t * dpt_pio_get_conf(u_int32_t); 1283 1284 #endif /* _DPT_H */ 1285