1 /* 2 * HighPoint RR3xxx/4xxx RAID Driver for FreeBSD 3 * Copyright (C) 2007-2008 HighPoint Technologies, Inc. All Rights Reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/dev/hptiop/hptiop.c,v 1.9 2011/08/01 21:12:41 delphij Exp $ 27 */ 28 29 #include <sys/param.h> 30 #include <sys/types.h> 31 #include <sys/cons.h> 32 #include <sys/time.h> 33 #include <sys/systm.h> 34 35 #include <sys/stat.h> 36 #include <sys/malloc.h> 37 #include <sys/conf.h> 38 #include <sys/libkern.h> 39 #include <sys/kernel.h> 40 41 #include <sys/kthread.h> 42 #include <sys/lock.h> 43 #include <sys/module.h> 44 45 #include <sys/eventhandler.h> 46 #include <sys/bus.h> 47 #include <sys/taskqueue.h> 48 #include <sys/ioccom.h> 49 #include <sys/device.h> 50 #include <sys/mplock2.h> 51 52 #include <machine/stdarg.h> 53 #include <sys/rman.h> 54 55 #include <vm/vm.h> 56 #include <vm/pmap.h> 57 58 #include <bus/pci/pcireg.h> 59 #include <bus/pci/pcivar.h> 60 61 #include <bus/cam/cam.h> 62 #include <bus/cam/cam_ccb.h> 63 #include <bus/cam/cam_sim.h> 64 #include <bus/cam/cam_xpt_periph.h> 65 #include <bus/cam/cam_xpt_sim.h> 66 #include <bus/cam/cam_debug.h> 67 #include <bus/cam/cam_periph.h> 68 #include <bus/cam/scsi/scsi_all.h> 69 #include <bus/cam/scsi/scsi_message.h> 70 71 #include <dev/raid/hptiop/hptiop.h> 72 73 static char driver_name[] = "hptiop"; 74 static char driver_version[] = "v1.3 (010208)"; 75 76 static devclass_t hptiop_devclass; 77 78 static int hptiop_send_sync_msg(struct hpt_iop_hba *hba, 79 u_int32_t msg, u_int32_t millisec); 80 static void hptiop_request_callback_itl(struct hpt_iop_hba *hba, 81 u_int32_t req); 82 static void hptiop_request_callback_mv(struct hpt_iop_hba *hba, u_int64_t req); 83 static void hptiop_os_message_callback(struct hpt_iop_hba *hba, u_int32_t msg); 84 static int hptiop_do_ioctl_itl(struct hpt_iop_hba *hba, 85 struct hpt_iop_ioctl_param *pParams); 86 static int hptiop_do_ioctl_mv(struct hpt_iop_hba *hba, 87 struct hpt_iop_ioctl_param *pParams); 88 static void hptiop_bus_scan_cb(struct cam_periph *periph, union ccb *ccb); 89 static int hptiop_rescan_bus(struct hpt_iop_hba *hba); 90 static int hptiop_alloc_pci_res_itl(struct hpt_iop_hba *hba); 91 static int hptiop_alloc_pci_res_mv(struct hpt_iop_hba *hba); 92 static int hptiop_get_config_itl(struct hpt_iop_hba *hba, 93 struct hpt_iop_request_get_config *config); 94 static int hptiop_get_config_mv(struct hpt_iop_hba *hba, 95 struct hpt_iop_request_get_config *config); 96 static int hptiop_set_config_itl(struct hpt_iop_hba *hba, 97 struct hpt_iop_request_set_config *config); 98 static int hptiop_set_config_mv(struct hpt_iop_hba *hba, 99 struct hpt_iop_request_set_config *config); 100 static int hptiop_internal_memalloc_mv(struct hpt_iop_hba *hba); 101 static int hptiop_internal_memfree_mv(struct hpt_iop_hba *hba); 102 static int hptiop_post_ioctl_command_itl(struct hpt_iop_hba *hba, 103 u_int32_t req32, struct hpt_iop_ioctl_param *pParams); 104 static int hptiop_post_ioctl_command_mv(struct hpt_iop_hba *hba, 105 struct hpt_iop_request_ioctl_command *req, 106 struct hpt_iop_ioctl_param *pParams); 107 static void hptiop_post_req_itl(struct hpt_iop_hba *hba, 108 struct hpt_iop_srb *srb, 109 bus_dma_segment_t *segs, int nsegs); 110 static void hptiop_post_req_mv(struct hpt_iop_hba *hba, 111 struct hpt_iop_srb *srb, 112 bus_dma_segment_t *segs, int nsegs); 113 static void hptiop_post_msg_itl(struct hpt_iop_hba *hba, u_int32_t msg); 114 static void hptiop_post_msg_mv(struct hpt_iop_hba *hba, u_int32_t msg); 115 static void hptiop_enable_intr_itl(struct hpt_iop_hba *hba); 116 static void hptiop_enable_intr_mv(struct hpt_iop_hba *hba); 117 static void hptiop_disable_intr_itl(struct hpt_iop_hba *hba); 118 static void hptiop_disable_intr_mv(struct hpt_iop_hba *hba); 119 static void hptiop_free_srb(struct hpt_iop_hba *hba, struct hpt_iop_srb *srb); 120 static int hptiop_os_query_remove_device(struct hpt_iop_hba *hba, int tid); 121 static int hptiop_probe(device_t dev); 122 static int hptiop_attach(device_t dev); 123 static int hptiop_detach(device_t dev); 124 static int hptiop_shutdown(device_t dev); 125 static void hptiop_action(struct cam_sim *sim, union ccb *ccb); 126 static void hptiop_poll(struct cam_sim *sim); 127 static void hptiop_async(void *callback_arg, u_int32_t code, 128 struct cam_path *path, void *arg); 129 static void hptiop_pci_intr(void *arg); 130 static void hptiop_release_resource(struct hpt_iop_hba *hba); 131 static int hptiop_reset_adapter(struct hpt_iop_hba *hba); 132 133 static d_open_t hptiop_open; 134 static d_close_t hptiop_close; 135 static d_ioctl_t hptiop_ioctl; 136 137 static struct dev_ops hptiop_ops = { 138 { driver_name, 0, 0 }, 139 .d_open = hptiop_open, 140 .d_close = hptiop_close, 141 .d_ioctl = hptiop_ioctl, 142 }; 143 144 #define hba_from_dev(dev) ((struct hpt_iop_hba *)(dev)->si_drv1) 145 146 #define BUS_SPACE_WRT4_ITL(offset, value) bus_space_write_4(hba->bar0t,\ 147 hba->bar0h, offsetof(struct hpt_iopmu_itl, offset), (value)) 148 #define BUS_SPACE_RD4_ITL(offset) bus_space_read_4(hba->bar0t,\ 149 hba->bar0h, offsetof(struct hpt_iopmu_itl, offset)) 150 151 #define BUS_SPACE_WRT4_MV0(offset, value) bus_space_write_4(hba->bar0t,\ 152 hba->bar0h, offsetof(struct hpt_iopmv_regs, offset), value) 153 #define BUS_SPACE_RD4_MV0(offset) bus_space_read_4(hba->bar0t,\ 154 hba->bar0h, offsetof(struct hpt_iopmv_regs, offset)) 155 #define BUS_SPACE_WRT4_MV2(offset, value) bus_space_write_4(hba->bar2t,\ 156 hba->bar2h, offsetof(struct hpt_iopmu_mv, offset), value) 157 #define BUS_SPACE_RD4_MV2(offset) bus_space_read_4(hba->bar2t,\ 158 hba->bar2h, offsetof(struct hpt_iopmu_mv, offset)) 159 160 static int hptiop_open(struct dev_open_args *ap) 161 { 162 cdev_t dev = ap->a_head.a_dev; 163 struct hpt_iop_hba *hba = hba_from_dev(dev); 164 165 if (hba==NULL) 166 return ENXIO; 167 if (hba->flag & HPT_IOCTL_FLAG_OPEN) 168 return EBUSY; 169 hba->flag |= HPT_IOCTL_FLAG_OPEN; 170 return 0; 171 } 172 173 static int hptiop_close(struct dev_close_args *ap) 174 { 175 cdev_t dev = ap->a_head.a_dev; 176 struct hpt_iop_hba *hba = hba_from_dev(dev); 177 hba->flag &= ~(u_int32_t)HPT_IOCTL_FLAG_OPEN; 178 return 0; 179 } 180 181 static int hptiop_ioctl(struct dev_ioctl_args *ap) 182 { 183 cdev_t dev = ap->a_head.a_dev; 184 u_long cmd = ap->a_cmd; 185 caddr_t data = ap->a_data; 186 int ret = EFAULT; 187 struct hpt_iop_hba *hba = hba_from_dev(dev); 188 189 get_mplock(); 190 191 switch (cmd) { 192 case HPT_DO_IOCONTROL: 193 ret = hba->ops->do_ioctl(hba, 194 (struct hpt_iop_ioctl_param *)data); 195 break; 196 case HPT_SCAN_BUS: 197 ret = hptiop_rescan_bus(hba); 198 break; 199 } 200 201 rel_mplock(); 202 203 return ret; 204 } 205 206 static u_int64_t hptiop_mv_outbound_read(struct hpt_iop_hba *hba) 207 { 208 u_int64_t p; 209 u_int32_t outbound_tail = BUS_SPACE_RD4_MV2(outbound_tail); 210 u_int32_t outbound_head = BUS_SPACE_RD4_MV2(outbound_head); 211 212 if (outbound_tail != outbound_head) { 213 bus_space_read_region_4(hba->bar2t, hba->bar2h, 214 offsetof(struct hpt_iopmu_mv, 215 outbound_q[outbound_tail]), 216 (u_int32_t *)&p, 2); 217 218 outbound_tail++; 219 220 if (outbound_tail == MVIOP_QUEUE_LEN) 221 outbound_tail = 0; 222 223 BUS_SPACE_WRT4_MV2(outbound_tail, outbound_tail); 224 return p; 225 } else 226 return 0; 227 } 228 229 static void hptiop_mv_inbound_write(u_int64_t p, struct hpt_iop_hba *hba) 230 { 231 u_int32_t inbound_head = BUS_SPACE_RD4_MV2(inbound_head); 232 u_int32_t head = inbound_head + 1; 233 234 if (head == MVIOP_QUEUE_LEN) 235 head = 0; 236 237 bus_space_write_region_4(hba->bar2t, hba->bar2h, 238 offsetof(struct hpt_iopmu_mv, inbound_q[inbound_head]), 239 (u_int32_t *)&p, 2); 240 BUS_SPACE_WRT4_MV2(inbound_head, head); 241 BUS_SPACE_WRT4_MV0(inbound_doorbell, MVIOP_MU_INBOUND_INT_POSTQUEUE); 242 } 243 244 static void hptiop_post_msg_itl(struct hpt_iop_hba *hba, u_int32_t msg) 245 { 246 BUS_SPACE_WRT4_ITL(inbound_msgaddr0, msg); 247 BUS_SPACE_RD4_ITL(outbound_intstatus); 248 } 249 250 static void hptiop_post_msg_mv(struct hpt_iop_hba *hba, u_int32_t msg) 251 { 252 253 BUS_SPACE_WRT4_MV2(inbound_msg, msg); 254 BUS_SPACE_WRT4_MV0(inbound_doorbell, MVIOP_MU_INBOUND_INT_MSG); 255 256 BUS_SPACE_RD4_MV0(outbound_intmask); 257 } 258 259 static int hptiop_wait_ready_itl(struct hpt_iop_hba * hba, u_int32_t millisec) 260 { 261 u_int32_t req=0; 262 int i; 263 264 for (i = 0; i < millisec; i++) { 265 req = BUS_SPACE_RD4_ITL(inbound_queue); 266 if (req != IOPMU_QUEUE_EMPTY) 267 break; 268 DELAY(1000); 269 } 270 271 if (req!=IOPMU_QUEUE_EMPTY) { 272 BUS_SPACE_WRT4_ITL(outbound_queue, req); 273 BUS_SPACE_RD4_ITL(outbound_intstatus); 274 return 0; 275 } 276 277 return -1; 278 } 279 280 static int hptiop_wait_ready_mv(struct hpt_iop_hba * hba, u_int32_t millisec) 281 { 282 if (hptiop_send_sync_msg(hba, IOPMU_INBOUND_MSG0_NOP, millisec)) 283 return -1; 284 285 return 0; 286 } 287 288 static void hptiop_request_callback_itl(struct hpt_iop_hba * hba, 289 u_int32_t index) 290 { 291 struct hpt_iop_srb *srb; 292 struct hpt_iop_request_scsi_command *req=NULL; 293 union ccb *ccb; 294 u_int8_t *cdb; 295 u_int32_t result, temp, dxfer; 296 u_int64_t temp64; 297 298 if (index & IOPMU_QUEUE_MASK_HOST_BITS) { /*host req*/ 299 if (hba->firmware_version > 0x01020000 || 300 hba->interface_version > 0x01020000) { 301 srb = hba->srb[index & ~(u_int32_t) 302 (IOPMU_QUEUE_ADDR_HOST_BIT 303 | IOPMU_QUEUE_REQUEST_RESULT_BIT)]; 304 req = (struct hpt_iop_request_scsi_command *)srb; 305 if (index & IOPMU_QUEUE_REQUEST_RESULT_BIT) 306 result = IOP_RESULT_SUCCESS; 307 else 308 result = req->header.result; 309 } else { 310 srb = hba->srb[index & 311 ~(u_int32_t)IOPMU_QUEUE_ADDR_HOST_BIT]; 312 req = (struct hpt_iop_request_scsi_command *)srb; 313 result = req->header.result; 314 } 315 dxfer = req->dataxfer_length; 316 goto srb_complete; 317 } 318 319 /*iop req*/ 320 temp = bus_space_read_4(hba->bar0t, hba->bar0h, index + 321 offsetof(struct hpt_iop_request_header, type)); 322 result = bus_space_read_4(hba->bar0t, hba->bar0h, index + 323 offsetof(struct hpt_iop_request_header, result)); 324 switch(temp) { 325 case IOP_REQUEST_TYPE_IOCTL_COMMAND: 326 { 327 temp64 = 0; 328 bus_space_write_region_4(hba->bar0t, hba->bar0h, index + 329 offsetof(struct hpt_iop_request_header, context), 330 (u_int32_t *)&temp64, 2); 331 wakeup((void *)((unsigned long)hba->u.itl.mu + index)); 332 break; 333 } 334 335 case IOP_REQUEST_TYPE_SCSI_COMMAND: 336 bus_space_read_region_4(hba->bar0t, hba->bar0h, index + 337 offsetof(struct hpt_iop_request_header, context), 338 (u_int32_t *)&temp64, 2); 339 srb = (struct hpt_iop_srb *)(unsigned long)temp64; 340 dxfer = bus_space_read_4(hba->bar0t, hba->bar0h, 341 index + offsetof(struct hpt_iop_request_scsi_command, 342 dataxfer_length)); 343 srb_complete: 344 ccb = (union ccb *)srb->ccb; 345 if (ccb->ccb_h.flags & CAM_CDB_POINTER) 346 cdb = ccb->csio.cdb_io.cdb_ptr; 347 else 348 cdb = ccb->csio.cdb_io.cdb_bytes; 349 350 if (cdb[0] == SYNCHRONIZE_CACHE) { /* ??? */ 351 ccb->ccb_h.status = CAM_REQ_CMP; 352 goto scsi_done; 353 } 354 355 switch (result) { 356 case IOP_RESULT_SUCCESS: 357 switch (ccb->ccb_h.flags & CAM_DIR_MASK) { 358 case CAM_DIR_IN: 359 bus_dmamap_sync(hba->io_dmat, 360 srb->dma_map, BUS_DMASYNC_POSTREAD); 361 bus_dmamap_unload(hba->io_dmat, srb->dma_map); 362 break; 363 case CAM_DIR_OUT: 364 bus_dmamap_sync(hba->io_dmat, 365 srb->dma_map, BUS_DMASYNC_POSTWRITE); 366 bus_dmamap_unload(hba->io_dmat, srb->dma_map); 367 break; 368 } 369 370 ccb->ccb_h.status = CAM_REQ_CMP; 371 break; 372 373 case IOP_RESULT_BAD_TARGET: 374 ccb->ccb_h.status = CAM_DEV_NOT_THERE; 375 break; 376 case IOP_RESULT_BUSY: 377 ccb->ccb_h.status = CAM_BUSY; 378 break; 379 case IOP_RESULT_INVALID_REQUEST: 380 ccb->ccb_h.status = CAM_REQ_INVALID; 381 break; 382 case IOP_RESULT_FAIL: 383 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; 384 break; 385 case IOP_RESULT_RESET: 386 ccb->ccb_h.status = CAM_BUSY; 387 break; 388 case IOP_RESULT_CHECK_CONDITION: 389 if (srb->srb_flag & HPT_SRB_FLAG_HIGH_MEM_ACESS) {/*iop*/ 390 bus_space_read_region_1(hba->bar0t, hba->bar0h, 391 index + offsetof(struct hpt_iop_request_scsi_command, 392 sg_list), (u_int8_t *)&ccb->csio.sense_data, 393 MIN(dxfer, sizeof(ccb->csio.sense_data))); 394 } else { 395 memcpy(&ccb->csio.sense_data, &req->sg_list, 396 MIN(dxfer, sizeof(ccb->csio.sense_data))); 397 } 398 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; 399 ccb->ccb_h.status |= CAM_AUTOSNS_VALID; 400 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 401 break; 402 default: 403 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; 404 break; 405 } 406 scsi_done: 407 if (srb->srb_flag & HPT_SRB_FLAG_HIGH_MEM_ACESS) 408 BUS_SPACE_WRT4_ITL(outbound_queue, index); 409 410 ccb->csio.resid = ccb->csio.dxfer_len - dxfer; 411 412 hptiop_free_srb(hba, srb); 413 xpt_done(ccb); 414 break; 415 } 416 } 417 418 static void hptiop_drain_outbound_queue_itl(struct hpt_iop_hba *hba) 419 { 420 u_int32_t req, temp; 421 422 while ((req = BUS_SPACE_RD4_ITL(outbound_queue)) !=IOPMU_QUEUE_EMPTY) { 423 if (req & IOPMU_QUEUE_MASK_HOST_BITS) 424 hptiop_request_callback_itl(hba, req); 425 else { 426 struct hpt_iop_request_header *p; 427 428 p = (struct hpt_iop_request_header *) 429 ((char *)hba->u.itl.mu + req); 430 temp = bus_space_read_4(hba->bar0t, 431 hba->bar0h,req + 432 offsetof(struct hpt_iop_request_header, 433 flags)); 434 if (temp & IOP_REQUEST_FLAG_SYNC_REQUEST) { 435 u_int64_t temp64; 436 bus_space_read_region_4(hba->bar0t, 437 hba->bar0h,req + 438 offsetof(struct hpt_iop_request_header, 439 context), 440 (u_int32_t *)&temp64, 2); 441 if (temp64) { 442 hptiop_request_callback_itl(hba, req); 443 } else { 444 temp64 = 1; 445 bus_space_write_region_4(hba->bar0t, 446 hba->bar0h,req + 447 offsetof(struct hpt_iop_request_header, 448 context), 449 (u_int32_t *)&temp64, 2); 450 } 451 } else 452 hptiop_request_callback_itl(hba, req); 453 } 454 } 455 } 456 457 static int hptiop_intr_itl(struct hpt_iop_hba * hba) 458 { 459 u_int32_t status; 460 int ret = 0; 461 462 status = BUS_SPACE_RD4_ITL(outbound_intstatus); 463 464 if (status & IOPMU_OUTBOUND_INT_MSG0) { 465 u_int32_t msg = BUS_SPACE_RD4_ITL(outbound_msgaddr0); 466 KdPrint(("hptiop: received outbound msg %x\n", msg)); 467 BUS_SPACE_WRT4_ITL(outbound_intstatus, IOPMU_OUTBOUND_INT_MSG0); 468 hptiop_os_message_callback(hba, msg); 469 ret = 1; 470 } 471 472 if (status & IOPMU_OUTBOUND_INT_POSTQUEUE) { 473 hptiop_drain_outbound_queue_itl(hba); 474 ret = 1; 475 } 476 477 return ret; 478 } 479 480 static void hptiop_request_callback_mv(struct hpt_iop_hba * hba, 481 u_int64_t _tag) 482 { 483 u_int32_t context = (u_int32_t)_tag; 484 485 if (context & MVIOP_CMD_TYPE_SCSI) { 486 struct hpt_iop_srb *srb; 487 struct hpt_iop_request_scsi_command *req; 488 union ccb *ccb; 489 u_int8_t *cdb; 490 491 srb = hba->srb[context >> MVIOP_REQUEST_NUMBER_START_BIT]; 492 req = (struct hpt_iop_request_scsi_command *)srb; 493 ccb = (union ccb *)srb->ccb; 494 if (ccb->ccb_h.flags & CAM_CDB_POINTER) 495 cdb = ccb->csio.cdb_io.cdb_ptr; 496 else 497 cdb = ccb->csio.cdb_io.cdb_bytes; 498 499 if (cdb[0] == SYNCHRONIZE_CACHE) { /* ??? */ 500 ccb->ccb_h.status = CAM_REQ_CMP; 501 goto scsi_done; 502 } 503 if (context & MVIOP_MU_QUEUE_REQUEST_RESULT_BIT) 504 req->header.result = IOP_RESULT_SUCCESS; 505 506 switch (req->header.result) { 507 case IOP_RESULT_SUCCESS: 508 switch (ccb->ccb_h.flags & CAM_DIR_MASK) { 509 case CAM_DIR_IN: 510 bus_dmamap_sync(hba->io_dmat, 511 srb->dma_map, BUS_DMASYNC_POSTREAD); 512 bus_dmamap_unload(hba->io_dmat, srb->dma_map); 513 break; 514 case CAM_DIR_OUT: 515 bus_dmamap_sync(hba->io_dmat, 516 srb->dma_map, BUS_DMASYNC_POSTWRITE); 517 bus_dmamap_unload(hba->io_dmat, srb->dma_map); 518 break; 519 } 520 ccb->ccb_h.status = CAM_REQ_CMP; 521 break; 522 case IOP_RESULT_BAD_TARGET: 523 ccb->ccb_h.status = CAM_DEV_NOT_THERE; 524 break; 525 case IOP_RESULT_BUSY: 526 ccb->ccb_h.status = CAM_BUSY; 527 break; 528 case IOP_RESULT_INVALID_REQUEST: 529 ccb->ccb_h.status = CAM_REQ_INVALID; 530 break; 531 case IOP_RESULT_FAIL: 532 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; 533 break; 534 case IOP_RESULT_RESET: 535 ccb->ccb_h.status = CAM_BUSY; 536 break; 537 case IOP_RESULT_CHECK_CONDITION: 538 memcpy(&ccb->csio.sense_data, &req->sg_list, 539 MIN(req->dataxfer_length, sizeof(ccb->csio.sense_data))); 540 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; 541 ccb->ccb_h.status |= CAM_AUTOSNS_VALID; 542 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 543 break; 544 default: 545 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; 546 break; 547 } 548 scsi_done: 549 ccb->csio.resid = ccb->csio.dxfer_len - req->dataxfer_length; 550 551 hptiop_free_srb(hba, srb); 552 xpt_done(ccb); 553 } else if (context & MVIOP_CMD_TYPE_IOCTL) { 554 struct hpt_iop_request_ioctl_command *req = hba->ctlcfg_ptr; 555 if (context & MVIOP_MU_QUEUE_REQUEST_RESULT_BIT) 556 hba->config_done = 1; 557 else 558 hba->config_done = -1; 559 wakeup(req); 560 } else if (context & 561 (MVIOP_CMD_TYPE_SET_CONFIG | 562 MVIOP_CMD_TYPE_GET_CONFIG)) 563 hba->config_done = 1; 564 else { 565 device_printf(hba->pcidev, "wrong callback type\n"); 566 } 567 } 568 569 static void hptiop_drain_outbound_queue_mv(struct hpt_iop_hba * hba) 570 { 571 u_int64_t req; 572 573 while ((req = hptiop_mv_outbound_read(hba))) { 574 if (req & MVIOP_MU_QUEUE_ADDR_HOST_BIT) { 575 if (req & MVIOP_MU_QUEUE_REQUEST_RETURN_CONTEXT) { 576 hptiop_request_callback_mv(hba, req); 577 } 578 } 579 } 580 } 581 582 static int hptiop_intr_mv(struct hpt_iop_hba * hba) 583 { 584 u_int32_t status; 585 int ret = 0; 586 587 status = BUS_SPACE_RD4_MV0(outbound_doorbell); 588 589 if (status) 590 BUS_SPACE_WRT4_MV0(outbound_doorbell, ~status); 591 592 if (status & MVIOP_MU_OUTBOUND_INT_MSG) { 593 u_int32_t msg = BUS_SPACE_RD4_MV2(outbound_msg); 594 KdPrint(("hptiop: received outbound msg %x\n", msg)); 595 hptiop_os_message_callback(hba, msg); 596 ret = 1; 597 } 598 599 if (status & MVIOP_MU_OUTBOUND_INT_POSTQUEUE) { 600 hptiop_drain_outbound_queue_mv(hba); 601 ret = 1; 602 } 603 604 return ret; 605 } 606 607 static int hptiop_send_sync_request_itl(struct hpt_iop_hba * hba, 608 u_int32_t req32, u_int32_t millisec) 609 { 610 u_int32_t i; 611 u_int64_t temp64; 612 613 BUS_SPACE_WRT4_ITL(inbound_queue, req32); 614 BUS_SPACE_RD4_ITL(outbound_intstatus); 615 616 for (i = 0; i < millisec; i++) { 617 hptiop_intr_itl(hba); 618 bus_space_read_region_4(hba->bar0t, hba->bar0h, req32 + 619 offsetof(struct hpt_iop_request_header, context), 620 (u_int32_t *)&temp64, 2); 621 if (temp64) 622 return 0; 623 DELAY(1000); 624 } 625 626 return -1; 627 } 628 629 static int hptiop_send_sync_request_mv(struct hpt_iop_hba *hba, 630 void *req, u_int32_t millisec) 631 { 632 u_int32_t i; 633 u_int64_t phy_addr; 634 hba->config_done = 0; 635 636 phy_addr = hba->ctlcfgcmd_phy | 637 (u_int64_t)MVIOP_MU_QUEUE_ADDR_HOST_BIT; 638 ((struct hpt_iop_request_get_config *)req)->header.flags |= 639 IOP_REQUEST_FLAG_SYNC_REQUEST | 640 IOP_REQUEST_FLAG_OUTPUT_CONTEXT; 641 hptiop_mv_inbound_write(phy_addr, hba); 642 BUS_SPACE_RD4_MV0(outbound_intmask); 643 644 for (i = 0; i < millisec; i++) { 645 hptiop_intr_mv(hba); 646 if (hba->config_done) 647 return 0; 648 DELAY(1000); 649 } 650 return -1; 651 } 652 653 static int hptiop_send_sync_msg(struct hpt_iop_hba *hba, 654 u_int32_t msg, u_int32_t millisec) 655 { 656 u_int32_t i; 657 658 hba->msg_done = 0; 659 hba->ops->post_msg(hba, msg); 660 661 for (i=0; i<millisec; i++) { 662 hba->ops->iop_intr(hba); 663 if (hba->msg_done) 664 break; 665 DELAY(1000); 666 } 667 668 return hba->msg_done? 0 : -1; 669 } 670 671 static int hptiop_get_config_itl(struct hpt_iop_hba * hba, 672 struct hpt_iop_request_get_config * config) 673 { 674 u_int32_t req32; 675 676 config->header.size = sizeof(struct hpt_iop_request_get_config); 677 config->header.type = IOP_REQUEST_TYPE_GET_CONFIG; 678 config->header.flags = IOP_REQUEST_FLAG_SYNC_REQUEST; 679 config->header.result = IOP_RESULT_PENDING; 680 config->header.context = 0; 681 682 req32 = BUS_SPACE_RD4_ITL(inbound_queue); 683 if (req32 == IOPMU_QUEUE_EMPTY) 684 return -1; 685 686 bus_space_write_region_4(hba->bar0t, hba->bar0h, 687 req32, (u_int32_t *)config, 688 sizeof(struct hpt_iop_request_header) >> 2); 689 690 if (hptiop_send_sync_request_itl(hba, req32, 20000)) { 691 KdPrint(("hptiop: get config send cmd failed")); 692 return -1; 693 } 694 695 bus_space_read_region_4(hba->bar0t, hba->bar0h, 696 req32, (u_int32_t *)config, 697 sizeof(struct hpt_iop_request_get_config) >> 2); 698 699 BUS_SPACE_WRT4_ITL(outbound_queue, req32); 700 701 return 0; 702 } 703 704 static int hptiop_get_config_mv(struct hpt_iop_hba * hba, 705 struct hpt_iop_request_get_config * config) 706 { 707 struct hpt_iop_request_get_config *req; 708 709 if (!(req = hba->ctlcfg_ptr)) 710 return -1; 711 712 req->header.flags = 0; 713 req->header.type = IOP_REQUEST_TYPE_GET_CONFIG; 714 req->header.size = sizeof(struct hpt_iop_request_get_config); 715 req->header.result = IOP_RESULT_PENDING; 716 req->header.context = MVIOP_CMD_TYPE_GET_CONFIG; 717 718 if (hptiop_send_sync_request_mv(hba, req, 20000)) { 719 KdPrint(("hptiop: get config send cmd failed")); 720 return -1; 721 } 722 723 *config = *req; 724 return 0; 725 } 726 727 static int hptiop_set_config_itl(struct hpt_iop_hba *hba, 728 struct hpt_iop_request_set_config *config) 729 { 730 u_int32_t req32; 731 732 req32 = BUS_SPACE_RD4_ITL(inbound_queue); 733 734 if (req32 == IOPMU_QUEUE_EMPTY) 735 return -1; 736 737 config->header.size = sizeof(struct hpt_iop_request_set_config); 738 config->header.type = IOP_REQUEST_TYPE_SET_CONFIG; 739 config->header.flags = IOP_REQUEST_FLAG_SYNC_REQUEST; 740 config->header.result = IOP_RESULT_PENDING; 741 config->header.context = 0; 742 743 bus_space_write_region_4(hba->bar0t, hba->bar0h, req32, 744 (u_int32_t *)config, 745 sizeof(struct hpt_iop_request_set_config) >> 2); 746 747 if (hptiop_send_sync_request_itl(hba, req32, 20000)) { 748 KdPrint(("hptiop: set config send cmd failed")); 749 return -1; 750 } 751 752 BUS_SPACE_WRT4_ITL(outbound_queue, req32); 753 754 return 0; 755 } 756 757 static int hptiop_set_config_mv(struct hpt_iop_hba *hba, 758 struct hpt_iop_request_set_config *config) 759 { 760 struct hpt_iop_request_set_config *req; 761 762 if (!(req = hba->ctlcfg_ptr)) 763 return -1; 764 765 memcpy((u_int8_t *)req + sizeof(struct hpt_iop_request_header), 766 (u_int8_t *)config + sizeof(struct hpt_iop_request_header), 767 sizeof(struct hpt_iop_request_set_config) - 768 sizeof(struct hpt_iop_request_header)); 769 770 req->header.flags = 0; 771 req->header.type = IOP_REQUEST_TYPE_SET_CONFIG; 772 req->header.size = sizeof(struct hpt_iop_request_set_config); 773 req->header.result = IOP_RESULT_PENDING; 774 req->header.context = MVIOP_CMD_TYPE_SET_CONFIG; 775 776 if (hptiop_send_sync_request_mv(hba, req, 20000)) { 777 KdPrint(("hptiop: set config send cmd failed")); 778 return -1; 779 } 780 781 return 0; 782 } 783 784 static int hptiop_post_ioctl_command_itl(struct hpt_iop_hba *hba, 785 u_int32_t req32, 786 struct hpt_iop_ioctl_param *pParams) 787 { 788 u_int64_t temp64; 789 struct hpt_iop_request_ioctl_command req; 790 791 if ((((pParams->nInBufferSize + 3) & ~3) + pParams->nOutBufferSize) > 792 (hba->max_request_size - 793 offsetof(struct hpt_iop_request_ioctl_command, buf))) { 794 device_printf(hba->pcidev, "request size beyond max value"); 795 return -1; 796 } 797 798 req.header.size = offsetof(struct hpt_iop_request_ioctl_command, buf) 799 + pParams->nInBufferSize; 800 req.header.type = IOP_REQUEST_TYPE_IOCTL_COMMAND; 801 req.header.flags = IOP_REQUEST_FLAG_SYNC_REQUEST; 802 req.header.result = IOP_RESULT_PENDING; 803 req.header.context = req32 + (u_int64_t)(unsigned long)hba->u.itl.mu; 804 req.ioctl_code = HPT_CTL_CODE_BSD_TO_IOP(pParams->dwIoControlCode); 805 req.inbuf_size = pParams->nInBufferSize; 806 req.outbuf_size = pParams->nOutBufferSize; 807 req.bytes_returned = 0; 808 809 bus_space_write_region_4(hba->bar0t, hba->bar0h, req32, (u_int32_t *)&req, 810 offsetof(struct hpt_iop_request_ioctl_command, buf)>>2); 811 812 hptiop_lock_adapter(hba); 813 814 BUS_SPACE_WRT4_ITL(inbound_queue, req32); 815 BUS_SPACE_RD4_ITL(outbound_intstatus); 816 817 bus_space_read_region_4(hba->bar0t, hba->bar0h, req32 + 818 offsetof(struct hpt_iop_request_ioctl_command, header.context), 819 (u_int32_t *)&temp64, 2); 820 while (temp64) { 821 if (hptiop_sleep(hba, (void *)((unsigned long)hba->u.itl.mu + req32), 822 0, "hptctl", HPT_OSM_TIMEOUT)==0) 823 break; 824 hptiop_send_sync_msg(hba, IOPMU_INBOUND_MSG0_RESET, 60000); 825 bus_space_read_region_4(hba->bar0t, hba->bar0h,req32 + 826 offsetof(struct hpt_iop_request_ioctl_command, 827 header.context), 828 (u_int32_t *)&temp64, 2); 829 } 830 831 hptiop_unlock_adapter(hba); 832 return 0; 833 } 834 835 static int hptiop_bus_space_copyin(struct hpt_iop_hba *hba, u_int32_t bus, void *user, int size) 836 { 837 unsigned char byte; 838 int i; 839 840 for (i=0; i<size; i++) { 841 if (copyin((u_int8_t *)user + i, &byte, 1)) 842 return -1; 843 bus_space_write_1(hba->bar0t, hba->bar0h, bus + i, byte); 844 } 845 846 return 0; 847 } 848 849 static int hptiop_bus_space_copyout(struct hpt_iop_hba *hba, u_int32_t bus, void *user, int size) 850 { 851 unsigned char byte; 852 int i; 853 854 for (i=0; i<size; i++) { 855 byte = bus_space_read_1(hba->bar0t, hba->bar0h, bus + i); 856 if (copyout(&byte, (u_int8_t *)user + i, 1)) 857 return -1; 858 } 859 860 return 0; 861 } 862 863 static int hptiop_do_ioctl_itl(struct hpt_iop_hba *hba, 864 struct hpt_iop_ioctl_param * pParams) 865 { 866 u_int32_t req32; 867 u_int32_t result; 868 869 if ((pParams->Magic != HPT_IOCTL_MAGIC) && 870 (pParams->Magic != HPT_IOCTL_MAGIC32)) 871 return EFAULT; 872 873 req32 = BUS_SPACE_RD4_ITL(inbound_queue); 874 if (req32 == IOPMU_QUEUE_EMPTY) 875 return EFAULT; 876 877 if (pParams->nInBufferSize) 878 if (hptiop_bus_space_copyin(hba, req32 + 879 offsetof(struct hpt_iop_request_ioctl_command, buf), 880 (void *)pParams->lpInBuffer, pParams->nInBufferSize)) 881 goto invalid; 882 883 if (hptiop_post_ioctl_command_itl(hba, req32, pParams)) 884 goto invalid; 885 886 result = bus_space_read_4(hba->bar0t, hba->bar0h, req32 + 887 offsetof(struct hpt_iop_request_ioctl_command, 888 header.result)); 889 890 if (result == IOP_RESULT_SUCCESS) { 891 if (pParams->nOutBufferSize) 892 if (hptiop_bus_space_copyout(hba, req32 + 893 offsetof(struct hpt_iop_request_ioctl_command, buf) + 894 ((pParams->nInBufferSize + 3) & ~3), 895 (void *)pParams->lpOutBuffer, pParams->nOutBufferSize)) 896 goto invalid; 897 898 if (pParams->lpBytesReturned) { 899 if (hptiop_bus_space_copyout(hba, req32 + 900 offsetof(struct hpt_iop_request_ioctl_command, bytes_returned), 901 (void *)pParams->lpBytesReturned, sizeof(unsigned long))) 902 goto invalid; 903 } 904 905 BUS_SPACE_WRT4_ITL(outbound_queue, req32); 906 907 return 0; 908 } else{ 909 invalid: 910 BUS_SPACE_WRT4_ITL(outbound_queue, req32); 911 912 return EFAULT; 913 } 914 } 915 916 static int hptiop_post_ioctl_command_mv(struct hpt_iop_hba *hba, 917 struct hpt_iop_request_ioctl_command *req, 918 struct hpt_iop_ioctl_param *pParams) 919 { 920 u_int64_t req_phy; 921 int size = 0; 922 923 if ((((pParams->nInBufferSize + 3) & ~3) + pParams->nOutBufferSize) > 924 (hba->max_request_size - 925 offsetof(struct hpt_iop_request_ioctl_command, buf))) { 926 device_printf(hba->pcidev, "request size beyond max value"); 927 return -1; 928 } 929 930 req->ioctl_code = HPT_CTL_CODE_BSD_TO_IOP(pParams->dwIoControlCode); 931 req->inbuf_size = pParams->nInBufferSize; 932 req->outbuf_size = pParams->nOutBufferSize; 933 req->header.size = offsetof(struct hpt_iop_request_ioctl_command, buf) 934 + pParams->nInBufferSize; 935 req->header.context = (u_int64_t)MVIOP_CMD_TYPE_IOCTL; 936 req->header.type = IOP_REQUEST_TYPE_IOCTL_COMMAND; 937 req->header.result = IOP_RESULT_PENDING; 938 req->header.flags = IOP_REQUEST_FLAG_OUTPUT_CONTEXT; 939 size = req->header.size >> 8; 940 size = size > 3 ? 3 : size; 941 req_phy = hba->ctlcfgcmd_phy | MVIOP_MU_QUEUE_ADDR_HOST_BIT | size; 942 hptiop_mv_inbound_write(req_phy, hba); 943 944 BUS_SPACE_RD4_MV0(outbound_intmask); 945 946 while (hba->config_done == 0) { 947 if (hptiop_sleep(hba, req, 0, 948 "hptctl", HPT_OSM_TIMEOUT)==0) 949 continue; 950 hptiop_send_sync_msg(hba, IOPMU_INBOUND_MSG0_RESET, 60000); 951 } 952 return 0; 953 } 954 955 static int hptiop_do_ioctl_mv(struct hpt_iop_hba *hba, 956 struct hpt_iop_ioctl_param *pParams) 957 { 958 struct hpt_iop_request_ioctl_command *req; 959 960 if ((pParams->Magic != HPT_IOCTL_MAGIC) && 961 (pParams->Magic != HPT_IOCTL_MAGIC32)) 962 return EFAULT; 963 964 req = (struct hpt_iop_request_ioctl_command *)(hba->ctlcfg_ptr); 965 hba->config_done = 0; 966 hptiop_lock_adapter(hba); 967 if (pParams->nInBufferSize) 968 if (copyin((void *)pParams->lpInBuffer, 969 req->buf, pParams->nInBufferSize)) 970 goto invalid; 971 if (hptiop_post_ioctl_command_mv(hba, req, pParams)) 972 goto invalid; 973 974 if (hba->config_done == 1) { 975 if (pParams->nOutBufferSize) 976 if (copyout(req->buf + 977 ((pParams->nInBufferSize + 3) & ~3), 978 (void *)pParams->lpOutBuffer, 979 pParams->nOutBufferSize)) 980 goto invalid; 981 982 if (pParams->lpBytesReturned) 983 if (copyout(&req->bytes_returned, 984 (void*)pParams->lpBytesReturned, 985 sizeof(u_int32_t))) 986 goto invalid; 987 hptiop_unlock_adapter(hba); 988 return 0; 989 } else{ 990 invalid: 991 hptiop_unlock_adapter(hba); 992 return EFAULT; 993 } 994 } 995 996 static int hptiop_rescan_bus(struct hpt_iop_hba * hba) 997 { 998 union ccb *ccb; 999 1000 if ((ccb = xpt_alloc_ccb()) == NULL) 1001 return(ENOMEM); 1002 if (xpt_create_path(&ccb->ccb_h.path, xpt_periph, cam_sim_path(hba->sim), 1003 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1004 xpt_free_ccb(ccb); 1005 return(EIO); 1006 } 1007 1008 xpt_setup_ccb(&ccb->ccb_h, ccb->ccb_h.path, 5/*priority (low)*/); 1009 ccb->ccb_h.func_code = XPT_SCAN_BUS; 1010 ccb->ccb_h.cbfcnp = hptiop_bus_scan_cb; 1011 ccb->crcn.flags = CAM_FLAG_NONE; 1012 xpt_action(ccb); 1013 return(0); 1014 } 1015 1016 static void hptiop_bus_scan_cb(struct cam_periph *periph, union ccb *ccb) 1017 { 1018 xpt_free_path(ccb->ccb_h.path); 1019 kfree(ccb, M_TEMP); 1020 } 1021 1022 static bus_dmamap_callback_t hptiop_map_srb; 1023 static bus_dmamap_callback_t hptiop_post_scsi_command; 1024 static bus_dmamap_callback_t hptiop_mv_map_ctlcfg; 1025 1026 static int hptiop_alloc_pci_res_itl(struct hpt_iop_hba *hba) 1027 { 1028 hba->bar0_rid = 0x10; 1029 hba->bar0_res = bus_alloc_resource_any(hba->pcidev, 1030 SYS_RES_MEMORY, &hba->bar0_rid, RF_ACTIVE); 1031 1032 if (hba->bar0_res == NULL) { 1033 device_printf(hba->pcidev, 1034 "failed to get iop base adrress.\n"); 1035 return -1; 1036 } 1037 hba->bar0t = rman_get_bustag(hba->bar0_res); 1038 hba->bar0h = rman_get_bushandle(hba->bar0_res); 1039 hba->u.itl.mu = (struct hpt_iopmu_itl *) 1040 rman_get_virtual(hba->bar0_res); 1041 1042 if (!hba->u.itl.mu) { 1043 bus_release_resource(hba->pcidev, SYS_RES_MEMORY, 1044 hba->bar0_rid, hba->bar0_res); 1045 device_printf(hba->pcidev, "alloc mem res failed\n"); 1046 return -1; 1047 } 1048 1049 return 0; 1050 } 1051 1052 static int hptiop_alloc_pci_res_mv(struct hpt_iop_hba *hba) 1053 { 1054 hba->bar0_rid = 0x10; 1055 hba->bar0_res = bus_alloc_resource_any(hba->pcidev, 1056 SYS_RES_MEMORY, &hba->bar0_rid, RF_ACTIVE); 1057 1058 if (hba->bar0_res == NULL) { 1059 device_printf(hba->pcidev, "failed to get iop bar0.\n"); 1060 return -1; 1061 } 1062 hba->bar0t = rman_get_bustag(hba->bar0_res); 1063 hba->bar0h = rman_get_bushandle(hba->bar0_res); 1064 hba->u.mv.regs = (struct hpt_iopmv_regs *) 1065 rman_get_virtual(hba->bar0_res); 1066 1067 if (!hba->u.mv.regs) { 1068 bus_release_resource(hba->pcidev, SYS_RES_MEMORY, 1069 hba->bar0_rid, hba->bar0_res); 1070 device_printf(hba->pcidev, "alloc bar0 mem res failed\n"); 1071 return -1; 1072 } 1073 1074 hba->bar2_rid = 0x18; 1075 hba->bar2_res = bus_alloc_resource_any(hba->pcidev, 1076 SYS_RES_MEMORY, &hba->bar2_rid, RF_ACTIVE); 1077 1078 if (hba->bar2_res == NULL) { 1079 bus_release_resource(hba->pcidev, SYS_RES_MEMORY, 1080 hba->bar0_rid, hba->bar0_res); 1081 device_printf(hba->pcidev, "failed to get iop bar2.\n"); 1082 return -1; 1083 } 1084 1085 hba->bar2t = rman_get_bustag(hba->bar2_res); 1086 hba->bar2h = rman_get_bushandle(hba->bar2_res); 1087 hba->u.mv.mu = (struct hpt_iopmu_mv *)rman_get_virtual(hba->bar2_res); 1088 1089 if (!hba->u.mv.mu) { 1090 bus_release_resource(hba->pcidev, SYS_RES_MEMORY, 1091 hba->bar0_rid, hba->bar0_res); 1092 bus_release_resource(hba->pcidev, SYS_RES_MEMORY, 1093 hba->bar2_rid, hba->bar2_res); 1094 device_printf(hba->pcidev, "alloc mem bar2 res failed\n"); 1095 return -1; 1096 } 1097 1098 return 0; 1099 } 1100 1101 static void hptiop_release_pci_res_itl(struct hpt_iop_hba *hba) 1102 { 1103 if (hba->bar0_res) 1104 bus_release_resource(hba->pcidev, SYS_RES_MEMORY, 1105 hba->bar0_rid, hba->bar0_res); 1106 } 1107 1108 static void hptiop_release_pci_res_mv(struct hpt_iop_hba *hba) 1109 { 1110 if (hba->bar0_res) 1111 bus_release_resource(hba->pcidev, SYS_RES_MEMORY, 1112 hba->bar0_rid, hba->bar0_res); 1113 if (hba->bar2_res) 1114 bus_release_resource(hba->pcidev, SYS_RES_MEMORY, 1115 hba->bar2_rid, hba->bar2_res); 1116 } 1117 1118 static int hptiop_internal_memalloc_mv(struct hpt_iop_hba *hba) 1119 { 1120 if (bus_dma_tag_create(hba->parent_dmat, 1121 1, 1122 0, 1123 BUS_SPACE_MAXADDR_32BIT, 1124 BUS_SPACE_MAXADDR, 1125 NULL, NULL, 1126 0x800 - 0x8, 1127 1, 1128 BUS_SPACE_MAXSIZE_32BIT, 1129 BUS_DMA_ALLOCNOW, 1130 &hba->ctlcfg_dmat)) { 1131 device_printf(hba->pcidev, "alloc ctlcfg_dmat failed\n"); 1132 return -1; 1133 } 1134 1135 if (bus_dmamem_alloc(hba->ctlcfg_dmat, (void **)&hba->ctlcfg_ptr, 1136 BUS_DMA_WAITOK | BUS_DMA_COHERENT, 1137 &hba->ctlcfg_dmamap) != 0) { 1138 device_printf(hba->pcidev, 1139 "bus_dmamem_alloc failed!\n"); 1140 bus_dma_tag_destroy(hba->ctlcfg_dmat); 1141 return -1; 1142 } 1143 1144 if (bus_dmamap_load(hba->ctlcfg_dmat, 1145 hba->ctlcfg_dmamap, hba->ctlcfg_ptr, 1146 MVIOP_IOCTLCFG_SIZE, 1147 hptiop_mv_map_ctlcfg, hba, 0)) { 1148 device_printf(hba->pcidev, "bus_dmamap_load failed!\n"); 1149 if (hba->ctlcfg_dmat) 1150 bus_dmamem_free(hba->ctlcfg_dmat, 1151 hba->ctlcfg_ptr, hba->ctlcfg_dmamap); 1152 bus_dma_tag_destroy(hba->ctlcfg_dmat); 1153 return -1; 1154 } 1155 1156 return 0; 1157 } 1158 1159 static int hptiop_internal_memfree_mv(struct hpt_iop_hba *hba) 1160 { 1161 if (hba->ctlcfg_dmat) { 1162 bus_dmamap_unload(hba->ctlcfg_dmat, hba->ctlcfg_dmamap); 1163 bus_dmamem_free(hba->ctlcfg_dmat, 1164 hba->ctlcfg_ptr, hba->ctlcfg_dmamap); 1165 bus_dma_tag_destroy(hba->ctlcfg_dmat); 1166 } 1167 1168 return 0; 1169 } 1170 1171 /* 1172 * CAM driver interface 1173 */ 1174 static device_method_t driver_methods[] = { 1175 /* Device interface */ 1176 DEVMETHOD(device_probe, hptiop_probe), 1177 DEVMETHOD(device_attach, hptiop_attach), 1178 DEVMETHOD(device_detach, hptiop_detach), 1179 DEVMETHOD(device_shutdown, hptiop_shutdown), 1180 { 0, 0 } 1181 }; 1182 1183 static struct hptiop_adapter_ops hptiop_itl_ops = { 1184 .iop_wait_ready = hptiop_wait_ready_itl, 1185 .internal_memalloc = 0, 1186 .internal_memfree = 0, 1187 .alloc_pci_res = hptiop_alloc_pci_res_itl, 1188 .release_pci_res = hptiop_release_pci_res_itl, 1189 .enable_intr = hptiop_enable_intr_itl, 1190 .disable_intr = hptiop_disable_intr_itl, 1191 .get_config = hptiop_get_config_itl, 1192 .set_config = hptiop_set_config_itl, 1193 .iop_intr = hptiop_intr_itl, 1194 .post_msg = hptiop_post_msg_itl, 1195 .post_req = hptiop_post_req_itl, 1196 .do_ioctl = hptiop_do_ioctl_itl, 1197 }; 1198 1199 static struct hptiop_adapter_ops hptiop_mv_ops = { 1200 .iop_wait_ready = hptiop_wait_ready_mv, 1201 .internal_memalloc = hptiop_internal_memalloc_mv, 1202 .internal_memfree = hptiop_internal_memfree_mv, 1203 .alloc_pci_res = hptiop_alloc_pci_res_mv, 1204 .release_pci_res = hptiop_release_pci_res_mv, 1205 .enable_intr = hptiop_enable_intr_mv, 1206 .disable_intr = hptiop_disable_intr_mv, 1207 .get_config = hptiop_get_config_mv, 1208 .set_config = hptiop_set_config_mv, 1209 .iop_intr = hptiop_intr_mv, 1210 .post_msg = hptiop_post_msg_mv, 1211 .post_req = hptiop_post_req_mv, 1212 .do_ioctl = hptiop_do_ioctl_mv, 1213 }; 1214 1215 static driver_t hptiop_pci_driver = { 1216 driver_name, 1217 driver_methods, 1218 sizeof(struct hpt_iop_hba) 1219 }; 1220 1221 DRIVER_MODULE(hptiop, pci, hptiop_pci_driver, hptiop_devclass, NULL, NULL); 1222 1223 static int hptiop_probe(device_t dev) 1224 { 1225 struct hpt_iop_hba *hba; 1226 u_int32_t id; 1227 static char buf[256]; 1228 int sas = 0; 1229 struct hptiop_adapter_ops *ops; 1230 1231 if (pci_get_vendor(dev) != 0x1103) 1232 return (ENXIO); 1233 1234 id = pci_get_device(dev); 1235 1236 switch (id) { 1237 case 0x4322: 1238 case 0x4321: 1239 case 0x4320: 1240 sas = 1; 1241 case 0x3220: 1242 case 0x3320: 1243 case 0x3410: 1244 case 0x3520: 1245 case 0x3510: 1246 case 0x3511: 1247 case 0x3521: 1248 case 0x3522: 1249 case 0x3540: 1250 ops = &hptiop_itl_ops; 1251 break; 1252 case 0x3120: 1253 case 0x3122: 1254 case 0x3020: 1255 ops = &hptiop_mv_ops; 1256 break; 1257 default: 1258 return (ENXIO); 1259 } 1260 1261 device_printf(dev, "adapter at PCI %d:%d:%d, IRQ %d\n", 1262 pci_get_bus(dev), pci_get_slot(dev), 1263 pci_get_function(dev), pci_get_irq(dev)); 1264 1265 ksprintf(buf, "RocketRAID %x %s Controller", 1266 id, sas ? "SAS" : "SATA"); 1267 device_set_desc_copy(dev, buf); 1268 1269 hba = (struct hpt_iop_hba *)device_get_softc(dev); 1270 bzero(hba, sizeof(struct hpt_iop_hba)); 1271 hba->ops = ops; 1272 1273 KdPrint(("hba->ops=%p\n", hba->ops)); 1274 return 0; 1275 } 1276 1277 static int hptiop_attach(device_t dev) 1278 { 1279 struct hpt_iop_hba *hba = (struct hpt_iop_hba *)device_get_softc(dev); 1280 struct hpt_iop_request_get_config iop_config; 1281 struct hpt_iop_request_set_config set_config; 1282 int rid = 0; 1283 struct cam_devq *devq; 1284 struct ccb_setasync ccb; 1285 u_int32_t unit = device_get_unit(dev); 1286 1287 device_printf(dev, "%d RocketRAID 3xxx/4xxx controller driver %s\n", 1288 unit, driver_version); 1289 1290 KdPrint(("hptiop: attach(%d, %d/%d/%d) ops=%p\n", unit, 1291 pci_get_bus(dev), pci_get_slot(dev), 1292 pci_get_function(dev), hba->ops)); 1293 1294 pci_enable_busmaster(dev); 1295 hba->pcidev = dev; 1296 hba->pciunit = unit; 1297 1298 if (hba->ops->alloc_pci_res(hba)) 1299 return ENXIO; 1300 1301 if (hba->ops->iop_wait_ready(hba, 2000)) { 1302 device_printf(dev, "adapter is not ready\n"); 1303 goto release_pci_res; 1304 } 1305 1306 lockinit(&hba->lock, "hptioplock", 0, LK_CANRECURSE); 1307 1308 if (bus_dma_tag_create(NULL,/* parent */ 1309 1, /* alignment */ 1310 0, /* boundary */ 1311 BUS_SPACE_MAXADDR, /* lowaddr */ 1312 BUS_SPACE_MAXADDR, /* highaddr */ 1313 NULL, NULL, /* filter, filterarg */ 1314 BUS_SPACE_MAXSIZE_32BIT, /* maxsize */ 1315 BUS_SPACE_UNRESTRICTED, /* nsegments */ 1316 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 1317 0, /* flags */ 1318 &hba->parent_dmat /* tag */)) 1319 { 1320 device_printf(dev, "alloc parent_dmat failed\n"); 1321 goto release_pci_res; 1322 } 1323 1324 if (hba->ops->internal_memalloc) { 1325 if (hba->ops->internal_memalloc(hba)) { 1326 device_printf(dev, "alloc srb_dmat failed\n"); 1327 goto destroy_parent_tag; 1328 } 1329 } 1330 1331 if (hba->ops->get_config(hba, &iop_config)) { 1332 device_printf(dev, "get iop config failed.\n"); 1333 goto get_config_failed; 1334 } 1335 1336 hba->firmware_version = iop_config.firmware_version; 1337 hba->interface_version = iop_config.interface_version; 1338 hba->max_requests = iop_config.max_requests; 1339 hba->max_devices = iop_config.max_devices; 1340 hba->max_request_size = iop_config.request_size; 1341 hba->max_sg_count = iop_config.max_sg_count; 1342 1343 if (bus_dma_tag_create(hba->parent_dmat,/* parent */ 1344 4, /* alignment */ 1345 BUS_SPACE_MAXADDR_32BIT+1, /* boundary */ 1346 BUS_SPACE_MAXADDR, /* lowaddr */ 1347 BUS_SPACE_MAXADDR, /* highaddr */ 1348 NULL, NULL, /* filter, filterarg */ 1349 PAGE_SIZE * (hba->max_sg_count-1), /* maxsize */ 1350 hba->max_sg_count, /* nsegments */ 1351 0x20000, /* maxsegsize */ 1352 BUS_DMA_ALLOCNOW, /* flags */ 1353 &hba->io_dmat /* tag */)) 1354 { 1355 device_printf(dev, "alloc io_dmat failed\n"); 1356 goto get_config_failed; 1357 } 1358 1359 if (bus_dma_tag_create(hba->parent_dmat,/* parent */ 1360 1, /* alignment */ 1361 0, /* boundary */ 1362 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 1363 BUS_SPACE_MAXADDR, /* highaddr */ 1364 NULL, NULL, /* filter, filterarg */ 1365 HPT_SRB_MAX_SIZE * HPT_SRB_MAX_QUEUE_SIZE + 0x20, 1366 1, /* nsegments */ 1367 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 1368 0, /* flags */ 1369 &hba->srb_dmat /* tag */)) 1370 { 1371 device_printf(dev, "alloc srb_dmat failed\n"); 1372 goto destroy_io_dmat; 1373 } 1374 1375 if (bus_dmamem_alloc(hba->srb_dmat, (void **)&hba->uncached_ptr, 1376 BUS_DMA_WAITOK | BUS_DMA_COHERENT, 1377 &hba->srb_dmamap) != 0) 1378 { 1379 device_printf(dev, "srb bus_dmamem_alloc failed!\n"); 1380 goto destroy_srb_dmat; 1381 } 1382 1383 if (bus_dmamap_load(hba->srb_dmat, 1384 hba->srb_dmamap, hba->uncached_ptr, 1385 (HPT_SRB_MAX_SIZE * HPT_SRB_MAX_QUEUE_SIZE) + 0x20, 1386 hptiop_map_srb, hba, 0)) 1387 { 1388 device_printf(dev, "bus_dmamap_load failed!\n"); 1389 goto srb_dmamem_free; 1390 } 1391 1392 if ((devq = cam_simq_alloc(hba->max_requests - 1 )) == NULL) { 1393 device_printf(dev, "cam_simq_alloc failed\n"); 1394 goto srb_dmamap_unload; 1395 } 1396 1397 hba->sim = cam_sim_alloc(hptiop_action, hptiop_poll, driver_name, 1398 hba, unit, &sim_mplock, hba->max_requests - 1, 1, devq); 1399 if (!hba->sim) { 1400 device_printf(dev, "cam_sim_alloc failed\n"); 1401 cam_simq_release(devq); 1402 goto srb_dmamap_unload; 1403 } 1404 if (xpt_bus_register(hba->sim, 0) != CAM_SUCCESS) 1405 { 1406 device_printf(dev, "xpt_bus_register failed\n"); 1407 goto free_cam_sim; 1408 } 1409 1410 if (xpt_create_path(&hba->path, /*periph */ NULL, 1411 cam_sim_path(hba->sim), CAM_TARGET_WILDCARD, 1412 CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1413 device_printf(dev, "xpt_create_path failed\n"); 1414 goto deregister_xpt_bus; 1415 } 1416 1417 bzero(&set_config, sizeof(set_config)); 1418 set_config.iop_id = unit; 1419 set_config.vbus_id = cam_sim_path(hba->sim); 1420 set_config.max_host_request_size = HPT_SRB_MAX_REQ_SIZE; 1421 1422 if (hba->ops->set_config(hba, &set_config)) { 1423 device_printf(dev, "set iop config failed.\n"); 1424 goto free_hba_path; 1425 } 1426 1427 xpt_setup_ccb(&ccb.ccb_h, hba->path, /*priority*/5); 1428 ccb.ccb_h.func_code = XPT_SASYNC_CB; 1429 ccb.event_enable = (AC_FOUND_DEVICE | AC_LOST_DEVICE); 1430 ccb.callback = hptiop_async; 1431 ccb.callback_arg = hba->sim; 1432 xpt_action((union ccb *)&ccb); 1433 1434 rid = 0; 1435 if ((hba->irq_res = bus_alloc_resource(hba->pcidev, SYS_RES_IRQ, 1436 &rid, 0, ~0ul, 1, RF_SHAREABLE | RF_ACTIVE)) == NULL) { 1437 device_printf(dev, "allocate irq failed!\n"); 1438 goto free_hba_path; 1439 } 1440 1441 if (bus_setup_intr(hba->pcidev, hba->irq_res, 0, 1442 hptiop_pci_intr, hba, &hba->irq_handle, NULL)) 1443 { 1444 device_printf(dev, "allocate intr function failed!\n"); 1445 goto free_irq_resource; 1446 } 1447 1448 if (hptiop_send_sync_msg(hba, 1449 IOPMU_INBOUND_MSG0_START_BACKGROUND_TASK, 5000)) { 1450 device_printf(dev, "fail to start background task\n"); 1451 goto teartown_irq_resource; 1452 } 1453 1454 hba->ops->enable_intr(hba); 1455 1456 hba->ioctl_dev = make_dev(&hptiop_ops, unit, 1457 UID_ROOT, GID_WHEEL /*GID_OPERATOR*/, 1458 S_IRUSR | S_IWUSR, "%s%d", driver_name, unit); 1459 1460 hba->ioctl_dev->si_drv1 = hba; 1461 1462 hptiop_rescan_bus(hba); 1463 1464 return 0; 1465 1466 1467 teartown_irq_resource: 1468 bus_teardown_intr(dev, hba->irq_res, hba->irq_handle); 1469 1470 free_irq_resource: 1471 bus_release_resource(dev, SYS_RES_IRQ, 0, hba->irq_res); 1472 1473 free_hba_path: 1474 xpt_free_path(hba->path); 1475 1476 deregister_xpt_bus: 1477 xpt_bus_deregister(cam_sim_path(hba->sim)); 1478 1479 free_cam_sim: 1480 cam_sim_free(hba->sim); 1481 1482 srb_dmamap_unload: 1483 if (hba->uncached_ptr) 1484 bus_dmamap_unload(hba->srb_dmat, hba->srb_dmamap); 1485 1486 srb_dmamem_free: 1487 if (hba->uncached_ptr) 1488 bus_dmamem_free(hba->srb_dmat, 1489 hba->uncached_ptr, hba->srb_dmamap); 1490 1491 destroy_srb_dmat: 1492 if (hba->srb_dmat) 1493 bus_dma_tag_destroy(hba->srb_dmat); 1494 1495 destroy_io_dmat: 1496 if (hba->io_dmat) 1497 bus_dma_tag_destroy(hba->io_dmat); 1498 1499 get_config_failed: 1500 if (hba->ops->internal_memfree) 1501 hba->ops->internal_memfree(hba); 1502 1503 destroy_parent_tag: 1504 if (hba->parent_dmat) 1505 bus_dma_tag_destroy(hba->parent_dmat); 1506 1507 release_pci_res: 1508 if (hba->ops->release_pci_res) 1509 hba->ops->release_pci_res(hba); 1510 1511 return ENXIO; 1512 } 1513 1514 static int hptiop_detach(device_t dev) 1515 { 1516 struct hpt_iop_hba * hba = (struct hpt_iop_hba *)device_get_softc(dev); 1517 int i; 1518 int error = EBUSY; 1519 1520 hptiop_lock_adapter(hba); 1521 for (i = 0; i < hba->max_devices; i++) 1522 if (hptiop_os_query_remove_device(hba, i)) { 1523 device_printf(dev, "%d file system is busy. id=%d", 1524 hba->pciunit, i); 1525 goto out; 1526 } 1527 1528 if ((error = hptiop_shutdown(dev)) != 0) 1529 goto out; 1530 if (hptiop_send_sync_msg(hba, 1531 IOPMU_INBOUND_MSG0_STOP_BACKGROUND_TASK, 60000)) 1532 goto out; 1533 1534 hptiop_release_resource(hba); 1535 error = 0; 1536 out: 1537 hptiop_unlock_adapter(hba); 1538 return error; 1539 } 1540 1541 static int hptiop_shutdown(device_t dev) 1542 { 1543 struct hpt_iop_hba * hba = (struct hpt_iop_hba *)device_get_softc(dev); 1544 1545 int error = 0; 1546 1547 if (hba->flag & HPT_IOCTL_FLAG_OPEN) { 1548 device_printf(dev, "%d device is busy", hba->pciunit); 1549 return EBUSY; 1550 } 1551 1552 hba->ops->disable_intr(hba); 1553 1554 if (hptiop_send_sync_msg(hba, IOPMU_INBOUND_MSG0_SHUTDOWN, 60000)) 1555 error = EBUSY; 1556 1557 return error; 1558 } 1559 1560 static void hptiop_pci_intr(void *arg) 1561 { 1562 struct hpt_iop_hba * hba = (struct hpt_iop_hba *)arg; 1563 hptiop_lock_adapter(hba); 1564 hba->ops->iop_intr(hba); 1565 hptiop_unlock_adapter(hba); 1566 } 1567 1568 static void hptiop_poll(struct cam_sim *sim) 1569 { 1570 hptiop_pci_intr(cam_sim_softc(sim)); 1571 } 1572 1573 static void hptiop_async(void * callback_arg, u_int32_t code, 1574 struct cam_path * path, void * arg) 1575 { 1576 } 1577 1578 static void hptiop_enable_intr_itl(struct hpt_iop_hba *hba) 1579 { 1580 BUS_SPACE_WRT4_ITL(outbound_intmask, 1581 ~(IOPMU_OUTBOUND_INT_POSTQUEUE | IOPMU_OUTBOUND_INT_MSG0)); 1582 } 1583 1584 static void hptiop_enable_intr_mv(struct hpt_iop_hba *hba) 1585 { 1586 u_int32_t int_mask; 1587 1588 int_mask = BUS_SPACE_RD4_MV0(outbound_intmask); 1589 1590 int_mask |= MVIOP_MU_OUTBOUND_INT_POSTQUEUE 1591 | MVIOP_MU_OUTBOUND_INT_MSG; 1592 BUS_SPACE_WRT4_MV0(outbound_intmask,int_mask); 1593 } 1594 1595 static void hptiop_disable_intr_itl(struct hpt_iop_hba *hba) 1596 { 1597 u_int32_t int_mask; 1598 1599 int_mask = BUS_SPACE_RD4_ITL(outbound_intmask); 1600 1601 int_mask |= IOPMU_OUTBOUND_INT_POSTQUEUE | IOPMU_OUTBOUND_INT_MSG0; 1602 BUS_SPACE_WRT4_ITL(outbound_intmask, int_mask); 1603 BUS_SPACE_RD4_ITL(outbound_intstatus); 1604 } 1605 1606 static void hptiop_disable_intr_mv(struct hpt_iop_hba *hba) 1607 { 1608 u_int32_t int_mask; 1609 int_mask = BUS_SPACE_RD4_MV0(outbound_intmask); 1610 1611 int_mask &= ~(MVIOP_MU_OUTBOUND_INT_MSG 1612 | MVIOP_MU_OUTBOUND_INT_POSTQUEUE); 1613 BUS_SPACE_WRT4_MV0(outbound_intmask,int_mask); 1614 BUS_SPACE_RD4_MV0(outbound_intmask); 1615 } 1616 1617 static int hptiop_reset_adapter(struct hpt_iop_hba * hba) 1618 { 1619 return hptiop_send_sync_msg(hba, IOPMU_INBOUND_MSG0_RESET, 60000); 1620 } 1621 1622 static void *hptiop_get_srb(struct hpt_iop_hba * hba) 1623 { 1624 struct hpt_iop_srb * srb; 1625 1626 if (hba->srb_list) { 1627 srb = hba->srb_list; 1628 hba->srb_list = srb->next; 1629 return srb; 1630 } 1631 1632 return NULL; 1633 } 1634 1635 static void hptiop_free_srb(struct hpt_iop_hba *hba, struct hpt_iop_srb *srb) 1636 { 1637 srb->next = hba->srb_list; 1638 hba->srb_list = srb; 1639 } 1640 1641 static void hptiop_action(struct cam_sim *sim, union ccb *ccb) 1642 { 1643 struct hpt_iop_hba * hba = (struct hpt_iop_hba *)cam_sim_softc(sim); 1644 struct hpt_iop_srb * srb; 1645 1646 switch (ccb->ccb_h.func_code) { 1647 1648 case XPT_SCSI_IO: 1649 hptiop_lock_adapter(hba); 1650 if (ccb->ccb_h.target_lun != 0 || 1651 ccb->ccb_h.target_id >= hba->max_devices || 1652 (ccb->ccb_h.flags & CAM_CDB_PHYS)) 1653 { 1654 ccb->ccb_h.status = CAM_TID_INVALID; 1655 xpt_done(ccb); 1656 goto scsi_done; 1657 } 1658 1659 if ((srb = hptiop_get_srb(hba)) == NULL) { 1660 device_printf(hba->pcidev, "srb allocated failed"); 1661 ccb->ccb_h.status = CAM_REQ_CMP_ERR; 1662 xpt_done(ccb); 1663 goto scsi_done; 1664 } 1665 1666 srb->ccb = ccb; 1667 1668 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_NONE) 1669 hptiop_post_scsi_command(srb, NULL, 0, 0); 1670 else if ((ccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) { 1671 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) == 0) { 1672 int error; 1673 1674 error = bus_dmamap_load(hba->io_dmat, 1675 srb->dma_map, 1676 ccb->csio.data_ptr, 1677 ccb->csio.dxfer_len, 1678 hptiop_post_scsi_command, 1679 srb, 0); 1680 1681 if (error && error != EINPROGRESS) { 1682 device_printf(hba->pcidev, 1683 "%d bus_dmamap_load error %d", 1684 hba->pciunit, error); 1685 xpt_freeze_simq(hba->sim, 1); 1686 ccb->ccb_h.status = CAM_REQ_CMP_ERR; 1687 invalid: 1688 hptiop_free_srb(hba, srb); 1689 xpt_done(ccb); 1690 goto scsi_done; 1691 } 1692 } 1693 else { 1694 device_printf(hba->pcidev, 1695 "CAM_DATA_PHYS not supported"); 1696 ccb->ccb_h.status = CAM_REQ_CMP_ERR; 1697 goto invalid; 1698 } 1699 } 1700 else { 1701 struct bus_dma_segment *segs; 1702 1703 if ((ccb->ccb_h.flags & CAM_SG_LIST_PHYS) == 0 || 1704 (ccb->ccb_h.flags & CAM_DATA_PHYS) != 0) { 1705 device_printf(hba->pcidev, "SCSI cmd failed"); 1706 ccb->ccb_h.status=CAM_PROVIDE_FAIL; 1707 goto invalid; 1708 } 1709 1710 segs = (struct bus_dma_segment *)ccb->csio.data_ptr; 1711 hptiop_post_scsi_command(srb, segs, 1712 ccb->csio.sglist_cnt, 0); 1713 } 1714 1715 scsi_done: 1716 hptiop_unlock_adapter(hba); 1717 return; 1718 1719 case XPT_RESET_BUS: 1720 device_printf(hba->pcidev, "reset adapter"); 1721 hptiop_lock_adapter(hba); 1722 hba->msg_done = 0; 1723 hptiop_reset_adapter(hba); 1724 hptiop_unlock_adapter(hba); 1725 break; 1726 1727 case XPT_GET_TRAN_SETTINGS: 1728 case XPT_SET_TRAN_SETTINGS: 1729 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 1730 break; 1731 1732 case XPT_CALC_GEOMETRY: 1733 ccb->ccg.heads = 255; 1734 ccb->ccg.secs_per_track = 63; 1735 ccb->ccg.cylinders = ccb->ccg.volume_size / 1736 (ccb->ccg.heads * ccb->ccg.secs_per_track); 1737 ccb->ccb_h.status = CAM_REQ_CMP; 1738 break; 1739 1740 case XPT_PATH_INQ: 1741 { 1742 struct ccb_pathinq *cpi = &ccb->cpi; 1743 1744 cpi->version_num = 1; 1745 cpi->hba_inquiry = PI_SDTR_ABLE; 1746 cpi->target_sprt = 0; 1747 cpi->hba_misc = PIM_NOBUSRESET; 1748 cpi->hba_eng_cnt = 0; 1749 cpi->max_target = hba->max_devices; 1750 cpi->max_lun = 0; 1751 cpi->unit_number = cam_sim_unit(sim); 1752 cpi->bus_id = cam_sim_bus(sim); 1753 cpi->initiator_id = hba->max_devices; 1754 cpi->base_transfer_speed = 3300; 1755 1756 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1757 strncpy(cpi->hba_vid, "HPT ", HBA_IDLEN); 1758 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1759 cpi->transport = XPORT_SPI; 1760 cpi->transport_version = 2; 1761 cpi->protocol = PROTO_SCSI; 1762 cpi->protocol_version = SCSI_REV_2; 1763 cpi->ccb_h.status = CAM_REQ_CMP; 1764 break; 1765 } 1766 1767 default: 1768 ccb->ccb_h.status = CAM_REQ_INVALID; 1769 break; 1770 } 1771 1772 xpt_done(ccb); 1773 return; 1774 } 1775 1776 static void hptiop_post_req_itl(struct hpt_iop_hba *hba, 1777 struct hpt_iop_srb *srb, 1778 bus_dma_segment_t *segs, int nsegs) 1779 { 1780 int idx; 1781 union ccb *ccb = srb->ccb; 1782 u_int8_t *cdb; 1783 1784 if (ccb->ccb_h.flags & CAM_CDB_POINTER) 1785 cdb = ccb->csio.cdb_io.cdb_ptr; 1786 else 1787 cdb = ccb->csio.cdb_io.cdb_bytes; 1788 1789 KdPrint(("ccb=%p %x-%x-%x\n", 1790 ccb, *(u_int32_t *)cdb, *((u_int32_t *)cdb+1), *((u_int32_t *)cdb+2))); 1791 1792 if (srb->srb_flag & HPT_SRB_FLAG_HIGH_MEM_ACESS) { 1793 u_int32_t iop_req32; 1794 struct hpt_iop_request_scsi_command req; 1795 1796 iop_req32 = BUS_SPACE_RD4_ITL(inbound_queue); 1797 1798 if (iop_req32 == IOPMU_QUEUE_EMPTY) { 1799 device_printf(hba->pcidev, "invaild req offset\n"); 1800 ccb->ccb_h.status = CAM_BUSY; 1801 bus_dmamap_unload(hba->io_dmat, srb->dma_map); 1802 hptiop_free_srb(hba, srb); 1803 xpt_done(ccb); 1804 return; 1805 } 1806 1807 if (ccb->csio.dxfer_len && nsegs > 0) { 1808 struct hpt_iopsg *psg = req.sg_list; 1809 for (idx = 0; idx < nsegs; idx++, psg++) { 1810 psg->pci_address = (u_int64_t)segs[idx].ds_addr; 1811 psg->size = segs[idx].ds_len; 1812 psg->eot = 0; 1813 } 1814 psg[-1].eot = 1; 1815 } 1816 1817 bcopy(cdb, req.cdb, ccb->csio.cdb_len); 1818 1819 req.header.size = offsetof(struct hpt_iop_request_scsi_command, sg_list) 1820 + nsegs*sizeof(struct hpt_iopsg); 1821 req.header.type = IOP_REQUEST_TYPE_SCSI_COMMAND; 1822 req.header.flags = 0; 1823 req.header.result = IOP_RESULT_PENDING; 1824 req.header.context = (u_int64_t)(unsigned long)srb; 1825 req.dataxfer_length = ccb->csio.dxfer_len; 1826 req.channel = 0; 1827 req.target = ccb->ccb_h.target_id; 1828 req.lun = ccb->ccb_h.target_lun; 1829 1830 bus_space_write_region_1(hba->bar0t, hba->bar0h, iop_req32, 1831 (u_int8_t *)&req, req.header.size); 1832 1833 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 1834 bus_dmamap_sync(hba->io_dmat, 1835 srb->dma_map, BUS_DMASYNC_PREREAD); 1836 } 1837 else if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) 1838 bus_dmamap_sync(hba->io_dmat, 1839 srb->dma_map, BUS_DMASYNC_PREWRITE); 1840 1841 BUS_SPACE_WRT4_ITL(inbound_queue,iop_req32); 1842 } else { 1843 struct hpt_iop_request_scsi_command *req; 1844 1845 req = (struct hpt_iop_request_scsi_command *)srb; 1846 if (ccb->csio.dxfer_len && nsegs > 0) { 1847 struct hpt_iopsg *psg = req->sg_list; 1848 for (idx = 0; idx < nsegs; idx++, psg++) { 1849 psg->pci_address = 1850 (u_int64_t)segs[idx].ds_addr; 1851 psg->size = segs[idx].ds_len; 1852 psg->eot = 0; 1853 } 1854 psg[-1].eot = 1; 1855 } 1856 1857 bcopy(cdb, req->cdb, ccb->csio.cdb_len); 1858 1859 req->header.type = IOP_REQUEST_TYPE_SCSI_COMMAND; 1860 req->header.result = IOP_RESULT_PENDING; 1861 req->dataxfer_length = ccb->csio.dxfer_len; 1862 req->channel = 0; 1863 req->target = ccb->ccb_h.target_id; 1864 req->lun = ccb->ccb_h.target_lun; 1865 req->header.size = offsetof(struct hpt_iop_request_scsi_command, sg_list) 1866 + nsegs*sizeof(struct hpt_iopsg); 1867 req->header.context = (u_int64_t)srb->index | 1868 IOPMU_QUEUE_ADDR_HOST_BIT; 1869 req->header.flags = IOP_REQUEST_FLAG_OUTPUT_CONTEXT; 1870 1871 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 1872 bus_dmamap_sync(hba->io_dmat, 1873 srb->dma_map, BUS_DMASYNC_PREREAD); 1874 }else if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) { 1875 bus_dmamap_sync(hba->io_dmat, 1876 srb->dma_map, BUS_DMASYNC_PREWRITE); 1877 } 1878 1879 if (hba->firmware_version > 0x01020000 1880 || hba->interface_version > 0x01020000) { 1881 u_int32_t size_bits; 1882 1883 if (req->header.size < 256) 1884 size_bits = IOPMU_QUEUE_REQUEST_SIZE_BIT; 1885 else if (req->header.size < 512) 1886 size_bits = IOPMU_QUEUE_ADDR_HOST_BIT; 1887 else 1888 size_bits = IOPMU_QUEUE_REQUEST_SIZE_BIT 1889 | IOPMU_QUEUE_ADDR_HOST_BIT; 1890 1891 BUS_SPACE_WRT4_ITL(inbound_queue, 1892 (u_int32_t)srb->phy_addr | size_bits); 1893 } else 1894 BUS_SPACE_WRT4_ITL(inbound_queue, (u_int32_t)srb->phy_addr 1895 |IOPMU_QUEUE_ADDR_HOST_BIT); 1896 } 1897 } 1898 1899 static void hptiop_post_req_mv(struct hpt_iop_hba *hba, 1900 struct hpt_iop_srb *srb, 1901 bus_dma_segment_t *segs, int nsegs) 1902 { 1903 int idx, size; 1904 union ccb *ccb = srb->ccb; 1905 u_int8_t *cdb; 1906 struct hpt_iop_request_scsi_command *req; 1907 u_int64_t req_phy; 1908 1909 req = (struct hpt_iop_request_scsi_command *)srb; 1910 req_phy = srb->phy_addr; 1911 1912 if (ccb->csio.dxfer_len && nsegs > 0) { 1913 struct hpt_iopsg *psg = req->sg_list; 1914 for (idx = 0; idx < nsegs; idx++, psg++) { 1915 psg->pci_address = (u_int64_t)segs[idx].ds_addr; 1916 psg->size = segs[idx].ds_len; 1917 psg->eot = 0; 1918 } 1919 psg[-1].eot = 1; 1920 } 1921 if (ccb->ccb_h.flags & CAM_CDB_POINTER) 1922 cdb = ccb->csio.cdb_io.cdb_ptr; 1923 else 1924 cdb = ccb->csio.cdb_io.cdb_bytes; 1925 1926 bcopy(cdb, req->cdb, ccb->csio.cdb_len); 1927 req->header.type = IOP_REQUEST_TYPE_SCSI_COMMAND; 1928 req->header.result = IOP_RESULT_PENDING; 1929 req->dataxfer_length = ccb->csio.dxfer_len; 1930 req->channel = 0; 1931 req->target = ccb->ccb_h.target_id; 1932 req->lun = ccb->ccb_h.target_lun; 1933 req->header.size = sizeof(struct hpt_iop_request_scsi_command) 1934 - sizeof(struct hpt_iopsg) 1935 + nsegs * sizeof(struct hpt_iopsg); 1936 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 1937 bus_dmamap_sync(hba->io_dmat, 1938 srb->dma_map, BUS_DMASYNC_PREREAD); 1939 } 1940 else if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) 1941 bus_dmamap_sync(hba->io_dmat, 1942 srb->dma_map, BUS_DMASYNC_PREWRITE); 1943 req->header.context = (u_int64_t)srb->index 1944 << MVIOP_REQUEST_NUMBER_START_BIT 1945 | MVIOP_CMD_TYPE_SCSI; 1946 req->header.flags = IOP_REQUEST_FLAG_OUTPUT_CONTEXT; 1947 size = req->header.size >> 8; 1948 hptiop_mv_inbound_write(req_phy 1949 | MVIOP_MU_QUEUE_ADDR_HOST_BIT 1950 | (size > 3 ? 3 : size), hba); 1951 } 1952 1953 static void hptiop_post_scsi_command(void *arg, bus_dma_segment_t *segs, 1954 int nsegs, int error) 1955 { 1956 struct hpt_iop_srb *srb = (struct hpt_iop_srb *)arg; 1957 union ccb *ccb = srb->ccb; 1958 struct hpt_iop_hba *hba = srb->hba; 1959 1960 if (error || nsegs > hba->max_sg_count) { 1961 KdPrint(("hptiop: func_code=%x tid=%x lun=%x nsegs=%d\n", 1962 ccb->ccb_h.func_code, 1963 ccb->ccb_h.target_id, 1964 ccb->ccb_h.target_lun, nsegs)); 1965 ccb->ccb_h.status = CAM_BUSY; 1966 bus_dmamap_unload(hba->io_dmat, srb->dma_map); 1967 hptiop_free_srb(hba, srb); 1968 xpt_done(ccb); 1969 return; 1970 } 1971 1972 hba->ops->post_req(hba, srb, segs, nsegs); 1973 } 1974 1975 static void hptiop_mv_map_ctlcfg(void *arg, bus_dma_segment_t *segs, 1976 int nsegs, int error) 1977 { 1978 struct hpt_iop_hba *hba = (struct hpt_iop_hba *)arg; 1979 hba->ctlcfgcmd_phy = ((u_int64_t)segs->ds_addr + 0x1F) 1980 & ~(u_int64_t)0x1F; 1981 hba->ctlcfg_ptr = (u_int8_t *)(((unsigned long)hba->ctlcfg_ptr + 0x1F) 1982 & ~0x1F); 1983 } 1984 1985 static void hptiop_map_srb(void *arg, bus_dma_segment_t *segs, 1986 int nsegs, int error) 1987 { 1988 struct hpt_iop_hba * hba = (struct hpt_iop_hba *)arg; 1989 bus_addr_t phy_addr = (segs->ds_addr + 0x1F) & ~(bus_addr_t)0x1F; 1990 struct hpt_iop_srb *srb, *tmp_srb; 1991 int i; 1992 1993 if (error || nsegs == 0) { 1994 device_printf(hba->pcidev, "hptiop_map_srb error"); 1995 return; 1996 } 1997 1998 /* map srb */ 1999 srb = (struct hpt_iop_srb *) 2000 (((unsigned long)hba->uncached_ptr + 0x1F) 2001 & ~(unsigned long)0x1F); 2002 2003 for (i = 0; i < HPT_SRB_MAX_QUEUE_SIZE; i++) { 2004 tmp_srb = (struct hpt_iop_srb *) 2005 ((char *)srb + i * HPT_SRB_MAX_SIZE); 2006 if (((unsigned long)tmp_srb & 0x1F) == 0) { 2007 if (bus_dmamap_create(hba->io_dmat, 2008 0, &tmp_srb->dma_map)) { 2009 device_printf(hba->pcidev, "dmamap create failed"); 2010 return; 2011 } 2012 2013 bzero(tmp_srb, sizeof(struct hpt_iop_srb)); 2014 tmp_srb->hba = hba; 2015 tmp_srb->index = i; 2016 if (hba->ctlcfg_ptr == 0) {/*itl iop*/ 2017 tmp_srb->phy_addr = (u_int64_t)(u_int32_t) 2018 (phy_addr >> 5); 2019 if (phy_addr & IOPMU_MAX_MEM_SUPPORT_MASK_32G) 2020 tmp_srb->srb_flag = 2021 HPT_SRB_FLAG_HIGH_MEM_ACESS; 2022 } else { 2023 tmp_srb->phy_addr = phy_addr; 2024 } 2025 2026 hptiop_free_srb(hba, tmp_srb); 2027 hba->srb[i] = tmp_srb; 2028 phy_addr += HPT_SRB_MAX_SIZE; 2029 } 2030 else { 2031 device_printf(hba->pcidev, "invalid alignment"); 2032 return; 2033 } 2034 } 2035 } 2036 2037 static void hptiop_os_message_callback(struct hpt_iop_hba * hba, u_int32_t msg) 2038 { 2039 hba->msg_done = 1; 2040 } 2041 2042 static int hptiop_os_query_remove_device(struct hpt_iop_hba * hba, 2043 int target_id) 2044 { 2045 struct cam_periph *periph = NULL; 2046 struct cam_path *path; 2047 int status, retval = 0; 2048 2049 status = xpt_create_path(&path, NULL, hba->sim->path_id, target_id, 0); 2050 2051 if (status == CAM_REQ_CMP) { 2052 if ((periph = cam_periph_find(path, "da")) != NULL) { 2053 if (periph->refcount >= 1) { 2054 device_printf(hba->pcidev, "%d ," 2055 "target_id=0x%x," 2056 "refcount=%d", 2057 hba->pciunit, target_id, periph->refcount); 2058 retval = -1; 2059 } 2060 } 2061 xpt_free_path(path); 2062 } 2063 return retval; 2064 } 2065 2066 static void hptiop_release_resource(struct hpt_iop_hba *hba) 2067 { 2068 int i; 2069 if (hba->path) { 2070 struct ccb_setasync ccb; 2071 2072 xpt_setup_ccb(&ccb.ccb_h, hba->path, /*priority*/5); 2073 ccb.ccb_h.func_code = XPT_SASYNC_CB; 2074 ccb.event_enable = 0; 2075 ccb.callback = hptiop_async; 2076 ccb.callback_arg = hba->sim; 2077 xpt_action((union ccb *)&ccb); 2078 xpt_free_path(hba->path); 2079 } 2080 2081 if (hba->sim) { 2082 xpt_bus_deregister(cam_sim_path(hba->sim)); 2083 cam_sim_free(hba->sim); 2084 } 2085 2086 if (hba->ctlcfg_dmat) { 2087 bus_dmamap_unload(hba->ctlcfg_dmat, hba->ctlcfg_dmamap); 2088 bus_dmamem_free(hba->ctlcfg_dmat, 2089 hba->ctlcfg_ptr, hba->ctlcfg_dmamap); 2090 bus_dma_tag_destroy(hba->ctlcfg_dmat); 2091 } 2092 2093 for (i = 0; i < HPT_SRB_MAX_QUEUE_SIZE; i++) { 2094 struct hpt_iop_srb *srb = hba->srb[i]; 2095 if (srb->dma_map) 2096 bus_dmamap_destroy(hba->io_dmat, srb->dma_map); 2097 } 2098 2099 if (hba->srb_dmat) { 2100 bus_dmamap_unload(hba->srb_dmat, hba->srb_dmamap); 2101 bus_dmamap_destroy(hba->srb_dmat, hba->srb_dmamap); 2102 bus_dma_tag_destroy(hba->srb_dmat); 2103 } 2104 2105 if (hba->io_dmat) 2106 bus_dma_tag_destroy(hba->io_dmat); 2107 2108 if (hba->parent_dmat) 2109 bus_dma_tag_destroy(hba->parent_dmat); 2110 2111 if (hba->irq_handle) 2112 bus_teardown_intr(hba->pcidev, hba->irq_res, hba->irq_handle); 2113 2114 if (hba->irq_res) 2115 bus_release_resource(hba->pcidev, SYS_RES_IRQ, 2116 0, hba->irq_res); 2117 2118 if (hba->bar0_res) 2119 bus_release_resource(hba->pcidev, SYS_RES_MEMORY, 2120 hba->bar0_rid, hba->bar0_res); 2121 if (hba->bar2_res) 2122 bus_release_resource(hba->pcidev, SYS_RES_MEMORY, 2123 hba->bar2_rid, hba->bar2_res); 2124 if (hba->ioctl_dev) 2125 destroy_dev(hba->ioctl_dev); 2126 dev_ops_remove_minor(&hptiop_ops, device_get_unit(hba->pcidev)); 2127 } 2128