10e32bd08SSascha Wildner /* 20e32bd08SSascha Wildner * Copyright (c) HighPoint Technologies, Inc. 30e32bd08SSascha Wildner * All rights reserved. 40e32bd08SSascha Wildner * 50e32bd08SSascha Wildner * Redistribution and use in source and binary forms, with or without 60e32bd08SSascha Wildner * modification, are permitted provided that the following conditions 70e32bd08SSascha Wildner * are met: 80e32bd08SSascha Wildner * 1. Redistributions of source code must retain the above copyright 90e32bd08SSascha Wildner * notice, this list of conditions and the following disclaimer. 100e32bd08SSascha Wildner * 2. Redistributions in binary form must reproduce the above copyright 110e32bd08SSascha Wildner * notice, this list of conditions and the following disclaimer in the 120e32bd08SSascha Wildner * documentation and/or other materials provided with the distribution. 130e32bd08SSascha Wildner * 140e32bd08SSascha Wildner * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 150e32bd08SSascha Wildner * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 160e32bd08SSascha Wildner * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 170e32bd08SSascha Wildner * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 180e32bd08SSascha Wildner * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 190e32bd08SSascha Wildner * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 200e32bd08SSascha Wildner * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 210e32bd08SSascha Wildner * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 220e32bd08SSascha Wildner * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 230e32bd08SSascha Wildner * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 240e32bd08SSascha Wildner * SUCH DAMAGE. 250e32bd08SSascha Wildner * 26*22d266d8SSascha Wildner * $FreeBSD: head/sys/dev/hptrr/hptrr_config.h 176018 2008-02-06 01:02:20Z scottl $ 270e32bd08SSascha Wildner */ 280e32bd08SSascha Wildner #ifndef hptrr_CONFIG_H 290e32bd08SSascha Wildner #define hptrr_CONFIG_H 300e32bd08SSascha Wildner #define SUPPORT_ARRAY 310e32bd08SSascha Wildner #define __KERNEL__ 1 320e32bd08SSascha Wildner #define DRIVER_MINOR 16 330e32bd08SSascha Wildner #define TARGETNAME hptrr 340e32bd08SSascha Wildner #define __dummy_reg hptrr___dummy_reg 350e32bd08SSascha Wildner #define __ldm_alloc_cmd hptrr___ldm_alloc_cmd 360e32bd08SSascha Wildner #define delay_between_spinup hptrr_delay_between_spinup 370e32bd08SSascha Wildner #define dmapool_active hptrr_dmapool_active 380e32bd08SSascha Wildner #define dmapool_get_page hptrr_dmapool_get_page 390e32bd08SSascha Wildner #define dmapool_get_page_at hptrr_dmapool_get_page_at 400e32bd08SSascha Wildner #define dmapool_make_order hptrr_dmapool_make_order 410e32bd08SSascha Wildner #define dmapool_max_class_pages hptrr_dmapool_max_class_pages 420e32bd08SSascha Wildner #define dmapool_put_page hptrr_dmapool_put_page 430e32bd08SSascha Wildner #define dmapool_register_client hptrr_dmapool_register_client 440e32bd08SSascha Wildner #define driver_name hptrr_driver_name 450e32bd08SSascha Wildner #define driver_name_long hptrr_driver_name_long 460e32bd08SSascha Wildner #define driver_ver hptrr_driver_ver 470e32bd08SSascha Wildner #define freelist_get hptrr_freelist_get 480e32bd08SSascha Wildner #define freelist_get_dma hptrr_freelist_get_dma 490e32bd08SSascha Wildner #define freelist_put hptrr_freelist_put 500e32bd08SSascha Wildner #define freelist_put_dma hptrr_freelist_put_dma 510e32bd08SSascha Wildner #define freelist_reserve hptrr_freelist_reserve 520e32bd08SSascha Wildner #define freelist_reserve_dma hptrr_freelist_reserve_dma 530e32bd08SSascha Wildner #define gautorebuild hptrr_gautorebuild 540e32bd08SSascha Wildner #define grebuildpriority hptrr_grebuildpriority 550e32bd08SSascha Wildner #define him_handle_to_vbus hptrr_him_handle_to_vbus 560e32bd08SSascha Wildner #define him_list hptrr_him_list 570e32bd08SSascha Wildner #define init_config hptrr_init_config 580e32bd08SSascha Wildner #define init_module_him_rr1720 hptrr_init_module_him_rr1720 590e32bd08SSascha Wildner #define init_module_him_rr174x_rr2210pm hptrr_init_module_him_rr174x_rr2210pm 600e32bd08SSascha Wildner #define init_module_him_rr222x_rr2240 hptrr_init_module_him_rr222x_rr2240 610e32bd08SSascha Wildner #define init_module_him_rr2310pm hptrr_init_module_him_rr2310pm 620e32bd08SSascha Wildner #define init_module_him_rr232x hptrr_init_module_him_rr232x 630e32bd08SSascha Wildner #define init_module_him_rr2340 hptrr_init_module_him_rr2340 640e32bd08SSascha Wildner #define init_module_him_rr2522pm hptrr_init_module_him_rr2522pm 650e32bd08SSascha Wildner #define init_module_jbod hptrr_init_module_jbod 660e32bd08SSascha Wildner #define init_module_partition hptrr_init_module_partition 670e32bd08SSascha Wildner #define init_module_raid0 hptrr_init_module_raid0 680e32bd08SSascha Wildner #define init_module_raid1 hptrr_init_module_raid1 690e32bd08SSascha Wildner #define init_module_raid5 hptrr_init_module_raid5 700e32bd08SSascha Wildner #define init_module_vdev_raw hptrr_init_module_vdev_raw 710e32bd08SSascha Wildner #define ldm_acquire_lock hptrr_ldm_acquire_lock 720e32bd08SSascha Wildner #define ldm_add_spare_to_array hptrr_ldm_add_spare_to_array 730e32bd08SSascha Wildner #define ldm_alloc_cmds_R_6_46_69_43_16 hptrr_ldm_alloc_cmds_R_6_46_69_43_16 740e32bd08SSascha Wildner #define ldm_alloc_cmds_from_list hptrr_ldm_alloc_cmds_from_list 750e32bd08SSascha Wildner #define ldm_check_array_online hptrr_ldm_check_array_online 760e32bd08SSascha Wildner #define ldm_create_vbus hptrr_ldm_create_vbus 770e32bd08SSascha Wildner #define ldm_create_vdev hptrr_ldm_create_vdev 780e32bd08SSascha Wildner #define ldm_event_notify hptrr_ldm_event_notify 790e32bd08SSascha Wildner #define ldm_find_stamp hptrr_ldm_find_stamp 800e32bd08SSascha Wildner #define ldm_find_target hptrr_ldm_find_target 810e32bd08SSascha Wildner #define ldm_finish_cmd hptrr_ldm_finish_cmd 820e32bd08SSascha Wildner #define ldm_free_cmds hptrr_ldm_free_cmds 830e32bd08SSascha Wildner #define ldm_free_cmds_to_list hptrr_ldm_free_cmds_to_list 840e32bd08SSascha Wildner #define ldm_generic_member_failed hptrr_ldm_generic_member_failed 850e32bd08SSascha Wildner #define ldm_get_cmd_size hptrr_ldm_get_cmd_size 860e32bd08SSascha Wildner #define ldm_get_device_id hptrr_ldm_get_device_id 870e32bd08SSascha Wildner #define ldm_get_mem_info hptrr_ldm_get_mem_info 880e32bd08SSascha Wildner #define ldm_get_next_vbus hptrr_ldm_get_next_vbus 890e32bd08SSascha Wildner #define ldm_get_vbus_ext hptrr_ldm_get_vbus_ext 900e32bd08SSascha Wildner #define ldm_get_vbus_size hptrr_ldm_get_vbus_size 910e32bd08SSascha Wildner #define ldm_ide_fixstring hptrr_ldm_ide_fixstring 920e32bd08SSascha Wildner #define ldm_idle hptrr_ldm_idle 930e32bd08SSascha Wildner #define ldm_initialize_vbus_async hptrr_ldm_initialize_vbus_async 940e32bd08SSascha Wildner #define ldm_intr hptrr_ldm_intr 950e32bd08SSascha Wildner #define ldm_ioctl hptrr_ldm_ioctl 960e32bd08SSascha Wildner #define ldm_on_timer hptrr_ldm_on_timer 970e32bd08SSascha Wildner #define ldm_queue_cmd hptrr_ldm_queue_cmd 980e32bd08SSascha Wildner #define ldm_queue_task hptrr_ldm_queue_task 990e32bd08SSascha Wildner #define ldm_queue_vbus_dpc hptrr_ldm_queue_vbus_dpc 1000e32bd08SSascha Wildner #define ldm_register_adapter hptrr_ldm_register_adapter 1010e32bd08SSascha Wildner #define ldm_register_device hptrr_ldm_register_device 1020e32bd08SSascha Wildner #define ldm_register_him_R_6_46_69_43_16 hptrr_ldm_register_him_R_6_46_69_43_16 1030e32bd08SSascha Wildner #define ldm_register_vdev_class_R_6_46_69_43_16 hptrr_ldm_register_vdev_class_R_6_46_69_43_16 1040e32bd08SSascha Wildner #define ldm_release_lock hptrr_ldm_release_lock 1050e32bd08SSascha Wildner #define ldm_release_vbus hptrr_ldm_release_vbus 1060e32bd08SSascha Wildner #define ldm_release_vdev hptrr_ldm_release_vdev 1070e32bd08SSascha Wildner #define ldm_remove_timer hptrr_ldm_remove_timer 1080e32bd08SSascha Wildner #define ldm_request_timer hptrr_ldm_request_timer 1090e32bd08SSascha Wildner #define ldm_reset_vbus hptrr_ldm_reset_vbus 1100e32bd08SSascha Wildner #define ldm_resume hptrr_ldm_resume 1110e32bd08SSascha Wildner #define ldm_set_autorebuild hptrr_ldm_set_autorebuild 1120e32bd08SSascha Wildner #define ldm_set_rebuild_priority hptrr_ldm_set_rebuild_priority 1130e32bd08SSascha Wildner #define ldm_shutdown hptrr_ldm_shutdown 1140e32bd08SSascha Wildner #define ldm_suspend hptrr_ldm_suspend 1150e32bd08SSascha Wildner #define ldm_sync_array_info hptrr_ldm_sync_array_info 1160e32bd08SSascha Wildner #define ldm_sync_array_stamp hptrr_ldm_sync_array_stamp 1170e32bd08SSascha Wildner #define ldm_timer_probe_device hptrr_ldm_timer_probe_device 1180e32bd08SSascha Wildner #define ldm_unregister_device hptrr_ldm_unregister_device 1190e32bd08SSascha Wildner #define log_sector_repair hptrr_log_sector_repair 1200e32bd08SSascha Wildner #define num_drives_per_spinup hptrr_num_drives_per_spinup 1210e32bd08SSascha Wildner #define os_get_stamp hptrr_os_get_stamp 1220e32bd08SSascha Wildner #define os_get_vbus_seq hptrr_os_get_vbus_seq 1230e32bd08SSascha Wildner #define os_inb hptrr_os_inb 1240e32bd08SSascha Wildner #define os_inl hptrr_os_inl 1250e32bd08SSascha Wildner #define os_insw hptrr_os_insw 1260e32bd08SSascha Wildner #define os_inw hptrr_os_inw 1270e32bd08SSascha Wildner #define os_map_pci_bar hptrr_os_map_pci_bar 1280e32bd08SSascha Wildner #define os_max_cache_size hptrr_os_max_cache_size 1290e32bd08SSascha Wildner #define os_outb hptrr_os_outb 1300e32bd08SSascha Wildner #define os_outl hptrr_os_outl 1310e32bd08SSascha Wildner #define os_outsw hptrr_os_outsw 1320e32bd08SSascha Wildner #define os_outw hptrr_os_outw 1330e32bd08SSascha Wildner #define os_pci_readb hptrr_os_pci_readb 1340e32bd08SSascha Wildner #define os_pci_readl hptrr_os_pci_readl 1350e32bd08SSascha Wildner #define os_pci_readw hptrr_os_pci_readw 1360e32bd08SSascha Wildner #define os_pci_writeb hptrr_os_pci_writeb 1370e32bd08SSascha Wildner #define os_pci_writel hptrr_os_pci_writel 1380e32bd08SSascha Wildner #define os_pci_writew hptrr_os_pci_writew 1390e32bd08SSascha Wildner #define os_printk hptrr_os_printk 1400e32bd08SSascha Wildner #define os_query_remove_device hptrr_os_query_remove_device 1410e32bd08SSascha Wildner #define os_query_time hptrr_os_query_time 1420e32bd08SSascha Wildner #define os_request_timer hptrr_os_request_timer 1430e32bd08SSascha Wildner #define os_revalidate_device hptrr_os_revalidate_device 1440e32bd08SSascha Wildner #define os_schedule_task hptrr_os_schedule_task 1450e32bd08SSascha Wildner #define os_stallexec hptrr_os_stallexec 1460e32bd08SSascha Wildner #define os_unmap_pci_bar hptrr_os_unmap_pci_bar 1470e32bd08SSascha Wildner #define osm_max_targets hptrr_osm_max_targets 1480e32bd08SSascha Wildner #define vdev_queue_cmd hptrr_vdev_queue_cmd 1490e32bd08SSascha Wildner #endif 150