1 /*- 2 * Copyright (c) 2002 Adaptec Inc. 3 * All rights reserved. 4 * 5 * Written by: David Jeffery 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: src/sys/dev/ips/ips.h,v 1.10 2004/05/30 20:08:34 phk Exp $ 29 * $DragonFly: src/sys/dev/raid/ips/ips.h,v 1.10 2006/06/04 21:09:50 dillon Exp $ 30 */ 31 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/module.h> 37 #include <sys/bus.h> 38 #include <sys/conf.h> 39 #include <sys/types.h> 40 #include <sys/thread.h> 41 #include <sys/thread2.h> 42 #include <sys/queue.h> 43 #include <sys/buf.h> 44 #include <sys/buf2.h> 45 #include <sys/malloc.h> 46 #include <sys/time.h> 47 #include <sys/lock.h> 48 49 #include <machine/bus_memio.h> 50 #include <machine/bus.h> 51 #include <sys/rman.h> 52 #include <machine/resource.h> 53 54 #include <bus/pci/pcireg.h> 55 #include <bus/pci/pcivar.h> 56 57 MALLOC_DECLARE(M_IPSBUF); 58 59 /* 60 * IPS CONSTANTS 61 */ 62 #define IPS_VENDOR_ID 0x1014 63 #define IPS_VENDOR_ID_ADAPTEC 0x9005 64 #define IPS_MORPHEUS_DEVICE_ID 0x01BD 65 #define IPS_COPPERHEAD_DEVICE_ID 0x002E 66 #define IPS_MARCO_DEVICE_ID 0x0250 67 #define IPS_CSL 0xff 68 #define IPS_POCL 0x30 69 70 /* amounts of memory to allocate for certain commands */ 71 #define IPS_ADAPTER_INFO_LEN (sizeof(ips_adapter_info_t)) 72 #define IPS_DRIVE_INFO_LEN (sizeof(ips_drive_info_t)) 73 #define IPS_COMMAND_LEN 24 74 #define IPS_MAX_SG_LEN (sizeof(ips_sg_element_t) * IPS_MAX_SG_ELEMENTS) 75 #define IPS_NVRAM_PAGE_SIZE 128 76 /* various flags */ 77 #define IPS_STATIC_FLAG 1 78 79 /* states for the card to be in */ 80 #define IPS_DEV_OPEN 0x01 81 #define IPS_TIMEOUT 0x02 /* command time out, need reset */ 82 #define IPS_OFFLINE 0x04 /* can't reset card/card failure */ 83 #define IPS_STATIC_BUSY 0x08 /* static command slot in use */ 84 85 /* max number of commands set to something low for now */ 86 #define IPS_MAX_CMD_NUM 128 87 #define IPS_MAX_NUM_DRIVES 8 88 #define IPS_MAX_SG_ELEMENTS 32 89 #define IPS_MAX_IOBUF_SIZE (64 * 1024) 90 #define IPS_BLKSIZE 512 91 92 /* logical drive states */ 93 94 #define IPS_LD_OFFLINE 0x02 95 #define IPS_LD_OKAY 0x03 96 #define IPS_LD_DEGRADED 0x04 97 #define IPS_LD_FREE 0x00 98 #define IPS_LD_SYS 0x06 99 #define IPS_LD_CRS 0x24 100 101 /* register offsets */ 102 #define MORPHEUS_REG_OMR0 0x0018 /* Outbound Msg. Reg. 0 */ 103 #define MORPHEUS_REG_OMR1 0x001C /* Outbound Msg. Reg. 1 */ 104 #define MORPHEUS_REG_IDR 0x0020 /* Inbound Doorbell Reg. */ 105 #define MORPHEUS_REG_IISR 0x0024 /* Inbound IRQ Status Reg. */ 106 #define MORPHEUS_REG_IIMR 0x0028 /* Inbound IRQ Mask Reg. */ 107 #define MORPHEUS_REG_OISR 0x0030 /* Outbound IRQ Status Reg. */ 108 #define MORPHEUS_REG_OIMR 0x0034 /* Outbound IRQ Status Reg. */ 109 #define MORPHEUS_REG_IQPR 0x0040 /* Inbound Queue Port Reg. */ 110 #define MORPHEUS_REG_OQPR 0x0044 /* Outbound Queue Port Reg. */ 111 112 #define COPPER_REG_SCPR 0x05 /* Subsystem Ctrl. Port Reg. */ 113 #define COPPER_REG_ISPR 0x06 /* IRQ Status Port Reg. */ 114 #define COPPER_REG_CBSP 0x07 /* ? Reg. */ 115 #define COPPER_REG_HISR 0x08 /* Host IRQ Status Reg. */ 116 #define COPPER_REG_CCSAR 0x10 /* Cmd. Channel Sys Addr Reg.*/ 117 #define COPPER_REG_CCCR 0x14 /* Cmd. Channel Ctrl. Reg. */ 118 #define COPPER_REG_SQHR 0x20 /* Status Queue Head Reg. */ 119 #define COPPER_REG_SQTR 0x24 /* Status Queue Tail Reg. */ 120 #define COPPER_REG_SQER 0x28 /* Status Queue End Reg. */ 121 #define COPPER_REG_SQSR 0x2C /* Status Queue Start Reg. */ 122 123 /* bit definitions */ 124 #define MORPHEUS_BIT_POST1 0x01 125 #define MORPHEUS_BIT_POST2 0x02 126 #define MORPHEUS_BIT_CMD_IRQ 0x08 127 128 #define COPPER_CMD_START 0x101A 129 #define COPPER_SEM_BIT 0x08 130 #define COPPER_EI_BIT 0x80 131 #define COPPER_EBM_BIT 0x02 132 #define COPPER_RESET_BIT 0x80 133 #define COPPER_GHI_BIT 0x04 134 #define COPPER_SCE_BIT 0x01 135 #define COPPER_OP_BIT 0x01 136 #define COPPER_ILE_BIT 0x10 137 138 /* status defines */ 139 #define IPS_POST1_OK 0x8000 140 #define IPS_POST2_OK 0x000f 141 142 /* command op codes */ 143 #define IPS_READ_CMD 0x02 144 #define IPS_WRITE_CMD 0x03 145 #define IPS_ADAPTER_INFO_CMD 0x05 146 #define IPS_CACHE_FLUSH_CMD 0x0A 147 #define IPS_REBUILD_STATUS_CMD 0x0C 148 #define IPS_ERROR_TABLE_CMD 0x17 149 #define IPS_DRIVE_INFO_CMD 0x19 150 #define IPS_SUBSYS_PARAM_CMD 0x40 151 #define IPS_CONFIG_SYNC_CMD 0x58 152 #define IPS_SG_READ_CMD 0x82 153 #define IPS_SG_WRITE_CMD 0x83 154 #define IPS_RW_NVRAM_CMD 0xBC 155 #define IPS_FFDC_CMD 0xD7 156 157 /* error information returned by the adapter */ 158 #define IPS_MIN_ERROR 0x02 159 #define IPS_ERROR_STATUS 0x13000200 /* ahh, magic numbers */ 160 161 #define IPS_OS_FREEBSD 8 162 #define IPS_VERSION_MAJOR "0.90" 163 #define IPS_VERSION_MINOR ".10" 164 165 /* Adapter Types */ 166 #define IPS_ADAPTER_COPPERHEAD 0x01 167 #define IPS_ADAPTER_COPPERHEAD2 0x02 168 #define IPS_ADAPTER_COPPERHEADOB1 0x03 169 #define IPS_ADAPTER_COPPERHEADOB2 0x04 170 #define IPS_ADAPTER_CLARINET 0x05 171 #define IPS_ADAPTER_CLARINETLITE 0x06 172 #define IPS_ADAPTER_TROMBONE 0x07 173 #define IPS_ADAPTER_MORPHEUS 0x08 174 #define IPS_ADAPTER_MORPHEUSLITE 0x09 175 #define IPS_ADAPTER_NEO 0x0A 176 #define IPS_ADAPTER_NEOLITE 0x0B 177 #define IPS_ADAPTER_SARASOTA2 0x0C 178 #define IPS_ADAPTER_SARASOTA1 0x0D 179 #define IPS_ADAPTER_MARCO 0x0E 180 #define IPS_ADAPTER_SEBRING 0x0F 181 #define IPS_ADAPTER_MAX_T IPS_ADAPTER_SEBRING 182 183 /* values for ffdc_settime (from gmtime) */ 184 #define IPS_SECSPERMIN 60 185 #define IPS_MINSPERHOUR 60 186 #define IPS_HOURSPERDAY 24 187 #define IPS_DAYSPERWEEK 7 188 #define IPS_DAYSPERNYEAR 365 189 #define IPS_DAYSPERLYEAR 366 190 #define IPS_SECSPERHOUR (IPS_SECSPERMIN * IPS_MINSPERHOUR) 191 #define IPS_SECSPERDAY ((long) IPS_SECSPERHOUR * IPS_HOURSPERDAY) 192 #define IPS_MONSPERYEAR 12 193 #define IPS_EPOCH_YEAR 1970 194 #define IPS_LEAPS_THRU_END_OF(y) ((y) / 4 - (y) / 100 + (y) / 400) 195 #define ips_isleap(y) (((y) % 4) == 0 && (((y) % 100) != 0 || ((y) % 400) == 0)) 196 197 198 /* 199 * for compatibility 200 */ 201 /* struct buf to struct bio changes */ 202 203 #define d_maxsize si_iosize_max 204 205 #define disk_open_t d_open_t 206 #define disk_close_t d_close_t 207 #define disk_strategy_t d_strategy_t 208 209 #if defined(PCIR_MAPS) && !defined(PCIR_BARS) 210 # define PCIR_BAR(x) (PCIR_BARS + (x) * 4) 211 # define PCIR_BARS PCIR_MAPS 212 #endif 213 214 215 /* 216 * IPS MACROS 217 */ 218 219 #define ips_read_1(sc,offset) bus_space_read_1(sc->bustag, sc->bushandle, offset) 220 #define ips_read_2(sc,offset) bus_space_read_2(sc->bustag, sc->bushandle, offset) 221 #define ips_read_4(sc,offset) bus_space_read_4(sc->bustag, sc->bushandle, offset) 222 223 #define ips_write_1(sc,offset,value) bus_space_write_1(sc->bustag, sc->bushandle, offset, value) 224 #define ips_write_2(sc,offset,value) bus_space_write_2(sc->bustag, sc->bushandle, offset, value) 225 #define ips_write_4(sc,offset,value) bus_space_write_4(sc->bustag, sc->bushandle, offset, value) 226 227 #define ips_read_request(iobuf) ((bio)->bio_buf->b_cmd == BUF_CMD_READ) 228 229 #define COMMAND_ERROR(status) (((status)->fields.basic_status & 0x0f) >= IPS_MIN_ERROR) 230 231 #ifndef IPS_DEBUG 232 #define DEVICE_PRINTF(x...) 233 #define PRINTF(x...) 234 #else 235 #define DEVICE_PRINTF(level,x...) if(IPS_DEBUG >= level)device_printf(x) 236 #define PRINTF(level,x...) if(IPS_DEBUG >= level)printf(x) 237 #endif 238 239 /* 240 * IPS STRUCTS 241 */ 242 struct ips_softc; 243 244 typedef struct { 245 u_int8_t command; 246 u_int8_t id; 247 u_int8_t drivenum; 248 u_int8_t reserve2; 249 u_int32_t lba; 250 u_int32_t buffaddr; 251 u_int32_t reserve3; 252 } __attribute__ ((packed)) ips_generic_cmd; 253 254 typedef struct { 255 u_int8_t command; 256 u_int8_t id; 257 u_int8_t drivenum; 258 u_int8_t segnum; 259 u_int32_t lba; 260 u_int32_t buffaddr; 261 u_int16_t length; 262 u_int16_t reserve1; 263 } __attribute__ ((packed)) ips_io_cmd; 264 265 typedef struct { 266 u_int8_t command; 267 u_int8_t id; 268 u_int8_t pagenum; 269 u_int8_t rw; 270 u_int32_t reserve1; 271 u_int32_t buffaddr; 272 u_int32_t reserve3; 273 } __attribute__ ((packed)) ips_rw_nvram_cmd; 274 275 typedef struct { 276 u_int8_t command; 277 u_int8_t id; 278 u_int8_t drivenum; 279 u_int8_t reserve1; 280 u_int32_t reserve2; 281 u_int32_t buffaddr; 282 u_int32_t reserve3; 283 } __attribute__ ((packed)) ips_drive_cmd; 284 285 typedef struct { 286 u_int8_t command; 287 u_int8_t id; 288 u_int8_t reserve1; 289 u_int8_t commandtype; 290 u_int32_t reserve2; 291 u_int32_t buffaddr; 292 u_int32_t reserve3; 293 } __attribute__((packed)) ips_adapter_info_cmd; 294 295 typedef struct { 296 u_int8_t command; 297 u_int8_t id; 298 u_int8_t reset_count; 299 u_int8_t reset_type; 300 u_int8_t second; 301 u_int8_t minute; 302 u_int8_t hour; 303 u_int8_t day; 304 u_int8_t reserve1[4]; 305 u_int8_t month; 306 u_int8_t yearH; 307 u_int8_t yearL; 308 u_int8_t reserve2; 309 } __attribute__((packed)) ips_adapter_ffdc_cmd; 310 311 typedef union{ 312 ips_generic_cmd generic_cmd; 313 ips_drive_cmd drive_cmd; 314 ips_adapter_info_cmd adapter_info_cmd; 315 } ips_cmd_buff_t; 316 317 typedef struct { 318 u_int32_t signature; 319 u_int8_t reserved; 320 u_int8_t adapter_slot; 321 u_int16_t adapter_type; 322 u_int8_t bios_high[4]; 323 u_int8_t bios_low[4]; 324 u_int16_t reserve2; 325 u_int8_t reserve3; 326 u_int8_t operating_system; 327 u_int8_t driver_high[4]; 328 u_int8_t driver_low[4]; 329 u_int8_t reserve4[100]; 330 } __attribute__((packed)) ips_nvram_page5; 331 332 typedef struct { 333 u_int32_t addr; 334 u_int32_t len; 335 } ips_sg_element_t; 336 337 typedef struct { 338 u_int8_t drivenum; 339 u_int8_t merge_id; 340 u_int8_t raid_lvl; 341 u_int8_t state; 342 u_int32_t sector_count; 343 } __attribute__((packed)) ips_drive_t; 344 345 typedef struct { 346 u_int8_t drivecount; 347 u_int8_t reserve1; 348 u_int16_t reserve2; 349 ips_drive_t drives[IPS_MAX_NUM_DRIVES]; 350 } __attribute__((packed)) ips_drive_info_t; 351 352 typedef struct { 353 u_int8_t drivecount; 354 u_int8_t miscflags; 355 u_int8_t SLTflags; 356 u_int8_t BSTflags; 357 u_int8_t pwr_chg_count; 358 u_int8_t wrong_addr_count; 359 u_int8_t unident_count; 360 u_int8_t nvram_dev_chg_count; 361 u_int8_t codeblock_version[8]; 362 u_int8_t bootblock_version[8]; 363 u_int32_t drive_sector_count[IPS_MAX_NUM_DRIVES]; 364 u_int8_t max_concurrent_cmds; 365 u_int8_t max_phys_devices; 366 u_int16_t flash_prog_count; 367 u_int8_t defunct_disks; 368 u_int8_t rebuildflags; 369 u_int8_t offline_drivecount; 370 u_int8_t critical_drivecount; 371 u_int16_t config_update_count; 372 u_int8_t blockedflags; 373 u_int8_t psdn_error; 374 u_int16_t addr_dead_disk[4*16]; /* ugly, max # channels * max # scsi devices per channel */ 375 } __attribute__((packed)) ips_adapter_info_t; 376 377 typedef struct { 378 u_int32_t status[IPS_MAX_CMD_NUM]; 379 u_int32_t base_phys_addr; 380 int nextstatus; 381 bus_dma_tag_t dmatag; 382 bus_dmamap_t dmamap; 383 } ips_copper_queue_t; 384 385 typedef union { 386 struct { 387 u_int8_t reserved; 388 u_int8_t command_id; 389 u_int8_t basic_status; 390 u_int8_t extended_status; 391 } fields; 392 volatile u_int32_t value; 393 } ips_cmd_status_t; 394 395 /* used to keep track of current commands to the card */ 396 typedef struct ips_command { 397 u_int8_t command_number; 398 u_int8_t id; 399 u_int8_t timeout; 400 struct ips_softc *sc; 401 bus_dmamap_t command_dmamap; 402 void *command_buffer; 403 u_int32_t command_phys_addr; /*WARNING! must be changed if 64bit addressing ever used*/ 404 bus_dma_tag_t data_dmatag; 405 bus_dmamap_t data_dmamap; 406 /* members below are zero'd when handed out */ 407 ips_cmd_status_t status; 408 SLIST_ENTRY(ips_command) next; 409 void *data_buffer; 410 void *arg; 411 void (*callback)(struct ips_command *command); 412 int completed; 413 } ips_command_t; 414 415 typedef struct ips_wait_list { 416 STAILQ_ENTRY(ips_wait_list) next; 417 void *data; 418 int (* callback)(ips_command_t *command); 419 } ips_wait_list_t; 420 421 typedef struct ips_softc { 422 struct resource *iores; 423 struct resource *irqres; 424 struct intr_config_hook ips_ich; 425 int configured; 426 int state; 427 int iotype; 428 int rid; 429 int irqrid; 430 void *irqcookie; 431 bus_space_tag_t bustag; 432 bus_space_handle_t bushandle; 433 bus_dma_tag_t adapter_dmatag; 434 bus_dma_tag_t command_dmatag; 435 bus_dma_tag_t sg_dmatag; 436 device_t dev; 437 struct callout timer; 438 u_int16_t adapter_type; 439 ips_adapter_info_t adapter_info; 440 device_t diskdev[IPS_MAX_NUM_DRIVES]; 441 ips_drive_t drives[IPS_MAX_NUM_DRIVES]; 442 u_int8_t drivecount; 443 u_int16_t ffdc_resetcount; 444 struct timeval ffdc_resettime; 445 u_int8_t next_drive; 446 u_int8_t max_cmds; 447 volatile u_int8_t used_commands; 448 ips_command_t *commandarray; 449 ips_command_t *staticcmd; 450 SLIST_HEAD(command_list, ips_command) free_cmd_list; 451 int (*ips_adapter_reinit)(struct ips_softc *sc, 452 int force); 453 void (*ips_adapter_intr)(void *sc); 454 void (*ips_issue_cmd)(ips_command_t *command); 455 void (*ips_poll_cmd)(ips_command_t *command); 456 ips_copper_queue_t *copper_queue; 457 458 struct lock queue_lock; 459 struct bio_queue_head bio_queue; 460 } ips_softc_t; 461 462 /* function defines from ips_ioctl.c */ 463 extern int ips_ioctl_request(ips_softc_t *sc, u_long ioctl_cmd, caddr_t addr, 464 int32_t flags); 465 /* function defines from ips_disk.c */ 466 extern void ipsd_finish(struct bio *iobuf); 467 468 /* function defines from ips_commands.c */ 469 extern int ips_flush_cache(ips_softc_t *sc); 470 extern void ips_start_io_request(ips_softc_t *sc); 471 extern int ips_get_drive_info(ips_softc_t *sc); 472 extern int ips_get_adapter_info(ips_softc_t *sc); 473 extern int ips_ffdc_reset(ips_softc_t *sc); 474 extern int ips_update_nvram(ips_softc_t *sc); 475 extern int ips_clear_adapter(ips_softc_t *sc); 476 477 /* function defines from ips.c */ 478 extern int ips_get_free_cmd(ips_softc_t *sc, ips_command_t **command, 479 unsigned long flags); 480 extern void ips_insert_free_cmd(ips_softc_t *sc, ips_command_t *command); 481 extern int ips_adapter_init(ips_softc_t *sc); 482 extern int ips_morpheus_reinit(ips_softc_t *sc, int force); 483 extern int ips_adapter_free(ips_softc_t *sc); 484 extern void ips_morpheus_intr(void *sc); 485 extern void ips_issue_morpheus_cmd(ips_command_t *command); 486 extern void ips_morpheus_poll(ips_command_t *command); 487 extern int ips_copperhead_reinit(ips_softc_t *sc, int force); 488 extern void ips_copperhead_intr(void *sc); 489 extern void ips_issue_copperhead_cmd(ips_command_t *command); 490 extern void ips_copperhead_poll(ips_command_t *command); 491 int ips_timed_wait(ips_command_t *, const char *, int); 492 493 #define IPS_CDEV_MAJOR 175 494 #define IPSD_CDEV_MAJOR 176 495