1 /*- 2 * Copyright (c) 2006 IronPort Systems 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 /*- 27 * Copyright (c) 2007 LSI Corp. 28 * Copyright (c) 2007 Rajesh Prabhakaran. 29 * All rights reserved. 30 * 31 * Redistribution and use in source and binary forms, with or without 32 * modification, are permitted provided that the following conditions 33 * are met: 34 * 1. Redistributions of source code must retain the above copyright 35 * notice, this list of conditions and the following disclaimer. 36 * 2. Redistributions in binary form must reproduce the above copyright 37 * notice, this list of conditions and the following disclaimer in the 38 * documentation and/or other materials provided with the distribution. 39 * 40 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 41 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 43 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 44 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 46 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 48 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 49 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 50 * SUCH DAMAGE. 51 * 52 * $FreeBSD: src/sys/dev/mfi/mfi_pci.c,v 1.16 2010/03/02 17:34:11 kib Exp $ 53 * FreeBSD projects/head_mfi/ r232888 54 */ 55 56 /* PCI/PCI-X/PCIe bus interface for the LSI MegaSAS controllers */ 57 58 #include "opt_mfi.h" 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/kernel.h> 63 #include <sys/module.h> 64 #include <sys/bus.h> 65 #include <sys/conf.h> 66 #include <sys/buf2.h> 67 #include <sys/malloc.h> 68 #include <sys/uio.h> 69 #include <sys/eventhandler.h> 70 #include <sys/rman.h> 71 72 #include <bus/pci/pcireg.h> 73 #include <bus/pci/pcivar.h> 74 75 #include <dev/raid/mfi/mfireg.h> 76 #include <dev/raid/mfi/mfi_ioctl.h> 77 #include <dev/raid/mfi/mfivar.h> 78 79 static int mfi_pci_probe(device_t); 80 static int mfi_pci_attach(device_t); 81 static int mfi_pci_detach(device_t); 82 static int mfi_pci_suspend(device_t); 83 static int mfi_pci_resume(device_t); 84 static void mfi_pci_free(struct mfi_softc *); 85 86 static device_method_t mfi_methods[] = { 87 DEVMETHOD(device_probe, mfi_pci_probe), 88 DEVMETHOD(device_attach, mfi_pci_attach), 89 DEVMETHOD(device_detach, mfi_pci_detach), 90 DEVMETHOD(device_suspend, mfi_pci_suspend), 91 DEVMETHOD(device_resume, mfi_pci_resume), 92 DEVMETHOD(bus_print_child, bus_generic_print_child), 93 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 94 DEVMETHOD_END 95 }; 96 97 static driver_t mfi_pci_driver = { 98 "mfi", 99 mfi_methods, 100 sizeof(struct mfi_softc) 101 }; 102 103 static devclass_t mfi_devclass; 104 DRIVER_MODULE(mfi, pci, mfi_pci_driver, mfi_devclass, NULL, NULL); 105 MODULE_VERSION(mfi, 1); 106 107 static int mfi_msi_enable = 1; 108 TUNABLE_INT("hw.mfi.msi.enable", &mfi_msi_enable); 109 110 struct mfi_ident { 111 uint16_t vendor; 112 uint16_t device; 113 uint16_t subvendor; 114 uint16_t subdevice; 115 int flags; 116 const char *desc; 117 } mfi_identifiers[] = { 118 { 0x1000, 0x005b, 0x1028, 0x1f2d, MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT, 119 "Dell PERC H810 Adapter" }, 120 { 0x1000, 0x005b, 0x1028, 0x1f30, MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT, 121 "Dell PERC H710 Embedded" }, 122 { 0x1000, 0x005b, 0x1028, 0x1f31, MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT, 123 "Dell PERC H710P Adapter" }, 124 { 0x1000, 0x005b, 0x1028, 0x1f33, MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT, 125 "Dell PERC H710P Mini (blades)" }, 126 { 0x1000, 0x005b, 0x1028, 0x1f34, MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT, 127 "Dell PERC H710P Mini (monolithics)" }, 128 { 0x1000, 0x005b, 0x1028, 0x1f35, MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT, 129 "Dell PERC H710 Adapter" }, 130 { 0x1000, 0x005b, 0x1028, 0x1f37, MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT, 131 "Dell PERC H710 Mini (blades)" }, 132 { 0x1000, 0x005b, 0x1028, 0x1f38, MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT, 133 "Dell PERC H710 Mini (monolithics)" }, 134 { 0x1000, 0x005b, 0x8086, 0x9265, MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT, 135 "Intel (R) RAID Controller RS25DB080" }, 136 { 0x1000, 0x005b, 0x8086, 0x9285, MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT, 137 "Intel (R) RAID Controller RS25NB008" }, 138 { 0x1000, 0x005b, 0xffff, 0xffff, MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT, 139 "ThunderBolt" }, 140 { 0x1000, 0x0060, 0x1028, 0xffff, MFI_FLAGS_1078, 141 "Dell PERC 6" }, 142 { 0x1000, 0x0060, 0xffff, 0xffff, MFI_FLAGS_1078, 143 "LSI MegaSAS 1078" }, 144 { 0x1000, 0x0071, 0xffff, 0xffff, MFI_FLAGS_SKINNY, 145 "Drake Skinny" }, 146 { 0x1000, 0x0073, 0xffff, 0xffff, MFI_FLAGS_SKINNY, 147 "Drake Skinny" }, 148 { 0x1000, 0x0078, 0xffff, 0xffff, MFI_FLAGS_GEN2, 149 "LSI MegaSAS Gen2" }, 150 { 0x1000, 0x0079, 0x1028, 0x1f15, MFI_FLAGS_GEN2, 151 "Dell PERC H800 Adapter" }, 152 { 0x1000, 0x0079, 0x1028, 0x1f16, MFI_FLAGS_GEN2, 153 "Dell PERC H700 Adapter" }, 154 { 0x1000, 0x0079, 0x1028, 0x1f17, MFI_FLAGS_GEN2, 155 "Dell PERC H700 Integrated" }, 156 { 0x1000, 0x0079, 0x1028, 0x1f18, MFI_FLAGS_GEN2, 157 "Dell PERC H700 Modular" }, 158 { 0x1000, 0x0079, 0x1028, 0x1f19, MFI_FLAGS_GEN2, 159 "Dell PERC H700" }, 160 { 0x1000, 0x0079, 0x1028, 0x1f1a, MFI_FLAGS_GEN2, 161 "Dell PERC H800 Proto Adapter" }, 162 { 0x1000, 0x0079, 0x1028, 0x1f1b, MFI_FLAGS_GEN2, 163 "Dell PERC H800" }, 164 { 0x1000, 0x0079, 0x1028, 0xffff, MFI_FLAGS_GEN2, 165 "Dell PERC Gen2" }, 166 { 0x1000, 0x0079, 0xffff, 0xffff, MFI_FLAGS_GEN2, 167 "LSI MegaSAS Gen2" }, 168 { 0x1000, 0x007c, 0xffff, 0xffff, MFI_FLAGS_1078, 169 "LSI MegaSAS 1078" }, 170 { 0x1000, 0x0411, 0xffff, 0xffff, MFI_FLAGS_1064R, /* Brocton IOP */ 171 "LSI MegaSAS 1064R" }, 172 { 0x1000, 0x0413, 0xffff, 0xffff, MFI_FLAGS_1064R, /* Verde ZCR */ 173 "LSI MegaSAS 1064R" }, 174 { 0x1028, 0x0015, 0xffff, 0xffff, MFI_FLAGS_1064R, 175 "Dell PERC 5/i" }, 176 {0, 0, 0, 0, 0, NULL} 177 }; 178 179 static struct mfi_ident * 180 mfi_find_ident(device_t dev) 181 { 182 struct mfi_ident *m; 183 184 for (m = mfi_identifiers; m->vendor != 0; m++) { 185 if ((m->vendor == pci_get_vendor(dev)) && 186 (m->device == pci_get_device(dev)) && 187 ((m->subvendor == pci_get_subvendor(dev)) || 188 (m->subvendor == 0xffff)) && 189 ((m->subdevice == pci_get_subdevice(dev)) || 190 (m->subdevice == 0xffff))) 191 return (m); 192 } 193 194 return (NULL); 195 } 196 197 static int 198 mfi_pci_probe(device_t dev) 199 { 200 struct mfi_ident *id; 201 202 if ((id = mfi_find_ident(dev)) != NULL) { 203 device_set_desc(dev, id->desc); 204 return (BUS_PROBE_DEFAULT); 205 } 206 return (ENXIO); 207 } 208 209 static int 210 mfi_pci_attach(device_t dev) 211 { 212 struct mfi_softc *sc; 213 struct mfi_ident *m; 214 uint32_t command; 215 int error; 216 u_int irq_flags; 217 218 sc = device_get_softc(dev); 219 bzero(sc, sizeof(*sc)); 220 sc->mfi_dev = dev; 221 m = mfi_find_ident(dev); 222 sc->mfi_flags = m->flags; 223 224 /* Verify that the adapter can be set up in PCI space */ 225 command = pci_read_config(dev, PCIR_COMMAND, 2); 226 command |= PCIM_CMD_BUSMASTEREN; 227 pci_write_config(dev, PCIR_COMMAND, command, 2); 228 command = pci_read_config(dev, PCIR_COMMAND, 2); 229 if ((command & PCIM_CMD_BUSMASTEREN) == 0) { 230 device_printf(dev, "Can't enable PCI busmaster\n"); 231 return (ENXIO); 232 } 233 if ((command & PCIM_CMD_MEMEN) == 0) { 234 device_printf(dev, "PCI memory window not available\n"); 235 return (ENXIO); 236 } 237 238 /* Allocate PCI registers */ 239 if ((sc->mfi_flags & MFI_FLAGS_1064R) || 240 (sc->mfi_flags & MFI_FLAGS_1078)) { 241 /* 1068/1078: Memory mapped BAR is at offset 0x10 */ 242 sc->mfi_regs_rid = PCIR_BAR(0); 243 } else if ((sc->mfi_flags & MFI_FLAGS_GEN2) || 244 (sc->mfi_flags & MFI_FLAGS_SKINNY) || 245 (sc->mfi_flags & MFI_FLAGS_TBOLT)) { 246 /* GEN2/Skinny: Memory mapped BAR is at offset 0x14 */ 247 sc->mfi_regs_rid = PCIR_BAR(1); 248 } 249 if ((sc->mfi_regs_resource = bus_alloc_resource_any(sc->mfi_dev, 250 SYS_RES_MEMORY, &sc->mfi_regs_rid, RF_ACTIVE)) == NULL) { 251 device_printf(dev, "Cannot allocate PCI registers\n"); 252 return (ENXIO); 253 } 254 sc->mfi_btag = rman_get_bustag(sc->mfi_regs_resource); 255 sc->mfi_bhandle = rman_get_bushandle(sc->mfi_regs_resource); 256 257 error = ENOMEM; 258 259 /* Allocate parent DMA tag */ 260 if (bus_dma_tag_create( NULL, /* parent */ 261 1, 0, /* algnmnt, boundary */ 262 BUS_SPACE_MAXADDR, /* lowaddr */ 263 BUS_SPACE_MAXADDR, /* highaddr */ 264 NULL, NULL, /* filter, filterarg */ 265 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 266 BUS_SPACE_UNRESTRICTED, /* nsegments */ 267 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 268 0, /* flags */ 269 &sc->mfi_parent_dmat)) { 270 device_printf(dev, "Cannot allocate parent DMA tag\n"); 271 goto out; 272 } 273 274 /* Allocate IRQ resource. */ 275 sc->mfi_irq_rid = 0; 276 sc->mfi_irq_type = pci_alloc_1intr(sc->mfi_dev, mfi_msi_enable, 277 &sc->mfi_irq_rid, &irq_flags); 278 if ((sc->mfi_irq = bus_alloc_resource_any(sc->mfi_dev, SYS_RES_IRQ, 279 &sc->mfi_irq_rid, irq_flags)) == NULL) { 280 device_printf(sc->mfi_dev, "Cannot allocate interrupt\n"); 281 return (EINVAL); 282 } 283 284 error = mfi_attach(sc); 285 out: 286 if (error) { 287 mfi_free(sc); 288 mfi_pci_free(sc); 289 } 290 291 return (error); 292 } 293 294 static int 295 mfi_pci_detach(device_t dev) 296 { 297 struct mfi_softc *sc; 298 device_t *devlist; 299 int error, devcount, i; 300 301 sc = device_get_softc(dev); 302 303 lockmgr(&sc->mfi_config_lock, LK_EXCLUSIVE); 304 lockmgr(&sc->mfi_io_lock, LK_EXCLUSIVE); 305 if ((sc->mfi_flags & MFI_FLAGS_OPEN) != 0) { 306 lockmgr(&sc->mfi_io_lock, LK_RELEASE); 307 lockmgr(&sc->mfi_config_lock, LK_RELEASE); 308 return (EBUSY); 309 } 310 sc->mfi_detaching = 1; 311 lockmgr(&sc->mfi_io_lock, LK_RELEASE); 312 313 if ((error = device_get_children(sc->mfi_dev, &devlist, &devcount)) != 0) { 314 lockmgr(&sc->mfi_config_lock, LK_RELEASE); 315 return error; 316 } 317 for (i = 0; i < devcount; i++) 318 device_delete_child(sc->mfi_dev, devlist[i]); 319 kfree(devlist, M_TEMP); 320 lockmgr(&sc->mfi_config_lock, LK_RELEASE); 321 322 EVENTHANDLER_DEREGISTER(shutdown_final, sc->mfi_eh); 323 324 mfi_shutdown(sc); 325 mfi_free(sc); 326 mfi_pci_free(sc); 327 return (0); 328 } 329 330 static void 331 mfi_pci_free(struct mfi_softc *sc) 332 { 333 334 if (sc->mfi_regs_resource != NULL) { 335 bus_release_resource(sc->mfi_dev, SYS_RES_MEMORY, 336 sc->mfi_regs_rid, sc->mfi_regs_resource); 337 } 338 if (sc->mfi_irq_type == PCI_INTR_TYPE_MSI) 339 pci_release_msi(sc->mfi_dev); 340 } 341 342 static int 343 mfi_pci_suspend(device_t dev) 344 { 345 346 return (EINVAL); 347 } 348 349 static int 350 mfi_pci_resume(device_t dev) 351 { 352 353 return (EINVAL); 354 } 355