xref: /dragonfly/sys/dev/raid/mfi/mfivar.h (revision cecb9aae)
1 /*-
2  * Copyright (c) 2006 IronPort Systems
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 /*-
27  * Copyright (c) 2007 LSI Corp.
28  * Copyright (c) 2007 Rajesh Prabhakaran.
29  * All rights reserved.
30  *
31  * Redistribution and use in source and binary forms, with or without
32  * modification, are permitted provided that the following conditions
33  * are met:
34  * 1. Redistributions of source code must retain the above copyright
35  *    notice, this list of conditions and the following disclaimer.
36  * 2. Redistributions in binary form must reproduce the above copyright
37  *    notice, this list of conditions and the following disclaimer in the
38  *    documentation and/or other materials provided with the distribution.
39  *
40  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
41  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
42  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
43  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
44  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
45  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
46  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
47  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
48  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
49  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
50  * SUCH DAMAGE.
51  *
52  * $FreeBSD: src/sys/dev/mfi/mfivar.h,v 1.14 2011/09/29 08:37:53 mav Exp $
53  * FreeBSD projects/head_mfi/ r232949
54  */
55 
56 #ifndef _MFIVAR_H
57 #define _MFIVAR_H
58 
59 #include <sys/devicestat.h>
60 #include <sys/disk.h>
61 #include <sys/eventhandler.h>
62 #include <sys/lock.h>
63 #include <sys/sysctl.h>
64 #include <sys/taskqueue.h>
65 
66 /*
67  * SCSI structures and definitions are used from here, but no linking
68  * requirements are made to CAM.
69  */
70 #include <bus/cam/scsi/scsi_all.h>
71 
72 struct mfi_hwcomms {
73 	uint32_t		hw_pi;
74 	uint32_t		hw_ci;
75 	uint32_t		hw_reply_q[1];
76 };
77 
78 #define	MEGASAS_MAX_NAME	32
79 #define	MEGASAS_VERSION		"4.23"
80 
81 struct mfi_softc;
82 struct disk;
83 struct ccb_hdr;
84 
85 struct mfi_command {
86 	TAILQ_ENTRY(mfi_command) cm_link;
87 	time_t			cm_timestamp;
88 	struct mfi_softc	*cm_sc;
89 	union mfi_frame		*cm_frame;
90 	bus_addr_t		cm_frame_busaddr;
91 	struct mfi_sense	*cm_sense;
92 	bus_addr_t		cm_sense_busaddr;
93 	bus_dmamap_t		cm_dmamap;
94 	union mfi_sgl		*cm_sg;
95 	void			*cm_data;
96 	int			cm_len;
97 	int			cm_stp_len;
98 	int			cm_total_frame_size;
99 	int			cm_extra_frames;
100 	int			cm_flags;
101 #define MFI_CMD_MAPPED		(1<<0)
102 #define MFI_CMD_DATAIN		(1<<1)
103 #define MFI_CMD_DATAOUT		(1<<2)
104 #define MFI_CMD_COMPLETED	(1<<3)
105 #define MFI_CMD_POLLED		(1<<4)
106 #define MFI_ON_MFIQ_FREE	(1<<5)
107 #define MFI_ON_MFIQ_READY	(1<<6)
108 #define MFI_ON_MFIQ_BUSY	(1<<7)
109 #define MFI_ON_MFIQ_MASK	((1<<5)|(1<<6)|(1<<7))
110 	int			cm_aen_abort;
111 	uint8_t			retry_for_fw_reset;
112 	void			(* cm_complete)(struct mfi_command *cm);
113 	void			*cm_private;
114 	int			cm_index;
115 	int			cm_error;
116 };
117 
118 /*
119  * XXX swildner
120  *
121  * At the moment we rely on mfi_disk and mfi_system_pd having the same size.
122  * A future cleanup should merge them.
123  */
124 struct mfi_disk {
125 	TAILQ_ENTRY(mfi_disk)	ld_link;
126 	device_t	ld_dev;
127 	cdev_t		ld_dev_t;
128 	int		ld_id;
129 	int		ld_unit;
130 	struct mfi_softc *ld_controller;
131 	struct mfi_ld_info	*ld_info;
132 	struct disk	ld_disk;
133 	struct devstat	ld_devstat;
134 	int		ld_flags;
135 #define MFI_DISK_FLAGS_OPEN	0x01
136 #define	MFI_DISK_FLAGS_DISABLED	0x02
137 #define	MFI_DISK_FLAGS_SYSPD	0x04
138 };
139 
140 struct mfi_system_pd {
141 	TAILQ_ENTRY(mfi_system_pd)	pd_link;
142 	device_t	pd_dev;
143 	cdev_t		pd_dev_t;
144 	int		pd_id;
145 	int		pd_unit;
146 	struct mfi_softc *pd_controller;
147 	struct mfi_pd_info	*pd_info;
148 	struct disk	pd_disk;
149 	struct devstat	pd_devstat;
150 	int		pd_flags;
151 };
152 
153 struct mfi_evt_queue_elm {
154 	TAILQ_ENTRY(mfi_evt_queue_elm)	link;
155 	struct mfi_evt_detail		detail;
156 };
157 
158 struct mfi_aen {
159 	TAILQ_ENTRY(mfi_aen) aen_link;
160 	struct proc			*p;
161 };
162 
163 struct mfi_skinny_dma_info {
164 	bus_dma_tag_t	dmat[514];
165 	bus_dmamap_t	dmamap[514];
166 	uint32_t	mem[514];
167 	int		noofmaps;
168 };
169 
170 struct mfi_cmd_tbolt;
171 typedef struct {
172 	volatile unsigned int val;
173 } atomic_t;
174 
175 #define	atomic_read(v)	((v)->val)
176 #define	atomic_set(v,i)	((v)->val - (i))
177 
178 struct mfi_softc {
179 	device_t			mfi_dev;
180 	int				mfi_flags;
181 #define MFI_FLAGS_SG64		(1<<0)
182 #define MFI_FLAGS_QFRZN		(1<<1)
183 #define MFI_FLAGS_OPEN		(1<<2)
184 #define MFI_FLAGS_STOP		(1<<3)
185 #define MFI_FLAGS_1064R		(1<<4)
186 #define MFI_FLAGS_1078		(1<<5)
187 #define MFI_FLAGS_GEN2		(1<<6)
188 #define MFI_FLAGS_SKINNY	(1<<7)
189 #define MFI_FLAGS_TBOLT		(1<<8)
190 	// Start: LSIP200113393
191 	bus_dma_tag_t			verbuf_h_dmat;
192 	bus_dmamap_t			verbuf_h_dmamap;
193 	uint32_t			verbuf_h_busaddr;
194 	uint32_t			*verbuf;
195 	void				*kbuff_arr[MAX_IOCTL_SGE];
196 	bus_dma_tag_t			mfi_kbuff_arr_dmat[2];
197 	bus_dmamap_t			mfi_kbuff_arr_dmamap[2];
198 	bus_addr_t			mfi_kbuff_arr_busaddr[2];
199 
200 	struct mfi_hwcomms		*mfi_comms;
201 	TAILQ_HEAD(,mfi_command)	mfi_free;
202 	TAILQ_HEAD(,mfi_command)	mfi_ready;
203 	TAILQ_HEAD(BUSYQ,mfi_command)	mfi_busy;
204 	struct bio_queue_head		mfi_bioq;
205 	struct mfi_qstat		mfi_qstat[MFIQ_COUNT];
206 
207 	struct resource			*mfi_regs_resource;
208 	bus_space_handle_t		mfi_bhandle;
209 	bus_space_tag_t			mfi_btag;
210 	int				mfi_regs_rid;
211 
212 	bus_dma_tag_t			mfi_parent_dmat;
213 	bus_dma_tag_t			mfi_buffer_dmat;
214 
215 	bus_dma_tag_t			mfi_comms_dmat;
216 	bus_dmamap_t			mfi_comms_dmamap;
217 	bus_addr_t			mfi_comms_busaddr;
218 
219 	bus_dma_tag_t			mfi_frames_dmat;
220 	bus_dmamap_t			mfi_frames_dmamap;
221 	bus_addr_t			mfi_frames_busaddr;
222 	union mfi_frame			*mfi_frames;
223 
224 	bus_dma_tag_t			mfi_tb_init_dmat;
225 	bus_dmamap_t			mfi_tb_init_dmamap;
226 	bus_addr_t			mfi_tb_init_busaddr;
227 	bus_addr_t			mfi_tb_ioc_init_busaddr;
228 	union mfi_frame			*mfi_tb_init;
229 
230 	TAILQ_HEAD(,mfi_evt_queue_elm)	mfi_evt_queue;
231 	struct task			mfi_evt_task;
232 	TAILQ_HEAD(,mfi_aen)		mfi_aen_pids;
233 	struct mfi_command		*mfi_aen_cm;
234 	struct mfi_command		*mfi_skinny_cm;
235 	uint32_t			mfi_aen_triggered;
236 	uint32_t			mfi_poll_waiting;
237 	struct kqinfo			mfi_kq;
238 	uint32_t			mfi_boot_seq_num;
239 	int				mfi_delete_busy_volumes;
240 	int				mfi_keep_deleted_volumes;
241 	int				mfi_detaching;
242 
243 	bus_dma_tag_t			mfi_sense_dmat;
244 	bus_dmamap_t			mfi_sense_dmamap;
245 	uint32_t			mfi_sense_busaddr;
246 	struct mfi_sense		*mfi_sense;
247 
248 	struct resource			*mfi_irq;
249 	void				*mfi_intr;
250 	int				mfi_irq_rid;
251 	int				mfi_irq_type;
252 
253 	struct intr_config_hook		mfi_ich;
254 	eventhandler_tag		eh;
255 	/* OCR flags */
256 	atomic_t fw_reset_no_pci_access;
257 	uint8_t adpreset;
258 	uint8_t issuepend_done;
259 	uint8_t disableOnlineCtrlReset;
260 	uint32_t mfiStatus;
261 	uint32_t last_seq_num;
262 	uint32_t volatile hw_crit_error;
263 
264 	/*
265 	 * Allocation for the command array.  Used as an indexable array to
266 	 * recover completed commands.
267 	 */
268 	struct mfi_command		*mfi_commands;
269 	/*
270 	 * How many commands were actually allocated
271 	 */
272 	int				mfi_total_cmds;
273 	/*
274 	 * How many commands the firmware can handle.  Also how big the reply
275 	 * queue is, minus 1.
276 	 */
277 	int				mfi_max_fw_cmds;
278 	/*
279 	 * How many S/G elements we'll ever actually use
280 	 */
281 	int				mfi_max_sge;
282 	/*
283 	 * How many bytes a compound frame is, including all of the extra frames
284 	 * that are used for S/G elements.
285 	 */
286 	int				mfi_cmd_size;
287 	/*
288 	 * How large an S/G element is.  Used to calculate the number of single
289 	 * frames in a command.
290 	 */
291 	int				mfi_sge_size;
292 	/*
293 	 * Max number of sectors that the firmware allows
294 	 */
295 	uint32_t			mfi_max_io;
296 
297 	TAILQ_HEAD(,mfi_disk)		mfi_ld_tqh;
298 	TAILQ_HEAD(,mfi_system_pd)	mfi_syspd_tqh;
299 	eventhandler_tag		mfi_eh;
300 	struct cdev			*mfi_cdev;
301 
302 	TAILQ_HEAD(, ccb_hdr)		mfi_cam_ccbq;
303 	struct mfi_command *		(* mfi_cam_start)(void *);
304 	struct callout			mfi_watchdog_callout;
305 	struct lock			mfi_io_lock;
306 	struct lock			mfi_config_lock;
307 
308 	struct sysctl_ctx_list		mfi_sysctl_ctx;
309 	struct sysctl_oid		*mfi_sysctl_tree;
310 
311 	/* Controller type specific interfaces */
312 	void	(*mfi_enable_intr)(struct mfi_softc *sc);
313 	void	(*mfi_disable_intr)(struct mfi_softc *sc);
314 	int32_t	(*mfi_read_fw_status)(struct mfi_softc *sc);
315 	int	(*mfi_check_clear_intr)(struct mfi_softc *sc);
316 	void	(*mfi_issue_cmd)(struct mfi_softc *sc, bus_addr_t bus_add,
317 		    uint32_t frame_cnt);
318 	int	(*mfi_adp_reset)(struct mfi_softc *sc);
319 	int	(*mfi_adp_check_reset)(struct mfi_softc *sc);
320 
321 	/* ThunderBolt */
322 	uint32_t			mfi_tbolt;
323 	uint32_t			MFA_enabled;
324 	uint64_t			map_id;
325 	struct mfi_command 		*map_update_cmd;
326 	/* Single Reply structure size */
327 	uint16_t			reply_size;
328 	/* Singler message size. */
329 	uint16_t			raid_io_msg_size;
330 	TAILQ_HEAD(TB, mfi_cmd_tbolt)	mfi_cmd_tbolt_tqh;
331 	/* ThunderBolt base contiguous memory mapping. */
332 	bus_dma_tag_t			mfi_tb_dmat;
333 	bus_dmamap_t			mfi_tb_dmamap;
334 	bus_addr_t			mfi_tb_busaddr;
335 	/* ThunderBolt Contiguous DMA memory Mapping */
336 	uint8_t	*			request_message_pool;
337 	uint8_t *			request_message_pool_align;
338 	uint8_t *			request_desc_pool;
339 	//uint32_t			request_desc_busaddr;
340 	bus_addr_t			request_msg_busaddr;
341 	bus_addr_t			reply_frame_busaddr;
342 	bus_addr_t			sg_frame_busaddr;
343 	/* ThunderBolt IOC Init Descriptor */
344 	bus_dma_tag_t			mfi_tb_ioc_init_dmat;
345 	bus_dmamap_t			mfi_tb_ioc_init_dmamap;
346 	uint8_t *			mfi_tb_ioc_init_desc;
347 	struct mfi_cmd_tbolt		**mfi_cmd_pool_tbolt;
348 	/* Virtual address of reply Frame Pool */
349 	struct mfi_mpi2_reply_header*	reply_frame_pool;
350 	struct mfi_mpi2_reply_header*	reply_frame_pool_align;
351 
352 	/* Last reply frame address */
353 	uint8_t *			reply_pool_limit;
354 	uint16_t			last_reply_idx;
355 	uint8_t				max_SGEs_in_chain_message;
356 	uint8_t				max_SGEs_in_main_message;
357 	uint8_t				chain_offset_value_for_main_message;
358 	uint8_t				chain_offset_value_for_mpt_ptmsg;
359 };
360 
361 union desc_value {
362 	uint64_t	word;
363 	struct {
364 		uint32_t	low;
365 		uint32_t	high;
366 	}u;
367 };
368 
369 // TODO find the right definition
370 #define XXX_MFI_CMD_OP_INIT2                    0x9
371 /*
372  * Request descriptor types
373  */
374 #define MFI_REQ_DESCRIPT_FLAGS_LD_IO           0x7
375 #define MFI_REQ_DESCRIPT_FLAGS_MFA             0x1
376 #define MFI_REQ_DESCRIPT_FLAGS_TYPE_SHIFT	0x1
377 #define MFI_FUSION_FP_DEFAULT_TIMEOUT		0x14
378 #define MFI_LOAD_BALANCE_FLAG			0x1
379 #define MFI_DCMD_MBOX_PEND_FLAG			0x1
380 
381 //#define MR_PROT_INFO_TYPE_CONTROLLER	0x08
382 #define	MEGASAS_SCSI_VARIABLE_LENGTH_CMD	0x7f
383 #define MEGASAS_SCSI_SERVICE_ACTION_READ32	0x9
384 #define MEGASAS_SCSI_SERVICE_ACTION_WRITE32	0xB
385 #define	MEGASAS_SCSI_ADDL_CDB_LEN   		0x18
386 #define MEGASAS_RD_WR_PROTECT_CHECK_ALL		0x20
387 #define MEGASAS_RD_WR_PROTECT_CHECK_NONE	0x60
388 #define MEGASAS_EEDPBLOCKSIZE			512
389 struct mfi_cmd_tbolt {
390 	union mfi_mpi2_request_descriptor *request_desc;
391 	struct mfi_mpi2_request_raid_scsi_io *io_request;
392 	bus_addr_t		io_request_phys_addr;
393 	bus_addr_t		sg_frame_phys_addr;
394 	bus_addr_t 		sense_phys_addr;
395 	MPI2_SGE_IO_UNION	*sg_frame;
396 	uint8_t			*sense;
397 	TAILQ_ENTRY(mfi_cmd_tbolt) next;
398 	/*
399 	 * Context for a MFI frame.
400 	 * Used to get the mfi cmd from list when a MFI cmd is completed
401 	 */
402 	uint32_t		sync_cmd_idx;
403 	uint16_t		index;
404 	uint8_t			status;
405 };
406 
407 extern int mfi_attach(struct mfi_softc *);
408 extern void mfi_free(struct mfi_softc *);
409 extern int mfi_shutdown(struct mfi_softc *);
410 extern void mfi_startio(struct mfi_softc *);
411 extern void mfi_disk_complete(struct bio *);
412 extern int mfi_disk_disable(struct mfi_disk *);
413 extern void mfi_disk_enable(struct mfi_disk *);
414 extern int mfi_dump_blocks(struct mfi_softc *, int id, uint64_t, void *, int);
415 extern int mfi_syspd_disable(struct mfi_system_pd *);
416 extern void mfi_syspd_enable(struct mfi_system_pd *);
417 extern int mfi_dump_syspd_blocks(struct mfi_softc *, int id, uint64_t, void *,
418     int);
419 extern int mfi_transition_firmware(struct mfi_softc *sc);
420 extern int mfi_aen_setup(struct mfi_softc *sc, uint32_t seq_start);
421 extern void mfi_complete(struct mfi_softc *sc, struct mfi_command *cm);
422 extern int mfi_mapcmd(struct mfi_softc *sc,struct mfi_command *cm);
423 extern int mfi_wait_command(struct mfi_softc *sc, struct mfi_command *cm);
424 extern void mfi_tbolt_enable_intr_ppc(struct mfi_softc *);
425 extern void mfi_tbolt_disable_intr_ppc(struct mfi_softc *);
426 extern int32_t mfi_tbolt_read_fw_status_ppc(struct mfi_softc *);
427 extern int32_t mfi_tbolt_check_clear_intr_ppc(struct mfi_softc *);
428 extern void mfi_tbolt_issue_cmd_ppc(struct mfi_softc *, bus_addr_t, uint32_t);
429 extern void mfi_tbolt_init_globals(struct mfi_softc*);
430 extern uint32_t mfi_tbolt_get_memory_requirement(struct mfi_softc *);
431 extern int mfi_tbolt_init_desc_pool(struct mfi_softc *, uint8_t *, uint32_t);
432 extern int mfi_tbolt_init_MFI_queue(struct mfi_softc *);
433 extern void mfi_intr_tbolt(void *arg);
434 extern int mfi_tbolt_alloc_cmd(struct mfi_softc *sc);
435 extern int mfi_tbolt_send_frame(struct mfi_softc *sc, struct mfi_command *cm);
436 extern int mfi_tbolt_adp_reset(struct mfi_softc *sc);
437 extern int mfi_tbolt_reset(struct mfi_softc *sc);
438 extern int mfi_tbolt_sync_map_info(struct mfi_softc *sc);
439 
440 #define MFIQ_ADD(sc, qname)					\
441 	do {							\
442 		struct mfi_qstat *qs;				\
443 								\
444 		qs = &(sc)->mfi_qstat[qname];			\
445 		qs->q_length++;					\
446 		if (qs->q_length > qs->q_max)			\
447 			qs->q_max = qs->q_length;		\
448 	} while (0)
449 
450 #define MFIQ_REMOVE(sc, qname)	(sc)->mfi_qstat[qname].q_length--
451 
452 #define MFIQ_INIT(sc, qname)					\
453 	do {							\
454 		sc->mfi_qstat[qname].q_length = 0;		\
455 		sc->mfi_qstat[qname].q_max = 0;			\
456 	} while (0)
457 
458 #define MFIQ_COMMAND_QUEUE(name, index)					\
459 	static __inline void						\
460 	mfi_initq_ ## name (struct mfi_softc *sc)			\
461 	{								\
462 		TAILQ_INIT(&sc->mfi_ ## name);				\
463 		MFIQ_INIT(sc, index);					\
464 	}								\
465 	static __inline void						\
466 	mfi_enqueue_ ## name (struct mfi_command *cm)			\
467 	{								\
468 		if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) {		\
469 			kprintf("command %p is on another queue, "	\
470 			    "flags = %#x\n", cm, cm->cm_flags);		\
471 			panic("command is on another queue");		\
472 		}							\
473 		TAILQ_INSERT_TAIL(&cm->cm_sc->mfi_ ## name, cm, cm_link); \
474 		cm->cm_flags |= MFI_ON_ ## index;			\
475 		MFIQ_ADD(cm->cm_sc, index);				\
476 	}								\
477 	static __inline void						\
478 	mfi_requeue_ ## name (struct mfi_command *cm)			\
479 	{								\
480 		if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) {		\
481 			kprintf("command %p is on another queue, "	\
482 			    "flags = %#x\n", cm, cm->cm_flags);		\
483 			panic("command is on another queue");		\
484 		}							\
485 		TAILQ_INSERT_HEAD(&cm->cm_sc->mfi_ ## name, cm, cm_link); \
486 		cm->cm_flags |= MFI_ON_ ## index;			\
487 		MFIQ_ADD(cm->cm_sc, index);				\
488 	}								\
489 	static __inline struct mfi_command *				\
490 	mfi_dequeue_ ## name (struct mfi_softc *sc)			\
491 	{								\
492 		struct mfi_command *cm;					\
493 									\
494 		if ((cm = TAILQ_FIRST(&sc->mfi_ ## name)) != NULL) {	\
495 			if ((cm->cm_flags & MFI_ON_ ## index) == 0) {	\
496 				kprintf("command %p not in queue, "	\
497 				    "flags = %#x, bit = %#x\n", cm,	\
498 				    cm->cm_flags, MFI_ON_ ## index);	\
499 				panic("command not in queue");		\
500 			}						\
501 			TAILQ_REMOVE(&sc->mfi_ ## name, cm, cm_link);	\
502 			cm->cm_flags &= ~MFI_ON_ ## index;		\
503 			MFIQ_REMOVE(sc, index);				\
504 		}							\
505 		return (cm);						\
506 	}								\
507 	static __inline void						\
508 	mfi_remove_ ## name (struct mfi_command *cm)			\
509 	{								\
510 		if ((cm->cm_flags & MFI_ON_ ## index) == 0) {		\
511 			kprintf("command %p not in queue, flags = %#x, " \
512 			    "bit = %#x\n", cm, cm->cm_flags,		\
513 			    MFI_ON_ ## index);				\
514 			panic("command not in queue");			\
515 		}							\
516 		TAILQ_REMOVE(&cm->cm_sc->mfi_ ## name, cm, cm_link);	\
517 		cm->cm_flags &= ~MFI_ON_ ## index;			\
518 		MFIQ_REMOVE(cm->cm_sc, index);				\
519 	}								\
520 struct hack
521 
522 MFIQ_COMMAND_QUEUE(free, MFIQ_FREE);
523 MFIQ_COMMAND_QUEUE(ready, MFIQ_READY);
524 MFIQ_COMMAND_QUEUE(busy, MFIQ_BUSY);
525 
526 static __inline void
527 mfi_initq_bio(struct mfi_softc *sc)
528 {
529 	bioq_init(&sc->mfi_bioq);
530 	MFIQ_INIT(sc, MFIQ_BIO);
531 }
532 
533 static __inline void
534 mfi_enqueue_bio(struct mfi_softc *sc, struct bio *bp)
535 {
536 	bioq_insert_tail(&sc->mfi_bioq, bp);
537 	MFIQ_ADD(sc, MFIQ_BIO);
538 }
539 
540 static __inline struct bio *
541 mfi_dequeue_bio(struct mfi_softc *sc)
542 {
543 	struct bio *bp;
544 
545 	if ((bp = bioq_first(&sc->mfi_bioq)) != NULL) {
546 		bioq_remove(&sc->mfi_bioq, bp);
547 		MFIQ_REMOVE(sc, MFIQ_BIO);
548 	}
549 	return (bp);
550 }
551 
552 static __inline void
553 mfi_print_sense(struct mfi_softc *sc, void *sense)
554 {
555 	int error, key, asc, ascq;
556 
557 	scsi_extract_sense((struct scsi_sense_data *)sense,
558 	    &error, &key, &asc, &ascq);
559 	device_printf(sc->mfi_dev, "sense error %d, sense_key %d, "
560 	    "asc %d, ascq %d\n", error, key, asc, ascq);
561 }
562 
563 /* XXX
564  *
565  * Mimics FreeBSD's mtx_assert() behavior.
566  * We might want a global lockassert() function in the future.
567  */
568 static __inline void
569 mfi_lockassert(struct lock *lockp)
570 {
571 	if (panicstr == NULL && !dumping)
572 		KKASSERT(lockstatus(lockp, curthread) != 0);
573 }
574 
575 #define MFI_WRITE4(sc, reg, val)	bus_space_write_4((sc)->mfi_btag, \
576 	sc->mfi_bhandle, (reg), (val))
577 #define MFI_READ4(sc, reg)		bus_space_read_4((sc)->mfi_btag, \
578 	(sc)->mfi_bhandle, (reg))
579 #define MFI_WRITE2(sc, reg, val)	bus_space_write_2((sc)->mfi_btag, \
580 	sc->mfi_bhandle, (reg), (val))
581 #define MFI_READ2(sc, reg)		bus_space_read_2((sc)->mfi_btag, \
582 	(sc)->mfi_bhandle, (reg))
583 #define MFI_WRITE1(sc, reg, val)	bus_space_write_1((sc)->mfi_btag, \
584 	sc->mfi_bhandle, (reg), (val))
585 #define MFI_READ1(sc, reg)		bus_space_read_1((sc)->mfi_btag, \
586 	(sc)->mfi_bhandle, (reg))
587 
588 MALLOC_DECLARE(M_MFIBUF);
589 
590 #define MFI_RESET_WAIT_TIME 180
591 #define MFI_CMD_TIMEOUT 30
592 #define SKINNY_MEMORY 0x02000000
593 #define MFI_MAXPHYS (128 * 1024)
594 
595 #ifdef MFI_DEBUG
596 extern void mfi_print_cmd(struct mfi_command *cm);
597 extern void mfi_dump_cmds(struct mfi_softc *sc);
598 extern void mfi_validate_sg(struct mfi_softc *, struct mfi_command *, const char *, int );
599 #define MFI_PRINT_CMD(cm)	mfi_print_cmd(cm)
600 #define MFI_DUMP_CMDS(sc)	mfi_dump_cmds(sc)
601 #define MFI_VALIDATE_CMD(sc, cm) mfi_validate_sg(sc, cm, __FUNCTION__, __LINE__)
602 #else
603 #define MFI_PRINT_CMD(cm)
604 #define MFI_DUMP_CMDS(sc)
605 #define MFI_VALIDATE_CMD(sc, cm)
606 #endif
607 
608 extern void mfi_release_command(struct mfi_command *cm);
609 
610 #endif /* _MFIVAR_H */
611