1 /*- 2 * Copyright (c) 1999 Michael Smith 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/dev/mlx/mlx_pci.c,v 1.4.2.5 2001/06/25 04:37:51 msmith Exp $ 27 * $DragonFly: src/sys/dev/raid/mlx/mlx_pci.c,v 1.3 2003/08/07 21:17:09 dillon Exp $ 28 */ 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/kernel.h> 33 34 #include <sys/bus.h> 35 #include <sys/conf.h> 36 #include <sys/devicestat.h> 37 #include <sys/disk.h> 38 39 #include <machine/bus_memio.h> 40 #include <machine/bus_pio.h> 41 #include <machine/bus.h> 42 #include <machine/resource.h> 43 #include <sys/rman.h> 44 45 #include <bus/pci/pcireg.h> 46 #include <bus/pci/pcivar.h> 47 48 #include "mlx_compat.h" 49 #include "mlxio.h" 50 #include "mlxvar.h" 51 #include "mlxreg.h" 52 53 static int mlx_pci_probe(device_t dev); 54 static int mlx_pci_attach(device_t dev); 55 56 static device_method_t mlx_methods[] = { 57 /* Device interface */ 58 DEVMETHOD(device_probe, mlx_pci_probe), 59 DEVMETHOD(device_attach, mlx_pci_attach), 60 DEVMETHOD(device_detach, mlx_detach), 61 DEVMETHOD(device_shutdown, mlx_shutdown), 62 DEVMETHOD(device_suspend, mlx_suspend), 63 DEVMETHOD(device_resume, mlx_resume), 64 65 DEVMETHOD(bus_print_child, bus_generic_print_child), 66 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 67 { 0, 0 } 68 }; 69 70 static driver_t mlx_pci_driver = { 71 "mlx", 72 mlx_methods, 73 sizeof(struct mlx_softc) 74 }; 75 76 DRIVER_MODULE(mlx, pci, mlx_pci_driver, mlx_devclass, 0, 0); 77 78 struct mlx_ident 79 { 80 u_int16_t vendor; 81 u_int16_t device; 82 u_int16_t subvendor; 83 u_int16_t subdevice; 84 int iftype; 85 char *desc; 86 } mlx_identifiers[] = { 87 {0x1069, 0x0001, 0x0000, 0x0000, MLX_IFTYPE_2, "Mylex version 2 RAID interface"}, 88 {0x1069, 0x0002, 0x0000, 0x0000, MLX_IFTYPE_3, "Mylex version 3 RAID interface"}, 89 {0x1069, 0x0010, 0x0000, 0x0000, MLX_IFTYPE_4, "Mylex version 4 RAID interface"}, 90 {0x1011, 0x1065, 0x1069, 0x0020, MLX_IFTYPE_5, "Mylex version 5 RAID interface"}, 91 {0, 0, 0, 0, 0, 0} 92 }; 93 94 static int 95 mlx_pci_probe(device_t dev) 96 { 97 struct mlx_ident *m; 98 99 debug_called(1); 100 101 for (m = mlx_identifiers; m->vendor != 0; m++) { 102 if ((m->vendor == pci_get_vendor(dev)) && 103 (m->device == pci_get_device(dev)) && 104 ((m->subvendor == 0) || ((m->subvendor == pci_get_subvendor(dev)) && 105 (m->subdevice == pci_get_subdevice(dev))))) { 106 107 device_set_desc(dev, m->desc); 108 return(-10); /* allow room to be overridden */ 109 } 110 } 111 return(ENXIO); 112 } 113 114 static int 115 mlx_pci_attach(device_t dev) 116 { 117 struct mlx_softc *sc; 118 int i, error; 119 u_int32_t command; 120 121 debug_called(1); 122 123 /* 124 * Make sure we are going to be able to talk to this board. 125 */ 126 command = pci_read_config(dev, PCIR_COMMAND, 2); 127 if ((command & PCIM_CMD_MEMEN) == 0) { 128 device_printf(dev, "memory window not available\n"); 129 return(ENXIO); 130 } 131 /* force the busmaster enable bit on */ 132 command |= PCIM_CMD_BUSMASTEREN; 133 pci_write_config(dev, PCIR_COMMAND, command, 2); 134 135 /* 136 * Initialise softc. 137 */ 138 sc = device_get_softc(dev); 139 bzero(sc, sizeof(*sc)); 140 sc->mlx_dev = dev; 141 142 /* 143 * Work out what sort of adapter this is (we need to know this in order 144 * to map the appropriate interface resources). 145 */ 146 sc->mlx_iftype = 0; 147 for (i = 0; mlx_identifiers[i].vendor != 0; i++) { 148 if ((mlx_identifiers[i].vendor == pci_get_vendor(dev)) && 149 (mlx_identifiers[i].device == pci_get_device(dev))) { 150 sc->mlx_iftype = mlx_identifiers[i].iftype; 151 break; 152 } 153 } 154 if (sc->mlx_iftype == 0) /* shouldn't happen */ 155 return(ENXIO); 156 157 /* 158 * Allocate the PCI register window. 159 */ 160 161 /* type 2/3 adapters have an I/O region we don't prefer at base 0 */ 162 switch(sc->mlx_iftype) { 163 case MLX_IFTYPE_2: 164 case MLX_IFTYPE_3: 165 sc->mlx_mem_type = SYS_RES_MEMORY; 166 sc->mlx_mem_rid = MLX_CFG_BASE1; 167 sc->mlx_mem = bus_alloc_resource(dev, sc->mlx_mem_type, &sc->mlx_mem_rid, 0, ~0, 1, RF_ACTIVE); 168 if (sc->mlx_mem == NULL) { 169 sc->mlx_mem_type = SYS_RES_IOPORT; 170 sc->mlx_mem_rid = MLX_CFG_BASE0; 171 sc->mlx_mem = bus_alloc_resource(dev, sc->mlx_mem_type, &sc->mlx_mem_rid, 0, ~0, 1, RF_ACTIVE); 172 } 173 break; 174 case MLX_IFTYPE_4: 175 case MLX_IFTYPE_5: 176 sc->mlx_mem_type = SYS_RES_MEMORY; 177 sc->mlx_mem_rid = MLX_CFG_BASE0; 178 sc->mlx_mem = bus_alloc_resource(dev, sc->mlx_mem_type, &sc->mlx_mem_rid, 0, ~0, 1, RF_ACTIVE); 179 break; 180 } 181 if (sc->mlx_mem == NULL) { 182 device_printf(sc->mlx_dev, "couldn't allocate mailbox window\n"); 183 mlx_free(sc); 184 return(ENXIO); 185 } 186 sc->mlx_btag = rman_get_bustag(sc->mlx_mem); 187 sc->mlx_bhandle = rman_get_bushandle(sc->mlx_mem); 188 189 /* 190 * Allocate the parent bus DMA tag appropriate for PCI. 191 */ 192 error = bus_dma_tag_create(NULL, /* parent */ 193 1, 0, /* alignment, boundary */ 194 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 195 BUS_SPACE_MAXADDR, /* highaddr */ 196 NULL, NULL, /* filter, filterarg */ 197 MAXBSIZE, MLX_NSEG, /* maxsize, nsegments */ 198 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 199 BUS_DMA_ALLOCNOW, /* flags */ 200 &sc->mlx_parent_dmat); 201 if (error != 0) { 202 device_printf(dev, "can't allocate parent DMA tag\n"); 203 mlx_free(sc); 204 return(ENOMEM); 205 } 206 207 /* 208 * Do bus-independant initialisation. 209 */ 210 error = mlx_attach(sc); 211 if (error != 0) { 212 mlx_free(sc); 213 return(error); 214 } 215 216 /* 217 * Start the controller. 218 */ 219 mlx_startup(sc); 220 return(0); 221 } 222