1 /*- 2 * Copyright (c) 2000, 2001 Michael Smith 3 * Copyright (c) 2000 BSDi 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD: src/sys/dev/mly/mlyvar.h,v 1.1.2.2 2001/03/05 20:17:24 msmith Exp $ 28 * $DragonFly: src/sys/dev/raid/mly/mlyvar.h,v 1.5 2005/02/17 13:59:36 joerg Exp $ 29 */ 30 31 /******************************************************************************** 32 ******************************************************************************** 33 Driver Parameter Definitions 34 ******************************************************************************** 35 ********************************************************************************/ 36 37 /* 38 * The firmware interface allows for a 16-bit command identifier. A lookup 39 * table this size (256k) would be too expensive, so we cap ourselves at a 40 * reasonable limit. 41 */ 42 #define MLY_MAXCOMMANDS 256 /* max commands per controller */ 43 44 /* 45 * The firmware interface allows for a 16-bit s/g list length. We limit 46 * ourselves to a reasonable maximum and ensure alignment. 47 */ 48 #define MLY_MAXSGENTRIES 64 /* max S/G entries, limit 65535 */ 49 50 /******************************************************************************** 51 ******************************************************************************** 52 Cross-version Compatibility 53 ******************************************************************************** 54 ********************************************************************************/ 55 56 #if defined(__FreeBSD__) && __FreeBSD_version >= 500005 57 # include <sys/taskqueue.h> 58 #endif 59 60 #if defined(__DragonFly__) || __FreeBSD_version <= 500014 61 # include <machine/clock.h> 62 # undef offsetof 63 # define offsetof(type, field) ((size_t)(&((type *)0)->field)) 64 #endif 65 66 /******************************************************************************** 67 ******************************************************************************** 68 Driver Variable Definitions 69 ******************************************************************************** 70 ********************************************************************************/ 71 72 /* 73 * Debugging levels: 74 * 0 - quiet, only emit warnings 75 * 1 - noisy, emit major function points and things done 76 * 2 - extremely noisy, emit trace items in loops, etc. 77 */ 78 #ifdef MLY_DEBUG 79 # define debug(level, fmt, args...) do { if (level <= MLY_DEBUG) printf("%s: " fmt "\n", __func__ , ##args); } while(0) 80 # define debug_called(level) do { if (level <= MLY_DEBUG) printf(__func__ ": called\n"); } while(0) 81 # define debug_struct(s) printf(" SIZE %s: %d\n", #s, sizeof(struct s)) 82 # define debug_union(s) printf(" SIZE %s: %d\n", #s, sizeof(union s)) 83 # define debug_field(s, f) printf(" OFFSET %s.%s: %d\n", #s, #f, ((int)&(((struct s *)0)->f))) 84 extern void mly_printstate0(void); 85 extern struct mly_softc *mly_softc0; 86 #else 87 # define debug(level, fmt, args...) 88 # define debug_called(level) 89 # define debug_struct(s) 90 #endif 91 92 #define mly_printf(sc, fmt, args...) device_printf(sc->mly_dev, fmt , ##args) 93 94 /* 95 * Per-device structure, used to save persistent state on devices. 96 * 97 * Note that this isn't really Bus/Target/Lun since we don't support 98 * lun != 0 at this time. 99 */ 100 struct mly_btl { 101 int mb_flags; 102 #define MLY_BTL_PHYSICAL (1<<0) /* physical device */ 103 #define MLY_BTL_LOGICAL (1<<1) /* logical device */ 104 #define MLY_BTL_PROTECTED (1<<2) /* device is protected - I/O not allowed */ 105 #define MLY_BTL_RESCAN (1<<3) /* device needs to be rescanned */ 106 char mb_name[16]; /* peripheral attached to this device */ 107 int mb_state; /* see 8.1 */ 108 int mb_type; /* see 8.2 */ 109 110 /* physical devices only */ 111 int mb_speed; /* interface transfer rate */ 112 int mb_width; /* interface width */ 113 }; 114 115 /* 116 * Per-command control structure. 117 */ 118 struct mly_command { 119 TAILQ_ENTRY(mly_command) mc_link; /* list linkage */ 120 121 struct mly_softc *mc_sc; /* controller that owns us */ 122 u_int16_t mc_slot; /* command slot we occupy */ 123 int mc_flags; 124 #define MLY_CMD_BUSY (1<<0) /* command is being run, or ready to run, or not completed */ 125 #define MLY_CMD_COMPLETE (1<<1) /* command has been completed */ 126 #define MLY_CMD_MAPPED (1<<3) /* command has had its data mapped */ 127 #define MLY_CMD_DATAIN (1<<4) /* data moves controller->system */ 128 #define MLY_CMD_DATAOUT (1<<5) /* data moves system->controller */ 129 u_int16_t mc_status; /* command completion status */ 130 u_int8_t mc_sense; /* sense data length */ 131 int32_t mc_resid; /* I/O residual count */ 132 133 union mly_command_packet *mc_packet; /* our controller command */ 134 u_int64_t mc_packetphys; /* physical address of the mapped packet */ 135 136 void *mc_data; /* data buffer */ 137 size_t mc_length; /* data length */ 138 bus_dmamap_t mc_datamap; /* DMA map for data */ 139 140 void (* mc_complete)(struct mly_command *mc); /* completion handler */ 141 void *mc_private; /* caller-private data */ 142 143 }; 144 145 /* 146 * Command slot regulation. 147 * 148 * We can't use slot 0 due to the memory mailbox implementation. 149 */ 150 #define MLY_SLOT_START 1 151 #define MLY_SLOT_MAX (MLY_SLOT_START + MLY_MAXCOMMANDS) 152 153 /* 154 * Per-controller structure. 155 */ 156 struct mly_softc { 157 /* bus connections */ 158 device_t mly_dev; 159 dev_t mly_dev_t; 160 struct resource *mly_regs_resource; /* register interface window */ 161 int mly_regs_rid; /* resource ID */ 162 bus_space_handle_t mly_bhandle; /* bus space handle */ 163 bus_space_tag_t mly_btag; /* bus space tag */ 164 bus_dma_tag_t mly_parent_dmat; /* parent DMA tag */ 165 bus_dma_tag_t mly_buffer_dmat; /* data buffer/command DMA tag */ 166 struct resource *mly_irq; /* interrupt */ 167 int mly_irq_rid; 168 void *mly_intr; /* interrupt handle */ 169 170 /* scatter/gather lists and their controller-visible mappings */ 171 struct mly_sg_entry *mly_sg_table; /* s/g lists */ 172 u_int32_t mly_sg_busaddr; /* s/g table base address in bus space */ 173 bus_dma_tag_t mly_sg_dmat; /* s/g buffer DMA tag */ 174 bus_dmamap_t mly_sg_dmamap; /* map for s/g buffers */ 175 176 /* controller hardware interface */ 177 int mly_hwif; 178 #define MLY_HWIF_I960RX 0 179 #define MLY_HWIF_STRONGARM 1 180 u_int8_t mly_doorbell_true; /* xor map to make hardware doorbell 'true' bits into 1s */ 181 u_int8_t mly_command_mailbox; /* register offsets */ 182 u_int8_t mly_status_mailbox; 183 u_int8_t mly_idbr; 184 u_int8_t mly_odbr; 185 u_int8_t mly_error_status; 186 u_int8_t mly_interrupt_status; 187 u_int8_t mly_interrupt_mask; 188 struct mly_mmbox *mly_mmbox; /* kernel-space address of memory mailbox */ 189 u_int64_t mly_mmbox_busaddr; /* bus-space address of memory mailbox */ 190 bus_dma_tag_t mly_mmbox_dmat; /* memory mailbox DMA tag */ 191 bus_dmamap_t mly_mmbox_dmamap; /* memory mailbox DMA map */ 192 u_int32_t mly_mmbox_command_index; /* next index to use */ 193 u_int32_t mly_mmbox_status_index; /* index we next expect status at */ 194 195 /* controller features, limits and status */ 196 int mly_state; 197 #define MLY_STATE_SUSPEND (1<<0) 198 #define MLY_STATE_OPEN (1<<1) 199 #define MLY_STATE_INTERRUPTS_ON (1<<2) 200 #define MLY_STATE_MMBOX_ACTIVE (1<<3) 201 struct mly_ioctl_getcontrollerinfo *mly_controllerinfo; 202 struct mly_param_controller *mly_controllerparam; 203 struct mly_btl mly_btl[MLY_MAX_CHANNELS][MLY_MAX_TARGETS]; 204 205 /* command management */ 206 struct mly_command mly_command[MLY_MAXCOMMANDS]; /* commands */ 207 union mly_command_packet *mly_packet; /* command packets */ 208 bus_dma_tag_t mly_packet_dmat; /* packet DMA tag */ 209 bus_dmamap_t mly_packetmap; /* packet DMA map */ 210 u_int64_t mly_packetphys; /* packet array base address */ 211 TAILQ_HEAD(,mly_command) mly_free; /* commands available for reuse */ 212 TAILQ_HEAD(,mly_command) mly_ready; /* commands ready to be submitted */ 213 TAILQ_HEAD(,mly_command) mly_busy; 214 TAILQ_HEAD(,mly_command) mly_complete; /* commands which have been returned by the controller */ 215 struct mly_qstat mly_qstat[MLYQ_COUNT]; /* queue statistics */ 216 217 /* health monitoring */ 218 u_int32_t mly_event_change; /* event status change indicator */ 219 u_int32_t mly_event_counter; /* next event for which we anticpiate status */ 220 u_int32_t mly_event_waiting; /* next event the controller will post status for */ 221 struct callout mly_periodic; /* periodic event handling */ 222 223 /* CAM connection */ 224 TAILQ_HEAD(,ccb_hdr) mly_cam_ccbq; /* outstanding I/O from CAM */ 225 struct cam_sim *mly_cam_sim[MLY_MAX_CHANNELS]; 226 int mly_cam_lowbus; 227 228 #if defined(__FreeBSD__) && __FreeBSD_version >= 500005 229 /* command-completion task */ 230 struct task mly_task_complete; /* deferred-completion task */ 231 #endif 232 }; 233 234 /* 235 * Register access helpers. 236 */ 237 #define MLY_SET_REG(sc, reg, val) bus_space_write_1(sc->mly_btag, sc->mly_bhandle, reg, val) 238 #define MLY_GET_REG(sc, reg) bus_space_read_1 (sc->mly_btag, sc->mly_bhandle, reg) 239 #define MLY_GET_REG2(sc, reg) bus_space_read_2 (sc->mly_btag, sc->mly_bhandle, reg) 240 #define MLY_GET_REG4(sc, reg) bus_space_read_4 (sc->mly_btag, sc->mly_bhandle, reg) 241 242 #define MLY_SET_MBOX(sc, mbox, ptr) \ 243 do { \ 244 bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox, *((u_int32_t *)ptr)); \ 245 bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox + 4, *((u_int32_t *)ptr + 1)); \ 246 bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox + 8, *((u_int32_t *)ptr + 2)); \ 247 bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox + 12, *((u_int32_t *)ptr + 3)); \ 248 } while(0); 249 #define MLY_GET_MBOX(sc, mbox, ptr) \ 250 do { \ 251 *((u_int32_t *)ptr) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox); \ 252 *((u_int32_t *)ptr + 1) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 4); \ 253 *((u_int32_t *)ptr + 2) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 8); \ 254 *((u_int32_t *)ptr + 3) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 12); \ 255 } while(0); 256 257 #define MLY_IDBR_TRUE(sc, mask) \ 258 ((((MLY_GET_REG((sc), (sc)->mly_idbr)) ^ (sc)->mly_doorbell_true) & (mask)) == (mask)) 259 #define MLY_ODBR_TRUE(sc, mask) \ 260 ((MLY_GET_REG((sc), (sc)->mly_odbr) & (mask)) == (mask)) 261 #define MLY_ERROR_VALID(sc) \ 262 ((((MLY_GET_REG((sc), (sc)->mly_error_status)) ^ (sc)->mly_doorbell_true) & (MLY_MSG_EMPTY)) == 0) 263 264 #define MLY_MASK_INTERRUPTS(sc) \ 265 do { \ 266 MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_DISABLE); \ 267 sc->mly_state &= ~MLY_STATE_INTERRUPTS_ON; \ 268 } while(0); 269 #define MLY_UNMASK_INTERRUPTS(sc) \ 270 do { \ 271 MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_ENABLE); \ 272 sc->mly_state |= MLY_STATE_INTERRUPTS_ON; \ 273 } while(0); 274 275 /* 276 * Logical device number -> bus/target translation 277 */ 278 #define MLY_LOGDEV_BUS(sc, x) (((x) / MLY_MAX_TARGETS) + (sc)->mly_controllerinfo->physical_channels_present) 279 #define MLY_LOGDEV_TARGET(x) ((x) % MLY_MAX_TARGETS) 280 281 /* 282 * Public functions/variables 283 */ 284 /* mly.c */ 285 extern int mly_attach(struct mly_softc *sc); 286 extern void mly_detach(struct mly_softc *sc); 287 extern void mly_free(struct mly_softc *sc); 288 extern void mly_startio(struct mly_softc *sc); 289 extern void mly_done(struct mly_softc *sc); 290 extern int mly_alloc_command(struct mly_softc *sc, struct mly_command **mcp); 291 extern void mly_release_command(struct mly_command *mc); 292 293 /* mly_cam.c */ 294 extern int mly_cam_attach(struct mly_softc *sc); 295 extern void mly_cam_detach(struct mly_softc *sc); 296 extern int mly_cam_command(struct mly_softc *sc, struct mly_command **mcp); 297 extern int mly_name_device(struct mly_softc *sc, int bus, int target); 298 299 /******************************************************************************** 300 * Queue primitives 301 */ 302 303 #define MLYQ_ADD(sc, qname) \ 304 do { \ 305 struct mly_qstat *qs = &(sc)->mly_qstat[qname]; \ 306 \ 307 qs->q_length++; \ 308 if (qs->q_length > qs->q_max) \ 309 qs->q_max = qs->q_length; \ 310 } while(0) 311 312 #define MLYQ_REMOVE(sc, qname) (sc)->mly_qstat[qname].q_length-- 313 #define MLYQ_INIT(sc, qname) \ 314 do { \ 315 sc->mly_qstat[qname].q_length = 0; \ 316 sc->mly_qstat[qname].q_max = 0; \ 317 } while(0) 318 319 320 #define MLYQ_COMMAND_QUEUE(name, index) \ 321 static __inline void \ 322 mly_initq_ ## name (struct mly_softc *sc) \ 323 { \ 324 TAILQ_INIT(&sc->mly_ ## name); \ 325 MLYQ_INIT(sc, index); \ 326 } \ 327 static __inline void \ 328 mly_enqueue_ ## name (struct mly_command *mc) \ 329 { \ 330 int s; \ 331 \ 332 s = splcam(); \ 333 TAILQ_INSERT_TAIL(&mc->mc_sc->mly_ ## name, mc, mc_link); \ 334 MLYQ_ADD(mc->mc_sc, index); \ 335 splx(s); \ 336 } \ 337 static __inline void \ 338 mly_requeue_ ## name (struct mly_command *mc) \ 339 { \ 340 int s; \ 341 \ 342 s = splcam(); \ 343 TAILQ_INSERT_HEAD(&mc->mc_sc->mly_ ## name, mc, mc_link); \ 344 MLYQ_ADD(mc->mc_sc, index); \ 345 splx(s); \ 346 } \ 347 static __inline struct mly_command * \ 348 mly_dequeue_ ## name (struct mly_softc *sc) \ 349 { \ 350 struct mly_command *mc; \ 351 int s; \ 352 \ 353 s = splcam(); \ 354 if ((mc = TAILQ_FIRST(&sc->mly_ ## name)) != NULL) { \ 355 TAILQ_REMOVE(&sc->mly_ ## name, mc, mc_link); \ 356 MLYQ_REMOVE(sc, index); \ 357 } \ 358 splx(s); \ 359 return(mc); \ 360 } \ 361 static __inline void \ 362 mly_remove_ ## name (struct mly_command *mc) \ 363 { \ 364 int s; \ 365 \ 366 s = splcam(); \ 367 TAILQ_REMOVE(&mc->mc_sc->mly_ ## name, mc, mc_link); \ 368 MLYQ_REMOVE(mc->mc_sc, index); \ 369 splx(s); \ 370 } \ 371 struct hack 372 373 MLYQ_COMMAND_QUEUE(free, MLYQ_FREE); 374 MLYQ_COMMAND_QUEUE(ready, MLYQ_READY); 375 MLYQ_COMMAND_QUEUE(busy, MLYQ_BUSY); 376 MLYQ_COMMAND_QUEUE(complete, MLYQ_COMPLETE); 377 378