xref: /dragonfly/sys/dev/raid/mly/mlyvar.h (revision 91dc43dd)
1 /*-
2  * Copyright (c) 2000, 2001 Michael Smith
3  * Copyright (c) 2000 BSDi
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  *	$FreeBSD: src/sys/dev/mly/mlyvar.h,v 1.7 2005/08/08 12:23:27 scottl Exp $
28  */
29 
30 #include <sys/thread2.h>
31 
32 /********************************************************************************
33  ********************************************************************************
34                                                      Driver Parameter Definitions
35  ********************************************************************************
36  ********************************************************************************/
37 
38 /*
39  * The firmware interface allows for a 16-bit command identifier.  A lookup
40  * table this size (256k) would be too expensive, so we cap ourselves at a
41  * reasonable limit.
42  */
43 #define MLY_MAX_COMMANDS	256	/* max commands per controller */
44 
45 /*
46  * The firmware interface allows for a 16-bit s/g list length.  We limit
47  * ourselves to a reasonable maximum and ensure alignment.
48  */
49 #define MLY_MAX_SGENTRIES	64	/* max S/G entries, limit 65535 */
50 
51 /*
52  * The interval at which we poke the controller for status updates (in seconds).
53  */
54 #define MLY_PERIODIC_INTERVAL	1
55 
56 /********************************************************************************
57  ********************************************************************************
58                                                       Cross-version Compatibility
59  ********************************************************************************
60  ********************************************************************************/
61 
62 # include <sys/taskqueue.h>
63 
64 #ifndef INTR_ENTROPY
65 # define INTR_ENTROPY 0
66 #endif
67 
68 /********************************************************************************
69  ********************************************************************************
70                                                       Driver Variable Definitions
71  ********************************************************************************
72  ********************************************************************************/
73 
74 /*
75  * Debugging levels:
76  *  0 - quiet, only emit warnings
77  *  1 - noisy, emit major function points and things done
78  *  2 - extremely noisy, emit trace items in loops, etc.
79  */
80 #ifdef MLY_DEBUG
81 # define debug(level, fmt, args...)	do { if (level <= MLY_DEBUG) kprintf("%s: " fmt "\n", __func__ , ##args); } while(0)
82 # define debug_called(level)		do { if (level <= MLY_DEBUG) kprintf("%s: called\n", __func__); } while(0)
83 # define debug_struct(s)		kprintf("  SIZE %s: %d\n", #s, sizeof(struct s))
84 # define debug_union(s)			kprintf("  SIZE %s: %d\n", #s, sizeof(union s))
85 # define debug_field(s, f)		kprintf("  OFFSET %s.%s: %d\n", #s, #f, ((int)&(((struct s *)0)->f)))
86 extern void		mly_printstate0(void);
87 extern struct mly_softc	*mly_softc0;
88 #else
89 # define debug(level, fmt, args...)
90 # define debug_called(level)
91 # define debug_struct(s)
92 #endif
93 
94 #define mly_printf(sc, fmt, args...)	device_printf(sc->mly_dev, fmt , ##args)
95 
96 /*
97  * Per-device structure, used to save persistent state on devices.
98  *
99  * Note that this isn't really Bus/Target/Lun since we don't support
100  * lun != 0 at this time.
101  */
102 struct mly_btl {
103     int			mb_flags;
104 #define MLY_BTL_PHYSICAL	(1<<0)		/* physical device */
105 #define MLY_BTL_LOGICAL		(1<<1)		/* logical device */
106 #define MLY_BTL_PROTECTED	(1<<2)		/* device is protected - I/O not allowed */
107 #define MLY_BTL_RESCAN		(1<<3)		/* device needs to be rescanned */
108     char		mb_name[16];		/* peripheral attached to this device */
109     int			mb_state;		/* see 8.1 */
110     int			mb_type;		/* see 8.2 */
111 
112     /* physical devices only */
113     int			mb_speed;		/* interface transfer rate */
114     int			mb_width;		/* interface width */
115 };
116 
117 /*
118  * Per-command control structure.
119  */
120 struct mly_command {
121     TAILQ_ENTRY(mly_command)	mc_link;	/* list linkage */
122 
123     struct mly_softc		*mc_sc;		/* controller that owns us */
124     u_int16_t			mc_slot;	/* command slot we occupy */
125     int				mc_flags;
126 #define MLY_CMD_BUSY		(1<<0)		/* command is being run, or ready to run, or not completed */
127 #define MLY_CMD_COMPLETE	(1<<1)		/* command has been completed */
128 #define MLY_CMD_MAPPED		(1<<3)		/* command has had its data mapped */
129 #define MLY_CMD_DATAIN		(1<<4)		/* data moves controller->system */
130 #define MLY_CMD_DATAOUT		(1<<5)		/* data moves system->controller */
131     u_int16_t			mc_status;	/* command completion status */
132     u_int8_t			mc_sense;	/* sense data length */
133     int32_t			mc_resid;	/* I/O residual count */
134 
135     union mly_command_packet	*mc_packet;	/* our controller command */
136     u_int64_t			mc_packetphys;	/* physical address of the mapped packet */
137 
138     void			*mc_data;	/* data buffer */
139     size_t			mc_length;	/* data length */
140     bus_dmamap_t		mc_datamap;	/* DMA map for data */
141 
142     void	(* mc_complete)(struct mly_command *mc);	/* completion handler */
143     void	*mc_private;					/* caller-private data */
144 
145     int				mc_timestamp;
146 };
147 
148 /*
149  * Command slot regulation.
150  *
151  * We can't use slot 0 due to the memory mailbox implementation.
152  */
153 #define MLY_SLOT_START		1
154 #define MLY_SLOT_MAX		(MLY_SLOT_START + MLY_MAX_COMMANDS)
155 
156 /*
157  * Per-controller structure.
158  */
159 struct mly_softc {
160     /* bus connections */
161     device_t		mly_dev;
162     cdev_t		mly_dev_t;
163     struct resource	*mly_regs_resource;	/* register interface window */
164     int			mly_regs_rid;		/* resource ID */
165     bus_space_handle_t	mly_bhandle;		/* bus space handle */
166     bus_space_tag_t	mly_btag;		/* bus space tag */
167     bus_dma_tag_t	mly_parent_dmat;	/* parent DMA tag */
168     bus_dma_tag_t	mly_buffer_dmat;	/* data buffer/command DMA tag */
169     struct resource	*mly_irq;		/* interrupt */
170     int			mly_irq_rid;
171     void		*mly_intr;		/* interrupt handle */
172 
173     /* scatter/gather lists and their controller-visible mappings */
174     struct mly_sg_entry	*mly_sg_table;		/* s/g lists */
175     u_int32_t		mly_sg_busaddr;		/* s/g table base address in bus space */
176     bus_dma_tag_t	mly_sg_dmat;		/* s/g buffer DMA tag */
177     bus_dmamap_t	mly_sg_dmamap;		/* map for s/g buffers */
178 
179     /* controller hardware interface */
180     int			mly_hwif;
181 #define MLY_HWIF_I960RX		0
182 #define MLY_HWIF_STRONGARM	1
183     u_int8_t		mly_doorbell_true;	/* xor map to make hardware doorbell 'true' bits into 1s */
184     u_int8_t		mly_command_mailbox;	/* register offsets */
185     u_int8_t		mly_status_mailbox;
186     u_int8_t		mly_idbr;
187     u_int8_t		mly_odbr;
188     u_int8_t		mly_error_status;
189     u_int8_t		mly_interrupt_status;
190     u_int8_t		mly_interrupt_mask;
191     struct mly_mmbox	*mly_mmbox;			/* kernel-space address of memory mailbox */
192     u_int64_t		mly_mmbox_busaddr;		/* bus-space address of memory mailbox */
193     bus_dma_tag_t	mly_mmbox_dmat;			/* memory mailbox DMA tag */
194     bus_dmamap_t	mly_mmbox_dmamap;		/* memory mailbox DMA map */
195     u_int32_t		mly_mmbox_command_index;	/* next index to use */
196     u_int32_t		mly_mmbox_status_index;		/* index we next expect status at */
197 
198     /* controller features, limits and status */
199     int			mly_state;
200 #define	MLY_STATE_OPEN		(1<<1)
201 #define MLY_STATE_INTERRUPTS_ON	(1<<2)
202 #define MLY_STATE_MMBOX_ACTIVE	(1<<3)
203 #define MLY_STATE_CAM_FROZEN	(1<<4)
204     struct mly_ioctl_getcontrollerinfo	*mly_controllerinfo;
205     struct mly_param_controller		*mly_controllerparam;
206     struct mly_btl			mly_btl[MLY_MAX_CHANNELS][MLY_MAX_TARGETS];
207 
208     /* command management */
209     struct mly_command		mly_command[MLY_MAX_COMMANDS];	/* commands */
210     union mly_command_packet	*mly_packet;		/* command packets */
211     bus_dma_tag_t		mly_packet_dmat;	/* packet DMA tag */
212     bus_dmamap_t		mly_packetmap;		/* packet DMA map */
213     u_int64_t			mly_packetphys;		/* packet array base address */
214     TAILQ_HEAD(,mly_command)	mly_free;		/* commands available for reuse */
215     TAILQ_HEAD(,mly_command)	mly_busy;
216     TAILQ_HEAD(,mly_command)	mly_complete;		/* commands which have been returned by the controller */
217     struct mly_qstat		mly_qstat[MLYQ_COUNT];	/* queue statistics */
218 
219     /* health monitoring */
220     u_int32_t			mly_event_change;	/* event status change indicator */
221     u_int32_t			mly_event_counter;	/* next event for which we anticpiate status */
222     u_int32_t			mly_event_waiting;	/* next event the controller will post status for */
223     struct callout		mly_periodic;		/* periodic event handling */
224     struct callout		mly_timeout;		/* timeout event handling */
225 
226     /* CAM connection */
227     struct cam_devq		*mly_cam_devq;			/* CAM device queue */
228     struct cam_sim		*mly_cam_sim[MLY_MAX_CHANNELS];	/* CAM SIMs */
229     int				mly_cam_channels;		/* total channel count */
230 
231     /* command-completion task */
232     struct task			mly_task_complete;	/* deferred-completion task */
233     int				mly_qfrzn_cnt;		/* Track simq freezes */
234 };
235 
236 /*
237  * Register access helpers.
238  */
239 #define MLY_SET_REG(sc, reg, val)	bus_space_write_1(sc->mly_btag, sc->mly_bhandle, reg, val)
240 #define MLY_GET_REG(sc, reg)		bus_space_read_1 (sc->mly_btag, sc->mly_bhandle, reg)
241 #define MLY_GET_REG2(sc, reg)		bus_space_read_2 (sc->mly_btag, sc->mly_bhandle, reg)
242 #define MLY_GET_REG4(sc, reg)		bus_space_read_4 (sc->mly_btag, sc->mly_bhandle, reg)
243 
244 #define MLY_SET_MBOX(sc, mbox, ptr)									\
245 	do {												\
246 	    bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox,      *((u_int32_t *)ptr));		\
247 	    bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox +  4, *((u_int32_t *)ptr + 1));	\
248 	    bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox +  8, *((u_int32_t *)ptr + 2));	\
249 	    bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox + 12, *((u_int32_t *)ptr + 3));	\
250 	} while(0);
251 #define MLY_GET_MBOX(sc, mbox, ptr)									\
252 	do {												\
253 	    *((u_int32_t *)ptr) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox);		\
254 	    *((u_int32_t *)ptr + 1) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 4);	\
255 	    *((u_int32_t *)ptr + 2) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 8);	\
256 	    *((u_int32_t *)ptr + 3) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 12);	\
257 	} while(0);
258 
259 #define MLY_IDBR_TRUE(sc, mask)								\
260 	((((MLY_GET_REG((sc), (sc)->mly_idbr)) ^ (sc)->mly_doorbell_true) & (mask)) == (mask))
261 #define MLY_ODBR_TRUE(sc, mask)								\
262 	((MLY_GET_REG((sc), (sc)->mly_odbr) & (mask)) == (mask))
263 #define MLY_ERROR_VALID(sc)								\
264 	((((MLY_GET_REG((sc), (sc)->mly_error_status)) ^ (sc)->mly_doorbell_true) & (MLY_MSG_EMPTY)) == 0)
265 
266 #define MLY_MASK_INTERRUPTS(sc)								\
267 	do {										\
268 	    MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_DISABLE);	\
269 	    sc->mly_state &= ~MLY_STATE_INTERRUPTS_ON;					\
270 	} while(0);
271 #define MLY_UNMASK_INTERRUPTS(sc)							\
272 	do {										\
273 	    MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_ENABLE);	\
274 	    sc->mly_state |= MLY_STATE_INTERRUPTS_ON;					\
275 	} while(0);
276 
277 /*
278  * Bus/target/logical ID-related macros.
279  */
280 #define MLY_LOGDEV_ID(sc, bus, target)	(((bus) - (sc)->mly_controllerinfo->physical_channels_present) * \
281 					 MLY_MAX_TARGETS + (target))
282 #define MLY_LOGDEV_BUS(sc, logdev)	(((logdev) / MLY_MAX_TARGETS) + \
283 					 (sc)->mly_controllerinfo->physical_channels_present)
284 #define MLY_LOGDEV_TARGET(sc, logdev)	((logdev) % MLY_MAX_TARGETS)
285 #define MLY_BUS_IS_VIRTUAL(sc, bus)	((bus) >= (sc)->mly_controllerinfo->physical_channels_present)
286 #define MLY_BUS_IS_VALID(sc, bus)	(((bus) < (sc)->mly_cam_channels) && ((sc)->mly_cam_sim[(bus)] != NULL))
287 
288 /********************************************************************************
289  * Queue primitives
290  */
291 
292 #define MLYQ_ADD(sc, qname)					\
293 	do {							\
294 	    struct mly_qstat *qs = &(sc)->mly_qstat[qname];	\
295 								\
296 	    qs->q_length++;					\
297 	    if (qs->q_length > qs->q_max)			\
298 		qs->q_max = qs->q_length;			\
299 	} while(0)
300 
301 #define MLYQ_REMOVE(sc, qname)    (sc)->mly_qstat[qname].q_length--
302 #define MLYQ_INIT(sc, qname)			\
303 	do {					\
304 	    sc->mly_qstat[qname].q_length = 0;	\
305 	    sc->mly_qstat[qname].q_max = 0;	\
306 	} while(0)
307 
308 
309 #define MLYQ_COMMAND_QUEUE(name, index)					\
310 static __inline void							\
311 mly_initq_ ## name (struct mly_softc *sc)				\
312 {									\
313     TAILQ_INIT(&sc->mly_ ## name);					\
314     MLYQ_INIT(sc, index);						\
315 }									\
316 static __inline void							\
317 mly_enqueue_ ## name (struct mly_command *mc)				\
318 {									\
319     crit_enter();							\
320     TAILQ_INSERT_TAIL(&mc->mc_sc->mly_ ## name, mc, mc_link);		\
321     MLYQ_ADD(mc->mc_sc, index);						\
322     crit_exit();							\
323 }									\
324 static __inline void							\
325 mly_requeue_ ## name (struct mly_command *mc)				\
326 {									\
327     crit_enter();							\
328     TAILQ_INSERT_HEAD(&mc->mc_sc->mly_ ## name, mc, mc_link);		\
329     MLYQ_ADD(mc->mc_sc, index);						\
330     crit_exit();							\
331 }									\
332 static __inline struct mly_command *					\
333 mly_dequeue_ ## name (struct mly_softc *sc)				\
334 {									\
335     struct mly_command	*mc;						\
336 									\
337     crit_enter();							\
338     if ((mc = TAILQ_FIRST(&sc->mly_ ## name)) != NULL) {		\
339 	TAILQ_REMOVE(&sc->mly_ ## name, mc, mc_link);			\
340 	MLYQ_REMOVE(sc, index);						\
341     }									\
342     crit_exit();							\
343     return(mc);								\
344 }									\
345 static __inline void							\
346 mly_remove_ ## name (struct mly_command *mc)				\
347 {									\
348     crit_enter();							\
349     TAILQ_REMOVE(&mc->mc_sc->mly_ ## name, mc, mc_link);		\
350     MLYQ_REMOVE(mc->mc_sc, index);					\
351     crit_exit();							\
352 }									\
353 struct hack
354 
355 MLYQ_COMMAND_QUEUE(free, MLYQ_FREE);
356 MLYQ_COMMAND_QUEUE(busy, MLYQ_BUSY);
357 MLYQ_COMMAND_QUEUE(complete, MLYQ_COMPLETE);
358 
359 /********************************************************************************
360  * space-fill a character string
361  */
362 static __inline void
363 padstr(char *targ, char *src, int len)
364 {
365     while (len-- > 0) {
366 	if (*src != 0) {
367 	    *targ++ = *src++;
368 	} else {
369 	    *targ++ = ' ';
370 	}
371     }
372 }
373