1 /*- 2 * Copyright (c) 2000, 2001 Michael Smith 3 * Copyright (c) 2000 BSDi 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD: src/sys/dev/mly/mlyvar.h,v 1.1.2.2 2001/03/05 20:17:24 msmith Exp $ 28 * $DragonFly: src/sys/dev/raid/mly/mlyvar.h,v 1.9 2008/01/21 02:27:37 pavalos Exp $ 29 */ 30 31 #include <sys/thread2.h> 32 33 /******************************************************************************** 34 ******************************************************************************** 35 Driver Parameter Definitions 36 ******************************************************************************** 37 ********************************************************************************/ 38 39 /* 40 * The firmware interface allows for a 16-bit command identifier. A lookup 41 * table this size (256k) would be too expensive, so we cap ourselves at a 42 * reasonable limit. 43 */ 44 #define MLY_MAX_COMMANDS 256 /* max commands per controller */ 45 46 /* 47 * The firmware interface allows for a 16-bit s/g list length. We limit 48 * ourselves to a reasonable maximum and ensure alignment. 49 */ 50 #define MLY_MAX_SGENTRIES 64 /* max S/G entries, limit 65535 */ 51 52 /* 53 * The interval at which we poke the controller for status updates (in seconds). 54 */ 55 #define MLY_PERIODIC_INTERVAL 1 56 57 /******************************************************************************** 58 ******************************************************************************** 59 Cross-version Compatibility 60 ******************************************************************************** 61 ********************************************************************************/ 62 63 # include <sys/taskqueue.h> 64 65 #ifndef INTR_ENTROPY 66 # define INTR_ENTROPY 0 67 #endif 68 69 /******************************************************************************** 70 ******************************************************************************** 71 Driver Variable Definitions 72 ******************************************************************************** 73 ********************************************************************************/ 74 75 /* 76 * Debugging levels: 77 * 0 - quiet, only emit warnings 78 * 1 - noisy, emit major function points and things done 79 * 2 - extremely noisy, emit trace items in loops, etc. 80 */ 81 #ifdef MLY_DEBUG 82 # define debug(level, fmt, args...) do { if (level <= MLY_DEBUG) kprintf("%s: " fmt "\n", __func__ , ##args); } while(0) 83 # define debug_called(level) do { if (level <= MLY_DEBUG) kprintf(__func__ ": called\n"); } while(0) 84 # define debug_struct(s) kprintf(" SIZE %s: %d\n", #s, sizeof(struct s)) 85 # define debug_union(s) kprintf(" SIZE %s: %d\n", #s, sizeof(union s)) 86 # define debug_field(s, f) kprintf(" OFFSET %s.%s: %d\n", #s, #f, ((int)&(((struct s *)0)->f))) 87 extern void mly_printstate0(void); 88 extern struct mly_softc *mly_softc0; 89 #else 90 # define debug(level, fmt, args...) 91 # define debug_called(level) 92 # define debug_struct(s) 93 #endif 94 95 #define mly_printf(sc, fmt, args...) device_printf(sc->mly_dev, fmt , ##args) 96 97 /* 98 * Per-device structure, used to save persistent state on devices. 99 * 100 * Note that this isn't really Bus/Target/Lun since we don't support 101 * lun != 0 at this time. 102 */ 103 struct mly_btl { 104 int mb_flags; 105 #define MLY_BTL_PHYSICAL (1<<0) /* physical device */ 106 #define MLY_BTL_LOGICAL (1<<1) /* logical device */ 107 #define MLY_BTL_PROTECTED (1<<2) /* device is protected - I/O not allowed */ 108 #define MLY_BTL_RESCAN (1<<3) /* device needs to be rescanned */ 109 char mb_name[16]; /* peripheral attached to this device */ 110 int mb_state; /* see 8.1 */ 111 int mb_type; /* see 8.2 */ 112 113 /* physical devices only */ 114 int mb_speed; /* interface transfer rate */ 115 int mb_width; /* interface width */ 116 }; 117 118 /* 119 * Per-command control structure. 120 */ 121 struct mly_command { 122 TAILQ_ENTRY(mly_command) mc_link; /* list linkage */ 123 124 struct mly_softc *mc_sc; /* controller that owns us */ 125 u_int16_t mc_slot; /* command slot we occupy */ 126 int mc_flags; 127 #define MLY_CMD_BUSY (1<<0) /* command is being run, or ready to run, or not completed */ 128 #define MLY_CMD_COMPLETE (1<<1) /* command has been completed */ 129 #define MLY_CMD_MAPPED (1<<3) /* command has had its data mapped */ 130 #define MLY_CMD_DATAIN (1<<4) /* data moves controller->system */ 131 #define MLY_CMD_DATAOUT (1<<5) /* data moves system->controller */ 132 u_int16_t mc_status; /* command completion status */ 133 u_int8_t mc_sense; /* sense data length */ 134 int32_t mc_resid; /* I/O residual count */ 135 136 union mly_command_packet *mc_packet; /* our controller command */ 137 u_int64_t mc_packetphys; /* physical address of the mapped packet */ 138 139 void *mc_data; /* data buffer */ 140 size_t mc_length; /* data length */ 141 bus_dmamap_t mc_datamap; /* DMA map for data */ 142 143 void (* mc_complete)(struct mly_command *mc); /* completion handler */ 144 void *mc_private; /* caller-private data */ 145 146 int mc_timestamp; 147 }; 148 149 /* 150 * Command slot regulation. 151 * 152 * We can't use slot 0 due to the memory mailbox implementation. 153 */ 154 #define MLY_SLOT_START 1 155 #define MLY_SLOT_MAX (MLY_SLOT_START + MLY_MAX_COMMANDS) 156 157 /* 158 * Per-controller structure. 159 */ 160 struct mly_softc { 161 /* bus connections */ 162 device_t mly_dev; 163 cdev_t mly_dev_t; 164 struct resource *mly_regs_resource; /* register interface window */ 165 int mly_regs_rid; /* resource ID */ 166 bus_space_handle_t mly_bhandle; /* bus space handle */ 167 bus_space_tag_t mly_btag; /* bus space tag */ 168 bus_dma_tag_t mly_parent_dmat; /* parent DMA tag */ 169 bus_dma_tag_t mly_buffer_dmat; /* data buffer/command DMA tag */ 170 struct resource *mly_irq; /* interrupt */ 171 int mly_irq_rid; 172 void *mly_intr; /* interrupt handle */ 173 174 /* scatter/gather lists and their controller-visible mappings */ 175 struct mly_sg_entry *mly_sg_table; /* s/g lists */ 176 u_int32_t mly_sg_busaddr; /* s/g table base address in bus space */ 177 bus_dma_tag_t mly_sg_dmat; /* s/g buffer DMA tag */ 178 bus_dmamap_t mly_sg_dmamap; /* map for s/g buffers */ 179 180 /* controller hardware interface */ 181 int mly_hwif; 182 #define MLY_HWIF_I960RX 0 183 #define MLY_HWIF_STRONGARM 1 184 u_int8_t mly_doorbell_true; /* xor map to make hardware doorbell 'true' bits into 1s */ 185 u_int8_t mly_command_mailbox; /* register offsets */ 186 u_int8_t mly_status_mailbox; 187 u_int8_t mly_idbr; 188 u_int8_t mly_odbr; 189 u_int8_t mly_error_status; 190 u_int8_t mly_interrupt_status; 191 u_int8_t mly_interrupt_mask; 192 struct mly_mmbox *mly_mmbox; /* kernel-space address of memory mailbox */ 193 u_int64_t mly_mmbox_busaddr; /* bus-space address of memory mailbox */ 194 bus_dma_tag_t mly_mmbox_dmat; /* memory mailbox DMA tag */ 195 bus_dmamap_t mly_mmbox_dmamap; /* memory mailbox DMA map */ 196 u_int32_t mly_mmbox_command_index; /* next index to use */ 197 u_int32_t mly_mmbox_status_index; /* index we next expect status at */ 198 199 /* controller features, limits and status */ 200 int mly_state; 201 #define MLY_STATE_OPEN (1<<1) 202 #define MLY_STATE_INTERRUPTS_ON (1<<2) 203 #define MLY_STATE_MMBOX_ACTIVE (1<<3) 204 #define MLY_STATE_CAM_FROZEN (1<<4) 205 struct mly_ioctl_getcontrollerinfo *mly_controllerinfo; 206 struct mly_param_controller *mly_controllerparam; 207 struct mly_btl mly_btl[MLY_MAX_CHANNELS][MLY_MAX_TARGETS]; 208 209 /* command management */ 210 struct mly_command mly_command[MLY_MAX_COMMANDS]; /* commands */ 211 union mly_command_packet *mly_packet; /* command packets */ 212 bus_dma_tag_t mly_packet_dmat; /* packet DMA tag */ 213 bus_dmamap_t mly_packetmap; /* packet DMA map */ 214 u_int64_t mly_packetphys; /* packet array base address */ 215 TAILQ_HEAD(,mly_command) mly_free; /* commands available for reuse */ 216 TAILQ_HEAD(,mly_command) mly_busy; 217 TAILQ_HEAD(,mly_command) mly_complete; /* commands which have been returned by the controller */ 218 struct mly_qstat mly_qstat[MLYQ_COUNT]; /* queue statistics */ 219 220 /* health monitoring */ 221 u_int32_t mly_event_change; /* event status change indicator */ 222 u_int32_t mly_event_counter; /* next event for which we anticpiate status */ 223 u_int32_t mly_event_waiting; /* next event the controller will post status for */ 224 struct callout mly_periodic; /* periodic event handling */ 225 struct callout mly_timeout; /* timeout event handling */ 226 227 /* CAM connection */ 228 struct cam_devq *mly_cam_devq; /* CAM device queue */ 229 struct cam_sim *mly_cam_sim[MLY_MAX_CHANNELS]; /* CAM SIMs */ 230 struct cam_path *mly_cam_path; /* rescan path */ 231 int mly_cam_channels; /* total channel count */ 232 233 /* command-completion task */ 234 struct task mly_task_complete; /* deferred-completion task */ 235 int mly_qfrzn_cnt; /* Track simq freezes */ 236 }; 237 238 /* 239 * Register access helpers. 240 */ 241 #define MLY_SET_REG(sc, reg, val) bus_space_write_1(sc->mly_btag, sc->mly_bhandle, reg, val) 242 #define MLY_GET_REG(sc, reg) bus_space_read_1 (sc->mly_btag, sc->mly_bhandle, reg) 243 #define MLY_GET_REG2(sc, reg) bus_space_read_2 (sc->mly_btag, sc->mly_bhandle, reg) 244 #define MLY_GET_REG4(sc, reg) bus_space_read_4 (sc->mly_btag, sc->mly_bhandle, reg) 245 246 #define MLY_SET_MBOX(sc, mbox, ptr) \ 247 do { \ 248 bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox, *((u_int32_t *)ptr)); \ 249 bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox + 4, *((u_int32_t *)ptr + 1)); \ 250 bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox + 8, *((u_int32_t *)ptr + 2)); \ 251 bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox + 12, *((u_int32_t *)ptr + 3)); \ 252 } while(0); 253 #define MLY_GET_MBOX(sc, mbox, ptr) \ 254 do { \ 255 *((u_int32_t *)ptr) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox); \ 256 *((u_int32_t *)ptr + 1) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 4); \ 257 *((u_int32_t *)ptr + 2) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 8); \ 258 *((u_int32_t *)ptr + 3) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 12); \ 259 } while(0); 260 261 #define MLY_IDBR_TRUE(sc, mask) \ 262 ((((MLY_GET_REG((sc), (sc)->mly_idbr)) ^ (sc)->mly_doorbell_true) & (mask)) == (mask)) 263 #define MLY_ODBR_TRUE(sc, mask) \ 264 ((MLY_GET_REG((sc), (sc)->mly_odbr) & (mask)) == (mask)) 265 #define MLY_ERROR_VALID(sc) \ 266 ((((MLY_GET_REG((sc), (sc)->mly_error_status)) ^ (sc)->mly_doorbell_true) & (MLY_MSG_EMPTY)) == 0) 267 268 #define MLY_MASK_INTERRUPTS(sc) \ 269 do { \ 270 MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_DISABLE); \ 271 sc->mly_state &= ~MLY_STATE_INTERRUPTS_ON; \ 272 } while(0); 273 #define MLY_UNMASK_INTERRUPTS(sc) \ 274 do { \ 275 MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_ENABLE); \ 276 sc->mly_state |= MLY_STATE_INTERRUPTS_ON; \ 277 } while(0); 278 279 /* 280 * Bus/target/logical ID-related macros. 281 */ 282 #define MLY_LOGDEV_ID(sc, bus, target) (((bus) - (sc)->mly_controllerinfo->physical_channels_present) * \ 283 MLY_MAX_TARGETS + (target)) 284 #define MLY_LOGDEV_BUS(sc, logdev) (((logdev) / MLY_MAX_TARGETS) + \ 285 (sc)->mly_controllerinfo->physical_channels_present) 286 #define MLY_LOGDEV_TARGET(sc, logdev) ((logdev) % MLY_MAX_TARGETS) 287 #define MLY_BUS_IS_VIRTUAL(sc, bus) ((bus) >= (sc)->mly_controllerinfo->physical_channels_present) 288 #define MLY_BUS_IS_VALID(sc, bus) (((bus) < (sc)->mly_cam_channels) && ((sc)->mly_cam_sim[(bus)] != NULL)) 289 290 /******************************************************************************** 291 * Queue primitives 292 */ 293 294 #define MLYQ_ADD(sc, qname) \ 295 do { \ 296 struct mly_qstat *qs = &(sc)->mly_qstat[qname]; \ 297 \ 298 qs->q_length++; \ 299 if (qs->q_length > qs->q_max) \ 300 qs->q_max = qs->q_length; \ 301 } while(0) 302 303 #define MLYQ_REMOVE(sc, qname) (sc)->mly_qstat[qname].q_length-- 304 #define MLYQ_INIT(sc, qname) \ 305 do { \ 306 sc->mly_qstat[qname].q_length = 0; \ 307 sc->mly_qstat[qname].q_max = 0; \ 308 } while(0) 309 310 311 #define MLYQ_COMMAND_QUEUE(name, index) \ 312 static __inline void \ 313 mly_initq_ ## name (struct mly_softc *sc) \ 314 { \ 315 TAILQ_INIT(&sc->mly_ ## name); \ 316 MLYQ_INIT(sc, index); \ 317 } \ 318 static __inline void \ 319 mly_enqueue_ ## name (struct mly_command *mc) \ 320 { \ 321 crit_enter(); \ 322 TAILQ_INSERT_TAIL(&mc->mc_sc->mly_ ## name, mc, mc_link); \ 323 MLYQ_ADD(mc->mc_sc, index); \ 324 crit_exit(); \ 325 } \ 326 static __inline void \ 327 mly_requeue_ ## name (struct mly_command *mc) \ 328 { \ 329 crit_enter(); \ 330 TAILQ_INSERT_HEAD(&mc->mc_sc->mly_ ## name, mc, mc_link); \ 331 MLYQ_ADD(mc->mc_sc, index); \ 332 crit_exit(); \ 333 } \ 334 static __inline struct mly_command * \ 335 mly_dequeue_ ## name (struct mly_softc *sc) \ 336 { \ 337 struct mly_command *mc; \ 338 \ 339 crit_enter(); \ 340 if ((mc = TAILQ_FIRST(&sc->mly_ ## name)) != NULL) { \ 341 TAILQ_REMOVE(&sc->mly_ ## name, mc, mc_link); \ 342 MLYQ_REMOVE(sc, index); \ 343 } \ 344 crit_exit(); \ 345 return(mc); \ 346 } \ 347 static __inline void \ 348 mly_remove_ ## name (struct mly_command *mc) \ 349 { \ 350 crit_enter(); \ 351 TAILQ_REMOVE(&mc->mc_sc->mly_ ## name, mc, mc_link); \ 352 MLYQ_REMOVE(mc->mc_sc, index); \ 353 crit_exit(); \ 354 } \ 355 struct hack 356 357 MLYQ_COMMAND_QUEUE(free, MLYQ_FREE); 358 MLYQ_COMMAND_QUEUE(busy, MLYQ_BUSY); 359 MLYQ_COMMAND_QUEUE(complete, MLYQ_COMPLETE); 360 361 /******************************************************************************** 362 * space-fill a character string 363 */ 364 static __inline void 365 padstr(char *targ, char *src, int len) 366 { 367 while (len-- > 0) { 368 if (*src != 0) { 369 *targ++ = *src++; 370 } else { 371 *targ++ = ' '; 372 } 373 } 374 } 375