1 /*- 2 * Copyright (c) 2009 Yahoo! Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/dev/mpr/mpr_pci.c 323629 2017-09-15 20:58:52Z scottl $ 27 */ 28 29 /* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT3 controllers */ 30 31 /* TODO Move headers to mprvar */ 32 #include <sys/types.h> 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/module.h> 37 #include <sys/bus.h> 38 #include <sys/conf.h> 39 #include <sys/malloc.h> 40 #include <sys/sysctl.h> 41 #include <sys/uio.h> 42 #include <sys/eventhandler.h> 43 44 #include <sys/rman.h> 45 46 #include <bus/pci/pcireg.h> 47 #include <bus/pci/pcivar.h> 48 #include <bus/pci/pci_private.h> 49 50 #include <dev/raid/mpr/mpi/mpi2_type.h> 51 #include <dev/raid/mpr/mpi/mpi2.h> 52 #include <dev/raid/mpr/mpi/mpi2_ioc.h> 53 #include <dev/raid/mpr/mpi/mpi2_cnfg.h> 54 #include <dev/raid/mpr/mpi/mpi2_tool.h> 55 #include <dev/raid/mpr/mpi/mpi2_pci.h> 56 57 #include <sys/queue.h> 58 #include <sys/kthread.h> 59 #include <dev/raid/mpr/mpr_ioctl.h> 60 #include <dev/raid/mpr/mprvar.h> 61 62 static int mpr_pci_probe(device_t); 63 static int mpr_pci_attach(device_t); 64 static int mpr_pci_detach(device_t); 65 static int mpr_pci_suspend(device_t); 66 static int mpr_pci_resume(device_t); 67 static void mpr_pci_free(struct mpr_softc *); 68 static int mpr_pci_alloc_interrupts(struct mpr_softc *sc); 69 70 static device_method_t mpr_methods[] = { 71 DEVMETHOD(device_probe, mpr_pci_probe), 72 DEVMETHOD(device_attach, mpr_pci_attach), 73 DEVMETHOD(device_detach, mpr_pci_detach), 74 DEVMETHOD(device_suspend, mpr_pci_suspend), 75 DEVMETHOD(device_resume, mpr_pci_resume), 76 DEVMETHOD(bus_print_child, bus_generic_print_child), 77 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 78 { 0, 0 } 79 }; 80 81 static driver_t mpr_pci_driver = { 82 "mpr", 83 mpr_methods, 84 sizeof(struct mpr_softc) 85 }; 86 87 static devclass_t mpr_devclass; 88 DRIVER_MODULE(mpr, pci, mpr_pci_driver, mpr_devclass, NULL, NULL); 89 MODULE_DEPEND(mpr, cam, 1, 1, 1); 90 91 struct mpr_ident { 92 uint16_t vendor; 93 uint16_t device; 94 uint16_t subvendor; 95 uint16_t subdevice; 96 u_int flags; 97 const char *desc; 98 } mpr_identifiers[] = { 99 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3004, 100 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3004" }, 101 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3008, 102 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3008" }, 103 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_1, 104 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_1" }, 105 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_2, 106 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_2" }, 107 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_5, 108 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_5" }, 109 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_6, 110 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_6" }, 111 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3216, 112 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3216" }, 113 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3224, 114 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3224" }, 115 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_1, 116 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_1" }, 117 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_2, 118 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_2" }, 119 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_1, 120 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_1" }, 121 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_2, 122 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_2" }, 123 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3408, 124 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 125 "Avago Technologies (LSI) SAS3408" }, 126 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3416, 127 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 128 "Avago Technologies (LSI) SAS3416" }, 129 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508, 130 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 131 "Avago Technologies (LSI) SAS3508" }, 132 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508_1, 133 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 134 "Avago Technologies (LSI) SAS3508_1" }, 135 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516, 136 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 137 "Avago Technologies (LSI) SAS3516" }, 138 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516_1, 139 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 140 "Avago Technologies (LSI) SAS3516_1" }, 141 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3616, 142 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 143 "Avago Technologies (LSI) SAS3616" }, 144 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3708, 145 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 146 "Avago Technologies (LSI) SAS3708" }, 147 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3716, 148 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 149 "Avago Technologies (LSI) SAS3716" }, 150 { 0, 0, 0, 0, 0, NULL } 151 }; 152 153 static struct mpr_ident * 154 mpr_find_ident(device_t dev) 155 { 156 struct mpr_ident *m; 157 158 for (m = mpr_identifiers; m->vendor != 0; m++) { 159 if (m->vendor != pci_get_vendor(dev)) 160 continue; 161 if (m->device != pci_get_device(dev)) 162 continue; 163 if ((m->subvendor != 0xffff) && 164 (m->subvendor != pci_get_subvendor(dev))) 165 continue; 166 if ((m->subdevice != 0xffff) && 167 (m->subdevice != pci_get_subdevice(dev))) 168 continue; 169 return (m); 170 } 171 172 return (NULL); 173 } 174 175 static int 176 mpr_pci_probe(device_t dev) 177 { 178 struct mpr_ident *id; 179 180 if ((id = mpr_find_ident(dev)) != NULL) { 181 device_set_desc(dev, id->desc); 182 return (BUS_PROBE_DEFAULT); 183 } 184 return (ENXIO); 185 } 186 187 static int 188 mpr_pci_attach(device_t dev) 189 { 190 struct mpr_softc *sc; 191 struct mpr_ident *m; 192 int error, i; 193 194 sc = device_get_softc(dev); 195 bzero(sc, sizeof(*sc)); 196 sc->mpr_dev = dev; 197 m = mpr_find_ident(dev); 198 sc->mpr_flags = m->flags; 199 200 mpr_get_tunables(sc); 201 202 /* Twiddle basic PCI config bits for a sanity check */ 203 pci_enable_busmaster(dev); 204 205 for (i = 0; i < PCI_MAXMAPS_0; i++) { 206 sc->mpr_regs_rid = PCIR_BAR(i); 207 208 if ((sc->mpr_regs_resource = bus_alloc_resource_any(dev, 209 SYS_RES_MEMORY, &sc->mpr_regs_rid, RF_ACTIVE)) != NULL) 210 break; 211 } 212 213 if (sc->mpr_regs_resource == NULL) { 214 mpr_printf(sc, "Cannot allocate PCI registers\n"); 215 return (ENXIO); 216 } 217 218 sc->mpr_btag = rman_get_bustag(sc->mpr_regs_resource); 219 sc->mpr_bhandle = rman_get_bushandle(sc->mpr_regs_resource); 220 221 /* Allocate the parent DMA tag */ 222 if (bus_dma_tag_create( bus_get_dma_tag(dev), /* parent */ 223 1, 0, /* algnmnt, boundary */ 224 BUS_SPACE_MAXADDR, /* lowaddr */ 225 BUS_SPACE_MAXADDR, /* highaddr */ 226 NULL, NULL, /* filter, filterarg */ 227 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 228 BUS_SPACE_UNRESTRICTED, /* nsegments */ 229 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 230 0, /* flags */ 231 &sc->mpr_parent_dmat)) { 232 mpr_printf(sc, "Cannot allocate parent DMA tag\n"); 233 mpr_pci_free(sc); 234 return (ENOMEM); 235 } 236 237 if (((error = mpr_pci_alloc_interrupts(sc)) != 0) || 238 ((error = mpr_attach(sc)) != 0)) 239 mpr_pci_free(sc); 240 241 return (error); 242 } 243 244 /* 245 * Allocate, but don't assign interrupts early. Doing it before requesting 246 * the IOCFacts message informs the firmware that we want to do MSI-X 247 * multiqueue. We might not use all of the available messages, but there's 248 * no reason to re-alloc if we don't. 249 * 250 * XXX swildner: MSI-X support missing 251 */ 252 int 253 mpr_pci_alloc_interrupts(struct mpr_softc *sc) 254 { 255 device_t dev; 256 257 dev = sc->mpr_dev; 258 259 sc->msi_msgs = 1; 260 sc->irq_type = pci_alloc_1intr(dev, sc->msi_enable, &sc->irq_rid, 261 &sc->irq_flags); 262 if (sc->irq_type == PCI_INTR_TYPE_MSI) 263 sc->mpr_flags |= MPR_FLAGS_MSI; 264 else 265 sc->mpr_flags |= MPR_FLAGS_INTX; 266 267 return (0); 268 } 269 270 int 271 mpr_pci_setup_interrupts(struct mpr_softc *sc) 272 { 273 device_t dev; 274 struct mpr_queue *q; 275 void *ihandler; 276 int i, error, rid; 277 278 dev = sc->mpr_dev; 279 error = ENXIO; 280 281 if (sc->mpr_flags & MPR_FLAGS_INTX) { 282 ihandler = mpr_intr; 283 } else if (sc->mpr_flags & MPR_FLAGS_MSI) { 284 ihandler = mpr_intr_msi; 285 } else { 286 mpr_dprint(sc, MPR_ERROR|MPR_INIT, 287 "Unable to set up interrupts\n"); 288 return (EINVAL); 289 } 290 291 for (i = 0; i < sc->msi_msgs; i++) { 292 q = &sc->queues[i]; 293 rid = sc->irq_rid; 294 q->irq_rid = rid; 295 q->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 296 &q->irq_rid, sc->irq_flags); 297 if (q->irq == NULL) { 298 mpr_dprint(sc, MPR_ERROR|MPR_INIT, 299 "Cannot allocate interrupt RID %d\n", rid); 300 sc->msi_msgs = i; 301 break; 302 } 303 error = bus_setup_intr(dev, q->irq, INTR_MPSAFE, ihandler, 304 sc, &q->intrhand, NULL); 305 if (error) { 306 mpr_dprint(sc, MPR_ERROR|MPR_INIT, 307 "Cannot setup interrupt RID %d\n", rid); 308 sc->msi_msgs = i; 309 break; 310 } 311 } 312 313 mpr_dprint(sc, MPR_INIT, "Set up %d interrupts\n", sc->msi_msgs); 314 return (error); 315 } 316 317 static int 318 mpr_pci_detach(device_t dev) 319 { 320 struct mpr_softc *sc; 321 int error; 322 323 sc = device_get_softc(dev); 324 325 if ((error = mpr_free(sc)) != 0) 326 return (error); 327 328 mpr_pci_free(sc); 329 return (0); 330 } 331 332 void 333 mpr_pci_free_interrupts(struct mpr_softc *sc) 334 { 335 struct mpr_queue *q; 336 int i; 337 338 if (sc->queues == NULL) 339 return; 340 341 for (i = 0; i < sc->msi_msgs; i++) { 342 q = &sc->queues[i]; 343 if (q->irq != NULL) { 344 bus_teardown_intr(sc->mpr_dev, q->irq, 345 q->intrhand); 346 bus_release_resource(sc->mpr_dev, SYS_RES_IRQ, 347 q->irq_rid, q->irq); 348 } 349 } 350 } 351 352 static void 353 mpr_pci_free(struct mpr_softc *sc) 354 { 355 356 if (sc->mpr_parent_dmat != NULL) { 357 bus_dma_tag_destroy(sc->mpr_parent_dmat); 358 } 359 360 mpr_pci_free_interrupts(sc); 361 362 if (sc->mpr_flags & MPR_FLAGS_MSI) 363 pci_release_msi(sc->mpr_dev); 364 365 if (sc->mpr_regs_resource != NULL) { 366 bus_release_resource(sc->mpr_dev, SYS_RES_MEMORY, 367 sc->mpr_regs_rid, sc->mpr_regs_resource); 368 } 369 370 return; 371 } 372 373 static int 374 mpr_pci_suspend(device_t dev) 375 { 376 return (EINVAL); 377 } 378 379 static int 380 mpr_pci_resume(device_t dev) 381 { 382 return (EINVAL); 383 } 384 385 int 386 mpr_pci_restore(struct mpr_softc *sc) 387 { 388 struct pci_devinfo *dinfo; 389 390 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 391 392 dinfo = device_get_ivars(sc->mpr_dev); 393 if (dinfo == NULL) { 394 mpr_dprint(sc, MPR_FAULT, "%s: NULL dinfo\n", __func__); 395 return (EINVAL); 396 } 397 398 pci_cfg_restore(sc->mpr_dev, dinfo); 399 return (0); 400 } 401 402