1 /*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Berkeley and its contributors. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * $FreeBSD: src/sys/isa/sio.c,v 1.291.2.35 2003/05/18 08:51:15 murray Exp $ 34 * $DragonFly: src/sys/dev/serial/sio/sio.c,v 1.44 2008/07/23 16:39:33 dillon Exp $ 35 * from: @(#)com.c 7.5 (Berkeley) 5/16/91 36 * from: i386/isa sio.c,v 1.234 37 */ 38 39 #include "opt_comconsole.h" 40 #include "opt_compat.h" 41 #include "opt_ddb.h" 42 #include "opt_sio.h" 43 #include "use_pci.h" 44 #ifdef __i386__ 45 #include "use_puc.h" 46 #endif 47 #include "use_sio.h" 48 49 /* 50 * Serial driver, based on 386BSD-0.1 com driver. 51 * Mostly rewritten to use pseudo-DMA. 52 * Works for National Semiconductor NS8250-NS16550AF UARTs. 53 * COM driver, based on HP dca driver. 54 * 55 * Changes for PC-Card integration: 56 * - Added PC-Card driver table and handlers 57 */ 58 #include <sys/param.h> 59 #include <sys/systm.h> 60 #include <sys/reboot.h> 61 #include <sys/malloc.h> 62 #include <sys/tty.h> 63 #include <sys/proc.h> 64 #include <sys/priv.h> 65 #include <sys/module.h> 66 #include <sys/conf.h> 67 #include <sys/dkstat.h> 68 #include <sys/fcntl.h> 69 #include <sys/interrupt.h> 70 #include <sys/kernel.h> 71 #include <sys/syslog.h> 72 #include <sys/sysctl.h> 73 #include <sys/bus.h> 74 #include <sys/rman.h> 75 #include <sys/timepps.h> 76 #include <sys/thread2.h> 77 #include <sys/devfs.h> 78 79 #include <machine/limits.h> 80 81 #include <bus/isa/isareg.h> 82 #include <bus/isa/isavar.h> 83 #if NPCI > 0 84 #include <bus/pci/pcireg.h> 85 #include <bus/pci/pcivar.h> 86 #endif 87 #if NPUC > 0 88 #include <dev/misc/puc/pucvar.h> 89 #endif 90 #include <machine/lock.h> 91 92 #include <machine/clock.h> 93 #ifndef SMP 94 #include <machine/lock.h> 95 #endif 96 97 #include "sioreg.h" 98 #include "sio_private.h" 99 100 #ifdef COM_ESP 101 #include "../ic_layer/esp.h" 102 #endif 103 104 #define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 105 106 #define CALLOUT_MASK 0x80 107 #define CONTROL_MASK 0x60 108 #define CONTROL_INIT_STATE 0x20 109 #define CONTROL_LOCK_STATE 0x40 110 #define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 111 #define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \ 112 | ((mynor) & 0x1f)) 113 #define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \ 114 | ((unit) & 0x1f)) 115 116 #define com_scr 7 /* scratch register for 16450-16550 (R/W) */ 117 118 #define sio_getreg(com, off) \ 119 (bus_space_read_1((com)->bst, (com)->bsh, (off))) 120 #define sio_setreg(com, off, value) \ 121 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 122 123 /* 124 * com state bits. 125 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 126 * than the other bits so that they can be tested as a group without masking 127 * off the low bits. 128 * 129 * The following com and tty flags correspond closely: 130 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 131 * comstop()) 132 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 133 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 134 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 135 * TS_FLUSH is not used. 136 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 137 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 138 */ 139 #define CS_BUSY 0x80 /* output in progress */ 140 #define CS_TTGO 0x40 /* output not stopped by XOFF */ 141 #define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 142 #define CS_CHECKMSR 1 /* check of MSR scheduled */ 143 #define CS_CTS_OFLOW 2 /* use CTS output flow control */ 144 #define CS_DTR_OFF 0x10 /* DTR held off */ 145 #define CS_ODONE 4 /* output completed */ 146 #define CS_RTS_IFLOW 8 /* use RTS input flow control */ 147 #define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 148 149 static char const * const error_desc[] = { 150 #define CE_OVERRUN 0 151 "silo overflow", 152 #define CE_INTERRUPT_BUF_OVERFLOW 1 153 "interrupt-level buffer overflow", 154 #define CE_TTY_BUF_OVERFLOW 2 155 "tty-level buffer overflow", 156 }; 157 158 #ifdef COM_ESP 159 static int espattach (struct com_s *com, Port_t esp_port); 160 #endif 161 static int sio_isa_attach (device_t dev); 162 163 static timeout_t siobusycheck; 164 static u_int siodivisor (u_long rclk, speed_t speed); 165 static timeout_t siodtrwakeup; 166 static void comhardclose (struct com_s *com); 167 static void sioinput (struct com_s *com); 168 static void siointr1 (struct com_s *com); 169 static void siointr (void *arg); 170 static int commctl (struct com_s *com, int bits, int how); 171 static int comparam (struct tty *tp, struct termios *t); 172 static inthand2_t siopoll; 173 static int sio_isa_probe (device_t dev); 174 static void siosettimeout (void); 175 static int siosetwater (struct com_s *com, speed_t speed); 176 static void comstart (struct tty *tp); 177 static void comstop (struct tty *tp, int rw); 178 static timeout_t comwakeup; 179 static void disc_optim (struct tty *tp, struct termios *t, 180 struct com_s *com); 181 182 #if NPCI > 0 183 static int sio_pci_attach (device_t dev); 184 static void sio_pci_kludge_unit (device_t dev); 185 static int sio_pci_probe (device_t dev); 186 #endif /* NPCI > 0 */ 187 188 #if NPUC > 0 189 static int sio_puc_attach (device_t dev); 190 static int sio_puc_probe (device_t dev); 191 #endif /* NPUC > 0 */ 192 193 static char driver_name[] = "sio"; 194 195 /* table and macro for fast conversion from a unit number to its com struct */ 196 devclass_t sio_devclass; 197 #define com_addr(unit) ((struct com_s *) \ 198 devclass_get_softc(sio_devclass, unit)) 199 200 static device_method_t sio_isa_methods[] = { 201 /* Device interface */ 202 DEVMETHOD(device_probe, sio_isa_probe), 203 DEVMETHOD(device_attach, sio_isa_attach), 204 205 { 0, 0 } 206 }; 207 208 static driver_t sio_isa_driver = { 209 driver_name, 210 sio_isa_methods, 211 sizeof(struct com_s), 212 }; 213 214 #if NPCI > 0 215 static device_method_t sio_pci_methods[] = { 216 /* Device interface */ 217 DEVMETHOD(device_probe, sio_pci_probe), 218 DEVMETHOD(device_attach, sio_pci_attach), 219 220 { 0, 0 } 221 }; 222 223 static driver_t sio_pci_driver = { 224 driver_name, 225 sio_pci_methods, 226 sizeof(struct com_s), 227 }; 228 #endif /* NPCI > 0 */ 229 230 #if NPUC > 0 231 static device_method_t sio_puc_methods[] = { 232 /* Device interface */ 233 DEVMETHOD(device_probe, sio_puc_probe), 234 DEVMETHOD(device_attach, sio_puc_attach), 235 236 { 0, 0 } 237 }; 238 239 static driver_t sio_puc_driver = { 240 driver_name, 241 sio_puc_methods, 242 sizeof(struct com_s), 243 }; 244 #endif /* NPUC > 0 */ 245 246 static d_open_t sioopen; 247 static d_close_t sioclose; 248 static d_read_t sioread; 249 static d_write_t siowrite; 250 static d_ioctl_t sioioctl; 251 252 #define CDEV_MAJOR 28 253 static struct dev_ops sio_ops = { 254 { driver_name, CDEV_MAJOR, D_TTY | D_KQFILTER }, 255 .d_open = sioopen, 256 .d_close = sioclose, 257 .d_read = sioread, 258 .d_write = siowrite, 259 .d_ioctl = sioioctl, 260 .d_poll = ttypoll, 261 .d_kqfilter = ttykqfilter, 262 .d_revoke = ttyrevoke 263 }; 264 265 int comconsole = -1; 266 static volatile speed_t comdefaultrate = CONSPEED; 267 static u_long comdefaultrclk = DEFAULT_RCLK; 268 SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); 269 static u_int com_events; /* input chars + weighted output completions */ 270 static Port_t siocniobase; 271 static int siocnunit; 272 static Port_t siogdbiobase; 273 static int siogdbunit = -1; 274 static bool_t sio_registered; 275 static int sio_timeout; 276 static int sio_timeouts_until_log; 277 static struct callout sio_timeout_handle; 278 static int sio_numunits; 279 280 #ifdef COM_ESP 281 /* XXX configure this properly. */ 282 static Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 283 static Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 284 #endif 285 286 /* 287 * handle sysctl read/write requests for console speed 288 * 289 * In addition to setting comdefaultrate for I/O through /dev/console, 290 * also set the initial and lock values for the /dev/ttyXX device 291 * if there is one associated with the console. Finally, if the /dev/tty 292 * device has already been open, change the speed on the open running port 293 * itself. 294 */ 295 296 static int 297 sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 298 { 299 int error; 300 speed_t newspeed; 301 struct com_s *com; 302 struct tty *tp; 303 304 newspeed = comdefaultrate; 305 306 error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 307 if (error || !req->newptr) 308 return (error); 309 310 comdefaultrate = newspeed; 311 312 if (comconsole < 0) /* serial console not selected? */ 313 return (0); 314 315 com = com_addr(comconsole); 316 if (com == NULL) 317 return (ENXIO); 318 319 /* 320 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 321 * (note, the lock rates really are boolean -- if non-zero, disallow 322 * speed changes) 323 */ 324 com->it_in.c_ispeed = com->it_in.c_ospeed = 325 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 326 com->it_out.c_ispeed = com->it_out.c_ospeed = 327 com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 328 329 /* 330 * if we're open, change the running rate too 331 */ 332 tp = com->tp; 333 if (tp && (tp->t_state & TS_ISOPEN)) { 334 tp->t_termios.c_ispeed = 335 tp->t_termios.c_ospeed = comdefaultrate; 336 crit_enter(); 337 error = comparam(tp, &tp->t_termios); 338 crit_exit(); 339 } 340 return error; 341 } 342 343 SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 344 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 345 346 #if NPCI > 0 347 struct pci_ids { 348 u_int32_t type; 349 const char *desc; 350 int rid; 351 }; 352 353 static struct pci_ids pci_ids[] = { 354 { 0x100812b9, "3COM PCI FaxModem", 0x10 }, 355 { 0x2000131f, "CyberSerial (1-port) 16550", 0x10 }, 356 { 0x01101407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 }, 357 { 0x01111407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 }, 358 { 0x048011c1, "Lucent kermit based PCI Modem", 0x14 }, 359 { 0x95211415, "Oxford Semiconductor PCI Dual Port Serial", 0x10 }, 360 { 0x7101135e, "SeaLevel Ultra 530.PCI Single Port Serial", 0x18 }, 361 { 0x0000151f, "SmartLink 5634PCV SurfRider", 0x10 }, 362 { 0x98459710, "Netmos Nm9845 PCI Bridge with Dual UART", 0x10 }, 363 { 0x00000000, NULL, 0 } 364 }; 365 366 static int 367 sio_pci_attach(device_t dev) 368 { 369 u_int32_t type; 370 struct pci_ids *id; 371 372 type = pci_get_devid(dev); 373 id = pci_ids; 374 while (id->type && id->type != type) 375 id++; 376 if (id->desc == NULL) 377 return (ENXIO); 378 sio_pci_kludge_unit(dev); 379 return (sioattach(dev, id->rid, 0UL)); 380 } 381 382 /* 383 * Don't cut and paste this to other drivers. It is a horrible kludge 384 * which will fail to work and also be unnecessary in future versions. 385 */ 386 static void 387 sio_pci_kludge_unit(device_t dev) 388 { 389 devclass_t dc; 390 int err; 391 int start; 392 int unit; 393 394 unit = 0; 395 start = 0; 396 while (resource_int_value("sio", unit, "port", &start) == 0 && 397 start > 0) 398 unit++; 399 if (device_get_unit(dev) < unit) { 400 dc = device_get_devclass(dev); 401 while (devclass_get_device(dc, unit)) 402 unit++; 403 device_printf(dev, "moving to sio%d\n", unit); 404 err = device_set_unit(dev, unit); /* EVIL DO NOT COPY */ 405 if (err) 406 device_printf(dev, "error moving device %d\n", err); 407 } 408 } 409 410 static int 411 sio_pci_probe(device_t dev) 412 { 413 u_int32_t type; 414 struct pci_ids *id; 415 416 type = pci_get_devid(dev); 417 id = pci_ids; 418 while (id->type && id->type != type) 419 id++; 420 if (id->desc == NULL) 421 return (ENXIO); 422 device_set_desc(dev, id->desc); 423 return (sioprobe(dev, id->rid, 0UL)); 424 } 425 #endif /* NPCI > 0 */ 426 427 #if NPUC > 0 428 static int 429 sio_puc_attach(device_t dev) 430 { 431 u_int rclk; 432 433 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ, 434 &rclk) != 0) 435 rclk = DEFAULT_RCLK; 436 return (sioattach(dev, 0, rclk)); 437 } 438 439 static int 440 sio_puc_probe(device_t dev) 441 { 442 u_int rclk; 443 444 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ, 445 &rclk) != 0) 446 rclk = DEFAULT_RCLK; 447 return (sioprobe(dev, 0, rclk)); 448 } 449 #endif /* NPUC */ 450 451 static struct isa_pnp_id sio_ids[] = { 452 {0x0005d041, "Standard PC COM port"}, /* PNP0500 */ 453 {0x0105d041, "16550A-compatible COM port"}, /* PNP0501 */ 454 {0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */ 455 {0x1005d041, "Generic IRDA-compatible device"}, /* PNP0510 */ 456 {0x1105d041, "Generic IRDA-compatible device"}, /* PNP0511 */ 457 /* Devices that do not have a compatid */ 458 {0x12206804, NULL}, /* ACH2012 - 5634BTS 56K Video Ready Modem */ 459 {0x7602a904, NULL}, /* AEI0276 - 56K v.90 Fax Modem (LKT) */ 460 {0x00007905, NULL}, /* AKY0000 - 56K Plug&Play Modem */ 461 {0x21107905, NULL}, /* AKY1021 - 56K Plug&Play Modem */ 462 {0x01405407, NULL}, /* AZT4001 - AZT3000 PnP SOUND DEVICE, MODEM */ 463 {0x56039008, NULL}, /* BDP0356 - Best Data 56x2 */ 464 {0x56159008, NULL}, /* BDP1556 - B.D. Smart One 56SPS,Voice Modem*/ 465 {0x36339008, NULL}, /* BDP3336 - Best Data Prods. 336F */ 466 {0x0014490a, NULL}, /* BRI1400 - Boca 33.6 PnP */ 467 {0x0015490a, NULL}, /* BRI1500 - Internal Fax Data */ 468 {0x0034490a, NULL}, /* BRI3400 - Internal ACF Modem */ 469 {0x0094490a, NULL}, /* BRI9400 - Boca K56Flex PnP */ 470 {0x00b4490a, NULL}, /* BRIB400 - Boca 56k PnP */ 471 {0x0030320d, NULL}, /* CIR3000 - Cirrus Logic V43 */ 472 {0x0100440e, NULL}, /* CRD0001 - Cardinal MVP288IV ? */ 473 {0x01308c0e, NULL}, /* CTL3001 - Creative Labs Phoneblaster */ 474 {0x36033610, NULL}, /* DAV0336 - DAVICOM 336PNP MODEM */ 475 {0x01009416, NULL}, /* ETT0001 - E-Tech Bullet 33k6 PnP */ 476 {0x0000aa1a, NULL}, /* FUJ0000 - FUJITSU Modem 33600 PNP/I2 */ 477 {0x1200c31e, NULL}, /* GVC0012 - VF1128HV-R9 (win modem?) */ 478 {0x0303c31e, NULL}, /* GVC0303 - MaxTech 33.6 PnP D/F/V */ 479 {0x0505c31e, NULL}, /* GVC0505 - GVC 56k Faxmodem */ 480 {0x0116c31e, NULL}, /* GVC1601 - Rockwell V.34 Plug & Play Modem */ 481 {0x0050c31e, NULL}, /* GVC5000 - some GVC modem */ 482 {0x3800f91e, NULL}, /* GWY0038 - Telepath with v.90 */ 483 {0x9062f91e, NULL}, /* GWY6290 - Telepath with x2 Technology */ 484 {0x8100e425, NULL}, /* IOD0081 - I-O DATA DEVICE,INC. IFML-560 */ 485 {0x21002534, NULL}, /* MAE0021 - Jetstream Int V.90 56k Voice Series 2*/ 486 {0x0000f435, NULL}, /* MOT0000 - Motorola ModemSURFR 33.6 Intern */ 487 {0x5015f435, NULL}, /* MOT1550 - Motorola ModemSURFR 56K Modem */ 488 {0xf015f435, NULL}, /* MOT15F0 - Motorola VoiceSURFR 56K Modem */ 489 {0x6045f435, NULL}, /* MOT4560 - Motorola ? */ 490 {0x61e7a338, NULL}, /* NECE761 - 33.6Modem */ 491 {0x08804f3f, NULL}, /* OZO8008 - Zoom (33.6k Modem) */ 492 {0x0f804f3f, NULL}, /* OZO800f - Zoom 2812 (56k Modem) */ 493 {0x39804f3f, NULL}, /* OZO8039 - Zoom 56k flex */ 494 {0x00914f3f, NULL}, /* OZO9100 - Zoom 2919 (K56 Faxmodem) */ 495 {0x3024a341, NULL}, /* PMC2430 - Pace 56 Voice Internal Modem */ 496 {0x1000eb49, NULL}, /* ROK0010 - Rockwell ? */ 497 {0x1200b23d, NULL}, /* RSS0012 - OMRON ME5614ISA */ 498 {0x5002734a, NULL}, /* RSS0250 - 5614Jx3(G) Internal Modem */ 499 {0x6202734a, NULL}, /* RSS0262 - 5614Jx3[G] V90+K56Flex Modem */ 500 {0x1010104d, NULL}, /* SHP1010 - Rockwell 33600bps Modem */ 501 {0xc100ad4d, NULL}, /* SMM00C1 - Leopard 56k PnP */ 502 {0x9012b04e, NULL}, /* SUP1290 - Supra ? */ 503 {0x1013b04e, NULL}, /* SUP1310 - SupraExpress 336i PnP */ 504 {0x8013b04e, NULL}, /* SUP1380 - SupraExpress 288i PnP Voice */ 505 {0x8113b04e, NULL}, /* SUP1381 - SupraExpress 336i PnP Voice */ 506 {0x5016b04e, NULL}, /* SUP1650 - Supra 336i Sp Intl */ 507 {0x7016b04e, NULL}, /* SUP1670 - Supra 336i V+ Intl */ 508 {0x7420b04e, NULL}, /* SUP2070 - Supra ? */ 509 {0x8020b04e, NULL}, /* SUP2080 - Supra ? */ 510 {0x8420b04e, NULL}, /* SUP2084 - SupraExpress 56i PnP */ 511 {0x7121b04e, NULL}, /* SUP2171 - SupraExpress 56i Sp? */ 512 {0x8024b04e, NULL}, /* SUP2480 - Supra ? */ 513 {0x01007256, NULL}, /* USR0001 - U.S. Robotics Inc., Sportster W */ 514 {0x02007256, NULL}, /* USR0002 - U.S. Robotics Inc. Sportster 33. */ 515 {0x04007256, NULL}, /* USR0004 - USR Sportster 14.4k */ 516 {0x06007256, NULL}, /* USR0006 - USR Sportster 33.6k */ 517 {0x11007256, NULL}, /* USR0011 - USR ? */ 518 {0x01017256, NULL}, /* USR0101 - USR ? */ 519 {0x30207256, NULL}, /* USR2030 - U.S.Robotics Inc. Sportster 560 */ 520 {0x50207256, NULL}, /* USR2050 - U.S.Robotics Inc. Sportster 33. */ 521 {0x70207256, NULL}, /* USR2070 - U.S.Robotics Inc. Sportster 560 */ 522 {0x30307256, NULL}, /* USR3030 - U.S. Robotics 56K FAX INT */ 523 {0x31307256, NULL}, /* USR3031 - U.S. Robotics 56K FAX INT */ 524 {0x50307256, NULL}, /* USR3050 - U.S. Robotics 56K FAX INT */ 525 {0x70307256, NULL}, /* USR3070 - U.S. Robotics 56K Voice INT */ 526 {0x90307256, NULL}, /* USR3090 - USR ? */ 527 {0x70917256, NULL}, /* USR9170 - U.S. Robotics 56K FAX INT */ 528 {0x90917256, NULL}, /* USR9190 - USR 56k Voice INT */ 529 {0x0300695c, NULL}, /* WCI0003 - Fax/Voice/Modem/Speakphone/Asvd */ 530 {0x01a0896a, NULL}, /* ZTIA001 - Zoom Internal V90 Faxmodem */ 531 {0x61f7896a, NULL}, /* ZTIF761 - Zoom ComStar 33.6 */ 532 {0} 533 }; 534 535 536 537 static int 538 sio_isa_probe(device_t dev) 539 { 540 /* Check isapnp ids */ 541 if (ISA_PNP_PROBE(device_get_parent(dev), dev, sio_ids) == ENXIO) 542 return (ENXIO); 543 return (sioprobe(dev, 0, 0UL)); 544 } 545 546 int 547 sioprobe(device_t dev, int xrid, u_long rclk) 548 { 549 #if 0 550 static bool_t already_init; 551 device_t xdev; 552 #endif 553 struct com_s *com; 554 u_int divisor; 555 bool_t failures[10]; 556 int fn; 557 device_t idev; 558 Port_t iobase; 559 intrmask_t irqmap[4]; 560 intrmask_t irqs; 561 u_char mcr_image; 562 int result; 563 u_long xirq; 564 u_int flags = device_get_flags(dev); 565 int rid; 566 struct resource *port; 567 568 rid = xrid; 569 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 570 0, ~0, IO_COMSIZE, RF_ACTIVE); 571 if (!port) 572 return (ENXIO); 573 574 com = device_get_softc(dev); 575 com->bst = rman_get_bustag(port); 576 com->bsh = rman_get_bushandle(port); 577 if (rclk == 0) 578 rclk = DEFAULT_RCLK; 579 com->rclk = rclk; 580 581 #if 0 582 /* 583 * XXX this is broken - when we are first called, there are no 584 * previously configured IO ports. We could hard code 585 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 586 * This code has been doing nothing since the conversion since 587 * "count" is zero the first time around. 588 */ 589 if (!already_init) { 590 /* 591 * Turn off MCR_IENABLE for all likely serial ports. An unused 592 * port with its MCR_IENABLE gate open will inhibit interrupts 593 * from any used port that shares the interrupt vector. 594 * XXX the gate enable is elsewhere for some multiports. 595 */ 596 device_t *devs; 597 int count, i, xioport; 598 599 devclass_get_devices(sio_devclass, &devs, &count); 600 for (i = 0; i < count; i++) { 601 xdev = devs[i]; 602 if (device_is_enabled(xdev) && 603 bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 604 NULL) == 0) 605 outb(xioport + com_mcr, 0); 606 } 607 kfree(devs, M_TEMP); 608 already_init = TRUE; 609 } 610 #endif 611 612 if (COM_LLCONSOLE(flags)) { 613 kprintf("sio%d: reserved for low-level i/o\n", 614 device_get_unit(dev)); 615 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 616 return (ENXIO); 617 } 618 619 /* 620 * If the device is on a multiport card and has an AST/4 621 * compatible interrupt control register, initialize this 622 * register and prepare to leave MCR_IENABLE clear in the mcr. 623 * Otherwise, prepare to set MCR_IENABLE in the mcr. 624 * Point idev to the device struct giving the correct id_irq. 625 * This is the struct for the master device if there is one. 626 */ 627 idev = dev; 628 mcr_image = MCR_IENABLE; 629 #ifdef COM_MULTIPORT 630 if (COM_ISMULTIPORT(flags)) { 631 Port_t xiobase; 632 u_long io; 633 634 idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 635 if (idev == NULL) { 636 kprintf("sio%d: master device %d not configured\n", 637 device_get_unit(dev), COM_MPMASTER(flags)); 638 idev = dev; 639 } 640 if (!COM_NOTAST4(flags)) { 641 if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 642 NULL) == 0) { 643 xiobase = io; 644 if (bus_get_resource(idev, SYS_RES_IRQ, 0, 645 NULL, NULL) == 0) 646 outb(xiobase + com_scr, 0x80); 647 else 648 outb(xiobase + com_scr, 0); 649 } 650 mcr_image = 0; 651 } 652 } 653 #endif /* COM_MULTIPORT */ 654 if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 655 mcr_image = 0; 656 657 bzero(failures, sizeof failures); 658 iobase = rman_get_start(port); 659 660 /* 661 * We don't want to get actual interrupts, just masked ones. 662 * Interrupts from this line should already be masked in the ICU, 663 * but mask them in the processor as well in case there are some 664 * (misconfigured) shared interrupts. 665 */ 666 com_lock(); 667 /* EXTRA DELAY? */ 668 669 /* 670 * For the TI16754 chips, set prescaler to 1 (4 is often the 671 * default after-reset value) as otherwise it's impossible to 672 * get highest baudrates. 673 */ 674 if (COM_TI16754(flags)) { 675 u_char cfcr, efr; 676 677 cfcr = sio_getreg(com, com_cfcr); 678 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 679 efr = sio_getreg(com, com_efr); 680 /* Unlock extended features to turn off prescaler. */ 681 sio_setreg(com, com_efr, efr | EFR_EFE); 682 /* Disable EFR. */ 683 sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0); 684 /* Turn off prescaler. */ 685 sio_setreg(com, com_mcr, 686 sio_getreg(com, com_mcr) & ~MCR_PRESCALE); 687 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 688 sio_setreg(com, com_efr, efr); 689 sio_setreg(com, com_cfcr, cfcr); 690 } 691 692 /* 693 * Initialize the speed and the word size and wait long enough to 694 * drain the maximum of 16 bytes of junk in device output queues. 695 * The speed is undefined after a master reset and must be set 696 * before relying on anything related to output. There may be 697 * junk after a (very fast) soft reboot and (apparently) after 698 * master reset. 699 * XXX what about the UART bug avoided by waiting in comparam()? 700 * We don't want to to wait long enough to drain at 2 bps. 701 */ 702 if (iobase == siocniobase) { 703 DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 704 } else { 705 sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 706 divisor = siodivisor(rclk, SIO_TEST_SPEED); 707 sio_setreg(com, com_dlbl, divisor & 0xff); 708 sio_setreg(com, com_dlbh, divisor >> 8); 709 sio_setreg(com, com_cfcr, CFCR_8BITS); 710 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 711 } 712 713 /* 714 * Make sure we can drain the receiver. If we can't, the serial 715 * port may not exist. 716 */ 717 for (fn = 0; fn < 256; ++fn) { 718 if ((sio_getreg(com, com_lsr) & LSR_RXRDY) == 0) 719 break; 720 (void)sio_getreg(com, com_data); 721 } 722 if (fn == 256) { 723 kprintf("sio%d: can't drain, serial port might " 724 "not exist, disabling\n", device_get_unit(dev)); 725 com_unlock(); 726 return (ENXIO); 727 } 728 729 /* 730 * Enable the interrupt gate and disable device interupts. This 731 * should leave the device driving the interrupt line low and 732 * guarantee an edge trigger if an interrupt can be generated. 733 */ 734 /* EXTRA DELAY? */ 735 sio_setreg(com, com_mcr, mcr_image); 736 sio_setreg(com, com_ier, 0); 737 DELAY(1000); /* XXX */ 738 irqmap[0] = isa_irq_pending(); 739 740 /* 741 * Attempt to set loopback mode so that we can send a null byte 742 * without annoying any external device. 743 */ 744 /* EXTRA DELAY? */ 745 sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 746 747 /* 748 * Attempt to generate an output interrupt. On 8250's, setting 749 * IER_ETXRDY generates an interrupt independent of the current 750 * setting and independent of whether the THR is empty. On 16450's, 751 * setting IER_ETXRDY generates an interrupt independent of the 752 * current setting. On 16550A's, setting IER_ETXRDY only 753 * generates an interrupt when IER_ETXRDY is not already set. 754 */ 755 sio_setreg(com, com_ier, IER_ETXRDY); 756 757 /* 758 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 759 * an interrupt. They'd better generate one for actually doing 760 * output. Loopback may be broken on the same incompatibles but 761 * it's unlikely to do more than allow the null byte out. 762 */ 763 sio_setreg(com, com_data, 0); 764 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 765 766 /* 767 * Turn off loopback mode so that the interrupt gate works again 768 * (MCR_IENABLE was hidden). This should leave the device driving 769 * an interrupt line high. It doesn't matter if the interrupt 770 * line oscillates while we are not looking at it, since interrupts 771 * are disabled. 772 */ 773 /* EXTRA DELAY? */ 774 sio_setreg(com, com_mcr, mcr_image); 775 776 /* 777 * Some pcmcia cards have the "TXRDY bug", so we check everyone 778 * for IIR_TXRDY implementation ( Palido 321s, DC-1S... ) 779 */ 780 if (COM_NOPROBE(flags)) { 781 /* Reading IIR register twice */ 782 for (fn = 0; fn < 2; fn ++) { 783 DELAY(10000); 784 failures[6] = sio_getreg(com, com_iir); 785 } 786 /* Check IIR_TXRDY clear ? */ 787 result = 0; 788 if (failures[6] & IIR_TXRDY) { 789 /* Nop, Double check with clearing IER */ 790 sio_setreg(com, com_ier, 0); 791 if (sio_getreg(com, com_iir) & IIR_NOPEND) { 792 /* Ok. we're familia this gang */ 793 SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 794 } else { 795 /* Unknown, Just omit this chip.. XXX */ 796 result = ENXIO; 797 sio_setreg(com, com_mcr, 0); 798 } 799 } else { 800 /* OK. this is well-known guys */ 801 CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 802 } 803 sio_setreg(com, com_ier, 0); 804 sio_setreg(com, com_cfcr, CFCR_8BITS); 805 com_unlock(); 806 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 807 return (iobase == siocniobase ? 0 : result); 808 } 809 810 /* 811 * Check that 812 * o the CFCR, IER and MCR in UART hold the values written to them 813 * (the values happen to be all distinct - this is good for 814 * avoiding false positive tests from bus echoes). 815 * o an output interrupt is generated and its vector is correct. 816 * o the interrupt goes away when the IIR in the UART is read. 817 */ 818 /* EXTRA DELAY? */ 819 failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 820 failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 821 failures[2] = sio_getreg(com, com_mcr) - mcr_image; 822 DELAY(10000); /* Some internal modems need this time */ 823 irqmap[1] = isa_irq_pending(); 824 failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 825 DELAY(1000); /* XXX */ 826 irqmap[2] = isa_irq_pending(); 827 failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 828 829 /* 830 * Turn off all device interrupts and check that they go off properly. 831 * Leave MCR_IENABLE alone. For ports without a master port, it gates 832 * the OUT2 output of the UART to 833 * the ICU input. Closing the gate would give a floating ICU input 834 * (unless there is another device driving it) and spurious interrupts. 835 * (On the system that this was first tested on, the input floats high 836 * and gives a (masked) interrupt as soon as the gate is closed.) 837 */ 838 sio_setreg(com, com_ier, 0); 839 sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 840 failures[7] = sio_getreg(com, com_ier); 841 DELAY(1000); /* XXX */ 842 irqmap[3] = isa_irq_pending(); 843 failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 844 845 com_unlock(); 846 847 irqs = irqmap[1] & ~irqmap[0]; 848 if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 849 ((1 << xirq) & irqs) == 0) 850 kprintf( 851 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 852 device_get_unit(dev), xirq, irqs); 853 if (bootverbose) 854 kprintf("sio%d: irq maps: %#x %#x %#x %#x\n", 855 device_get_unit(dev), 856 irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 857 858 result = 0; 859 for (fn = 0; fn < sizeof failures; ++fn) 860 if (failures[fn]) { 861 sio_setreg(com, com_mcr, 0); 862 result = ENXIO; 863 if (bootverbose) { 864 kprintf("sio%d: probe failed test(s):", 865 device_get_unit(dev)); 866 for (fn = 0; fn < sizeof failures; ++fn) 867 if (failures[fn]) 868 kprintf(" %d", fn); 869 kprintf("\n"); 870 } 871 break; 872 } 873 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 874 return (iobase == siocniobase ? 0 : result); 875 } 876 877 #ifdef COM_ESP 878 static int 879 espattach(struct com_s *com, Port_t esp_port) 880 { 881 u_char dips; 882 u_char val; 883 884 /* 885 * Check the ESP-specific I/O port to see if we're an ESP 886 * card. If not, return failure immediately. 887 */ 888 if ((inb(esp_port) & 0xf3) == 0) { 889 kprintf(" port 0x%x is not an ESP board?\n", esp_port); 890 return (0); 891 } 892 893 /* 894 * We've got something that claims to be a Hayes ESP card. 895 * Let's hope so. 896 */ 897 898 /* Get the dip-switch configuration */ 899 outb(esp_port + ESP_CMD1, ESP_GETDIPS); 900 dips = inb(esp_port + ESP_STATUS1); 901 902 /* 903 * Bits 0,1 of dips say which COM port we are. 904 */ 905 if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 906 kprintf(" : ESP"); 907 else { 908 kprintf(" esp_port has com %d\n", dips & 0x03); 909 return (0); 910 } 911 912 /* 913 * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 914 */ 915 outb(esp_port + ESP_CMD1, ESP_GETTEST); 916 val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 917 val = inb(esp_port + ESP_STATUS2); 918 if ((val & 0x70) < 0x20) { 919 kprintf("-old (%o)", val & 0x70); 920 return (0); 921 } 922 923 /* 924 * Check for ability to emulate 16550: bit 7 == 1 925 */ 926 if ((dips & 0x80) == 0) { 927 kprintf(" slave"); 928 return (0); 929 } 930 931 /* 932 * Okay, we seem to be a Hayes ESP card. Whee. 933 */ 934 com->esp = TRUE; 935 com->esp_port = esp_port; 936 return (1); 937 } 938 #endif /* COM_ESP */ 939 940 static int 941 sio_isa_attach(device_t dev) 942 { 943 return (sioattach(dev, 0, 0UL)); 944 } 945 946 int 947 sioattach(device_t dev, int xrid, u_long rclk) 948 { 949 struct com_s *com; 950 #ifdef COM_ESP 951 Port_t *espp; 952 #endif 953 Port_t iobase; 954 int minorbase; 955 int unit; 956 u_int flags; 957 int rid; 958 struct resource *port; 959 int ret; 960 static int did_init; 961 962 if (did_init == 0) { 963 did_init = 1; 964 callout_init(&sio_timeout_handle); 965 } 966 967 rid = xrid; 968 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 969 0, ~0, IO_COMSIZE, RF_ACTIVE); 970 if (!port) 971 return (ENXIO); 972 973 iobase = rman_get_start(port); 974 unit = device_get_unit(dev); 975 com = device_get_softc(dev); 976 flags = device_get_flags(dev); 977 978 if (unit >= sio_numunits) 979 sio_numunits = unit + 1; 980 /* 981 * sioprobe() has initialized the device registers as follows: 982 * o cfcr = CFCR_8BITS. 983 * It is most important that CFCR_DLAB is off, so that the 984 * data port is not hidden when we enable interrupts. 985 * o ier = 0. 986 * Interrupts are only enabled when the line is open. 987 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 988 * interrupt control register or the config specifies no irq. 989 * Keeping MCR_DTR and MCR_RTS off might stop the external 990 * device from sending before we are ready. 991 */ 992 bzero(com, sizeof *com); 993 com->unit = unit; 994 com->ioportres = port; 995 com->bst = rman_get_bustag(port); 996 com->bsh = rman_get_bushandle(port); 997 com->cfcr_image = CFCR_8BITS; 998 com->dtr_wait = 3 * hz; 999 callout_init(&com->dtr_ch); 1000 callout_init(&com->busy_ch); 1001 com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 1002 com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 1003 com->tx_fifo_size = 1; 1004 com->obufs[0].l_head = com->obuf1; 1005 com->obufs[1].l_head = com->obuf2; 1006 1007 com->data_port = iobase + com_data; 1008 com->int_id_port = iobase + com_iir; 1009 com->modem_ctl_port = iobase + com_mcr; 1010 com->mcr_image = inb(com->modem_ctl_port); 1011 com->line_status_port = iobase + com_lsr; 1012 com->modem_status_port = iobase + com_msr; 1013 com->intr_ctl_port = iobase + com_ier; 1014 1015 if (rclk == 0) 1016 rclk = DEFAULT_RCLK; 1017 com->rclk = rclk; 1018 1019 /* 1020 * We don't use all the flags from <sys/ttydefaults.h> since they 1021 * are only relevant for logins. It's important to have echo off 1022 * initially so that the line doesn't start blathering before the 1023 * echo flag can be turned off. 1024 */ 1025 com->it_in.c_iflag = 0; 1026 com->it_in.c_oflag = 0; 1027 com->it_in.c_cflag = TTYDEF_CFLAG; 1028 com->it_in.c_lflag = 0; 1029 if (unit == comconsole) { 1030 com->it_in.c_iflag = TTYDEF_IFLAG; 1031 com->it_in.c_oflag = TTYDEF_OFLAG; 1032 com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 1033 com->it_in.c_lflag = TTYDEF_LFLAG; 1034 com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 1035 com->lt_out.c_ispeed = com->lt_out.c_ospeed = 1036 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 1037 com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 1038 } else 1039 com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 1040 if (siosetwater(com, com->it_in.c_ispeed) != 0) { 1041 com_unlock(); 1042 /* 1043 * Leave i/o resources allocated if this is a `cn'-level 1044 * console, so that other devices can't snarf them. 1045 */ 1046 if (iobase != siocniobase) 1047 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 1048 return (ENOMEM); 1049 } 1050 com_unlock(); 1051 termioschars(&com->it_in); 1052 com->it_out = com->it_in; 1053 1054 /* attempt to determine UART type */ 1055 kprintf("sio%d: type", unit); 1056 1057 1058 #ifdef COM_MULTIPORT 1059 if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags)) 1060 #else 1061 if (!COM_IIR_TXRDYBUG(flags)) 1062 #endif 1063 { 1064 u_char scr; 1065 u_char scr1; 1066 u_char scr2; 1067 1068 scr = sio_getreg(com, com_scr); 1069 sio_setreg(com, com_scr, 0xa5); 1070 scr1 = sio_getreg(com, com_scr); 1071 sio_setreg(com, com_scr, 0x5a); 1072 scr2 = sio_getreg(com, com_scr); 1073 sio_setreg(com, com_scr, scr); 1074 if (scr1 != 0xa5 || scr2 != 0x5a) { 1075 kprintf(" 8250"); 1076 goto determined_type; 1077 } 1078 } 1079 sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 1080 DELAY(100); 1081 com->st16650a = 0; 1082 switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 1083 case FIFO_RX_LOW: 1084 kprintf(" 16450"); 1085 break; 1086 case FIFO_RX_MEDL: 1087 kprintf(" 16450?"); 1088 break; 1089 case FIFO_RX_MEDH: 1090 kprintf(" 16550?"); 1091 break; 1092 case FIFO_RX_HIGH: 1093 if (COM_NOFIFO(flags)) { 1094 kprintf(" 16550A fifo disabled"); 1095 } else { 1096 com->hasfifo = TRUE; 1097 if (COM_ST16650A(flags)) { 1098 com->st16650a = 1; 1099 com->tx_fifo_size = 32; 1100 kprintf(" ST16650A"); 1101 } else if (COM_TI16754(flags)) { 1102 com->tx_fifo_size = 64; 1103 kprintf(" TI16754"); 1104 } else { 1105 com->tx_fifo_size = COM_FIFOSIZE(flags); 1106 kprintf(" 16550A"); 1107 } 1108 } 1109 #ifdef COM_ESP 1110 for (espp = likely_esp_ports; *espp != 0; espp++) 1111 if (espattach(com, *espp)) { 1112 com->tx_fifo_size = 1024; 1113 break; 1114 } 1115 #endif 1116 if (!com->st16650a && !COM_TI16754(flags)) { 1117 if (!com->tx_fifo_size) 1118 com->tx_fifo_size = 16; 1119 else 1120 kprintf(" lookalike with %d bytes FIFO", 1121 com->tx_fifo_size); 1122 } 1123 1124 break; 1125 } 1126 1127 #ifdef COM_ESP 1128 if (com->esp) { 1129 /* 1130 * Set 16550 compatibility mode. 1131 * We don't use the ESP_MODE_SCALE bit to increase the 1132 * fifo trigger levels because we can't handle large 1133 * bursts of input. 1134 * XXX flow control should be set in comparam(), not here. 1135 */ 1136 outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 1137 outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 1138 1139 /* Set RTS/CTS flow control. */ 1140 outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 1141 outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 1142 outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 1143 1144 /* Set flow-control levels. */ 1145 outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 1146 outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 1147 outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 1148 outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 1149 outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 1150 } 1151 #endif /* COM_ESP */ 1152 sio_setreg(com, com_fifo, 0); 1153 determined_type: ; 1154 1155 #ifdef COM_MULTIPORT 1156 if (COM_ISMULTIPORT(flags)) { 1157 device_t masterdev; 1158 1159 com->multiport = TRUE; 1160 kprintf(" (multiport"); 1161 if (unit == COM_MPMASTER(flags)) 1162 kprintf(" master"); 1163 kprintf(")"); 1164 masterdev = devclass_get_device(sio_devclass, 1165 COM_MPMASTER(flags)); 1166 com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 1167 SYS_RES_IRQ, 0, NULL, NULL) != 0); 1168 } 1169 #endif /* COM_MULTIPORT */ 1170 if (unit == comconsole) 1171 kprintf(", console"); 1172 if (COM_IIR_TXRDYBUG(flags)) 1173 kprintf(" with a bogus IIR_TXRDY register"); 1174 kprintf("\n"); 1175 1176 if (!sio_registered) { 1177 register_swi(SWI_TTY, siopoll, NULL ,"swi_siopoll", NULL); 1178 sio_registered = TRUE; 1179 } 1180 minorbase = UNIT_TO_MINOR(unit); 1181 make_dev(&sio_ops, minorbase, 1182 UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 1183 make_dev(&sio_ops, minorbase | CONTROL_INIT_STATE, 1184 UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 1185 make_dev(&sio_ops, minorbase | CONTROL_LOCK_STATE, 1186 UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 1187 make_dev(&sio_ops, minorbase | CALLOUT_MASK, 1188 UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 1189 make_dev(&sio_ops, minorbase | CALLOUT_MASK | CONTROL_INIT_STATE, 1190 UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 1191 make_dev(&sio_ops, minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE, 1192 UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 1193 com->flags = flags; 1194 com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 1195 pps_init(&com->pps); 1196 1197 rid = 0; 1198 com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 1199 RF_ACTIVE); 1200 if (com->irqres) { 1201 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 1202 INTR_FAST, siointr, com, 1203 &com->cookie, NULL); 1204 if (ret) { 1205 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 1206 com->irqres, 0, siointr, com, 1207 &com->cookie, NULL); 1208 if (ret == 0) 1209 device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 1210 } 1211 if (ret) 1212 device_printf(dev, "could not activate interrupt\n"); 1213 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1214 defined(ALT_BREAK_TO_DEBUGGER)) 1215 /* 1216 * Enable interrupts for early break-to-debugger support 1217 * on the console. 1218 */ 1219 if (ret == 0 && unit == comconsole) 1220 outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 1221 IER_EMSC); 1222 #endif 1223 } 1224 1225 return (0); 1226 } 1227 1228 static int 1229 sioopen(struct dev_open_args *ap) 1230 { 1231 cdev_t dev = ap->a_head.a_dev; 1232 struct com_s *com; 1233 int error; 1234 int mynor; 1235 struct tty *tp; 1236 int unit; 1237 1238 mynor = minor(dev); 1239 unit = MINOR_TO_UNIT(mynor); 1240 com = com_addr(unit); 1241 if (com == NULL) 1242 return (ENXIO); 1243 if (com->gone) 1244 return (ENXIO); 1245 if (mynor & CONTROL_MASK) 1246 return (0); 1247 tp = dev->si_tty = com->tp = ttymalloc(com->tp); 1248 crit_enter(); 1249 /* 1250 * We jump to this label after all non-interrupted sleeps to pick 1251 * up any changes of the device state. 1252 */ 1253 open_top: 1254 while (com->state & CS_DTR_OFF) { 1255 error = tsleep(&com->dtr_wait, PCATCH, "siodtr", 0); 1256 if (com_addr(unit) == NULL) { 1257 crit_exit(); 1258 return (ENXIO); 1259 } 1260 if (error != 0 || com->gone) 1261 goto out; 1262 } 1263 if (tp->t_state & TS_ISOPEN) { 1264 /* 1265 * The device is open, so everything has been initialized. 1266 * Handle conflicts. 1267 */ 1268 if (mynor & CALLOUT_MASK) { 1269 if (!com->active_out) { 1270 error = EBUSY; 1271 goto out; 1272 } 1273 } else { 1274 if (com->active_out) { 1275 if (ap->a_oflags & O_NONBLOCK) { 1276 error = EBUSY; 1277 goto out; 1278 } 1279 error = tsleep(&com->active_out, 1280 PCATCH, "siobi", 0); 1281 if (com_addr(unit) == NULL) { 1282 crit_exit(); 1283 return (ENXIO); 1284 } 1285 if (error != 0 || com->gone) 1286 goto out; 1287 goto open_top; 1288 } 1289 } 1290 if (tp->t_state & TS_XCLUDE && priv_check_cred(ap->a_cred, PRIV_ROOT, 0)) { 1291 error = EBUSY; 1292 goto out; 1293 } 1294 } else { 1295 /* 1296 * The device isn't open, so there are no conflicts. 1297 * Initialize it. Initialization is done twice in many 1298 * cases: to preempt sleeping callin opens if we are 1299 * callout, and to complete a callin open after DCD rises. 1300 */ 1301 tp->t_oproc = comstart; 1302 tp->t_param = comparam; 1303 tp->t_stop = comstop; 1304 tp->t_dev = dev; 1305 tp->t_termios = mynor & CALLOUT_MASK 1306 ? com->it_out : com->it_in; 1307 (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 1308 com->poll = com->no_irq; 1309 com->poll_output = com->loses_outints; 1310 ++com->wopeners; 1311 error = comparam(tp, &tp->t_termios); 1312 --com->wopeners; 1313 if (error != 0) 1314 goto out; 1315 /* 1316 * XXX we should goto open_top if comparam() slept. 1317 */ 1318 if (com->hasfifo) { 1319 /* 1320 * (Re)enable and drain fifos. 1321 * 1322 * Certain SMC chips cause problems if the fifos 1323 * are enabled while input is ready. Turn off the 1324 * fifo if necessary to clear the input. We test 1325 * the input ready bit after enabling the fifos 1326 * since we've already enabled them in comparam() 1327 * and to handle races between enabling and fresh 1328 * input. 1329 */ 1330 while (TRUE) { 1331 sio_setreg(com, com_fifo, 1332 FIFO_RCV_RST | FIFO_XMT_RST 1333 | com->fifo_image); 1334 /* 1335 * XXX the delays are for superstitious 1336 * historical reasons. It must be less than 1337 * the character time at the maximum 1338 * supported speed (87 usec at 115200 bps 1339 * 8N1). Otherwise we might loop endlessly 1340 * if data is streaming in. We used to use 1341 * delays of 100. That usually worked 1342 * because DELAY(100) used to usually delay 1343 * for about 85 usec instead of 100. 1344 */ 1345 DELAY(50); 1346 if (!(inb(com->line_status_port) & LSR_RXRDY)) 1347 break; 1348 sio_setreg(com, com_fifo, 0); 1349 DELAY(50); 1350 (void) inb(com->data_port); 1351 } 1352 } 1353 1354 com_lock(); 1355 (void) inb(com->line_status_port); 1356 (void) inb(com->data_port); 1357 com->prev_modem_status = com->last_modem_status 1358 = inb(com->modem_status_port); 1359 if (COM_IIR_TXRDYBUG(com->flags)) { 1360 outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS 1361 | IER_EMSC); 1362 } else { 1363 outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY 1364 | IER_ERLS | IER_EMSC); 1365 } 1366 com_unlock(); 1367 /* 1368 * Handle initial DCD. Callout devices get a fake initial 1369 * DCD (trapdoor DCD). If we are callout, then any sleeping 1370 * callin opens get woken up and resume sleeping on "siobi" 1371 * instead of "siodcd". 1372 */ 1373 /* 1374 * XXX `mynor & CALLOUT_MASK' should be 1375 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 1376 * TRAPDOOR_CARRIER is the default initial state for callout 1377 * devices and SOFT_CARRIER is like CLOCAL except it hides 1378 * the true carrier. 1379 */ 1380 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 1381 (*linesw[tp->t_line].l_modem)(tp, 1); 1382 } 1383 /* 1384 * Wait for DCD if necessary. 1385 */ 1386 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 1387 && !(tp->t_cflag & CLOCAL) && !(ap->a_oflags & O_NONBLOCK)) { 1388 ++com->wopeners; 1389 error = tsleep(TSA_CARR_ON(tp), PCATCH, "siodcd", 0); 1390 if (com_addr(unit) == NULL) { 1391 crit_exit(); 1392 return (ENXIO); 1393 } 1394 --com->wopeners; 1395 if (error != 0 || com->gone) 1396 goto out; 1397 goto open_top; 1398 } 1399 error = (*linesw[tp->t_line].l_open)(dev, tp); 1400 disc_optim(tp, &tp->t_termios, com); 1401 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 1402 com->active_out = TRUE; 1403 siosettimeout(); 1404 out: 1405 crit_exit(); 1406 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 1407 comhardclose(com); 1408 return (error); 1409 } 1410 1411 static int 1412 sioclose(struct dev_close_args *ap) 1413 { 1414 cdev_t dev = ap->a_head.a_dev; 1415 struct com_s *com; 1416 int mynor; 1417 struct tty *tp; 1418 1419 mynor = minor(dev); 1420 if (mynor & CONTROL_MASK) 1421 return (0); 1422 com = com_addr(MINOR_TO_UNIT(mynor)); 1423 if (com == NULL) 1424 return (ENODEV); 1425 tp = com->tp; 1426 crit_enter(); 1427 (*linesw[tp->t_line].l_close)(tp, ap->a_fflag); 1428 disc_optim(tp, &tp->t_termios, com); 1429 comstop(tp, FREAD | FWRITE); 1430 comhardclose(com); 1431 ttyclose(tp); 1432 siosettimeout(); 1433 crit_exit(); 1434 if (com->gone) { 1435 kprintf("sio%d: gone\n", com->unit); 1436 crit_enter(); 1437 if (com->ibuf != NULL) 1438 kfree(com->ibuf, M_DEVBUF); 1439 bzero(tp, sizeof *tp); 1440 crit_exit(); 1441 } 1442 return (0); 1443 } 1444 1445 static void 1446 comhardclose(struct com_s *com) 1447 { 1448 struct tty *tp; 1449 int unit; 1450 1451 unit = com->unit; 1452 crit_enter(); 1453 com->poll = FALSE; 1454 com->poll_output = FALSE; 1455 com->do_timestamp = FALSE; 1456 com->do_dcd_timestamp = FALSE; 1457 com->pps.ppsparam.mode = 0; 1458 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 1459 tp = com->tp; 1460 1461 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1462 defined(ALT_BREAK_TO_DEBUGGER)) 1463 /* 1464 * Leave interrupts enabled and don't clear DTR if this is the 1465 * console. This allows us to detect break-to-debugger events 1466 * while the console device is closed. 1467 */ 1468 if (com->unit != comconsole) 1469 #endif 1470 { 1471 sio_setreg(com, com_ier, 0); 1472 if (tp->t_cflag & HUPCL 1473 /* 1474 * XXX we will miss any carrier drop between here and the 1475 * next open. Perhaps we should watch DCD even when the 1476 * port is closed; it is not sufficient to check it at 1477 * the next open because it might go up and down while 1478 * we're not watching. 1479 */ 1480 || (!com->active_out 1481 && !(com->prev_modem_status & MSR_DCD) 1482 && !(com->it_in.c_cflag & CLOCAL)) 1483 || !(tp->t_state & TS_ISOPEN)) { 1484 (void)commctl(com, TIOCM_DTR, DMBIC); 1485 if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 1486 callout_reset(&com->dtr_ch, com->dtr_wait, 1487 siodtrwakeup, com); 1488 com->state |= CS_DTR_OFF; 1489 } 1490 } 1491 } 1492 if (com->hasfifo) { 1493 /* 1494 * Disable fifos so that they are off after controlled 1495 * reboots. Some BIOSes fail to detect 16550s when the 1496 * fifos are enabled. 1497 */ 1498 sio_setreg(com, com_fifo, 0); 1499 } 1500 com->active_out = FALSE; 1501 wakeup(&com->active_out); 1502 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 1503 crit_exit(); 1504 } 1505 1506 static int 1507 sioread(struct dev_read_args *ap) 1508 { 1509 cdev_t dev = ap->a_head.a_dev; 1510 int mynor; 1511 struct com_s *com; 1512 1513 mynor = minor(dev); 1514 if (mynor & CONTROL_MASK) 1515 return (ENODEV); 1516 com = com_addr(MINOR_TO_UNIT(mynor)); 1517 if (com == NULL || com->gone) 1518 return (ENODEV); 1519 return ((*linesw[com->tp->t_line].l_read)(com->tp, ap->a_uio, ap->a_ioflag)); 1520 } 1521 1522 static int 1523 siowrite(struct dev_write_args *ap) 1524 { 1525 cdev_t dev = ap->a_head.a_dev; 1526 int mynor; 1527 struct com_s *com; 1528 int unit; 1529 1530 mynor = minor(dev); 1531 if (mynor & CONTROL_MASK) 1532 return (ENODEV); 1533 1534 unit = MINOR_TO_UNIT(mynor); 1535 com = com_addr(unit); 1536 if (com == NULL || com->gone) 1537 return (ENODEV); 1538 /* 1539 * (XXX) We disallow virtual consoles if the physical console is 1540 * a serial port. This is in case there is a display attached that 1541 * is not the console. In that situation we don't need/want the X 1542 * server taking over the console. 1543 */ 1544 if (constty != NULL && unit == comconsole) 1545 constty = NULL; 1546 return ((*linesw[com->tp->t_line].l_write)(com->tp, ap->a_uio, ap->a_ioflag)); 1547 } 1548 1549 static void 1550 siobusycheck(void *chan) 1551 { 1552 struct com_s *com; 1553 1554 com = (struct com_s *)chan; 1555 1556 /* 1557 * Clear TS_BUSY if low-level output is complete. 1558 * spl locking is sufficient because siointr1() does not set CS_BUSY. 1559 * If siointr1() clears CS_BUSY after we look at it, then we'll get 1560 * called again. Reading the line status port outside of siointr1() 1561 * is safe because CS_BUSY is clear so there are no output interrupts 1562 * to lose. 1563 */ 1564 crit_enter(); 1565 if (com->state & CS_BUSY) 1566 com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 1567 else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 1568 == (LSR_TSRE | LSR_TXRDY)) { 1569 com->tp->t_state &= ~TS_BUSY; 1570 ttwwakeup(com->tp); 1571 com->extra_state &= ~CSE_BUSYCHECK; 1572 } else { 1573 callout_reset(&com->busy_ch, hz / 100, siobusycheck, com); 1574 } 1575 crit_exit(); 1576 } 1577 1578 static u_int 1579 siodivisor(u_long rclk, speed_t speed) 1580 { 1581 long actual_speed; 1582 u_int divisor; 1583 int error; 1584 1585 if (speed == 0 || speed > ((speed_t)-1 - 1) / 8) 1586 return (0); 1587 divisor = (rclk / (8UL * speed) + 1) / 2; 1588 if (divisor == 0 || divisor >= 65536) 1589 return (0); 1590 actual_speed = rclk / (16UL * divisor); 1591 1592 /* 10 times error in percent: */ 1593 error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2; 1594 1595 /* 3.0% maximum error tolerance: */ 1596 if (error < -30 || error > 30) 1597 return (0); 1598 1599 return (divisor); 1600 } 1601 1602 static void 1603 siodtrwakeup(void *chan) 1604 { 1605 struct com_s *com; 1606 1607 com = (struct com_s *)chan; 1608 com->state &= ~CS_DTR_OFF; 1609 wakeup(&com->dtr_wait); 1610 } 1611 1612 static void 1613 sioinput(struct com_s *com) 1614 { 1615 u_char *buf; 1616 int incc; 1617 u_char line_status; 1618 int recv_data; 1619 struct tty *tp; 1620 1621 buf = com->ibuf; 1622 tp = com->tp; 1623 if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 1624 com_events -= (com->iptr - com->ibuf); 1625 com->iptr = com->ibuf; 1626 return; 1627 } 1628 if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 1629 /* 1630 * Avoid the grotesquely inefficient lineswitch routine 1631 * (ttyinput) in "raw" mode. It usually takes about 450 1632 * instructions (that's without canonical processing or echo!). 1633 * slinput is reasonably fast (usually 40 instructions plus 1634 * call overhead). 1635 */ 1636 do { 1637 com_unlock(); 1638 incc = com->iptr - buf; 1639 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 1640 && (com->state & CS_RTS_IFLOW 1641 || tp->t_iflag & IXOFF) 1642 && !(tp->t_state & TS_TBLOCK)) 1643 ttyblock(tp); 1644 com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 1645 += b_to_q((char *)buf, incc, &tp->t_rawq); 1646 buf += incc; 1647 tk_nin += incc; 1648 tk_rawcc += incc; 1649 tp->t_rawcc += incc; 1650 ttwakeup(tp); 1651 if (tp->t_state & TS_TTSTOP 1652 && (tp->t_iflag & IXANY 1653 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 1654 tp->t_state &= ~TS_TTSTOP; 1655 tp->t_lflag &= ~FLUSHO; 1656 comstart(tp); 1657 } 1658 com_lock(); 1659 } while (buf < com->iptr); 1660 } else { 1661 do { 1662 com_unlock(); 1663 line_status = buf[com->ierroff]; 1664 recv_data = *buf++; 1665 if (line_status 1666 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 1667 if (line_status & LSR_BI) 1668 recv_data |= TTY_BI; 1669 if (line_status & LSR_FE) 1670 recv_data |= TTY_FE; 1671 if (line_status & LSR_OE) 1672 recv_data |= TTY_OE; 1673 if (line_status & LSR_PE) 1674 recv_data |= TTY_PE; 1675 } 1676 (*linesw[tp->t_line].l_rint)(recv_data, tp); 1677 com_lock(); 1678 } while (buf < com->iptr); 1679 } 1680 com_events -= (com->iptr - com->ibuf); 1681 com->iptr = com->ibuf; 1682 1683 /* 1684 * There is now room for another low-level buffer full of input, 1685 * so enable RTS if it is now disabled and there is room in the 1686 * high-level buffer. 1687 */ 1688 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 1689 !(tp->t_state & TS_TBLOCK)) 1690 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 1691 } 1692 1693 void 1694 siointr(void *arg) 1695 { 1696 #ifndef COM_MULTIPORT 1697 com_lock(); 1698 siointr1((struct com_s *) arg); 1699 com_unlock(); 1700 #else /* COM_MULTIPORT */ 1701 bool_t possibly_more_intrs; 1702 int unit; 1703 struct com_s *com; 1704 1705 /* 1706 * Loop until there is no activity on any port. This is necessary 1707 * to get an interrupt edge more than to avoid another interrupt. 1708 * If the IRQ signal is just an OR of the IRQ signals from several 1709 * devices, then the edge from one may be lost because another is 1710 * on. 1711 */ 1712 com_lock(); 1713 do { 1714 possibly_more_intrs = FALSE; 1715 for (unit = 0; unit < sio_numunits; ++unit) { 1716 com = com_addr(unit); 1717 /* 1718 * XXX com_lock(); 1719 * would it work here, or be counter-productive? 1720 */ 1721 if (com != NULL 1722 && !com->gone 1723 && (inb(com->int_id_port) & IIR_IMASK) 1724 != IIR_NOPEND) { 1725 siointr1(com); 1726 possibly_more_intrs = TRUE; 1727 } 1728 /* XXX com_unlock(); */ 1729 } 1730 } while (possibly_more_intrs); 1731 com_unlock(); 1732 #endif /* COM_MULTIPORT */ 1733 } 1734 1735 static void 1736 siointr1(struct com_s *com) 1737 { 1738 u_char line_status; 1739 u_char modem_status; 1740 u_char *ioptr; 1741 u_char recv_data; 1742 u_char int_ctl; 1743 u_char int_ctl_new; 1744 u_int count; 1745 1746 int_ctl = inb(com->intr_ctl_port); 1747 int_ctl_new = int_ctl; 1748 1749 while (!com->gone) { 1750 if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 1751 modem_status = inb(com->modem_status_port); 1752 if ((modem_status ^ com->last_modem_status) & MSR_DCD) { 1753 count = sys_cputimer->count(); 1754 pps_event(&com->pps, count, 1755 (modem_status & MSR_DCD) ? 1756 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 1757 } 1758 } 1759 line_status = inb(com->line_status_port); 1760 1761 /* input event? (check first to help avoid overruns) */ 1762 while (line_status & LSR_RCV_MASK) { 1763 /* break/unnattached error bits or real input? */ 1764 if (!(line_status & LSR_RXRDY)) 1765 recv_data = 0; 1766 else 1767 recv_data = inb(com->data_port); 1768 #if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER) 1769 /* 1770 * Solaris implements a new BREAK which is initiated 1771 * by a character sequence CR ~ ^b which is similar 1772 * to a familiar pattern used on Sun servers by the 1773 * Remote Console. 1774 */ 1775 #define KEY_CRTLB 2 /* ^B */ 1776 #define KEY_CR 13 /* CR '\r' */ 1777 #define KEY_TILDE 126 /* ~ */ 1778 1779 if (com->unit == comconsole) { 1780 static int brk_state1 = 0, brk_state2 = 0; 1781 if (recv_data == KEY_CR) { 1782 brk_state1 = recv_data; 1783 brk_state2 = 0; 1784 } else if (brk_state1 == KEY_CR && (recv_data == KEY_TILDE || recv_data == KEY_CRTLB)) { 1785 if (recv_data == KEY_TILDE) 1786 brk_state2 = recv_data; 1787 else if (brk_state2 == KEY_TILDE && recv_data == KEY_CRTLB) { 1788 breakpoint(); 1789 brk_state1 = brk_state2 = 0; 1790 goto cont; 1791 } else 1792 brk_state2 = 0; 1793 } else 1794 brk_state1 = 0; 1795 } 1796 #endif 1797 if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 1798 /* 1799 * Don't store BI if IGNBRK or FE/PE if IGNPAR. 1800 * Otherwise, push the work to a higher level 1801 * (to handle PARMRK) if we're bypassing. 1802 * Otherwise, convert BI/FE and PE+INPCK to 0. 1803 * 1804 * This makes bypassing work right in the 1805 * usual "raw" case (IGNBRK set, and IGNPAR 1806 * and INPCK clear). 1807 * 1808 * Note: BI together with FE/PE means just BI. 1809 */ 1810 if (line_status & LSR_BI) { 1811 #if defined(DDB) && defined(BREAK_TO_DEBUGGER) 1812 if (com->unit == comconsole) { 1813 breakpoint(); 1814 goto cont; 1815 } 1816 #endif 1817 if (com->tp == NULL 1818 || com->tp->t_iflag & IGNBRK) 1819 goto cont; 1820 } else { 1821 if (com->tp == NULL 1822 || com->tp->t_iflag & IGNPAR) 1823 goto cont; 1824 } 1825 if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 1826 && (line_status & (LSR_BI | LSR_FE) 1827 || com->tp->t_iflag & INPCK)) 1828 recv_data = 0; 1829 } 1830 ++com->bytes_in; 1831 if (com->hotchar != 0 && recv_data == com->hotchar) 1832 setsofttty(); 1833 ioptr = com->iptr; 1834 if (ioptr >= com->ibufend) 1835 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 1836 else { 1837 if (com->do_timestamp) 1838 microtime(&com->timestamp); 1839 ++com_events; 1840 schedsofttty(); 1841 #if 0 /* for testing input latency vs efficiency */ 1842 if (com->iptr - com->ibuf == 8) 1843 setsofttty(); 1844 #endif 1845 ioptr[0] = recv_data; 1846 ioptr[com->ierroff] = line_status; 1847 com->iptr = ++ioptr; 1848 if (ioptr == com->ihighwater 1849 && com->state & CS_RTS_IFLOW) 1850 outb(com->modem_ctl_port, 1851 com->mcr_image &= ~MCR_RTS); 1852 if (line_status & LSR_OE) 1853 CE_RECORD(com, CE_OVERRUN); 1854 } 1855 cont: 1856 /* 1857 * "& 0x7F" is to avoid the gcc-1.40 generating a slow 1858 * jump from the top of the loop to here 1859 */ 1860 line_status = inb(com->line_status_port) & 0x7F; 1861 } 1862 1863 /* modem status change? (always check before doing output) */ 1864 modem_status = inb(com->modem_status_port); 1865 if (modem_status != com->last_modem_status) { 1866 if (com->do_dcd_timestamp 1867 && !(com->last_modem_status & MSR_DCD) 1868 && modem_status & MSR_DCD) 1869 microtime(&com->dcd_timestamp); 1870 1871 /* 1872 * Schedule high level to handle DCD changes. Note 1873 * that we don't use the delta bits anywhere. Some 1874 * UARTs mess them up, and it's easy to remember the 1875 * previous bits and calculate the delta. 1876 */ 1877 com->last_modem_status = modem_status; 1878 if (!(com->state & CS_CHECKMSR)) { 1879 com_events += LOTS_OF_EVENTS; 1880 com->state |= CS_CHECKMSR; 1881 setsofttty(); 1882 } 1883 1884 /* handle CTS change immediately for crisp flow ctl */ 1885 if (com->state & CS_CTS_OFLOW) { 1886 if (modem_status & MSR_CTS) 1887 com->state |= CS_ODEVREADY; 1888 else 1889 com->state &= ~CS_ODEVREADY; 1890 } 1891 } 1892 1893 /* output queued and everything ready? */ 1894 if (line_status & LSR_TXRDY 1895 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 1896 ioptr = com->obufq.l_head; 1897 if (com->tx_fifo_size > 1) { 1898 u_int ocount; 1899 1900 ocount = com->obufq.l_tail - ioptr; 1901 if (ocount > com->tx_fifo_size) 1902 ocount = com->tx_fifo_size; 1903 com->bytes_out += ocount; 1904 do 1905 outb(com->data_port, *ioptr++); 1906 while (--ocount != 0); 1907 } else { 1908 outb(com->data_port, *ioptr++); 1909 ++com->bytes_out; 1910 } 1911 com->obufq.l_head = ioptr; 1912 if (COM_IIR_TXRDYBUG(com->flags)) { 1913 int_ctl_new = int_ctl | IER_ETXRDY; 1914 } 1915 if (ioptr >= com->obufq.l_tail) { 1916 struct lbq *qp; 1917 1918 qp = com->obufq.l_next; 1919 qp->l_queued = FALSE; 1920 qp = qp->l_next; 1921 if (qp != NULL) { 1922 com->obufq.l_head = qp->l_head; 1923 com->obufq.l_tail = qp->l_tail; 1924 com->obufq.l_next = qp; 1925 } else { 1926 /* output just completed */ 1927 if (COM_IIR_TXRDYBUG(com->flags)) { 1928 int_ctl_new = int_ctl & ~IER_ETXRDY; 1929 } 1930 com->state &= ~CS_BUSY; 1931 } 1932 if (!(com->state & CS_ODONE)) { 1933 com_events += LOTS_OF_EVENTS; 1934 com->state |= CS_ODONE; 1935 setsofttty(); /* handle at high level ASAP */ 1936 } 1937 } 1938 if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) { 1939 outb(com->intr_ctl_port, int_ctl_new); 1940 } 1941 } 1942 1943 /* finished? */ 1944 #ifndef COM_MULTIPORT 1945 if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 1946 #endif /* COM_MULTIPORT */ 1947 return; 1948 } 1949 } 1950 1951 static int 1952 sioioctl(struct dev_ioctl_args *ap) 1953 { 1954 cdev_t dev = ap->a_head.a_dev; 1955 caddr_t data = ap->a_data; 1956 struct com_s *com; 1957 int error; 1958 int mynor; 1959 struct tty *tp; 1960 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 1961 u_long oldcmd; 1962 struct termios term; 1963 #endif 1964 mynor = minor(dev); 1965 1966 com = com_addr(MINOR_TO_UNIT(mynor)); 1967 if (com == NULL || com->gone) 1968 return (ENODEV); 1969 if (mynor & CONTROL_MASK) { 1970 struct termios *ct; 1971 1972 switch (mynor & CONTROL_MASK) { 1973 case CONTROL_INIT_STATE: 1974 ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 1975 break; 1976 case CONTROL_LOCK_STATE: 1977 ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 1978 break; 1979 default: 1980 return (ENODEV); /* /dev/nodev */ 1981 } 1982 switch (ap->a_cmd) { 1983 case TIOCSETA: 1984 error = priv_check_cred(ap->a_cred, PRIV_ROOT, 0); 1985 if (error != 0) 1986 return (error); 1987 *ct = *(struct termios *)data; 1988 return (0); 1989 case TIOCGETA: 1990 *(struct termios *)data = *ct; 1991 return (0); 1992 case TIOCGETD: 1993 *(int *)data = TTYDISC; 1994 return (0); 1995 case TIOCGWINSZ: 1996 bzero(data, sizeof(struct winsize)); 1997 return (0); 1998 default: 1999 return (ENOTTY); 2000 } 2001 } 2002 tp = com->tp; 2003 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 2004 term = tp->t_termios; 2005 oldcmd = ap->a_cmd; 2006 error = ttsetcompat(tp, &ap->a_cmd, data, &term); 2007 if (error != 0) 2008 return (error); 2009 if (ap->a_cmd != oldcmd) 2010 data = (caddr_t)&term; 2011 #endif 2012 if (ap->a_cmd == TIOCSETA || ap->a_cmd == TIOCSETAW || 2013 ap->a_cmd == TIOCSETAF) { 2014 int cc; 2015 struct termios *dt = (struct termios *)data; 2016 struct termios *lt = mynor & CALLOUT_MASK 2017 ? &com->lt_out : &com->lt_in; 2018 2019 dt->c_iflag = (tp->t_iflag & lt->c_iflag) 2020 | (dt->c_iflag & ~lt->c_iflag); 2021 dt->c_oflag = (tp->t_oflag & lt->c_oflag) 2022 | (dt->c_oflag & ~lt->c_oflag); 2023 dt->c_cflag = (tp->t_cflag & lt->c_cflag) 2024 | (dt->c_cflag & ~lt->c_cflag); 2025 dt->c_lflag = (tp->t_lflag & lt->c_lflag) 2026 | (dt->c_lflag & ~lt->c_lflag); 2027 for (cc = 0; cc < NCCS; ++cc) 2028 if (lt->c_cc[cc] != 0) 2029 dt->c_cc[cc] = tp->t_cc[cc]; 2030 if (lt->c_ispeed != 0) 2031 dt->c_ispeed = tp->t_ispeed; 2032 if (lt->c_ospeed != 0) 2033 dt->c_ospeed = tp->t_ospeed; 2034 } 2035 error = (*linesw[tp->t_line].l_ioctl)(tp, ap->a_cmd, data, ap->a_fflag, ap->a_cred); 2036 if (error != ENOIOCTL) 2037 return (error); 2038 crit_enter(); 2039 error = ttioctl(tp, ap->a_cmd, data, ap->a_fflag); 2040 disc_optim(tp, &tp->t_termios, com); 2041 if (error != ENOIOCTL) { 2042 crit_exit(); 2043 return (error); 2044 } 2045 switch (ap->a_cmd) { 2046 case TIOCSBRK: 2047 sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 2048 break; 2049 case TIOCCBRK: 2050 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 2051 break; 2052 case TIOCSDTR: 2053 (void)commctl(com, TIOCM_DTR, DMBIS); 2054 break; 2055 case TIOCCDTR: 2056 (void)commctl(com, TIOCM_DTR, DMBIC); 2057 break; 2058 /* 2059 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 2060 * changes get undone on the next call to comparam(). 2061 */ 2062 case TIOCMSET: 2063 (void)commctl(com, *(int *)data, DMSET); 2064 break; 2065 case TIOCMBIS: 2066 (void)commctl(com, *(int *)data, DMBIS); 2067 break; 2068 case TIOCMBIC: 2069 (void)commctl(com, *(int *)data, DMBIC); 2070 break; 2071 case TIOCMGET: 2072 *(int *)data = commctl(com, 0, DMGET); 2073 break; 2074 case TIOCMSDTRWAIT: 2075 /* must be root since the wait applies to following logins */ 2076 error = priv_check_cred(ap->a_cred, PRIV_ROOT, 0); 2077 if (error != 0) { 2078 crit_exit(); 2079 return (error); 2080 } 2081 com->dtr_wait = *(int *)data * hz / 100; 2082 break; 2083 case TIOCMGDTRWAIT: 2084 *(int *)data = com->dtr_wait * 100 / hz; 2085 break; 2086 case TIOCTIMESTAMP: 2087 com->do_timestamp = TRUE; 2088 *(struct timeval *)data = com->timestamp; 2089 break; 2090 case TIOCDCDTIMESTAMP: 2091 com->do_dcd_timestamp = TRUE; 2092 *(struct timeval *)data = com->dcd_timestamp; 2093 break; 2094 default: 2095 crit_exit(); 2096 error = pps_ioctl(ap->a_cmd, data, &com->pps); 2097 if (error == ENODEV) 2098 error = ENOTTY; 2099 return (error); 2100 } 2101 crit_exit(); 2102 return (0); 2103 } 2104 2105 static void 2106 siopoll(void *dummy, void *frame) 2107 { 2108 int unit; 2109 2110 if (com_events == 0) 2111 return; 2112 repeat: 2113 for (unit = 0; unit < sio_numunits; ++unit) { 2114 struct com_s *com; 2115 int incc; 2116 struct tty *tp; 2117 2118 com = com_addr(unit); 2119 if (com == NULL) 2120 continue; 2121 tp = com->tp; 2122 if (tp == NULL || com->gone) { 2123 /* 2124 * Discard any events related to never-opened or 2125 * going-away devices. 2126 */ 2127 com_lock(); 2128 incc = com->iptr - com->ibuf; 2129 com->iptr = com->ibuf; 2130 if (com->state & CS_CHECKMSR) { 2131 incc += LOTS_OF_EVENTS; 2132 com->state &= ~CS_CHECKMSR; 2133 } 2134 com_events -= incc; 2135 com_unlock(); 2136 continue; 2137 } 2138 if (com->iptr != com->ibuf) { 2139 com_lock(); 2140 sioinput(com); 2141 com_unlock(); 2142 } 2143 if (com->state & CS_CHECKMSR) { 2144 u_char delta_modem_status; 2145 2146 com_lock(); 2147 delta_modem_status = com->last_modem_status 2148 ^ com->prev_modem_status; 2149 com->prev_modem_status = com->last_modem_status; 2150 com_events -= LOTS_OF_EVENTS; 2151 com->state &= ~CS_CHECKMSR; 2152 com_unlock(); 2153 if (delta_modem_status & MSR_DCD) 2154 (*linesw[tp->t_line].l_modem) 2155 (tp, com->prev_modem_status & MSR_DCD); 2156 } 2157 if (com->state & CS_ODONE) { 2158 com_lock(); 2159 com_events -= LOTS_OF_EVENTS; 2160 com->state &= ~CS_ODONE; 2161 com_unlock(); 2162 if (!(com->state & CS_BUSY) 2163 && !(com->extra_state & CSE_BUSYCHECK)) { 2164 callout_reset(&com->busy_ch, hz / 100, 2165 siobusycheck, com); 2166 com->extra_state |= CSE_BUSYCHECK; 2167 } 2168 (*linesw[tp->t_line].l_start)(tp); 2169 } 2170 if (com_events == 0) 2171 break; 2172 } 2173 if (com_events >= LOTS_OF_EVENTS) 2174 goto repeat; 2175 } 2176 2177 static int 2178 comparam(struct tty *tp, struct termios *t) 2179 { 2180 u_int cfcr; 2181 int cflag; 2182 struct com_s *com; 2183 u_int divisor; 2184 u_char dlbh; 2185 u_char dlbl; 2186 int unit; 2187 2188 unit = DEV_TO_UNIT(tp->t_dev); 2189 com = com_addr(unit); 2190 if (com == NULL) 2191 return (ENODEV); 2192 2193 /* do historical conversions */ 2194 if (t->c_ispeed == 0) 2195 t->c_ispeed = t->c_ospeed; 2196 2197 /* check requested parameters */ 2198 if (t->c_ospeed == 0) 2199 divisor = 0; 2200 else { 2201 if (t->c_ispeed != t->c_ospeed) 2202 return (EINVAL); 2203 divisor = siodivisor(com->rclk, t->c_ispeed); 2204 if (divisor == 0) 2205 return (EINVAL); 2206 } 2207 2208 /* parameters are OK, convert them to the com struct and the device */ 2209 crit_enter(); 2210 if (divisor == 0) 2211 (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 2212 else 2213 (void)commctl(com, TIOCM_DTR, DMBIS); 2214 cflag = t->c_cflag; 2215 switch (cflag & CSIZE) { 2216 case CS5: 2217 cfcr = CFCR_5BITS; 2218 break; 2219 case CS6: 2220 cfcr = CFCR_6BITS; 2221 break; 2222 case CS7: 2223 cfcr = CFCR_7BITS; 2224 break; 2225 default: 2226 cfcr = CFCR_8BITS; 2227 break; 2228 } 2229 if (cflag & PARENB) { 2230 cfcr |= CFCR_PENAB; 2231 if (!(cflag & PARODD)) 2232 cfcr |= CFCR_PEVEN; 2233 } 2234 if (cflag & CSTOPB) 2235 cfcr |= CFCR_STOPB; 2236 2237 if (com->hasfifo && divisor != 0) { 2238 /* 2239 * Use a fifo trigger level low enough so that the input 2240 * latency from the fifo is less than about 16 msec and 2241 * the total latency is less than about 30 msec. These 2242 * latencies are reasonable for humans. Serial comms 2243 * protocols shouldn't expect anything better since modem 2244 * latencies are larger. 2245 * 2246 * Interrupts can be held up for long periods of time 2247 * due to inefficiencies in other parts of the kernel, 2248 * certain video cards, etc. Setting the FIFO trigger 2249 * point to MEDH instead of HIGH gives us 694uS of slop 2250 * (8 character times) instead of 173uS (2 character times) 2251 * @ 115200 bps. 2252 */ 2253 com->fifo_image = t->c_ospeed <= 4800 2254 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 2255 #ifdef COM_ESP 2256 /* 2257 * The Hayes ESP card needs the fifo DMA mode bit set 2258 * in compatibility mode. If not, it will interrupt 2259 * for each character received. 2260 */ 2261 if (com->esp) 2262 com->fifo_image |= FIFO_DMA_MODE; 2263 #endif 2264 sio_setreg(com, com_fifo, com->fifo_image); 2265 } 2266 2267 /* 2268 * This returns with interrupts disabled so that we can complete 2269 * the speed change atomically. Keeping interrupts disabled is 2270 * especially important while com_data is hidden. 2271 */ 2272 (void) siosetwater(com, t->c_ispeed); 2273 2274 if (divisor != 0) { 2275 sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 2276 /* 2277 * Only set the divisor registers if they would change, 2278 * since on some 16550 incompatibles (UMC8669F), setting 2279 * them while input is arriving them loses sync until 2280 * data stops arriving. 2281 */ 2282 dlbl = divisor & 0xFF; 2283 if (sio_getreg(com, com_dlbl) != dlbl) 2284 sio_setreg(com, com_dlbl, dlbl); 2285 dlbh = divisor >> 8; 2286 if (sio_getreg(com, com_dlbh) != dlbh) 2287 sio_setreg(com, com_dlbh, dlbh); 2288 } 2289 2290 sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 2291 2292 if (!(tp->t_state & TS_TTSTOP)) 2293 com->state |= CS_TTGO; 2294 2295 if (cflag & CRTS_IFLOW) { 2296 if (com->st16650a) { 2297 sio_setreg(com, com_cfcr, 0xbf); 2298 sio_setreg(com, com_fifo, 2299 sio_getreg(com, com_fifo) | 0x40); 2300 } 2301 com->state |= CS_RTS_IFLOW; 2302 /* 2303 * If CS_RTS_IFLOW just changed from off to on, the change 2304 * needs to be propagated to MCR_RTS. This isn't urgent, 2305 * so do it later by calling comstart() instead of repeating 2306 * a lot of code from comstart() here. 2307 */ 2308 } else if (com->state & CS_RTS_IFLOW) { 2309 com->state &= ~CS_RTS_IFLOW; 2310 /* 2311 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 2312 * on here, since comstart() won't do it later. 2313 */ 2314 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2315 if (com->st16650a) { 2316 sio_setreg(com, com_cfcr, 0xbf); 2317 sio_setreg(com, com_fifo, 2318 sio_getreg(com, com_fifo) & ~0x40); 2319 } 2320 } 2321 2322 2323 /* 2324 * Set up state to handle output flow control. 2325 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 2326 * Now has 10+ msec latency, while CTS flow has 50- usec latency. 2327 */ 2328 com->state |= CS_ODEVREADY; 2329 com->state &= ~CS_CTS_OFLOW; 2330 if (cflag & CCTS_OFLOW) { 2331 com->state |= CS_CTS_OFLOW; 2332 if (!(com->last_modem_status & MSR_CTS)) 2333 com->state &= ~CS_ODEVREADY; 2334 if (com->st16650a) { 2335 sio_setreg(com, com_cfcr, 0xbf); 2336 sio_setreg(com, com_fifo, 2337 sio_getreg(com, com_fifo) | 0x80); 2338 } 2339 } else { 2340 if (com->st16650a) { 2341 sio_setreg(com, com_cfcr, 0xbf); 2342 sio_setreg(com, com_fifo, 2343 sio_getreg(com, com_fifo) & ~0x80); 2344 } 2345 } 2346 2347 sio_setreg(com, com_cfcr, com->cfcr_image); 2348 2349 /* XXX shouldn't call functions while intrs are disabled. */ 2350 disc_optim(tp, t, com); 2351 /* 2352 * Recover from fiddling with CS_TTGO. We used to call siointr1() 2353 * unconditionally, but that defeated the careful discarding of 2354 * stale input in sioopen(). 2355 */ 2356 if (com->state >= (CS_BUSY | CS_TTGO)) 2357 siointr1(com); 2358 2359 com_unlock(); 2360 crit_exit(); 2361 comstart(tp); 2362 if (com->ibufold != NULL) { 2363 kfree(com->ibufold, M_DEVBUF); 2364 com->ibufold = NULL; 2365 } 2366 return (0); 2367 } 2368 2369 static int 2370 siosetwater(struct com_s *com, speed_t speed) 2371 { 2372 int cp4ticks; 2373 u_char *ibuf; 2374 int ibufsize; 2375 struct tty *tp; 2376 2377 /* 2378 * Make the buffer size large enough to handle a softtty interrupt 2379 * latency of about 2 ticks without loss of throughput or data 2380 * (about 3 ticks if input flow control is not used or not honoured, 2381 * but a bit less for CS5-CS7 modes). 2382 */ 2383 cp4ticks = speed / 10 / hz * 4; 2384 for (ibufsize = 128; ibufsize < cp4ticks;) 2385 ibufsize <<= 1; 2386 if (ibufsize == com->ibufsize) { 2387 com_lock(); 2388 return (0); 2389 } 2390 2391 /* 2392 * Allocate input buffer. The extra factor of 2 in the size is 2393 * to allow for an error byte for each input byte. 2394 */ 2395 ibuf = kmalloc(2 * ibufsize, M_DEVBUF, M_WAITOK | M_ZERO); 2396 2397 /* Initialize non-critical variables. */ 2398 com->ibufold = com->ibuf; 2399 com->ibufsize = ibufsize; 2400 tp = com->tp; 2401 if (tp != NULL) { 2402 tp->t_ififosize = 2 * ibufsize; 2403 tp->t_ispeedwat = (speed_t)-1; 2404 tp->t_ospeedwat = (speed_t)-1; 2405 } 2406 2407 /* 2408 * Read current input buffer, if any. Continue with interrupts 2409 * disabled. 2410 */ 2411 com_lock(); 2412 if (com->iptr != com->ibuf) 2413 sioinput(com); 2414 2415 /*- 2416 * Initialize critical variables, including input buffer watermarks. 2417 * The external device is asked to stop sending when the buffer 2418 * exactly reaches high water, or when the high level requests it. 2419 * The high level is notified immediately (rather than at a later 2420 * clock tick) when this watermark is reached. 2421 * The buffer size is chosen so the watermark should almost never 2422 * be reached. 2423 * The low watermark is invisibly 0 since the buffer is always 2424 * emptied all at once. 2425 */ 2426 com->iptr = com->ibuf = ibuf; 2427 com->ibufend = ibuf + ibufsize; 2428 com->ierroff = ibufsize; 2429 com->ihighwater = ibuf + 3 * ibufsize / 4; 2430 return (0); 2431 } 2432 2433 static void 2434 comstart(struct tty *tp) 2435 { 2436 struct com_s *com; 2437 int unit; 2438 2439 unit = DEV_TO_UNIT(tp->t_dev); 2440 com = com_addr(unit); 2441 if (com == NULL) 2442 return; 2443 crit_enter(); 2444 com_lock(); 2445 if (tp->t_state & TS_TTSTOP) 2446 com->state &= ~CS_TTGO; 2447 else 2448 com->state |= CS_TTGO; 2449 if (tp->t_state & TS_TBLOCK) { 2450 if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 2451 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 2452 } else { 2453 if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 2454 && com->state & CS_RTS_IFLOW) 2455 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2456 } 2457 com_unlock(); 2458 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 2459 ttwwakeup(tp); 2460 crit_exit(); 2461 return; 2462 } 2463 if (tp->t_outq.c_cc != 0) { 2464 struct lbq *qp; 2465 struct lbq *next; 2466 2467 if (!com->obufs[0].l_queued) { 2468 com->obufs[0].l_tail 2469 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 2470 sizeof com->obuf1); 2471 com->obufs[0].l_next = NULL; 2472 com->obufs[0].l_queued = TRUE; 2473 com_lock(); 2474 if (com->state & CS_BUSY) { 2475 qp = com->obufq.l_next; 2476 while ((next = qp->l_next) != NULL) 2477 qp = next; 2478 qp->l_next = &com->obufs[0]; 2479 } else { 2480 com->obufq.l_head = com->obufs[0].l_head; 2481 com->obufq.l_tail = com->obufs[0].l_tail; 2482 com->obufq.l_next = &com->obufs[0]; 2483 com->state |= CS_BUSY; 2484 } 2485 com_unlock(); 2486 } 2487 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 2488 com->obufs[1].l_tail 2489 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 2490 sizeof com->obuf2); 2491 com->obufs[1].l_next = NULL; 2492 com->obufs[1].l_queued = TRUE; 2493 com_lock(); 2494 if (com->state & CS_BUSY) { 2495 qp = com->obufq.l_next; 2496 while ((next = qp->l_next) != NULL) 2497 qp = next; 2498 qp->l_next = &com->obufs[1]; 2499 } else { 2500 com->obufq.l_head = com->obufs[1].l_head; 2501 com->obufq.l_tail = com->obufs[1].l_tail; 2502 com->obufq.l_next = &com->obufs[1]; 2503 com->state |= CS_BUSY; 2504 } 2505 com_unlock(); 2506 } 2507 tp->t_state |= TS_BUSY; 2508 } 2509 com_lock(); 2510 if (com->state >= (CS_BUSY | CS_TTGO)) 2511 siointr1(com); /* fake interrupt to start output */ 2512 com_unlock(); 2513 ttwwakeup(tp); 2514 crit_exit(); 2515 } 2516 2517 static void 2518 comstop(struct tty *tp, int rw) 2519 { 2520 struct com_s *com; 2521 2522 com = com_addr(DEV_TO_UNIT(tp->t_dev)); 2523 if (com == NULL || com->gone) 2524 return; 2525 com_lock(); 2526 if (rw & FWRITE) { 2527 if (com->hasfifo) 2528 #ifdef COM_ESP 2529 /* XXX avoid h/w bug. */ 2530 if (!com->esp) 2531 #endif 2532 sio_setreg(com, com_fifo, 2533 FIFO_XMT_RST | com->fifo_image); 2534 com->obufs[0].l_queued = FALSE; 2535 com->obufs[1].l_queued = FALSE; 2536 if (com->state & CS_ODONE) 2537 com_events -= LOTS_OF_EVENTS; 2538 com->state &= ~(CS_ODONE | CS_BUSY); 2539 com->tp->t_state &= ~TS_BUSY; 2540 } 2541 if (rw & FREAD) { 2542 if (com->hasfifo) 2543 #ifdef COM_ESP 2544 /* XXX avoid h/w bug. */ 2545 if (!com->esp) 2546 #endif 2547 sio_setreg(com, com_fifo, 2548 FIFO_RCV_RST | com->fifo_image); 2549 com_events -= (com->iptr - com->ibuf); 2550 com->iptr = com->ibuf; 2551 } 2552 com_unlock(); 2553 comstart(tp); 2554 } 2555 2556 static int 2557 commctl(struct com_s *com, int bits, int how) 2558 { 2559 int mcr; 2560 int msr; 2561 2562 if (how == DMGET) { 2563 bits = TIOCM_LE; /* XXX - always enabled while open */ 2564 mcr = com->mcr_image; 2565 if (mcr & MCR_DTR) 2566 bits |= TIOCM_DTR; 2567 if (mcr & MCR_RTS) 2568 bits |= TIOCM_RTS; 2569 msr = com->prev_modem_status; 2570 if (msr & MSR_CTS) 2571 bits |= TIOCM_CTS; 2572 if (msr & MSR_DCD) 2573 bits |= TIOCM_CD; 2574 if (msr & MSR_DSR) 2575 bits |= TIOCM_DSR; 2576 /* 2577 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 2578 * more volatile by reading the modem status a lot. Perhaps 2579 * we should latch both bits until the status is read here. 2580 */ 2581 if (msr & (MSR_RI | MSR_TERI)) 2582 bits |= TIOCM_RI; 2583 return (bits); 2584 } 2585 mcr = 0; 2586 if (bits & TIOCM_DTR) 2587 mcr |= MCR_DTR; 2588 if (bits & TIOCM_RTS) 2589 mcr |= MCR_RTS; 2590 if (com->gone) 2591 return(0); 2592 com_lock(); 2593 switch (how) { 2594 case DMSET: 2595 outb(com->modem_ctl_port, 2596 com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 2597 break; 2598 case DMBIS: 2599 outb(com->modem_ctl_port, com->mcr_image |= mcr); 2600 break; 2601 case DMBIC: 2602 outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 2603 break; 2604 } 2605 com_unlock(); 2606 return (0); 2607 } 2608 2609 static void 2610 siosettimeout(void) 2611 { 2612 struct com_s *com; 2613 bool_t someopen; 2614 int unit; 2615 2616 /* 2617 * Set our timeout period to 1 second if no polled devices are open. 2618 * Otherwise set it to max(1/200, 1/hz). 2619 * Enable timeouts iff some device is open. 2620 */ 2621 callout_stop(&sio_timeout_handle); 2622 sio_timeout = hz; 2623 someopen = FALSE; 2624 for (unit = 0; unit < sio_numunits; ++unit) { 2625 com = com_addr(unit); 2626 if (com != NULL && com->tp != NULL 2627 && com->tp->t_state & TS_ISOPEN && !com->gone) { 2628 someopen = TRUE; 2629 if (com->poll || com->poll_output) { 2630 sio_timeout = hz > 200 ? hz / 200 : 1; 2631 break; 2632 } 2633 } 2634 } 2635 if (someopen) { 2636 sio_timeouts_until_log = hz / sio_timeout; 2637 callout_reset(&sio_timeout_handle, sio_timeout, 2638 comwakeup, NULL); 2639 } else { 2640 /* Flush error messages, if any. */ 2641 sio_timeouts_until_log = 1; 2642 comwakeup(NULL); 2643 callout_stop(&sio_timeout_handle); 2644 } 2645 } 2646 2647 static void 2648 comwakeup(void *chan) 2649 { 2650 struct com_s *com; 2651 int unit; 2652 2653 callout_reset(&sio_timeout_handle, sio_timeout, comwakeup, NULL); 2654 2655 /* 2656 * Recover from lost output interrupts. 2657 * Poll any lines that don't use interrupts. 2658 */ 2659 for (unit = 0; unit < sio_numunits; ++unit) { 2660 com = com_addr(unit); 2661 if (com != NULL && !com->gone 2662 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 2663 com_lock(); 2664 siointr1(com); 2665 com_unlock(); 2666 } 2667 } 2668 2669 /* 2670 * Check for and log errors, but not too often. 2671 */ 2672 if (--sio_timeouts_until_log > 0) 2673 return; 2674 sio_timeouts_until_log = hz / sio_timeout; 2675 for (unit = 0; unit < sio_numunits; ++unit) { 2676 int errnum; 2677 2678 com = com_addr(unit); 2679 if (com == NULL) 2680 continue; 2681 if (com->gone) 2682 continue; 2683 for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 2684 u_int delta; 2685 u_long total; 2686 2687 com_lock(); 2688 delta = com->delta_error_counts[errnum]; 2689 com->delta_error_counts[errnum] = 0; 2690 com_unlock(); 2691 if (delta == 0) 2692 continue; 2693 total = com->error_counts[errnum] += delta; 2694 log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 2695 unit, delta, error_desc[errnum], 2696 delta == 1 ? "" : "s", total); 2697 } 2698 } 2699 } 2700 2701 static void 2702 disc_optim(struct tty *tp, struct termios *t, struct com_s *com) 2703 { 2704 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 2705 && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 2706 && (!(t->c_iflag & PARMRK) 2707 || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 2708 && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 2709 && linesw[tp->t_line].l_rint == ttyinput) 2710 tp->t_state |= TS_CAN_BYPASS_L_RINT; 2711 else 2712 tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 2713 com->hotchar = linesw[tp->t_line].l_hotchar; 2714 } 2715 2716 /* 2717 * Following are all routines needed for SIO to act as console 2718 */ 2719 #include <sys/cons.h> 2720 2721 struct siocnstate { 2722 u_char dlbl; 2723 u_char dlbh; 2724 u_char ier; 2725 u_char cfcr; 2726 u_char mcr; 2727 }; 2728 2729 static speed_t siocngetspeed (Port_t, u_long rclk); 2730 static void siocnclose (struct siocnstate *sp, Port_t iobase); 2731 static void siocnopen (struct siocnstate *sp, Port_t iobase, int speed); 2732 static void siocntxwait (Port_t iobase); 2733 2734 static cn_probe_t siocnprobe; 2735 static cn_init_t siocninit; 2736 static cn_init_fini_t siocninit_fini; 2737 static cn_checkc_t siocncheckc; 2738 static cn_getc_t siocngetc; 2739 static cn_putc_t siocnputc; 2740 2741 #if defined(__i386__) || defined(__x86_64__) 2742 CONS_DRIVER(sio, siocnprobe, siocninit, siocninit_fini, 2743 NULL, siocngetc, siocncheckc, siocnputc, NULL); 2744 #endif 2745 2746 /* To get the GDB related variables */ 2747 #if DDB > 0 2748 #include <ddb/ddb.h> 2749 #endif 2750 2751 static void 2752 siocntxwait(Port_t iobase) 2753 { 2754 int timo; 2755 2756 /* 2757 * Wait for any pending transmission to finish. Required to avoid 2758 * the UART lockup bug when the speed is changed, and for normal 2759 * transmits. 2760 */ 2761 timo = 100000; 2762 while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 2763 != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 2764 ; 2765 } 2766 2767 /* 2768 * Read the serial port specified and try to figure out what speed 2769 * it's currently running at. We're assuming the serial port has 2770 * been initialized and is basicly idle. This routine is only intended 2771 * to be run at system startup. 2772 * 2773 * If the value read from the serial port doesn't make sense, return 0. 2774 */ 2775 2776 static speed_t 2777 siocngetspeed(Port_t iobase, u_long rclk) 2778 { 2779 u_int divisor; 2780 u_char dlbh; 2781 u_char dlbl; 2782 u_char cfcr; 2783 2784 cfcr = inb(iobase + com_cfcr); 2785 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2786 2787 dlbl = inb(iobase + com_dlbl); 2788 dlbh = inb(iobase + com_dlbh); 2789 2790 outb(iobase + com_cfcr, cfcr); 2791 2792 divisor = dlbh << 8 | dlbl; 2793 2794 /* XXX there should be more sanity checking. */ 2795 if (divisor == 0) 2796 return (CONSPEED); 2797 return (rclk / (16UL * divisor)); 2798 } 2799 2800 static void 2801 siocnopen(struct siocnstate *sp, Port_t iobase, int speed) 2802 { 2803 u_int divisor; 2804 u_char dlbh; 2805 u_char dlbl; 2806 2807 /* 2808 * Save all the device control registers except the fifo register 2809 * and set our default ones (cs8 -parenb speed=comdefaultrate). 2810 * We can't save the fifo register since it is read-only. 2811 */ 2812 sp->ier = inb(iobase + com_ier); 2813 outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 2814 siocntxwait(iobase); 2815 sp->cfcr = inb(iobase + com_cfcr); 2816 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2817 sp->dlbl = inb(iobase + com_dlbl); 2818 sp->dlbh = inb(iobase + com_dlbh); 2819 /* 2820 * Only set the divisor registers if they would change, since on 2821 * some 16550 incompatibles (Startech), setting them clears the 2822 * data input register. This also reduces the effects of the 2823 * UMC8669F bug. 2824 */ 2825 divisor = siodivisor(comdefaultrclk, speed); 2826 dlbl = divisor & 0xFF; 2827 if (sp->dlbl != dlbl) 2828 outb(iobase + com_dlbl, dlbl); 2829 dlbh = divisor >> 8; 2830 if (sp->dlbh != dlbh) 2831 outb(iobase + com_dlbh, dlbh); 2832 outb(iobase + com_cfcr, CFCR_8BITS); 2833 sp->mcr = inb(iobase + com_mcr); 2834 /* 2835 * We don't want interrupts, but must be careful not to "disable" 2836 * them by clearing the MCR_IENABLE bit, since that might cause 2837 * an interrupt by floating the IRQ line. 2838 */ 2839 outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 2840 } 2841 2842 static void 2843 siocnclose(struct siocnstate *sp, Port_t iobase) 2844 { 2845 /* 2846 * Restore the device control registers. 2847 */ 2848 siocntxwait(iobase); 2849 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2850 if (sp->dlbl != inb(iobase + com_dlbl)) 2851 outb(iobase + com_dlbl, sp->dlbl); 2852 if (sp->dlbh != inb(iobase + com_dlbh)) 2853 outb(iobase + com_dlbh, sp->dlbh); 2854 outb(iobase + com_cfcr, sp->cfcr); 2855 /* 2856 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 2857 */ 2858 outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 2859 outb(iobase + com_ier, sp->ier); 2860 } 2861 2862 static void 2863 siocnprobe(struct consdev *cp) 2864 { 2865 speed_t boot_speed; 2866 u_char cfcr; 2867 u_int divisor; 2868 int unit; 2869 struct siocnstate sp; 2870 2871 /* 2872 * Find our first enabled console, if any. If it is a high-level 2873 * console device, then initialize it and return successfully. 2874 * If it is a low-level console device, then initialize it and 2875 * return unsuccessfully. It must be initialized in both cases 2876 * for early use by console drivers and debuggers. Initializing 2877 * the hardware is not necessary in all cases, since the i/o 2878 * routines initialize it on the fly, but it is necessary if 2879 * input might arrive while the hardware is switched back to an 2880 * uninitialized state. We can't handle multiple console devices 2881 * yet because our low-level routines don't take a device arg. 2882 * We trust the user to set the console flags properly so that we 2883 * don't need to probe. 2884 */ 2885 cp->cn_pri = CN_DEAD; 2886 2887 for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 2888 int flags; 2889 int disabled; 2890 if (resource_int_value("sio", unit, "disabled", &disabled) == 0) { 2891 if (disabled) 2892 continue; 2893 } 2894 if (resource_int_value("sio", unit, "flags", &flags)) 2895 continue; 2896 if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 2897 int port; 2898 Port_t iobase; 2899 2900 if (resource_int_value("sio", unit, "port", &port)) 2901 continue; 2902 iobase = port; 2903 crit_enter(); 2904 if (boothowto & RB_SERIAL) { 2905 boot_speed = 2906 siocngetspeed(iobase, comdefaultrclk); 2907 if (boot_speed) 2908 comdefaultrate = boot_speed; 2909 } 2910 2911 /* 2912 * Initialize the divisor latch. We can't rely on 2913 * siocnopen() to do this the first time, since it 2914 * avoids writing to the latch if the latch appears 2915 * to have the correct value. Also, if we didn't 2916 * just read the speed from the hardware, then we 2917 * need to set the speed in hardware so that 2918 * switching it later is null. 2919 */ 2920 cfcr = inb(iobase + com_cfcr); 2921 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2922 divisor = siodivisor(comdefaultrclk, comdefaultrate); 2923 outb(iobase + com_dlbl, divisor & 0xff); 2924 outb(iobase + com_dlbh, divisor >> 8); 2925 outb(iobase + com_cfcr, cfcr); 2926 2927 siocnopen(&sp, iobase, comdefaultrate); 2928 2929 crit_exit(); 2930 if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 2931 cp->cn_probegood = 1; 2932 cp->cn_private = (void *)(intptr_t)unit; 2933 cp->cn_pri = COM_FORCECONSOLE(flags) 2934 || boothowto & RB_SERIAL 2935 ? CN_REMOTE : CN_NORMAL; 2936 siocniobase = iobase; 2937 siocnunit = unit; 2938 } 2939 if (COM_DEBUGGER(flags) && gdb_tab == NULL) { 2940 kprintf("sio%d: gdb debugging port\n", unit); 2941 siogdbiobase = iobase; 2942 siogdbunit = unit; 2943 #if DDB > 0 2944 cp->cn_gdbprivate = (void *)(intptr_t)unit; 2945 gdb_tab = cp; 2946 #endif 2947 } 2948 } 2949 } 2950 #if defined(__i386__) || defined(__x86_64__) 2951 #if DDB > 0 2952 /* 2953 * XXX Ugly Compatability. 2954 * If no gdb port has been specified, set it to be the console 2955 * as some configuration files don't specify the gdb port. 2956 */ 2957 if (gdb_tab == NULL && (boothowto & RB_GDB)) { 2958 kprintf("Warning: no GDB port specified. Defaulting to sio%d.\n", 2959 siocnunit); 2960 kprintf("Set flag 0x80 on desired GDB port in your\n"); 2961 kprintf("configuration file (currently sio only).\n"); 2962 siogdbiobase = siocniobase; 2963 siogdbunit = siocnunit; 2964 cp->cn_gdbprivate = (void *)(intptr_t)siocnunit; 2965 gdb_tab = cp; 2966 } 2967 #endif 2968 #endif 2969 } 2970 2971 static void 2972 siocninit(struct consdev *cp) 2973 { 2974 comconsole = (int)(intptr_t)cp->cn_private; 2975 } 2976 2977 static void 2978 siocninit_fini(struct consdev *cp) 2979 { 2980 cdev_t dev; 2981 int unit; 2982 2983 if (cp->cn_probegood) { 2984 unit = (int)(intptr_t)cp->cn_private; 2985 /* 2986 * Call devfs_find_device_by_name on ttydX to find the correct device, 2987 * as it should have been created already at this point by the 2988 * attach routine. 2989 * If it isn't found, the serial port was not attached at all and we 2990 * shouldn't be here, so assert this case. 2991 */ 2992 dev = devfs_find_device_by_name("ttyd%r", unit); 2993 2994 KKASSERT(dev != NULL); 2995 cp->cn_dev = dev; 2996 } 2997 } 2998 2999 static int 3000 siocncheckc(void *private) 3001 { 3002 int c; 3003 int unit = (int)(intptr_t)private; 3004 Port_t iobase; 3005 struct siocnstate sp; 3006 3007 if (unit == siogdbunit) 3008 iobase = siogdbiobase; 3009 else 3010 iobase = siocniobase; 3011 crit_enter(); 3012 siocnopen(&sp, iobase, comdefaultrate); 3013 if (inb(iobase + com_lsr) & LSR_RXRDY) 3014 c = inb(iobase + com_data); 3015 else 3016 c = -1; 3017 siocnclose(&sp, iobase); 3018 crit_exit(); 3019 return (c); 3020 } 3021 3022 3023 int 3024 siocngetc(void *private) 3025 { 3026 int c; 3027 int unit = (int)(intptr_t)private; 3028 Port_t iobase; 3029 struct siocnstate sp; 3030 3031 if (unit == siogdbunit) 3032 iobase = siogdbiobase; 3033 else 3034 iobase = siocniobase; 3035 crit_enter(); 3036 siocnopen(&sp, iobase, comdefaultrate); 3037 while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 3038 ; 3039 c = inb(iobase + com_data); 3040 siocnclose(&sp, iobase); 3041 crit_exit(); 3042 return (c); 3043 } 3044 3045 void 3046 siocnputc(void *private, int c) 3047 { 3048 int unit = (int)(intptr_t)private; 3049 struct siocnstate sp; 3050 Port_t iobase; 3051 3052 if (unit == siogdbunit) 3053 iobase = siogdbiobase; 3054 else 3055 iobase = siocniobase; 3056 crit_enter(); 3057 siocnopen(&sp, iobase, comdefaultrate); 3058 siocntxwait(iobase); 3059 outb(iobase + com_data, c); 3060 siocnclose(&sp, iobase); 3061 crit_exit(); 3062 } 3063 3064 DRIVER_MODULE(sio, isa, sio_isa_driver, sio_devclass, 0, 0); 3065 DRIVER_MODULE(sio, acpi, sio_isa_driver, sio_devclass, 0, 0); 3066 #if NPCI > 0 3067 DRIVER_MODULE(sio, pci, sio_pci_driver, sio_devclass, 0, 0); 3068 #endif 3069 #if NPUC > 0 3070 DRIVER_MODULE(sio, puc, sio_puc_driver, sio_devclass, 0, 0); 3071 #endif 3072