1 /*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Berkeley and its contributors. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * $FreeBSD: src/sys/isa/sio.c,v 1.291.2.35 2003/05/18 08:51:15 murray Exp $ 34 * $DragonFly: src/sys/dev/serial/sio/sio.c,v 1.28 2005/06/16 21:12:41 dillon Exp $ 35 * from: @(#)com.c 7.5 (Berkeley) 5/16/91 36 * from: i386/isa sio.c,v 1.234 37 */ 38 39 #include "opt_comconsole.h" 40 #include "opt_compat.h" 41 #include "opt_ddb.h" 42 #include "opt_sio.h" 43 #include "use_pci.h" 44 #ifdef __i386__ 45 #include "use_puc.h" 46 #endif 47 #include "use_sio.h" 48 49 /* 50 * Serial driver, based on 386BSD-0.1 com driver. 51 * Mostly rewritten to use pseudo-DMA. 52 * Works for National Semiconductor NS8250-NS16550AF UARTs. 53 * COM driver, based on HP dca driver. 54 * 55 * Changes for PC-Card integration: 56 * - Added PC-Card driver table and handlers 57 */ 58 #include <sys/param.h> 59 #include <sys/systm.h> 60 #include <sys/reboot.h> 61 #include <sys/malloc.h> 62 #include <sys/tty.h> 63 #include <sys/proc.h> 64 #include <sys/module.h> 65 #include <sys/conf.h> 66 #include <sys/dkstat.h> 67 #include <sys/fcntl.h> 68 #include <sys/interrupt.h> 69 #include <sys/kernel.h> 70 #include <sys/syslog.h> 71 #include <sys/sysctl.h> 72 #include <sys/bus.h> 73 #include <machine/bus_pio.h> 74 #include <machine/bus.h> 75 #include <sys/rman.h> 76 #include <sys/timepps.h> 77 #include <sys/thread2.h> 78 79 #include <machine/limits.h> 80 81 #include <bus/isa/isareg.h> 82 #include <bus/isa/isavar.h> 83 #if NPCI > 0 84 #include <bus/pci/pcireg.h> 85 #include <bus/pci/pcivar.h> 86 #endif 87 #if NPUC > 0 88 #include <dev/misc/puc/pucvar.h> 89 #endif 90 #include <machine/lock.h> 91 92 #include <machine/clock.h> 93 #include <machine/ipl.h> 94 #ifndef SMP 95 #include <machine/lock.h> 96 #endif 97 #include <machine/resource.h> 98 99 #include "sioreg.h" 100 #include "sio_private.h" 101 102 #ifdef COM_ESP 103 #include "../ic_layer/esp.h" 104 #endif 105 106 #define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 107 108 #define CALLOUT_MASK 0x80 109 #define CONTROL_MASK 0x60 110 #define CONTROL_INIT_STATE 0x20 111 #define CONTROL_LOCK_STATE 0x40 112 #define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 113 #define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \ 114 | ((mynor) & 0x1f)) 115 #define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \ 116 | ((unit) & 0x1f)) 117 118 #define com_scr 7 /* scratch register for 16450-16550 (R/W) */ 119 120 #define sio_getreg(com, off) \ 121 (bus_space_read_1((com)->bst, (com)->bsh, (off))) 122 #define sio_setreg(com, off, value) \ 123 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 124 125 /* 126 * com state bits. 127 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 128 * than the other bits so that they can be tested as a group without masking 129 * off the low bits. 130 * 131 * The following com and tty flags correspond closely: 132 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 133 * comstop()) 134 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 135 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 136 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 137 * TS_FLUSH is not used. 138 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 139 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 140 */ 141 #define CS_BUSY 0x80 /* output in progress */ 142 #define CS_TTGO 0x40 /* output not stopped by XOFF */ 143 #define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 144 #define CS_CHECKMSR 1 /* check of MSR scheduled */ 145 #define CS_CTS_OFLOW 2 /* use CTS output flow control */ 146 #define CS_DTR_OFF 0x10 /* DTR held off */ 147 #define CS_ODONE 4 /* output completed */ 148 #define CS_RTS_IFLOW 8 /* use RTS input flow control */ 149 #define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 150 151 static char const * const error_desc[] = { 152 #define CE_OVERRUN 0 153 "silo overflow", 154 #define CE_INTERRUPT_BUF_OVERFLOW 1 155 "interrupt-level buffer overflow", 156 #define CE_TTY_BUF_OVERFLOW 2 157 "tty-level buffer overflow", 158 }; 159 160 #ifdef COM_ESP 161 static int espattach (struct com_s *com, Port_t esp_port); 162 #endif 163 static int sio_isa_attach (device_t dev); 164 165 static timeout_t siobusycheck; 166 static u_int siodivisor (u_long rclk, speed_t speed); 167 static timeout_t siodtrwakeup; 168 static void comhardclose (struct com_s *com); 169 static void sioinput (struct com_s *com); 170 static void siointr1 (struct com_s *com); 171 static void siointr (void *arg); 172 static int commctl (struct com_s *com, int bits, int how); 173 static int comparam (struct tty *tp, struct termios *t); 174 static inthand2_t siopoll; 175 static int sio_isa_probe (device_t dev); 176 static void siosettimeout (void); 177 static int siosetwater (struct com_s *com, speed_t speed); 178 static void comstart (struct tty *tp); 179 static void comstop (struct tty *tp, int rw); 180 static timeout_t comwakeup; 181 static void disc_optim (struct tty *tp, struct termios *t, 182 struct com_s *com); 183 184 #if NPCI > 0 185 static int sio_pci_attach (device_t dev); 186 static void sio_pci_kludge_unit (device_t dev); 187 static int sio_pci_probe (device_t dev); 188 #endif /* NPCI > 0 */ 189 190 #if NPUC > 0 191 static int sio_puc_attach (device_t dev); 192 static int sio_puc_probe (device_t dev); 193 #endif /* NPUC > 0 */ 194 195 static char driver_name[] = "sio"; 196 197 /* table and macro for fast conversion from a unit number to its com struct */ 198 devclass_t sio_devclass; 199 #define com_addr(unit) ((struct com_s *) \ 200 devclass_get_softc(sio_devclass, unit)) 201 202 static device_method_t sio_isa_methods[] = { 203 /* Device interface */ 204 DEVMETHOD(device_probe, sio_isa_probe), 205 DEVMETHOD(device_attach, sio_isa_attach), 206 207 { 0, 0 } 208 }; 209 210 static driver_t sio_isa_driver = { 211 driver_name, 212 sio_isa_methods, 213 sizeof(struct com_s), 214 }; 215 216 #if NPCI > 0 217 static device_method_t sio_pci_methods[] = { 218 /* Device interface */ 219 DEVMETHOD(device_probe, sio_pci_probe), 220 DEVMETHOD(device_attach, sio_pci_attach), 221 222 { 0, 0 } 223 }; 224 225 static driver_t sio_pci_driver = { 226 driver_name, 227 sio_pci_methods, 228 sizeof(struct com_s), 229 }; 230 #endif /* NPCI > 0 */ 231 232 #if NPUC > 0 233 static device_method_t sio_puc_methods[] = { 234 /* Device interface */ 235 DEVMETHOD(device_probe, sio_puc_probe), 236 DEVMETHOD(device_attach, sio_puc_attach), 237 238 { 0, 0 } 239 }; 240 241 static driver_t sio_puc_driver = { 242 driver_name, 243 sio_puc_methods, 244 sizeof(struct com_s), 245 }; 246 #endif /* NPUC > 0 */ 247 248 static d_open_t sioopen; 249 static d_close_t sioclose; 250 static d_read_t sioread; 251 static d_write_t siowrite; 252 static d_ioctl_t sioioctl; 253 254 #define CDEV_MAJOR 28 255 static struct cdevsw sio_cdevsw = { 256 /* name */ driver_name, 257 /* maj */ CDEV_MAJOR, 258 /* flags */ D_TTY | D_KQFILTER, 259 /* port */ NULL, 260 /* clone */ NULL, 261 262 /* open */ sioopen, 263 /* close */ sioclose, 264 /* read */ sioread, 265 /* write */ siowrite, 266 /* ioctl */ sioioctl, 267 /* poll */ ttypoll, 268 /* mmap */ nommap, 269 /* strategy */ nostrategy, 270 /* dump */ nodump, 271 /* psize */ nopsize, 272 /* kqfilter */ ttykqfilter 273 }; 274 275 int comconsole = -1; 276 static volatile speed_t comdefaultrate = CONSPEED; 277 static u_long comdefaultrclk = DEFAULT_RCLK; 278 SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); 279 static u_int com_events; /* input chars + weighted output completions */ 280 static Port_t siocniobase; 281 static int siocnunit; 282 static Port_t siogdbiobase; 283 static int siogdbunit = -1; 284 static bool_t sio_registered; 285 static int sio_timeout; 286 static int sio_timeouts_until_log; 287 static struct callout sio_timeout_handle; 288 static int sio_numunits; 289 290 #ifdef COM_ESP 291 /* XXX configure this properly. */ 292 static Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 293 static Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 294 #endif 295 296 /* 297 * handle sysctl read/write requests for console speed 298 * 299 * In addition to setting comdefaultrate for I/O through /dev/console, 300 * also set the initial and lock values for the /dev/ttyXX device 301 * if there is one associated with the console. Finally, if the /dev/tty 302 * device has already been open, change the speed on the open running port 303 * itself. 304 */ 305 306 static int 307 sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 308 { 309 int error; 310 speed_t newspeed; 311 struct com_s *com; 312 struct tty *tp; 313 314 newspeed = comdefaultrate; 315 316 error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 317 if (error || !req->newptr) 318 return (error); 319 320 comdefaultrate = newspeed; 321 322 if (comconsole < 0) /* serial console not selected? */ 323 return (0); 324 325 com = com_addr(comconsole); 326 if (com == NULL) 327 return (ENXIO); 328 329 /* 330 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 331 * (note, the lock rates really are boolean -- if non-zero, disallow 332 * speed changes) 333 */ 334 com->it_in.c_ispeed = com->it_in.c_ospeed = 335 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 336 com->it_out.c_ispeed = com->it_out.c_ospeed = 337 com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 338 339 /* 340 * if we're open, change the running rate too 341 */ 342 tp = com->tp; 343 if (tp && (tp->t_state & TS_ISOPEN)) { 344 tp->t_termios.c_ispeed = 345 tp->t_termios.c_ospeed = comdefaultrate; 346 crit_enter(); 347 error = comparam(tp, &tp->t_termios); 348 crit_exit(); 349 } 350 return error; 351 } 352 353 SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 354 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 355 356 #if NPCI > 0 357 struct pci_ids { 358 u_int32_t type; 359 const char *desc; 360 int rid; 361 }; 362 363 static struct pci_ids pci_ids[] = { 364 { 0x100812b9, "3COM PCI FaxModem", 0x10 }, 365 { 0x2000131f, "CyberSerial (1-port) 16550", 0x10 }, 366 { 0x01101407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 }, 367 { 0x01111407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 }, 368 { 0x048011c1, "Lucent kermit based PCI Modem", 0x14 }, 369 { 0x95211415, "Oxford Semiconductor PCI Dual Port Serial", 0x10 }, 370 { 0x7101135e, "SeaLevel Ultra 530.PCI Single Port Serial", 0x18 }, 371 { 0x0000151f, "SmartLink 5634PCV SurfRider", 0x10 }, 372 { 0x98459710, "Netmos Nm9845 PCI Bridge with Dual UART", 0x10 }, 373 { 0x00000000, NULL, 0 } 374 }; 375 376 static int 377 sio_pci_attach(dev) 378 device_t dev; 379 { 380 u_int32_t type; 381 struct pci_ids *id; 382 383 type = pci_get_devid(dev); 384 id = pci_ids; 385 while (id->type && id->type != type) 386 id++; 387 if (id->desc == NULL) 388 return (ENXIO); 389 sio_pci_kludge_unit(dev); 390 return (sioattach(dev, id->rid, 0UL)); 391 } 392 393 /* 394 * Don't cut and paste this to other drivers. It is a horrible kludge 395 * which will fail to work and also be unnecessary in future versions. 396 */ 397 static void 398 sio_pci_kludge_unit(dev) 399 device_t dev; 400 { 401 devclass_t dc; 402 int err; 403 int start; 404 int unit; 405 406 unit = 0; 407 start = 0; 408 while (resource_int_value("sio", unit, "port", &start) == 0 && 409 start > 0) 410 unit++; 411 if (device_get_unit(dev) < unit) { 412 dc = device_get_devclass(dev); 413 while (devclass_get_device(dc, unit)) 414 unit++; 415 device_printf(dev, "moving to sio%d\n", unit); 416 err = device_set_unit(dev, unit); /* EVIL DO NOT COPY */ 417 if (err) 418 device_printf(dev, "error moving device %d\n", err); 419 } 420 } 421 422 static int 423 sio_pci_probe(dev) 424 device_t dev; 425 { 426 u_int32_t type; 427 struct pci_ids *id; 428 429 type = pci_get_devid(dev); 430 id = pci_ids; 431 while (id->type && id->type != type) 432 id++; 433 if (id->desc == NULL) 434 return (ENXIO); 435 device_set_desc(dev, id->desc); 436 return (sioprobe(dev, id->rid, 0UL)); 437 } 438 #endif /* NPCI > 0 */ 439 440 #if NPUC > 0 441 static int 442 sio_puc_attach(dev) 443 device_t dev; 444 { 445 u_int rclk; 446 447 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ, 448 &rclk) != 0) 449 rclk = DEFAULT_RCLK; 450 return (sioattach(dev, 0, rclk)); 451 } 452 453 static int 454 sio_puc_probe(dev) 455 device_t dev; 456 { 457 u_int rclk; 458 459 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ, 460 &rclk) != 0) 461 rclk = DEFAULT_RCLK; 462 return (sioprobe(dev, 0, rclk)); 463 } 464 #endif /* NPUC */ 465 466 static struct isa_pnp_id sio_ids[] = { 467 {0x0005d041, "Standard PC COM port"}, /* PNP0500 */ 468 {0x0105d041, "16550A-compatible COM port"}, /* PNP0501 */ 469 {0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */ 470 {0x1005d041, "Generic IRDA-compatible device"}, /* PNP0510 */ 471 {0x1105d041, "Generic IRDA-compatible device"}, /* PNP0511 */ 472 /* Devices that do not have a compatid */ 473 {0x12206804, NULL}, /* ACH2012 - 5634BTS 56K Video Ready Modem */ 474 {0x7602a904, NULL}, /* AEI0276 - 56K v.90 Fax Modem (LKT) */ 475 {0x00007905, NULL}, /* AKY0000 - 56K Plug&Play Modem */ 476 {0x21107905, NULL}, /* AKY1021 - 56K Plug&Play Modem */ 477 {0x01405407, NULL}, /* AZT4001 - AZT3000 PnP SOUND DEVICE, MODEM */ 478 {0x56039008, NULL}, /* BDP0356 - Best Data 56x2 */ 479 {0x56159008, NULL}, /* BDP1556 - B.D. Smart One 56SPS,Voice Modem*/ 480 {0x36339008, NULL}, /* BDP3336 - Best Data Prods. 336F */ 481 {0x0014490a, NULL}, /* BRI1400 - Boca 33.6 PnP */ 482 {0x0015490a, NULL}, /* BRI1500 - Internal Fax Data */ 483 {0x0034490a, NULL}, /* BRI3400 - Internal ACF Modem */ 484 {0x0094490a, NULL}, /* BRI9400 - Boca K56Flex PnP */ 485 {0x00b4490a, NULL}, /* BRIB400 - Boca 56k PnP */ 486 {0x0030320d, NULL}, /* CIR3000 - Cirrus Logic V43 */ 487 {0x0100440e, NULL}, /* CRD0001 - Cardinal MVP288IV ? */ 488 {0x01308c0e, NULL}, /* CTL3001 - Creative Labs Phoneblaster */ 489 {0x36033610, NULL}, /* DAV0336 - DAVICOM 336PNP MODEM */ 490 {0x01009416, NULL}, /* ETT0001 - E-Tech Bullet 33k6 PnP */ 491 {0x0000aa1a, NULL}, /* FUJ0000 - FUJITSU Modem 33600 PNP/I2 */ 492 {0x1200c31e, NULL}, /* GVC0012 - VF1128HV-R9 (win modem?) */ 493 {0x0303c31e, NULL}, /* GVC0303 - MaxTech 33.6 PnP D/F/V */ 494 {0x0505c31e, NULL}, /* GVC0505 - GVC 56k Faxmodem */ 495 {0x0116c31e, NULL}, /* GVC1601 - Rockwell V.34 Plug & Play Modem */ 496 {0x0050c31e, NULL}, /* GVC5000 - some GVC modem */ 497 {0x3800f91e, NULL}, /* GWY0038 - Telepath with v.90 */ 498 {0x9062f91e, NULL}, /* GWY6290 - Telepath with x2 Technology */ 499 {0x8100e425, NULL}, /* IOD0081 - I-O DATA DEVICE,INC. IFML-560 */ 500 {0x21002534, NULL}, /* MAE0021 - Jetstream Int V.90 56k Voice Series 2*/ 501 {0x0000f435, NULL}, /* MOT0000 - Motorola ModemSURFR 33.6 Intern */ 502 {0x5015f435, NULL}, /* MOT1550 - Motorola ModemSURFR 56K Modem */ 503 {0xf015f435, NULL}, /* MOT15F0 - Motorola VoiceSURFR 56K Modem */ 504 {0x6045f435, NULL}, /* MOT4560 - Motorola ? */ 505 {0x61e7a338, NULL}, /* NECE761 - 33.6Modem */ 506 {0x08804f3f, NULL}, /* OZO8008 - Zoom (33.6k Modem) */ 507 {0x0f804f3f, NULL}, /* OZO800f - Zoom 2812 (56k Modem) */ 508 {0x39804f3f, NULL}, /* OZO8039 - Zoom 56k flex */ 509 {0x00914f3f, NULL}, /* OZO9100 - Zoom 2919 (K56 Faxmodem) */ 510 {0x3024a341, NULL}, /* PMC2430 - Pace 56 Voice Internal Modem */ 511 {0x1000eb49, NULL}, /* ROK0010 - Rockwell ? */ 512 {0x1200b23d, NULL}, /* RSS0012 - OMRON ME5614ISA */ 513 {0x5002734a, NULL}, /* RSS0250 - 5614Jx3(G) Internal Modem */ 514 {0x6202734a, NULL}, /* RSS0262 - 5614Jx3[G] V90+K56Flex Modem */ 515 {0x1010104d, NULL}, /* SHP1010 - Rockwell 33600bps Modem */ 516 {0xc100ad4d, NULL}, /* SMM00C1 - Leopard 56k PnP */ 517 {0x9012b04e, NULL}, /* SUP1290 - Supra ? */ 518 {0x1013b04e, NULL}, /* SUP1310 - SupraExpress 336i PnP */ 519 {0x8013b04e, NULL}, /* SUP1380 - SupraExpress 288i PnP Voice */ 520 {0x8113b04e, NULL}, /* SUP1381 - SupraExpress 336i PnP Voice */ 521 {0x5016b04e, NULL}, /* SUP1650 - Supra 336i Sp Intl */ 522 {0x7016b04e, NULL}, /* SUP1670 - Supra 336i V+ Intl */ 523 {0x7420b04e, NULL}, /* SUP2070 - Supra ? */ 524 {0x8020b04e, NULL}, /* SUP2080 - Supra ? */ 525 {0x8420b04e, NULL}, /* SUP2084 - SupraExpress 56i PnP */ 526 {0x7121b04e, NULL}, /* SUP2171 - SupraExpress 56i Sp? */ 527 {0x8024b04e, NULL}, /* SUP2480 - Supra ? */ 528 {0x01007256, NULL}, /* USR0001 - U.S. Robotics Inc., Sportster W */ 529 {0x02007256, NULL}, /* USR0002 - U.S. Robotics Inc. Sportster 33. */ 530 {0x04007256, NULL}, /* USR0004 - USR Sportster 14.4k */ 531 {0x06007256, NULL}, /* USR0006 - USR Sportster 33.6k */ 532 {0x11007256, NULL}, /* USR0011 - USR ? */ 533 {0x01017256, NULL}, /* USR0101 - USR ? */ 534 {0x30207256, NULL}, /* USR2030 - U.S.Robotics Inc. Sportster 560 */ 535 {0x50207256, NULL}, /* USR2050 - U.S.Robotics Inc. Sportster 33. */ 536 {0x70207256, NULL}, /* USR2070 - U.S.Robotics Inc. Sportster 560 */ 537 {0x30307256, NULL}, /* USR3030 - U.S. Robotics 56K FAX INT */ 538 {0x31307256, NULL}, /* USR3031 - U.S. Robotics 56K FAX INT */ 539 {0x50307256, NULL}, /* USR3050 - U.S. Robotics 56K FAX INT */ 540 {0x70307256, NULL}, /* USR3070 - U.S. Robotics 56K Voice INT */ 541 {0x90307256, NULL}, /* USR3090 - USR ? */ 542 {0x70917256, NULL}, /* USR9170 - U.S. Robotics 56K FAX INT */ 543 {0x90917256, NULL}, /* USR9190 - USR 56k Voice INT */ 544 {0x0300695c, NULL}, /* WCI0003 - Fax/Voice/Modem/Speakphone/Asvd */ 545 {0x01a0896a, NULL}, /* ZTIA001 - Zoom Internal V90 Faxmodem */ 546 {0x61f7896a, NULL}, /* ZTIF761 - Zoom ComStar 33.6 */ 547 {0} 548 }; 549 550 551 552 static int 553 sio_isa_probe(dev) 554 device_t dev; 555 { 556 /* Check isapnp ids */ 557 if (ISA_PNP_PROBE(device_get_parent(dev), dev, sio_ids) == ENXIO) 558 return (ENXIO); 559 return (sioprobe(dev, 0, 0UL)); 560 } 561 562 int 563 sioprobe(dev, xrid, rclk) 564 device_t dev; 565 int xrid; 566 u_long rclk; 567 { 568 #if 0 569 static bool_t already_init; 570 device_t xdev; 571 #endif 572 struct com_s *com; 573 u_int divisor; 574 bool_t failures[10]; 575 int fn; 576 device_t idev; 577 Port_t iobase; 578 intrmask_t irqmap[4]; 579 intrmask_t irqs; 580 u_char mcr_image; 581 int result; 582 u_long xirq; 583 u_int flags = device_get_flags(dev); 584 int rid; 585 struct resource *port; 586 587 rid = xrid; 588 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 589 0, ~0, IO_COMSIZE, RF_ACTIVE); 590 if (!port) 591 return (ENXIO); 592 593 com = device_get_softc(dev); 594 com->bst = rman_get_bustag(port); 595 com->bsh = rman_get_bushandle(port); 596 if (rclk == 0) 597 rclk = DEFAULT_RCLK; 598 com->rclk = rclk; 599 600 #if 0 601 /* 602 * XXX this is broken - when we are first called, there are no 603 * previously configured IO ports. We could hard code 604 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 605 * This code has been doing nothing since the conversion since 606 * "count" is zero the first time around. 607 */ 608 if (!already_init) { 609 /* 610 * Turn off MCR_IENABLE for all likely serial ports. An unused 611 * port with its MCR_IENABLE gate open will inhibit interrupts 612 * from any used port that shares the interrupt vector. 613 * XXX the gate enable is elsewhere for some multiports. 614 */ 615 device_t *devs; 616 int count, i, xioport; 617 618 devclass_get_devices(sio_devclass, &devs, &count); 619 for (i = 0; i < count; i++) { 620 xdev = devs[i]; 621 if (device_is_enabled(xdev) && 622 bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 623 NULL) == 0) 624 outb(xioport + com_mcr, 0); 625 } 626 free(devs, M_TEMP); 627 already_init = TRUE; 628 } 629 #endif 630 631 if (COM_LLCONSOLE(flags)) { 632 printf("sio%d: reserved for low-level i/o\n", 633 device_get_unit(dev)); 634 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 635 return (ENXIO); 636 } 637 638 /* 639 * If the device is on a multiport card and has an AST/4 640 * compatible interrupt control register, initialize this 641 * register and prepare to leave MCR_IENABLE clear in the mcr. 642 * Otherwise, prepare to set MCR_IENABLE in the mcr. 643 * Point idev to the device struct giving the correct id_irq. 644 * This is the struct for the master device if there is one. 645 */ 646 idev = dev; 647 mcr_image = MCR_IENABLE; 648 #ifdef COM_MULTIPORT 649 if (COM_ISMULTIPORT(flags)) { 650 Port_t xiobase; 651 u_long io; 652 653 idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 654 if (idev == NULL) { 655 printf("sio%d: master device %d not configured\n", 656 device_get_unit(dev), COM_MPMASTER(flags)); 657 idev = dev; 658 } 659 if (!COM_NOTAST4(flags)) { 660 if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 661 NULL) == 0) { 662 xiobase = io; 663 if (bus_get_resource(idev, SYS_RES_IRQ, 0, 664 NULL, NULL) == 0) 665 outb(xiobase + com_scr, 0x80); 666 else 667 outb(xiobase + com_scr, 0); 668 } 669 mcr_image = 0; 670 } 671 } 672 #endif /* COM_MULTIPORT */ 673 if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 674 mcr_image = 0; 675 676 bzero(failures, sizeof failures); 677 iobase = rman_get_start(port); 678 679 /* 680 * We don't want to get actual interrupts, just masked ones. 681 * Interrupts from this line should already be masked in the ICU, 682 * but mask them in the processor as well in case there are some 683 * (misconfigured) shared interrupts. 684 */ 685 com_lock(); 686 /* EXTRA DELAY? */ 687 688 /* 689 * For the TI16754 chips, set prescaler to 1 (4 is often the 690 * default after-reset value) as otherwise it's impossible to 691 * get highest baudrates. 692 */ 693 if (COM_TI16754(flags)) { 694 u_char cfcr, efr; 695 696 cfcr = sio_getreg(com, com_cfcr); 697 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 698 efr = sio_getreg(com, com_efr); 699 /* Unlock extended features to turn off prescaler. */ 700 sio_setreg(com, com_efr, efr | EFR_EFE); 701 /* Disable EFR. */ 702 sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0); 703 /* Turn off prescaler. */ 704 sio_setreg(com, com_mcr, 705 sio_getreg(com, com_mcr) & ~MCR_PRESCALE); 706 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 707 sio_setreg(com, com_efr, efr); 708 sio_setreg(com, com_cfcr, cfcr); 709 } 710 711 /* 712 * Initialize the speed and the word size and wait long enough to 713 * drain the maximum of 16 bytes of junk in device output queues. 714 * The speed is undefined after a master reset and must be set 715 * before relying on anything related to output. There may be 716 * junk after a (very fast) soft reboot and (apparently) after 717 * master reset. 718 * XXX what about the UART bug avoided by waiting in comparam()? 719 * We don't want to to wait long enough to drain at 2 bps. 720 */ 721 if (iobase == siocniobase) { 722 DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 723 } else { 724 sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 725 divisor = siodivisor(rclk, SIO_TEST_SPEED); 726 sio_setreg(com, com_dlbl, divisor & 0xff); 727 sio_setreg(com, com_dlbh, divisor >> 8); 728 sio_setreg(com, com_cfcr, CFCR_8BITS); 729 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 730 } 731 732 /* 733 * Make sure we can drain the receiver. If we can't, the serial 734 * port may not exist. 735 */ 736 for (fn = 0; fn < 256; ++fn) { 737 if ((sio_getreg(com, com_lsr) & LSR_RXRDY) == 0) 738 break; 739 (void)sio_getreg(com, com_data); 740 } 741 if (fn == 256) { 742 printf("sio%d: can't drain, serial port might " 743 "not exist, disabling\n", device_get_unit(dev)); 744 com_unlock(); 745 return (ENXIO); 746 } 747 748 /* 749 * Enable the interrupt gate and disable device interupts. This 750 * should leave the device driving the interrupt line low and 751 * guarantee an edge trigger if an interrupt can be generated. 752 */ 753 /* EXTRA DELAY? */ 754 sio_setreg(com, com_mcr, mcr_image); 755 sio_setreg(com, com_ier, 0); 756 DELAY(1000); /* XXX */ 757 irqmap[0] = isa_irq_pending(); 758 759 /* 760 * Attempt to set loopback mode so that we can send a null byte 761 * without annoying any external device. 762 */ 763 /* EXTRA DELAY? */ 764 sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 765 766 /* 767 * Attempt to generate an output interrupt. On 8250's, setting 768 * IER_ETXRDY generates an interrupt independent of the current 769 * setting and independent of whether the THR is empty. On 16450's, 770 * setting IER_ETXRDY generates an interrupt independent of the 771 * current setting. On 16550A's, setting IER_ETXRDY only 772 * generates an interrupt when IER_ETXRDY is not already set. 773 */ 774 sio_setreg(com, com_ier, IER_ETXRDY); 775 776 /* 777 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 778 * an interrupt. They'd better generate one for actually doing 779 * output. Loopback may be broken on the same incompatibles but 780 * it's unlikely to do more than allow the null byte out. 781 */ 782 sio_setreg(com, com_data, 0); 783 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 784 785 /* 786 * Turn off loopback mode so that the interrupt gate works again 787 * (MCR_IENABLE was hidden). This should leave the device driving 788 * an interrupt line high. It doesn't matter if the interrupt 789 * line oscillates while we are not looking at it, since interrupts 790 * are disabled. 791 */ 792 /* EXTRA DELAY? */ 793 sio_setreg(com, com_mcr, mcr_image); 794 795 /* 796 * Some pcmcia cards have the "TXRDY bug", so we check everyone 797 * for IIR_TXRDY implementation ( Palido 321s, DC-1S... ) 798 */ 799 if (COM_NOPROBE(flags)) { 800 /* Reading IIR register twice */ 801 for (fn = 0; fn < 2; fn ++) { 802 DELAY(10000); 803 failures[6] = sio_getreg(com, com_iir); 804 } 805 /* Check IIR_TXRDY clear ? */ 806 result = 0; 807 if (failures[6] & IIR_TXRDY) { 808 /* Nop, Double check with clearing IER */ 809 sio_setreg(com, com_ier, 0); 810 if (sio_getreg(com, com_iir) & IIR_NOPEND) { 811 /* Ok. we're familia this gang */ 812 SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 813 } else { 814 /* Unknown, Just omit this chip.. XXX */ 815 result = ENXIO; 816 sio_setreg(com, com_mcr, 0); 817 } 818 } else { 819 /* OK. this is well-known guys */ 820 CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 821 } 822 sio_setreg(com, com_ier, 0); 823 sio_setreg(com, com_cfcr, CFCR_8BITS); 824 com_unlock(); 825 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 826 return (iobase == siocniobase ? 0 : result); 827 } 828 829 /* 830 * Check that 831 * o the CFCR, IER and MCR in UART hold the values written to them 832 * (the values happen to be all distinct - this is good for 833 * avoiding false positive tests from bus echoes). 834 * o an output interrupt is generated and its vector is correct. 835 * o the interrupt goes away when the IIR in the UART is read. 836 */ 837 /* EXTRA DELAY? */ 838 failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 839 failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 840 failures[2] = sio_getreg(com, com_mcr) - mcr_image; 841 DELAY(10000); /* Some internal modems need this time */ 842 irqmap[1] = isa_irq_pending(); 843 failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 844 DELAY(1000); /* XXX */ 845 irqmap[2] = isa_irq_pending(); 846 failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 847 848 /* 849 * Turn off all device interrupts and check that they go off properly. 850 * Leave MCR_IENABLE alone. For ports without a master port, it gates 851 * the OUT2 output of the UART to 852 * the ICU input. Closing the gate would give a floating ICU input 853 * (unless there is another device driving it) and spurious interrupts. 854 * (On the system that this was first tested on, the input floats high 855 * and gives a (masked) interrupt as soon as the gate is closed.) 856 */ 857 sio_setreg(com, com_ier, 0); 858 sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 859 failures[7] = sio_getreg(com, com_ier); 860 DELAY(1000); /* XXX */ 861 irqmap[3] = isa_irq_pending(); 862 failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 863 864 com_unlock(); 865 866 irqs = irqmap[1] & ~irqmap[0]; 867 if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 868 ((1 << xirq) & irqs) == 0) 869 printf( 870 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 871 device_get_unit(dev), xirq, irqs); 872 if (bootverbose) 873 printf("sio%d: irq maps: %#x %#x %#x %#x\n", 874 device_get_unit(dev), 875 irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 876 877 result = 0; 878 for (fn = 0; fn < sizeof failures; ++fn) 879 if (failures[fn]) { 880 sio_setreg(com, com_mcr, 0); 881 result = ENXIO; 882 if (bootverbose) { 883 printf("sio%d: probe failed test(s):", 884 device_get_unit(dev)); 885 for (fn = 0; fn < sizeof failures; ++fn) 886 if (failures[fn]) 887 printf(" %d", fn); 888 printf("\n"); 889 } 890 break; 891 } 892 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 893 return (iobase == siocniobase ? 0 : result); 894 } 895 896 #ifdef COM_ESP 897 static int 898 espattach(com, esp_port) 899 struct com_s *com; 900 Port_t esp_port; 901 { 902 u_char dips; 903 u_char val; 904 905 /* 906 * Check the ESP-specific I/O port to see if we're an ESP 907 * card. If not, return failure immediately. 908 */ 909 if ((inb(esp_port) & 0xf3) == 0) { 910 printf(" port 0x%x is not an ESP board?\n", esp_port); 911 return (0); 912 } 913 914 /* 915 * We've got something that claims to be a Hayes ESP card. 916 * Let's hope so. 917 */ 918 919 /* Get the dip-switch configuration */ 920 outb(esp_port + ESP_CMD1, ESP_GETDIPS); 921 dips = inb(esp_port + ESP_STATUS1); 922 923 /* 924 * Bits 0,1 of dips say which COM port we are. 925 */ 926 if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 927 printf(" : ESP"); 928 else { 929 printf(" esp_port has com %d\n", dips & 0x03); 930 return (0); 931 } 932 933 /* 934 * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 935 */ 936 outb(esp_port + ESP_CMD1, ESP_GETTEST); 937 val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 938 val = inb(esp_port + ESP_STATUS2); 939 if ((val & 0x70) < 0x20) { 940 printf("-old (%o)", val & 0x70); 941 return (0); 942 } 943 944 /* 945 * Check for ability to emulate 16550: bit 7 == 1 946 */ 947 if ((dips & 0x80) == 0) { 948 printf(" slave"); 949 return (0); 950 } 951 952 /* 953 * Okay, we seem to be a Hayes ESP card. Whee. 954 */ 955 com->esp = TRUE; 956 com->esp_port = esp_port; 957 return (1); 958 } 959 #endif /* COM_ESP */ 960 961 static int 962 sio_isa_attach(dev) 963 device_t dev; 964 { 965 return (sioattach(dev, 0, 0UL)); 966 } 967 968 int 969 sioattach(dev, xrid, rclk) 970 device_t dev; 971 int xrid; 972 u_long rclk; 973 { 974 struct com_s *com; 975 #ifdef COM_ESP 976 Port_t *espp; 977 #endif 978 Port_t iobase; 979 int minorbase; 980 int unit; 981 u_int flags; 982 int rid; 983 struct resource *port; 984 int ret; 985 static int did_init; 986 987 if (did_init == 0) { 988 did_init = 1; 989 callout_init(&sio_timeout_handle); 990 } 991 992 rid = xrid; 993 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 994 0, ~0, IO_COMSIZE, RF_ACTIVE); 995 if (!port) 996 return (ENXIO); 997 998 iobase = rman_get_start(port); 999 unit = device_get_unit(dev); 1000 com = device_get_softc(dev); 1001 flags = device_get_flags(dev); 1002 1003 if (unit >= sio_numunits) 1004 sio_numunits = unit + 1; 1005 /* 1006 * sioprobe() has initialized the device registers as follows: 1007 * o cfcr = CFCR_8BITS. 1008 * It is most important that CFCR_DLAB is off, so that the 1009 * data port is not hidden when we enable interrupts. 1010 * o ier = 0. 1011 * Interrupts are only enabled when the line is open. 1012 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 1013 * interrupt control register or the config specifies no irq. 1014 * Keeping MCR_DTR and MCR_RTS off might stop the external 1015 * device from sending before we are ready. 1016 */ 1017 bzero(com, sizeof *com); 1018 com->unit = unit; 1019 com->ioportres = port; 1020 com->bst = rman_get_bustag(port); 1021 com->bsh = rman_get_bushandle(port); 1022 com->cfcr_image = CFCR_8BITS; 1023 com->dtr_wait = 3 * hz; 1024 callout_init(&com->dtr_ch); 1025 callout_init(&com->busy_ch); 1026 com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 1027 com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 1028 com->tx_fifo_size = 1; 1029 com->obufs[0].l_head = com->obuf1; 1030 com->obufs[1].l_head = com->obuf2; 1031 1032 com->data_port = iobase + com_data; 1033 com->int_id_port = iobase + com_iir; 1034 com->modem_ctl_port = iobase + com_mcr; 1035 com->mcr_image = inb(com->modem_ctl_port); 1036 com->line_status_port = iobase + com_lsr; 1037 com->modem_status_port = iobase + com_msr; 1038 com->intr_ctl_port = iobase + com_ier; 1039 1040 if (rclk == 0) 1041 rclk = DEFAULT_RCLK; 1042 com->rclk = rclk; 1043 1044 /* 1045 * We don't use all the flags from <sys/ttydefaults.h> since they 1046 * are only relevant for logins. It's important to have echo off 1047 * initially so that the line doesn't start blathering before the 1048 * echo flag can be turned off. 1049 */ 1050 com->it_in.c_iflag = 0; 1051 com->it_in.c_oflag = 0; 1052 com->it_in.c_cflag = TTYDEF_CFLAG; 1053 com->it_in.c_lflag = 0; 1054 if (unit == comconsole) { 1055 com->it_in.c_iflag = TTYDEF_IFLAG; 1056 com->it_in.c_oflag = TTYDEF_OFLAG; 1057 com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 1058 com->it_in.c_lflag = TTYDEF_LFLAG; 1059 com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 1060 com->lt_out.c_ispeed = com->lt_out.c_ospeed = 1061 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 1062 com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 1063 } else 1064 com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 1065 if (siosetwater(com, com->it_in.c_ispeed) != 0) { 1066 com_unlock(); 1067 /* 1068 * Leave i/o resources allocated if this is a `cn'-level 1069 * console, so that other devices can't snarf them. 1070 */ 1071 if (iobase != siocniobase) 1072 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 1073 return (ENOMEM); 1074 } 1075 com_unlock(); 1076 termioschars(&com->it_in); 1077 com->it_out = com->it_in; 1078 1079 /* attempt to determine UART type */ 1080 printf("sio%d: type", unit); 1081 1082 1083 #ifdef COM_MULTIPORT 1084 if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags)) 1085 #else 1086 if (!COM_IIR_TXRDYBUG(flags)) 1087 #endif 1088 { 1089 u_char scr; 1090 u_char scr1; 1091 u_char scr2; 1092 1093 scr = sio_getreg(com, com_scr); 1094 sio_setreg(com, com_scr, 0xa5); 1095 scr1 = sio_getreg(com, com_scr); 1096 sio_setreg(com, com_scr, 0x5a); 1097 scr2 = sio_getreg(com, com_scr); 1098 sio_setreg(com, com_scr, scr); 1099 if (scr1 != 0xa5 || scr2 != 0x5a) { 1100 printf(" 8250"); 1101 goto determined_type; 1102 } 1103 } 1104 sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 1105 DELAY(100); 1106 com->st16650a = 0; 1107 switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 1108 case FIFO_RX_LOW: 1109 printf(" 16450"); 1110 break; 1111 case FIFO_RX_MEDL: 1112 printf(" 16450?"); 1113 break; 1114 case FIFO_RX_MEDH: 1115 printf(" 16550?"); 1116 break; 1117 case FIFO_RX_HIGH: 1118 if (COM_NOFIFO(flags)) { 1119 printf(" 16550A fifo disabled"); 1120 } else { 1121 com->hasfifo = TRUE; 1122 if (COM_ST16650A(flags)) { 1123 com->st16650a = 1; 1124 com->tx_fifo_size = 32; 1125 printf(" ST16650A"); 1126 } else if (COM_TI16754(flags)) { 1127 com->tx_fifo_size = 64; 1128 printf(" TI16754"); 1129 } else { 1130 com->tx_fifo_size = COM_FIFOSIZE(flags); 1131 printf(" 16550A"); 1132 } 1133 } 1134 #ifdef COM_ESP 1135 for (espp = likely_esp_ports; *espp != 0; espp++) 1136 if (espattach(com, *espp)) { 1137 com->tx_fifo_size = 1024; 1138 break; 1139 } 1140 #endif 1141 if (!com->st16650a && !COM_TI16754(flags)) { 1142 if (!com->tx_fifo_size) 1143 com->tx_fifo_size = 16; 1144 else 1145 printf(" lookalike with %d bytes FIFO", 1146 com->tx_fifo_size); 1147 } 1148 1149 break; 1150 } 1151 1152 #ifdef COM_ESP 1153 if (com->esp) { 1154 /* 1155 * Set 16550 compatibility mode. 1156 * We don't use the ESP_MODE_SCALE bit to increase the 1157 * fifo trigger levels because we can't handle large 1158 * bursts of input. 1159 * XXX flow control should be set in comparam(), not here. 1160 */ 1161 outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 1162 outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 1163 1164 /* Set RTS/CTS flow control. */ 1165 outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 1166 outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 1167 outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 1168 1169 /* Set flow-control levels. */ 1170 outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 1171 outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 1172 outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 1173 outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 1174 outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 1175 } 1176 #endif /* COM_ESP */ 1177 sio_setreg(com, com_fifo, 0); 1178 determined_type: ; 1179 1180 #ifdef COM_MULTIPORT 1181 if (COM_ISMULTIPORT(flags)) { 1182 device_t masterdev; 1183 1184 com->multiport = TRUE; 1185 printf(" (multiport"); 1186 if (unit == COM_MPMASTER(flags)) 1187 printf(" master"); 1188 printf(")"); 1189 masterdev = devclass_get_device(sio_devclass, 1190 COM_MPMASTER(flags)); 1191 com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 1192 SYS_RES_IRQ, 0, NULL, NULL) != 0); 1193 } 1194 #endif /* COM_MULTIPORT */ 1195 if (unit == comconsole) 1196 printf(", console"); 1197 if (COM_IIR_TXRDYBUG(flags)) 1198 printf(" with a bogus IIR_TXRDY register"); 1199 printf("\n"); 1200 1201 if (!sio_registered) { 1202 register_swi(SWI_TTY, siopoll, NULL ,"swi_siopoll"); 1203 sio_registered = TRUE; 1204 } 1205 minorbase = UNIT_TO_MINOR(unit); 1206 cdevsw_add(&sio_cdevsw, UNIT_TO_MINOR(-1), minorbase); 1207 make_dev(&sio_cdevsw, minorbase, 1208 UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 1209 make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE, 1210 UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 1211 make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE, 1212 UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 1213 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK, 1214 UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 1215 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_INIT_STATE, 1216 UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 1217 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE, 1218 UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 1219 com->flags = flags; 1220 com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 1221 pps_init(&com->pps); 1222 1223 rid = 0; 1224 com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 1225 RF_ACTIVE); 1226 if (com->irqres) { 1227 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 1228 INTR_TYPE_TTY | INTR_FAST, 1229 siointr, com, &com->cookie, NULL); 1230 if (ret) { 1231 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 1232 com->irqres, INTR_TYPE_TTY, 1233 siointr, com, &com->cookie, NULL); 1234 if (ret == 0) 1235 device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 1236 } 1237 if (ret) 1238 device_printf(dev, "could not activate interrupt\n"); 1239 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1240 defined(ALT_BREAK_TO_DEBUGGER)) 1241 /* 1242 * Enable interrupts for early break-to-debugger support 1243 * on the console. 1244 */ 1245 if (ret == 0 && unit == comconsole) 1246 outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 1247 IER_EMSC); 1248 #endif 1249 } 1250 1251 return (0); 1252 } 1253 1254 static int 1255 sioopen(dev_t dev, int flag, int mode, struct thread *td) 1256 { 1257 struct com_s *com; 1258 int error; 1259 int mynor; 1260 struct tty *tp; 1261 int unit; 1262 1263 mynor = minor(dev); 1264 unit = MINOR_TO_UNIT(mynor); 1265 com = com_addr(unit); 1266 if (com == NULL) 1267 return (ENXIO); 1268 if (com->gone) 1269 return (ENXIO); 1270 if (mynor & CONTROL_MASK) 1271 return (0); 1272 tp = dev->si_tty = com->tp = ttymalloc(com->tp); 1273 crit_enter(); 1274 /* 1275 * We jump to this label after all non-interrupted sleeps to pick 1276 * up any changes of the device state. 1277 */ 1278 open_top: 1279 while (com->state & CS_DTR_OFF) { 1280 error = tsleep(&com->dtr_wait, PCATCH, "siodtr", 0); 1281 if (com_addr(unit) == NULL) 1282 return (ENXIO); 1283 if (error != 0 || com->gone) 1284 goto out; 1285 } 1286 if (tp->t_state & TS_ISOPEN) { 1287 /* 1288 * The device is open, so everything has been initialized. 1289 * Handle conflicts. 1290 */ 1291 if (mynor & CALLOUT_MASK) { 1292 if (!com->active_out) { 1293 error = EBUSY; 1294 goto out; 1295 } 1296 } else { 1297 if (com->active_out) { 1298 if (flag & O_NONBLOCK) { 1299 error = EBUSY; 1300 goto out; 1301 } 1302 error = tsleep(&com->active_out, 1303 PCATCH, "siobi", 0); 1304 if (com_addr(unit) == NULL) 1305 return (ENXIO); 1306 if (error != 0 || com->gone) 1307 goto out; 1308 goto open_top; 1309 } 1310 } 1311 if (tp->t_state & TS_XCLUDE && suser(td)) { 1312 error = EBUSY; 1313 goto out; 1314 } 1315 } else { 1316 /* 1317 * The device isn't open, so there are no conflicts. 1318 * Initialize it. Initialization is done twice in many 1319 * cases: to preempt sleeping callin opens if we are 1320 * callout, and to complete a callin open after DCD rises. 1321 */ 1322 tp->t_oproc = comstart; 1323 tp->t_param = comparam; 1324 tp->t_stop = comstop; 1325 tp->t_dev = dev; 1326 tp->t_termios = mynor & CALLOUT_MASK 1327 ? com->it_out : com->it_in; 1328 (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 1329 com->poll = com->no_irq; 1330 com->poll_output = com->loses_outints; 1331 ++com->wopeners; 1332 error = comparam(tp, &tp->t_termios); 1333 --com->wopeners; 1334 if (error != 0) 1335 goto out; 1336 /* 1337 * XXX we should goto open_top if comparam() slept. 1338 */ 1339 if (com->hasfifo) { 1340 /* 1341 * (Re)enable and drain fifos. 1342 * 1343 * Certain SMC chips cause problems if the fifos 1344 * are enabled while input is ready. Turn off the 1345 * fifo if necessary to clear the input. We test 1346 * the input ready bit after enabling the fifos 1347 * since we've already enabled them in comparam() 1348 * and to handle races between enabling and fresh 1349 * input. 1350 */ 1351 while (TRUE) { 1352 sio_setreg(com, com_fifo, 1353 FIFO_RCV_RST | FIFO_XMT_RST 1354 | com->fifo_image); 1355 /* 1356 * XXX the delays are for superstitious 1357 * historical reasons. It must be less than 1358 * the character time at the maximum 1359 * supported speed (87 usec at 115200 bps 1360 * 8N1). Otherwise we might loop endlessly 1361 * if data is streaming in. We used to use 1362 * delays of 100. That usually worked 1363 * because DELAY(100) used to usually delay 1364 * for about 85 usec instead of 100. 1365 */ 1366 DELAY(50); 1367 if (!(inb(com->line_status_port) & LSR_RXRDY)) 1368 break; 1369 sio_setreg(com, com_fifo, 0); 1370 DELAY(50); 1371 (void) inb(com->data_port); 1372 } 1373 } 1374 1375 com_lock(); 1376 (void) inb(com->line_status_port); 1377 (void) inb(com->data_port); 1378 com->prev_modem_status = com->last_modem_status 1379 = inb(com->modem_status_port); 1380 if (COM_IIR_TXRDYBUG(com->flags)) { 1381 outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS 1382 | IER_EMSC); 1383 } else { 1384 outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY 1385 | IER_ERLS | IER_EMSC); 1386 } 1387 com_unlock(); 1388 /* 1389 * Handle initial DCD. Callout devices get a fake initial 1390 * DCD (trapdoor DCD). If we are callout, then any sleeping 1391 * callin opens get woken up and resume sleeping on "siobi" 1392 * instead of "siodcd". 1393 */ 1394 /* 1395 * XXX `mynor & CALLOUT_MASK' should be 1396 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 1397 * TRAPDOOR_CARRIER is the default initial state for callout 1398 * devices and SOFT_CARRIER is like CLOCAL except it hides 1399 * the true carrier. 1400 */ 1401 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 1402 (*linesw[tp->t_line].l_modem)(tp, 1); 1403 } 1404 /* 1405 * Wait for DCD if necessary. 1406 */ 1407 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 1408 && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 1409 ++com->wopeners; 1410 error = tsleep(TSA_CARR_ON(tp), PCATCH, "siodcd", 0); 1411 if (com_addr(unit) == NULL) 1412 return (ENXIO); 1413 --com->wopeners; 1414 if (error != 0 || com->gone) 1415 goto out; 1416 goto open_top; 1417 } 1418 error = (*linesw[tp->t_line].l_open)(dev, tp); 1419 disc_optim(tp, &tp->t_termios, com); 1420 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 1421 com->active_out = TRUE; 1422 siosettimeout(); 1423 out: 1424 crit_exit(); 1425 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 1426 comhardclose(com); 1427 return (error); 1428 } 1429 1430 static int 1431 sioclose(dev_t dev, int flag, int mode, struct thread *td) 1432 { 1433 struct com_s *com; 1434 int mynor; 1435 struct tty *tp; 1436 1437 mynor = minor(dev); 1438 if (mynor & CONTROL_MASK) 1439 return (0); 1440 com = com_addr(MINOR_TO_UNIT(mynor)); 1441 if (com == NULL) 1442 return (ENODEV); 1443 tp = com->tp; 1444 crit_enter(); 1445 (*linesw[tp->t_line].l_close)(tp, flag); 1446 disc_optim(tp, &tp->t_termios, com); 1447 comstop(tp, FREAD | FWRITE); 1448 comhardclose(com); 1449 ttyclose(tp); 1450 siosettimeout(); 1451 crit_exit(); 1452 if (com->gone) { 1453 printf("sio%d: gone\n", com->unit); 1454 crit_enter(); 1455 if (com->ibuf != NULL) 1456 free(com->ibuf, M_DEVBUF); 1457 bzero(tp, sizeof *tp); 1458 crit_exit(); 1459 } 1460 return (0); 1461 } 1462 1463 static void 1464 comhardclose(com) 1465 struct com_s *com; 1466 { 1467 struct tty *tp; 1468 int unit; 1469 1470 unit = com->unit; 1471 crit_enter(); 1472 com->poll = FALSE; 1473 com->poll_output = FALSE; 1474 com->do_timestamp = FALSE; 1475 com->do_dcd_timestamp = FALSE; 1476 com->pps.ppsparam.mode = 0; 1477 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 1478 tp = com->tp; 1479 1480 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1481 defined(ALT_BREAK_TO_DEBUGGER)) 1482 /* 1483 * Leave interrupts enabled and don't clear DTR if this is the 1484 * console. This allows us to detect break-to-debugger events 1485 * while the console device is closed. 1486 */ 1487 if (com->unit != comconsole) 1488 #endif 1489 { 1490 sio_setreg(com, com_ier, 0); 1491 if (tp->t_cflag & HUPCL 1492 /* 1493 * XXX we will miss any carrier drop between here and the 1494 * next open. Perhaps we should watch DCD even when the 1495 * port is closed; it is not sufficient to check it at 1496 * the next open because it might go up and down while 1497 * we're not watching. 1498 */ 1499 || (!com->active_out 1500 && !(com->prev_modem_status & MSR_DCD) 1501 && !(com->it_in.c_cflag & CLOCAL)) 1502 || !(tp->t_state & TS_ISOPEN)) { 1503 (void)commctl(com, TIOCM_DTR, DMBIC); 1504 if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 1505 callout_reset(&com->dtr_ch, com->dtr_wait, 1506 siodtrwakeup, com); 1507 com->state |= CS_DTR_OFF; 1508 } 1509 } 1510 } 1511 if (com->hasfifo) { 1512 /* 1513 * Disable fifos so that they are off after controlled 1514 * reboots. Some BIOSes fail to detect 16550s when the 1515 * fifos are enabled. 1516 */ 1517 sio_setreg(com, com_fifo, 0); 1518 } 1519 com->active_out = FALSE; 1520 wakeup(&com->active_out); 1521 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 1522 crit_exit(); 1523 } 1524 1525 static int 1526 sioread(dev, uio, flag) 1527 dev_t dev; 1528 struct uio *uio; 1529 int flag; 1530 { 1531 int mynor; 1532 struct com_s *com; 1533 1534 mynor = minor(dev); 1535 if (mynor & CONTROL_MASK) 1536 return (ENODEV); 1537 com = com_addr(MINOR_TO_UNIT(mynor)); 1538 if (com == NULL || com->gone) 1539 return (ENODEV); 1540 return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); 1541 } 1542 1543 static int 1544 siowrite(dev, uio, flag) 1545 dev_t dev; 1546 struct uio *uio; 1547 int flag; 1548 { 1549 int mynor; 1550 struct com_s *com; 1551 int unit; 1552 1553 mynor = minor(dev); 1554 if (mynor & CONTROL_MASK) 1555 return (ENODEV); 1556 1557 unit = MINOR_TO_UNIT(mynor); 1558 com = com_addr(unit); 1559 if (com == NULL || com->gone) 1560 return (ENODEV); 1561 /* 1562 * (XXX) We disallow virtual consoles if the physical console is 1563 * a serial port. This is in case there is a display attached that 1564 * is not the console. In that situation we don't need/want the X 1565 * server taking over the console. 1566 */ 1567 if (constty != NULL && unit == comconsole) 1568 constty = NULL; 1569 return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); 1570 } 1571 1572 static void 1573 siobusycheck(chan) 1574 void *chan; 1575 { 1576 struct com_s *com; 1577 1578 com = (struct com_s *)chan; 1579 1580 /* 1581 * Clear TS_BUSY if low-level output is complete. 1582 * spl locking is sufficient because siointr1() does not set CS_BUSY. 1583 * If siointr1() clears CS_BUSY after we look at it, then we'll get 1584 * called again. Reading the line status port outside of siointr1() 1585 * is safe because CS_BUSY is clear so there are no output interrupts 1586 * to lose. 1587 */ 1588 crit_enter(); 1589 if (com->state & CS_BUSY) 1590 com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 1591 else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 1592 == (LSR_TSRE | LSR_TXRDY)) { 1593 com->tp->t_state &= ~TS_BUSY; 1594 ttwwakeup(com->tp); 1595 com->extra_state &= ~CSE_BUSYCHECK; 1596 } else { 1597 callout_reset(&com->busy_ch, hz / 100, siobusycheck, com); 1598 } 1599 crit_exit(); 1600 } 1601 1602 static u_int 1603 siodivisor(rclk, speed) 1604 u_long rclk; 1605 speed_t speed; 1606 { 1607 long actual_speed; 1608 u_int divisor; 1609 int error; 1610 1611 if (speed == 0 || speed > (ULONG_MAX - 1) / 8) 1612 return (0); 1613 divisor = (rclk / (8UL * speed) + 1) / 2; 1614 if (divisor == 0 || divisor >= 65536) 1615 return (0); 1616 actual_speed = rclk / (16UL * divisor); 1617 1618 /* 10 times error in percent: */ 1619 error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2; 1620 1621 /* 3.0% maximum error tolerance: */ 1622 if (error < -30 || error > 30) 1623 return (0); 1624 1625 return (divisor); 1626 } 1627 1628 static void 1629 siodtrwakeup(chan) 1630 void *chan; 1631 { 1632 struct com_s *com; 1633 1634 com = (struct com_s *)chan; 1635 com->state &= ~CS_DTR_OFF; 1636 wakeup(&com->dtr_wait); 1637 } 1638 1639 static void 1640 sioinput(com) 1641 struct com_s *com; 1642 { 1643 u_char *buf; 1644 int incc; 1645 u_char line_status; 1646 int recv_data; 1647 struct tty *tp; 1648 1649 buf = com->ibuf; 1650 tp = com->tp; 1651 if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 1652 com_events -= (com->iptr - com->ibuf); 1653 com->iptr = com->ibuf; 1654 return; 1655 } 1656 if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 1657 /* 1658 * Avoid the grotesquely inefficient lineswitch routine 1659 * (ttyinput) in "raw" mode. It usually takes about 450 1660 * instructions (that's without canonical processing or echo!). 1661 * slinput is reasonably fast (usually 40 instructions plus 1662 * call overhead). 1663 */ 1664 do { 1665 com_unlock(); 1666 incc = com->iptr - buf; 1667 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 1668 && (com->state & CS_RTS_IFLOW 1669 || tp->t_iflag & IXOFF) 1670 && !(tp->t_state & TS_TBLOCK)) 1671 ttyblock(tp); 1672 com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 1673 += b_to_q((char *)buf, incc, &tp->t_rawq); 1674 buf += incc; 1675 tk_nin += incc; 1676 tk_rawcc += incc; 1677 tp->t_rawcc += incc; 1678 ttwakeup(tp); 1679 if (tp->t_state & TS_TTSTOP 1680 && (tp->t_iflag & IXANY 1681 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 1682 tp->t_state &= ~TS_TTSTOP; 1683 tp->t_lflag &= ~FLUSHO; 1684 comstart(tp); 1685 } 1686 com_lock(); 1687 } while (buf < com->iptr); 1688 } else { 1689 do { 1690 com_unlock(); 1691 line_status = buf[com->ierroff]; 1692 recv_data = *buf++; 1693 if (line_status 1694 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 1695 if (line_status & LSR_BI) 1696 recv_data |= TTY_BI; 1697 if (line_status & LSR_FE) 1698 recv_data |= TTY_FE; 1699 if (line_status & LSR_OE) 1700 recv_data |= TTY_OE; 1701 if (line_status & LSR_PE) 1702 recv_data |= TTY_PE; 1703 } 1704 (*linesw[tp->t_line].l_rint)(recv_data, tp); 1705 com_lock(); 1706 } while (buf < com->iptr); 1707 } 1708 com_events -= (com->iptr - com->ibuf); 1709 com->iptr = com->ibuf; 1710 1711 /* 1712 * There is now room for another low-level buffer full of input, 1713 * so enable RTS if it is now disabled and there is room in the 1714 * high-level buffer. 1715 */ 1716 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 1717 !(tp->t_state & TS_TBLOCK)) 1718 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 1719 } 1720 1721 void 1722 siointr(arg) 1723 void *arg; 1724 { 1725 #ifndef COM_MULTIPORT 1726 com_lock(); 1727 siointr1((struct com_s *) arg); 1728 com_unlock(); 1729 #else /* COM_MULTIPORT */ 1730 bool_t possibly_more_intrs; 1731 int unit; 1732 struct com_s *com; 1733 1734 /* 1735 * Loop until there is no activity on any port. This is necessary 1736 * to get an interrupt edge more than to avoid another interrupt. 1737 * If the IRQ signal is just an OR of the IRQ signals from several 1738 * devices, then the edge from one may be lost because another is 1739 * on. 1740 */ 1741 com_lock(); 1742 do { 1743 possibly_more_intrs = FALSE; 1744 for (unit = 0; unit < sio_numunits; ++unit) { 1745 com = com_addr(unit); 1746 /* 1747 * XXX com_lock(); 1748 * would it work here, or be counter-productive? 1749 */ 1750 if (com != NULL 1751 && !com->gone 1752 && (inb(com->int_id_port) & IIR_IMASK) 1753 != IIR_NOPEND) { 1754 siointr1(com); 1755 possibly_more_intrs = TRUE; 1756 } 1757 /* XXX com_unlock(); */ 1758 } 1759 } while (possibly_more_intrs); 1760 com_unlock(); 1761 #endif /* COM_MULTIPORT */ 1762 } 1763 1764 static void 1765 siointr1(com) 1766 struct com_s *com; 1767 { 1768 u_char line_status; 1769 u_char modem_status; 1770 u_char *ioptr; 1771 u_char recv_data; 1772 u_char int_ctl; 1773 u_char int_ctl_new; 1774 u_int count; 1775 1776 int_ctl = inb(com->intr_ctl_port); 1777 int_ctl_new = int_ctl; 1778 1779 while (!com->gone) { 1780 if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 1781 modem_status = inb(com->modem_status_port); 1782 if ((modem_status ^ com->last_modem_status) & MSR_DCD) { 1783 count = sys_cputimer->count(); 1784 pps_event(&com->pps, count, 1785 (modem_status & MSR_DCD) ? 1786 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 1787 } 1788 } 1789 line_status = inb(com->line_status_port); 1790 1791 /* input event? (check first to help avoid overruns) */ 1792 while (line_status & LSR_RCV_MASK) { 1793 /* break/unnattached error bits or real input? */ 1794 if (!(line_status & LSR_RXRDY)) 1795 recv_data = 0; 1796 else 1797 recv_data = inb(com->data_port); 1798 #if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER) 1799 /* 1800 * Solaris implements a new BREAK which is initiated 1801 * by a character sequence CR ~ ^b which is similar 1802 * to a familiar pattern used on Sun servers by the 1803 * Remote Console. 1804 */ 1805 #define KEY_CRTLB 2 /* ^B */ 1806 #define KEY_CR 13 /* CR '\r' */ 1807 #define KEY_TILDE 126 /* ~ */ 1808 1809 if (com->unit == comconsole) { 1810 static int brk_state1 = 0, brk_state2 = 0; 1811 if (recv_data == KEY_CR) { 1812 brk_state1 = recv_data; 1813 brk_state2 = 0; 1814 } else if (brk_state1 == KEY_CR && (recv_data == KEY_TILDE || recv_data == KEY_CRTLB)) { 1815 if (recv_data == KEY_TILDE) 1816 brk_state2 = recv_data; 1817 else if (brk_state2 == KEY_TILDE && recv_data == KEY_CRTLB) { 1818 breakpoint(); 1819 brk_state1 = brk_state2 = 0; 1820 goto cont; 1821 } else 1822 brk_state2 = 0; 1823 } else 1824 brk_state1 = 0; 1825 } 1826 #endif 1827 if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 1828 /* 1829 * Don't store BI if IGNBRK or FE/PE if IGNPAR. 1830 * Otherwise, push the work to a higher level 1831 * (to handle PARMRK) if we're bypassing. 1832 * Otherwise, convert BI/FE and PE+INPCK to 0. 1833 * 1834 * This makes bypassing work right in the 1835 * usual "raw" case (IGNBRK set, and IGNPAR 1836 * and INPCK clear). 1837 * 1838 * Note: BI together with FE/PE means just BI. 1839 */ 1840 if (line_status & LSR_BI) { 1841 #if defined(DDB) && defined(BREAK_TO_DEBUGGER) 1842 if (com->unit == comconsole) { 1843 breakpoint(); 1844 goto cont; 1845 } 1846 #endif 1847 if (com->tp == NULL 1848 || com->tp->t_iflag & IGNBRK) 1849 goto cont; 1850 } else { 1851 if (com->tp == NULL 1852 || com->tp->t_iflag & IGNPAR) 1853 goto cont; 1854 } 1855 if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 1856 && (line_status & (LSR_BI | LSR_FE) 1857 || com->tp->t_iflag & INPCK)) 1858 recv_data = 0; 1859 } 1860 ++com->bytes_in; 1861 if (com->hotchar != 0 && recv_data == com->hotchar) 1862 setsofttty(); 1863 ioptr = com->iptr; 1864 if (ioptr >= com->ibufend) 1865 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 1866 else { 1867 if (com->do_timestamp) 1868 microtime(&com->timestamp); 1869 ++com_events; 1870 schedsofttty(); 1871 #if 0 /* for testing input latency vs efficiency */ 1872 if (com->iptr - com->ibuf == 8) 1873 setsofttty(); 1874 #endif 1875 ioptr[0] = recv_data; 1876 ioptr[com->ierroff] = line_status; 1877 com->iptr = ++ioptr; 1878 if (ioptr == com->ihighwater 1879 && com->state & CS_RTS_IFLOW) 1880 outb(com->modem_ctl_port, 1881 com->mcr_image &= ~MCR_RTS); 1882 if (line_status & LSR_OE) 1883 CE_RECORD(com, CE_OVERRUN); 1884 } 1885 cont: 1886 /* 1887 * "& 0x7F" is to avoid the gcc-1.40 generating a slow 1888 * jump from the top of the loop to here 1889 */ 1890 line_status = inb(com->line_status_port) & 0x7F; 1891 } 1892 1893 /* modem status change? (always check before doing output) */ 1894 modem_status = inb(com->modem_status_port); 1895 if (modem_status != com->last_modem_status) { 1896 if (com->do_dcd_timestamp 1897 && !(com->last_modem_status & MSR_DCD) 1898 && modem_status & MSR_DCD) 1899 microtime(&com->dcd_timestamp); 1900 1901 /* 1902 * Schedule high level to handle DCD changes. Note 1903 * that we don't use the delta bits anywhere. Some 1904 * UARTs mess them up, and it's easy to remember the 1905 * previous bits and calculate the delta. 1906 */ 1907 com->last_modem_status = modem_status; 1908 if (!(com->state & CS_CHECKMSR)) { 1909 com_events += LOTS_OF_EVENTS; 1910 com->state |= CS_CHECKMSR; 1911 setsofttty(); 1912 } 1913 1914 /* handle CTS change immediately for crisp flow ctl */ 1915 if (com->state & CS_CTS_OFLOW) { 1916 if (modem_status & MSR_CTS) 1917 com->state |= CS_ODEVREADY; 1918 else 1919 com->state &= ~CS_ODEVREADY; 1920 } 1921 } 1922 1923 /* output queued and everything ready? */ 1924 if (line_status & LSR_TXRDY 1925 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 1926 ioptr = com->obufq.l_head; 1927 if (com->tx_fifo_size > 1) { 1928 u_int ocount; 1929 1930 ocount = com->obufq.l_tail - ioptr; 1931 if (ocount > com->tx_fifo_size) 1932 ocount = com->tx_fifo_size; 1933 com->bytes_out += ocount; 1934 do 1935 outb(com->data_port, *ioptr++); 1936 while (--ocount != 0); 1937 } else { 1938 outb(com->data_port, *ioptr++); 1939 ++com->bytes_out; 1940 } 1941 com->obufq.l_head = ioptr; 1942 if (COM_IIR_TXRDYBUG(com->flags)) { 1943 int_ctl_new = int_ctl | IER_ETXRDY; 1944 } 1945 if (ioptr >= com->obufq.l_tail) { 1946 struct lbq *qp; 1947 1948 qp = com->obufq.l_next; 1949 qp->l_queued = FALSE; 1950 qp = qp->l_next; 1951 if (qp != NULL) { 1952 com->obufq.l_head = qp->l_head; 1953 com->obufq.l_tail = qp->l_tail; 1954 com->obufq.l_next = qp; 1955 } else { 1956 /* output just completed */ 1957 if (COM_IIR_TXRDYBUG(com->flags)) { 1958 int_ctl_new = int_ctl & ~IER_ETXRDY; 1959 } 1960 com->state &= ~CS_BUSY; 1961 } 1962 if (!(com->state & CS_ODONE)) { 1963 com_events += LOTS_OF_EVENTS; 1964 com->state |= CS_ODONE; 1965 setsofttty(); /* handle at high level ASAP */ 1966 } 1967 } 1968 if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) { 1969 outb(com->intr_ctl_port, int_ctl_new); 1970 } 1971 } 1972 1973 /* finished? */ 1974 #ifndef COM_MULTIPORT 1975 if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 1976 #endif /* COM_MULTIPORT */ 1977 return; 1978 } 1979 } 1980 1981 static int 1982 sioioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct thread *td) 1983 { 1984 struct com_s *com; 1985 int error; 1986 int mynor; 1987 struct tty *tp; 1988 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 1989 u_long oldcmd; 1990 struct termios term; 1991 #endif 1992 1993 mynor = minor(dev); 1994 com = com_addr(MINOR_TO_UNIT(mynor)); 1995 if (com == NULL || com->gone) 1996 return (ENODEV); 1997 if (mynor & CONTROL_MASK) { 1998 struct termios *ct; 1999 2000 switch (mynor & CONTROL_MASK) { 2001 case CONTROL_INIT_STATE: 2002 ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 2003 break; 2004 case CONTROL_LOCK_STATE: 2005 ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 2006 break; 2007 default: 2008 return (ENODEV); /* /dev/nodev */ 2009 } 2010 switch (cmd) { 2011 case TIOCSETA: 2012 error = suser(td); 2013 if (error != 0) 2014 return (error); 2015 *ct = *(struct termios *)data; 2016 return (0); 2017 case TIOCGETA: 2018 *(struct termios *)data = *ct; 2019 return (0); 2020 case TIOCGETD: 2021 *(int *)data = TTYDISC; 2022 return (0); 2023 case TIOCGWINSZ: 2024 bzero(data, sizeof(struct winsize)); 2025 return (0); 2026 default: 2027 return (ENOTTY); 2028 } 2029 } 2030 tp = com->tp; 2031 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 2032 term = tp->t_termios; 2033 oldcmd = cmd; 2034 error = ttsetcompat(tp, &cmd, data, &term); 2035 if (error != 0) 2036 return (error); 2037 if (cmd != oldcmd) 2038 data = (caddr_t)&term; 2039 #endif 2040 if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 2041 int cc; 2042 struct termios *dt = (struct termios *)data; 2043 struct termios *lt = mynor & CALLOUT_MASK 2044 ? &com->lt_out : &com->lt_in; 2045 2046 dt->c_iflag = (tp->t_iflag & lt->c_iflag) 2047 | (dt->c_iflag & ~lt->c_iflag); 2048 dt->c_oflag = (tp->t_oflag & lt->c_oflag) 2049 | (dt->c_oflag & ~lt->c_oflag); 2050 dt->c_cflag = (tp->t_cflag & lt->c_cflag) 2051 | (dt->c_cflag & ~lt->c_cflag); 2052 dt->c_lflag = (tp->t_lflag & lt->c_lflag) 2053 | (dt->c_lflag & ~lt->c_lflag); 2054 for (cc = 0; cc < NCCS; ++cc) 2055 if (lt->c_cc[cc] != 0) 2056 dt->c_cc[cc] = tp->t_cc[cc]; 2057 if (lt->c_ispeed != 0) 2058 dt->c_ispeed = tp->t_ispeed; 2059 if (lt->c_ospeed != 0) 2060 dt->c_ospeed = tp->t_ospeed; 2061 } 2062 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td); 2063 if (error != ENOIOCTL) 2064 return (error); 2065 crit_enter(); 2066 error = ttioctl(tp, cmd, data, flag); 2067 disc_optim(tp, &tp->t_termios, com); 2068 if (error != ENOIOCTL) { 2069 crit_exit(); 2070 return (error); 2071 } 2072 switch (cmd) { 2073 case TIOCSBRK: 2074 sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 2075 break; 2076 case TIOCCBRK: 2077 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 2078 break; 2079 case TIOCSDTR: 2080 (void)commctl(com, TIOCM_DTR, DMBIS); 2081 break; 2082 case TIOCCDTR: 2083 (void)commctl(com, TIOCM_DTR, DMBIC); 2084 break; 2085 /* 2086 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 2087 * changes get undone on the next call to comparam(). 2088 */ 2089 case TIOCMSET: 2090 (void)commctl(com, *(int *)data, DMSET); 2091 break; 2092 case TIOCMBIS: 2093 (void)commctl(com, *(int *)data, DMBIS); 2094 break; 2095 case TIOCMBIC: 2096 (void)commctl(com, *(int *)data, DMBIC); 2097 break; 2098 case TIOCMGET: 2099 *(int *)data = commctl(com, 0, DMGET); 2100 break; 2101 case TIOCMSDTRWAIT: 2102 /* must be root since the wait applies to following logins */ 2103 error = suser(td); 2104 if (error != 0) { 2105 crit_exit(); 2106 return (error); 2107 } 2108 com->dtr_wait = *(int *)data * hz / 100; 2109 break; 2110 case TIOCMGDTRWAIT: 2111 *(int *)data = com->dtr_wait * 100 / hz; 2112 break; 2113 case TIOCTIMESTAMP: 2114 com->do_timestamp = TRUE; 2115 *(struct timeval *)data = com->timestamp; 2116 break; 2117 case TIOCDCDTIMESTAMP: 2118 com->do_dcd_timestamp = TRUE; 2119 *(struct timeval *)data = com->dcd_timestamp; 2120 break; 2121 default: 2122 crit_exit(); 2123 error = pps_ioctl(cmd, data, &com->pps); 2124 if (error == ENODEV) 2125 error = ENOTTY; 2126 return (error); 2127 } 2128 crit_exit(); 2129 return (0); 2130 } 2131 2132 static void 2133 siopoll(void *dummy) 2134 { 2135 int unit; 2136 2137 if (com_events == 0) 2138 return; 2139 repeat: 2140 for (unit = 0; unit < sio_numunits; ++unit) { 2141 struct com_s *com; 2142 int incc; 2143 struct tty *tp; 2144 2145 com = com_addr(unit); 2146 if (com == NULL) 2147 continue; 2148 tp = com->tp; 2149 if (tp == NULL || com->gone) { 2150 /* 2151 * Discard any events related to never-opened or 2152 * going-away devices. 2153 */ 2154 com_lock(); 2155 incc = com->iptr - com->ibuf; 2156 com->iptr = com->ibuf; 2157 if (com->state & CS_CHECKMSR) { 2158 incc += LOTS_OF_EVENTS; 2159 com->state &= ~CS_CHECKMSR; 2160 } 2161 com_events -= incc; 2162 com_unlock(); 2163 continue; 2164 } 2165 if (com->iptr != com->ibuf) { 2166 com_lock(); 2167 sioinput(com); 2168 com_unlock(); 2169 } 2170 if (com->state & CS_CHECKMSR) { 2171 u_char delta_modem_status; 2172 2173 com_lock(); 2174 delta_modem_status = com->last_modem_status 2175 ^ com->prev_modem_status; 2176 com->prev_modem_status = com->last_modem_status; 2177 com_events -= LOTS_OF_EVENTS; 2178 com->state &= ~CS_CHECKMSR; 2179 com_unlock(); 2180 if (delta_modem_status & MSR_DCD) 2181 (*linesw[tp->t_line].l_modem) 2182 (tp, com->prev_modem_status & MSR_DCD); 2183 } 2184 if (com->state & CS_ODONE) { 2185 com_lock(); 2186 com_events -= LOTS_OF_EVENTS; 2187 com->state &= ~CS_ODONE; 2188 com_unlock(); 2189 if (!(com->state & CS_BUSY) 2190 && !(com->extra_state & CSE_BUSYCHECK)) { 2191 callout_reset(&com->busy_ch, hz / 100, 2192 siobusycheck, com); 2193 com->extra_state |= CSE_BUSYCHECK; 2194 } 2195 (*linesw[tp->t_line].l_start)(tp); 2196 } 2197 if (com_events == 0) 2198 break; 2199 } 2200 if (com_events >= LOTS_OF_EVENTS) 2201 goto repeat; 2202 } 2203 2204 static int 2205 comparam(tp, t) 2206 struct tty *tp; 2207 struct termios *t; 2208 { 2209 u_int cfcr; 2210 int cflag; 2211 struct com_s *com; 2212 u_int divisor; 2213 u_char dlbh; 2214 u_char dlbl; 2215 int unit; 2216 2217 unit = DEV_TO_UNIT(tp->t_dev); 2218 com = com_addr(unit); 2219 if (com == NULL) 2220 return (ENODEV); 2221 2222 /* do historical conversions */ 2223 if (t->c_ispeed == 0) 2224 t->c_ispeed = t->c_ospeed; 2225 2226 /* check requested parameters */ 2227 if (t->c_ospeed == 0) 2228 divisor = 0; 2229 else { 2230 if (t->c_ispeed != t->c_ospeed) 2231 return (EINVAL); 2232 divisor = siodivisor(com->rclk, t->c_ispeed); 2233 if (divisor == 0) 2234 return (EINVAL); 2235 } 2236 2237 /* parameters are OK, convert them to the com struct and the device */ 2238 crit_enter(); 2239 if (divisor == 0) 2240 (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 2241 else 2242 (void)commctl(com, TIOCM_DTR, DMBIS); 2243 cflag = t->c_cflag; 2244 switch (cflag & CSIZE) { 2245 case CS5: 2246 cfcr = CFCR_5BITS; 2247 break; 2248 case CS6: 2249 cfcr = CFCR_6BITS; 2250 break; 2251 case CS7: 2252 cfcr = CFCR_7BITS; 2253 break; 2254 default: 2255 cfcr = CFCR_8BITS; 2256 break; 2257 } 2258 if (cflag & PARENB) { 2259 cfcr |= CFCR_PENAB; 2260 if (!(cflag & PARODD)) 2261 cfcr |= CFCR_PEVEN; 2262 } 2263 if (cflag & CSTOPB) 2264 cfcr |= CFCR_STOPB; 2265 2266 if (com->hasfifo && divisor != 0) { 2267 /* 2268 * Use a fifo trigger level low enough so that the input 2269 * latency from the fifo is less than about 16 msec and 2270 * the total latency is less than about 30 msec. These 2271 * latencies are reasonable for humans. Serial comms 2272 * protocols shouldn't expect anything better since modem 2273 * latencies are larger. 2274 * 2275 * Interrupts can be held up for long periods of time 2276 * due to inefficiencies in other parts of the kernel, 2277 * certain video cards, etc. Setting the FIFO trigger 2278 * point to MEDH instead of HIGH gives us 694uS of slop 2279 * (8 character times) instead of 173uS (2 character times) 2280 * @ 115200 bps. 2281 */ 2282 com->fifo_image = t->c_ospeed <= 4800 2283 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 2284 #ifdef COM_ESP 2285 /* 2286 * The Hayes ESP card needs the fifo DMA mode bit set 2287 * in compatibility mode. If not, it will interrupt 2288 * for each character received. 2289 */ 2290 if (com->esp) 2291 com->fifo_image |= FIFO_DMA_MODE; 2292 #endif 2293 sio_setreg(com, com_fifo, com->fifo_image); 2294 } 2295 2296 /* 2297 * This returns with interrupts disabled so that we can complete 2298 * the speed change atomically. Keeping interrupts disabled is 2299 * especially important while com_data is hidden. 2300 */ 2301 (void) siosetwater(com, t->c_ispeed); 2302 2303 if (divisor != 0) { 2304 sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 2305 /* 2306 * Only set the divisor registers if they would change, 2307 * since on some 16550 incompatibles (UMC8669F), setting 2308 * them while input is arriving them loses sync until 2309 * data stops arriving. 2310 */ 2311 dlbl = divisor & 0xFF; 2312 if (sio_getreg(com, com_dlbl) != dlbl) 2313 sio_setreg(com, com_dlbl, dlbl); 2314 dlbh = divisor >> 8; 2315 if (sio_getreg(com, com_dlbh) != dlbh) 2316 sio_setreg(com, com_dlbh, dlbh); 2317 } 2318 2319 sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 2320 2321 if (!(tp->t_state & TS_TTSTOP)) 2322 com->state |= CS_TTGO; 2323 2324 if (cflag & CRTS_IFLOW) { 2325 if (com->st16650a) { 2326 sio_setreg(com, com_cfcr, 0xbf); 2327 sio_setreg(com, com_fifo, 2328 sio_getreg(com, com_fifo) | 0x40); 2329 } 2330 com->state |= CS_RTS_IFLOW; 2331 /* 2332 * If CS_RTS_IFLOW just changed from off to on, the change 2333 * needs to be propagated to MCR_RTS. This isn't urgent, 2334 * so do it later by calling comstart() instead of repeating 2335 * a lot of code from comstart() here. 2336 */ 2337 } else if (com->state & CS_RTS_IFLOW) { 2338 com->state &= ~CS_RTS_IFLOW; 2339 /* 2340 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 2341 * on here, since comstart() won't do it later. 2342 */ 2343 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2344 if (com->st16650a) { 2345 sio_setreg(com, com_cfcr, 0xbf); 2346 sio_setreg(com, com_fifo, 2347 sio_getreg(com, com_fifo) & ~0x40); 2348 } 2349 } 2350 2351 2352 /* 2353 * Set up state to handle output flow control. 2354 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 2355 * Now has 10+ msec latency, while CTS flow has 50- usec latency. 2356 */ 2357 com->state |= CS_ODEVREADY; 2358 com->state &= ~CS_CTS_OFLOW; 2359 if (cflag & CCTS_OFLOW) { 2360 com->state |= CS_CTS_OFLOW; 2361 if (!(com->last_modem_status & MSR_CTS)) 2362 com->state &= ~CS_ODEVREADY; 2363 if (com->st16650a) { 2364 sio_setreg(com, com_cfcr, 0xbf); 2365 sio_setreg(com, com_fifo, 2366 sio_getreg(com, com_fifo) | 0x80); 2367 } 2368 } else { 2369 if (com->st16650a) { 2370 sio_setreg(com, com_cfcr, 0xbf); 2371 sio_setreg(com, com_fifo, 2372 sio_getreg(com, com_fifo) & ~0x80); 2373 } 2374 } 2375 2376 sio_setreg(com, com_cfcr, com->cfcr_image); 2377 2378 /* XXX shouldn't call functions while intrs are disabled. */ 2379 disc_optim(tp, t, com); 2380 /* 2381 * Recover from fiddling with CS_TTGO. We used to call siointr1() 2382 * unconditionally, but that defeated the careful discarding of 2383 * stale input in sioopen(). 2384 */ 2385 if (com->state >= (CS_BUSY | CS_TTGO)) 2386 siointr1(com); 2387 2388 com_unlock(); 2389 crit_exit(); 2390 comstart(tp); 2391 if (com->ibufold != NULL) { 2392 free(com->ibufold, M_DEVBUF); 2393 com->ibufold = NULL; 2394 } 2395 return (0); 2396 } 2397 2398 static int 2399 siosetwater(com, speed) 2400 struct com_s *com; 2401 speed_t speed; 2402 { 2403 int cp4ticks; 2404 u_char *ibuf; 2405 int ibufsize; 2406 struct tty *tp; 2407 2408 /* 2409 * Make the buffer size large enough to handle a softtty interrupt 2410 * latency of about 2 ticks without loss of throughput or data 2411 * (about 3 ticks if input flow control is not used or not honoured, 2412 * but a bit less for CS5-CS7 modes). 2413 */ 2414 cp4ticks = speed / 10 / hz * 4; 2415 for (ibufsize = 128; ibufsize < cp4ticks;) 2416 ibufsize <<= 1; 2417 if (ibufsize == com->ibufsize) { 2418 com_lock(); 2419 return (0); 2420 } 2421 2422 /* 2423 * Allocate input buffer. The extra factor of 2 in the size is 2424 * to allow for an error byte for each input byte. 2425 */ 2426 ibuf = malloc(2 * ibufsize, M_DEVBUF, M_WAITOK | M_ZERO); 2427 2428 /* Initialize non-critical variables. */ 2429 com->ibufold = com->ibuf; 2430 com->ibufsize = ibufsize; 2431 tp = com->tp; 2432 if (tp != NULL) { 2433 tp->t_ififosize = 2 * ibufsize; 2434 tp->t_ispeedwat = (speed_t)-1; 2435 tp->t_ospeedwat = (speed_t)-1; 2436 } 2437 2438 /* 2439 * Read current input buffer, if any. Continue with interrupts 2440 * disabled. 2441 */ 2442 com_lock(); 2443 if (com->iptr != com->ibuf) 2444 sioinput(com); 2445 2446 /*- 2447 * Initialize critical variables, including input buffer watermarks. 2448 * The external device is asked to stop sending when the buffer 2449 * exactly reaches high water, or when the high level requests it. 2450 * The high level is notified immediately (rather than at a later 2451 * clock tick) when this watermark is reached. 2452 * The buffer size is chosen so the watermark should almost never 2453 * be reached. 2454 * The low watermark is invisibly 0 since the buffer is always 2455 * emptied all at once. 2456 */ 2457 com->iptr = com->ibuf = ibuf; 2458 com->ibufend = ibuf + ibufsize; 2459 com->ierroff = ibufsize; 2460 com->ihighwater = ibuf + 3 * ibufsize / 4; 2461 return (0); 2462 } 2463 2464 static void 2465 comstart(tp) 2466 struct tty *tp; 2467 { 2468 struct com_s *com; 2469 int unit; 2470 2471 unit = DEV_TO_UNIT(tp->t_dev); 2472 com = com_addr(unit); 2473 if (com == NULL) 2474 return; 2475 crit_enter(); 2476 com_lock(); 2477 if (tp->t_state & TS_TTSTOP) 2478 com->state &= ~CS_TTGO; 2479 else 2480 com->state |= CS_TTGO; 2481 if (tp->t_state & TS_TBLOCK) { 2482 if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 2483 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 2484 } else { 2485 if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 2486 && com->state & CS_RTS_IFLOW) 2487 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2488 } 2489 com_unlock(); 2490 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 2491 ttwwakeup(tp); 2492 crit_exit(); 2493 return; 2494 } 2495 if (tp->t_outq.c_cc != 0) { 2496 struct lbq *qp; 2497 struct lbq *next; 2498 2499 if (!com->obufs[0].l_queued) { 2500 com->obufs[0].l_tail 2501 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 2502 sizeof com->obuf1); 2503 com->obufs[0].l_next = NULL; 2504 com->obufs[0].l_queued = TRUE; 2505 com_lock(); 2506 if (com->state & CS_BUSY) { 2507 qp = com->obufq.l_next; 2508 while ((next = qp->l_next) != NULL) 2509 qp = next; 2510 qp->l_next = &com->obufs[0]; 2511 } else { 2512 com->obufq.l_head = com->obufs[0].l_head; 2513 com->obufq.l_tail = com->obufs[0].l_tail; 2514 com->obufq.l_next = &com->obufs[0]; 2515 com->state |= CS_BUSY; 2516 } 2517 com_unlock(); 2518 } 2519 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 2520 com->obufs[1].l_tail 2521 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 2522 sizeof com->obuf2); 2523 com->obufs[1].l_next = NULL; 2524 com->obufs[1].l_queued = TRUE; 2525 com_lock(); 2526 if (com->state & CS_BUSY) { 2527 qp = com->obufq.l_next; 2528 while ((next = qp->l_next) != NULL) 2529 qp = next; 2530 qp->l_next = &com->obufs[1]; 2531 } else { 2532 com->obufq.l_head = com->obufs[1].l_head; 2533 com->obufq.l_tail = com->obufs[1].l_tail; 2534 com->obufq.l_next = &com->obufs[1]; 2535 com->state |= CS_BUSY; 2536 } 2537 com_unlock(); 2538 } 2539 tp->t_state |= TS_BUSY; 2540 } 2541 com_lock(); 2542 if (com->state >= (CS_BUSY | CS_TTGO)) 2543 siointr1(com); /* fake interrupt to start output */ 2544 com_unlock(); 2545 ttwwakeup(tp); 2546 crit_exit(); 2547 } 2548 2549 static void 2550 comstop(tp, rw) 2551 struct tty *tp; 2552 int rw; 2553 { 2554 struct com_s *com; 2555 2556 com = com_addr(DEV_TO_UNIT(tp->t_dev)); 2557 if (com == NULL || com->gone) 2558 return; 2559 com_lock(); 2560 if (rw & FWRITE) { 2561 if (com->hasfifo) 2562 #ifdef COM_ESP 2563 /* XXX avoid h/w bug. */ 2564 if (!com->esp) 2565 #endif 2566 sio_setreg(com, com_fifo, 2567 FIFO_XMT_RST | com->fifo_image); 2568 com->obufs[0].l_queued = FALSE; 2569 com->obufs[1].l_queued = FALSE; 2570 if (com->state & CS_ODONE) 2571 com_events -= LOTS_OF_EVENTS; 2572 com->state &= ~(CS_ODONE | CS_BUSY); 2573 com->tp->t_state &= ~TS_BUSY; 2574 } 2575 if (rw & FREAD) { 2576 if (com->hasfifo) 2577 #ifdef COM_ESP 2578 /* XXX avoid h/w bug. */ 2579 if (!com->esp) 2580 #endif 2581 sio_setreg(com, com_fifo, 2582 FIFO_RCV_RST | com->fifo_image); 2583 com_events -= (com->iptr - com->ibuf); 2584 com->iptr = com->ibuf; 2585 } 2586 com_unlock(); 2587 comstart(tp); 2588 } 2589 2590 static int 2591 commctl(com, bits, how) 2592 struct com_s *com; 2593 int bits; 2594 int how; 2595 { 2596 int mcr; 2597 int msr; 2598 2599 if (how == DMGET) { 2600 bits = TIOCM_LE; /* XXX - always enabled while open */ 2601 mcr = com->mcr_image; 2602 if (mcr & MCR_DTR) 2603 bits |= TIOCM_DTR; 2604 if (mcr & MCR_RTS) 2605 bits |= TIOCM_RTS; 2606 msr = com->prev_modem_status; 2607 if (msr & MSR_CTS) 2608 bits |= TIOCM_CTS; 2609 if (msr & MSR_DCD) 2610 bits |= TIOCM_CD; 2611 if (msr & MSR_DSR) 2612 bits |= TIOCM_DSR; 2613 /* 2614 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 2615 * more volatile by reading the modem status a lot. Perhaps 2616 * we should latch both bits until the status is read here. 2617 */ 2618 if (msr & (MSR_RI | MSR_TERI)) 2619 bits |= TIOCM_RI; 2620 return (bits); 2621 } 2622 mcr = 0; 2623 if (bits & TIOCM_DTR) 2624 mcr |= MCR_DTR; 2625 if (bits & TIOCM_RTS) 2626 mcr |= MCR_RTS; 2627 if (com->gone) 2628 return(0); 2629 com_lock(); 2630 switch (how) { 2631 case DMSET: 2632 outb(com->modem_ctl_port, 2633 com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 2634 break; 2635 case DMBIS: 2636 outb(com->modem_ctl_port, com->mcr_image |= mcr); 2637 break; 2638 case DMBIC: 2639 outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 2640 break; 2641 } 2642 com_unlock(); 2643 return (0); 2644 } 2645 2646 static void 2647 siosettimeout() 2648 { 2649 struct com_s *com; 2650 bool_t someopen; 2651 int unit; 2652 2653 /* 2654 * Set our timeout period to 1 second if no polled devices are open. 2655 * Otherwise set it to max(1/200, 1/hz). 2656 * Enable timeouts iff some device is open. 2657 */ 2658 callout_stop(&sio_timeout_handle); 2659 sio_timeout = hz; 2660 someopen = FALSE; 2661 for (unit = 0; unit < sio_numunits; ++unit) { 2662 com = com_addr(unit); 2663 if (com != NULL && com->tp != NULL 2664 && com->tp->t_state & TS_ISOPEN && !com->gone) { 2665 someopen = TRUE; 2666 if (com->poll || com->poll_output) { 2667 sio_timeout = hz > 200 ? hz / 200 : 1; 2668 break; 2669 } 2670 } 2671 } 2672 if (someopen) { 2673 sio_timeouts_until_log = hz / sio_timeout; 2674 callout_reset(&sio_timeout_handle, sio_timeout, 2675 comwakeup, NULL); 2676 } else { 2677 /* Flush error messages, if any. */ 2678 sio_timeouts_until_log = 1; 2679 comwakeup((void *)NULL); 2680 callout_stop(&sio_timeout_handle); 2681 } 2682 } 2683 2684 static void 2685 comwakeup(chan) 2686 void *chan; 2687 { 2688 struct com_s *com; 2689 int unit; 2690 2691 callout_reset(&sio_timeout_handle, sio_timeout, comwakeup, NULL); 2692 2693 /* 2694 * Recover from lost output interrupts. 2695 * Poll any lines that don't use interrupts. 2696 */ 2697 for (unit = 0; unit < sio_numunits; ++unit) { 2698 com = com_addr(unit); 2699 if (com != NULL && !com->gone 2700 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 2701 com_lock(); 2702 siointr1(com); 2703 com_unlock(); 2704 } 2705 } 2706 2707 /* 2708 * Check for and log errors, but not too often. 2709 */ 2710 if (--sio_timeouts_until_log > 0) 2711 return; 2712 sio_timeouts_until_log = hz / sio_timeout; 2713 for (unit = 0; unit < sio_numunits; ++unit) { 2714 int errnum; 2715 2716 com = com_addr(unit); 2717 if (com == NULL) 2718 continue; 2719 if (com->gone) 2720 continue; 2721 for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 2722 u_int delta; 2723 u_long total; 2724 2725 com_lock(); 2726 delta = com->delta_error_counts[errnum]; 2727 com->delta_error_counts[errnum] = 0; 2728 com_unlock(); 2729 if (delta == 0) 2730 continue; 2731 total = com->error_counts[errnum] += delta; 2732 log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 2733 unit, delta, error_desc[errnum], 2734 delta == 1 ? "" : "s", total); 2735 } 2736 } 2737 } 2738 2739 static void 2740 disc_optim(tp, t, com) 2741 struct tty *tp; 2742 struct termios *t; 2743 struct com_s *com; 2744 { 2745 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 2746 && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 2747 && (!(t->c_iflag & PARMRK) 2748 || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 2749 && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 2750 && linesw[tp->t_line].l_rint == ttyinput) 2751 tp->t_state |= TS_CAN_BYPASS_L_RINT; 2752 else 2753 tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 2754 com->hotchar = linesw[tp->t_line].l_hotchar; 2755 } 2756 2757 /* 2758 * Following are all routines needed for SIO to act as console 2759 */ 2760 #include <sys/cons.h> 2761 2762 struct siocnstate { 2763 u_char dlbl; 2764 u_char dlbh; 2765 u_char ier; 2766 u_char cfcr; 2767 u_char mcr; 2768 }; 2769 2770 static speed_t siocngetspeed (Port_t, u_long rclk); 2771 static void siocnclose (struct siocnstate *sp, Port_t iobase); 2772 static void siocnopen (struct siocnstate *sp, Port_t iobase, int speed); 2773 static void siocntxwait (Port_t iobase); 2774 2775 static cn_probe_t siocnprobe; 2776 static cn_init_t siocninit; 2777 static cn_checkc_t siocncheckc; 2778 static cn_getc_t siocngetc; 2779 static cn_putc_t siocnputc; 2780 2781 #ifdef __i386__ 2782 CONS_DRIVER(sio, siocnprobe, siocninit, NULL, siocngetc, siocncheckc, 2783 siocnputc, NULL); 2784 #endif 2785 2786 /* To get the GDB related variables */ 2787 #if DDB > 0 2788 #include <ddb/ddb.h> 2789 #endif 2790 2791 static void 2792 siocntxwait(iobase) 2793 Port_t iobase; 2794 { 2795 int timo; 2796 2797 /* 2798 * Wait for any pending transmission to finish. Required to avoid 2799 * the UART lockup bug when the speed is changed, and for normal 2800 * transmits. 2801 */ 2802 timo = 100000; 2803 while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 2804 != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 2805 ; 2806 } 2807 2808 /* 2809 * Read the serial port specified and try to figure out what speed 2810 * it's currently running at. We're assuming the serial port has 2811 * been initialized and is basicly idle. This routine is only intended 2812 * to be run at system startup. 2813 * 2814 * If the value read from the serial port doesn't make sense, return 0. 2815 */ 2816 2817 static speed_t 2818 siocngetspeed(iobase, rclk) 2819 Port_t iobase; 2820 u_long rclk; 2821 { 2822 u_int divisor; 2823 u_char dlbh; 2824 u_char dlbl; 2825 u_char cfcr; 2826 2827 cfcr = inb(iobase + com_cfcr); 2828 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2829 2830 dlbl = inb(iobase + com_dlbl); 2831 dlbh = inb(iobase + com_dlbh); 2832 2833 outb(iobase + com_cfcr, cfcr); 2834 2835 divisor = dlbh << 8 | dlbl; 2836 2837 /* XXX there should be more sanity checking. */ 2838 if (divisor == 0) 2839 return (CONSPEED); 2840 return (rclk / (16UL * divisor)); 2841 } 2842 2843 static void 2844 siocnopen(sp, iobase, speed) 2845 struct siocnstate *sp; 2846 Port_t iobase; 2847 int speed; 2848 { 2849 u_int divisor; 2850 u_char dlbh; 2851 u_char dlbl; 2852 2853 /* 2854 * Save all the device control registers except the fifo register 2855 * and set our default ones (cs8 -parenb speed=comdefaultrate). 2856 * We can't save the fifo register since it is read-only. 2857 */ 2858 sp->ier = inb(iobase + com_ier); 2859 outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 2860 siocntxwait(iobase); 2861 sp->cfcr = inb(iobase + com_cfcr); 2862 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2863 sp->dlbl = inb(iobase + com_dlbl); 2864 sp->dlbh = inb(iobase + com_dlbh); 2865 /* 2866 * Only set the divisor registers if they would change, since on 2867 * some 16550 incompatibles (Startech), setting them clears the 2868 * data input register. This also reduces the effects of the 2869 * UMC8669F bug. 2870 */ 2871 divisor = siodivisor(comdefaultrclk, speed); 2872 dlbl = divisor & 0xFF; 2873 if (sp->dlbl != dlbl) 2874 outb(iobase + com_dlbl, dlbl); 2875 dlbh = divisor >> 8; 2876 if (sp->dlbh != dlbh) 2877 outb(iobase + com_dlbh, dlbh); 2878 outb(iobase + com_cfcr, CFCR_8BITS); 2879 sp->mcr = inb(iobase + com_mcr); 2880 /* 2881 * We don't want interrupts, but must be careful not to "disable" 2882 * them by clearing the MCR_IENABLE bit, since that might cause 2883 * an interrupt by floating the IRQ line. 2884 */ 2885 outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 2886 } 2887 2888 static void 2889 siocnclose(sp, iobase) 2890 struct siocnstate *sp; 2891 Port_t iobase; 2892 { 2893 /* 2894 * Restore the device control registers. 2895 */ 2896 siocntxwait(iobase); 2897 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2898 if (sp->dlbl != inb(iobase + com_dlbl)) 2899 outb(iobase + com_dlbl, sp->dlbl); 2900 if (sp->dlbh != inb(iobase + com_dlbh)) 2901 outb(iobase + com_dlbh, sp->dlbh); 2902 outb(iobase + com_cfcr, sp->cfcr); 2903 /* 2904 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 2905 */ 2906 outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 2907 outb(iobase + com_ier, sp->ier); 2908 } 2909 2910 static void 2911 siocnprobe(cp) 2912 struct consdev *cp; 2913 { 2914 speed_t boot_speed; 2915 u_char cfcr; 2916 u_int divisor; 2917 int unit; 2918 struct siocnstate sp; 2919 2920 /* 2921 * Find our first enabled console, if any. If it is a high-level 2922 * console device, then initialize it and return successfully. 2923 * If it is a low-level console device, then initialize it and 2924 * return unsuccessfully. It must be initialized in both cases 2925 * for early use by console drivers and debuggers. Initializing 2926 * the hardware is not necessary in all cases, since the i/o 2927 * routines initialize it on the fly, but it is necessary if 2928 * input might arrive while the hardware is switched back to an 2929 * uninitialized state. We can't handle multiple console devices 2930 * yet because our low-level routines don't take a device arg. 2931 * We trust the user to set the console flags properly so that we 2932 * don't need to probe. 2933 */ 2934 cp->cn_pri = CN_DEAD; 2935 2936 for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 2937 int flags; 2938 int disabled; 2939 if (resource_int_value("sio", unit, "disabled", &disabled) == 0) { 2940 if (disabled) 2941 continue; 2942 } 2943 if (resource_int_value("sio", unit, "flags", &flags)) 2944 continue; 2945 if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 2946 int port; 2947 Port_t iobase; 2948 2949 if (resource_int_value("sio", unit, "port", &port)) 2950 continue; 2951 iobase = port; 2952 crit_enter(); 2953 if (boothowto & RB_SERIAL) { 2954 boot_speed = 2955 siocngetspeed(iobase, comdefaultrclk); 2956 if (boot_speed) 2957 comdefaultrate = boot_speed; 2958 } 2959 2960 /* 2961 * Initialize the divisor latch. We can't rely on 2962 * siocnopen() to do this the first time, since it 2963 * avoids writing to the latch if the latch appears 2964 * to have the correct value. Also, if we didn't 2965 * just read the speed from the hardware, then we 2966 * need to set the speed in hardware so that 2967 * switching it later is null. 2968 */ 2969 cfcr = inb(iobase + com_cfcr); 2970 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2971 divisor = siodivisor(comdefaultrclk, comdefaultrate); 2972 outb(iobase + com_dlbl, divisor & 0xff); 2973 outb(iobase + com_dlbh, divisor >> 8); 2974 outb(iobase + com_cfcr, cfcr); 2975 2976 siocnopen(&sp, iobase, comdefaultrate); 2977 2978 crit_exit(); 2979 if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 2980 cp->cn_dev = make_dev(&sio_cdevsw, unit, 2981 UID_ROOT, GID_WHEEL, 0600, 2982 "ttyd%r", unit); 2983 cp->cn_pri = COM_FORCECONSOLE(flags) 2984 || boothowto & RB_SERIAL 2985 ? CN_REMOTE : CN_NORMAL; 2986 siocniobase = iobase; 2987 siocnunit = unit; 2988 } 2989 if (COM_DEBUGGER(flags)) { 2990 printf("sio%d: gdb debugging port\n", unit); 2991 siogdbiobase = iobase; 2992 siogdbunit = unit; 2993 #if DDB > 0 2994 gdbdev = make_dev(&sio_cdevsw, unit, 2995 UID_ROOT, GID_WHEEL, 0600, 2996 "ttyd%r", unit); 2997 gdb_getc = siocngetc; 2998 gdb_putc = siocnputc; 2999 #endif 3000 } 3001 } 3002 } 3003 #ifdef __i386__ 3004 #if DDB > 0 3005 /* 3006 * XXX Ugly Compatability. 3007 * If no gdb port has been specified, set it to be the console 3008 * as some configuration files don't specify the gdb port. 3009 */ 3010 if (gdbdev == NODEV && (boothowto & RB_GDB)) { 3011 printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 3012 siocnunit); 3013 printf("Set flag 0x80 on desired GDB port in your\n"); 3014 printf("configuration file (currently sio only).\n"); 3015 siogdbiobase = siocniobase; 3016 siogdbunit = siocnunit; 3017 gdbdev = make_dev(&sio_cdevsw, siocnunit, 3018 UID_ROOT, GID_WHEEL, 0600, 3019 "ttyd%r", siocnunit); 3020 gdb_getc = siocngetc; 3021 gdb_putc = siocnputc; 3022 } 3023 #endif 3024 #endif 3025 } 3026 3027 static void 3028 siocninit(cp) 3029 struct consdev *cp; 3030 { 3031 comconsole = DEV_TO_UNIT(cp->cn_dev); 3032 } 3033 3034 static int 3035 siocncheckc(dev) 3036 dev_t dev; 3037 { 3038 int c; 3039 Port_t iobase; 3040 struct siocnstate sp; 3041 3042 if (minor(dev) == siogdbunit) 3043 iobase = siogdbiobase; 3044 else 3045 iobase = siocniobase; 3046 crit_enter(); 3047 siocnopen(&sp, iobase, comdefaultrate); 3048 if (inb(iobase + com_lsr) & LSR_RXRDY) 3049 c = inb(iobase + com_data); 3050 else 3051 c = -1; 3052 siocnclose(&sp, iobase); 3053 crit_exit(); 3054 return (c); 3055 } 3056 3057 3058 int 3059 siocngetc(dev) 3060 dev_t dev; 3061 { 3062 int c; 3063 Port_t iobase; 3064 struct siocnstate sp; 3065 3066 if (minor(dev) == siogdbunit) 3067 iobase = siogdbiobase; 3068 else 3069 iobase = siocniobase; 3070 crit_enter(); 3071 siocnopen(&sp, iobase, comdefaultrate); 3072 while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 3073 ; 3074 c = inb(iobase + com_data); 3075 siocnclose(&sp, iobase); 3076 crit_exit(); 3077 return (c); 3078 } 3079 3080 void 3081 siocnputc(dev, c) 3082 dev_t dev; 3083 int c; 3084 { 3085 struct siocnstate sp; 3086 Port_t iobase; 3087 3088 if (minor(dev) == siogdbunit) 3089 iobase = siogdbiobase; 3090 else 3091 iobase = siocniobase; 3092 crit_enter(); 3093 siocnopen(&sp, iobase, comdefaultrate); 3094 siocntxwait(iobase); 3095 outb(iobase + com_data, c); 3096 siocnclose(&sp, iobase); 3097 crit_exit(); 3098 } 3099 3100 DRIVER_MODULE(sio, isa, sio_isa_driver, sio_devclass, 0, 0); 3101 #if NPCI > 0 3102 DRIVER_MODULE(sio, pci, sio_pci_driver, sio_devclass, 0, 0); 3103 #endif 3104 #if NPUC > 0 3105 DRIVER_MODULE(sio, puc, sio_puc_driver, sio_devclass, 0, 0); 3106 #endif 3107