1 /* 2 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/dev/sound/pci/emu10k1.c,v 1.6.2.9 2002/04/22 15:49:32 cg Exp $ 27 * $DragonFly: src/sys/dev/sound/pci/emu10k1.c,v 1.3 2003/08/07 21:17:13 dillon Exp $ 28 */ 29 30 #include <dev/sound/pcm/sound.h> 31 #include <dev/sound/pcm/ac97.h> 32 #include "gnu/emu10k1.h" 33 34 #include <bus/pci/pcireg.h> 35 #include <bus/pci/pcivar.h> 36 #include <sys/queue.h> 37 38 SND_DECLARE_FILE("$DragonFly: src/sys/dev/sound/pci/emu10k1.c,v 1.3 2003/08/07 21:17:13 dillon Exp $"); 39 40 /* -------------------------------------------------------------------- */ 41 42 #define EMU10K1_PCI_ID 0x00021102 43 #define EMU10K2_PCI_ID 0x00041102 44 #define EMU_DEFAULT_BUFSZ 4096 45 #define EMU_CHANS 4 46 #undef EMUDEBUG 47 48 struct emu_memblk { 49 SLIST_ENTRY(emu_memblk) link; 50 void *buf; 51 u_int32_t pte_start, pte_size; 52 }; 53 54 struct emu_mem { 55 u_int8_t bmap[MAXPAGES / 8]; 56 u_int32_t *ptb_pages; 57 void *silent_page; 58 SLIST_HEAD(, emu_memblk) blocks; 59 }; 60 61 struct emu_voice { 62 int vnum; 63 int b16:1, stereo:1, busy:1, running:1, ismaster:1; 64 int speed; 65 int start, end, vol; 66 u_int32_t buf; 67 struct emu_voice *slave; 68 struct pcm_channel *channel; 69 }; 70 71 struct sc_info; 72 73 /* channel registers */ 74 struct sc_pchinfo { 75 int spd, fmt, blksz, run; 76 struct emu_voice *master, *slave; 77 struct snd_dbuf *buffer; 78 struct pcm_channel *channel; 79 struct sc_info *parent; 80 }; 81 82 struct sc_rchinfo { 83 int spd, fmt, run, blksz, num; 84 u_int32_t idxreg, basereg, sizereg, setupreg, irqmask; 85 struct snd_dbuf *buffer; 86 struct pcm_channel *channel; 87 struct sc_info *parent; 88 }; 89 90 /* device private data */ 91 struct sc_info { 92 device_t dev; 93 u_int32_t type, rev; 94 u_int32_t tos_link:1, APS:1; 95 96 bus_space_tag_t st; 97 bus_space_handle_t sh; 98 bus_dma_tag_t parent_dmat; 99 100 struct resource *reg, *irq; 101 void *ih; 102 void *lock; 103 104 unsigned int bufsz; 105 int timer, timerinterval; 106 int pnum, rnum; 107 struct emu_mem mem; 108 struct emu_voice voice[64]; 109 struct sc_pchinfo pch[EMU_CHANS]; 110 struct sc_rchinfo rch[3]; 111 }; 112 113 /* -------------------------------------------------------------------- */ 114 115 /* 116 * prototypes 117 */ 118 119 /* stuff */ 120 static int emu_init(struct sc_info *); 121 static void emu_intr(void *); 122 static void *emu_malloc(struct sc_info *sc, u_int32_t sz); 123 static void *emu_memalloc(struct sc_info *sc, u_int32_t sz); 124 static int emu_memfree(struct sc_info *sc, void *buf); 125 static int emu_memstart(struct sc_info *sc, void *buf); 126 #ifdef EMUDEBUG 127 static void emu_vdump(struct sc_info *sc, struct emu_voice *v); 128 #endif 129 130 /* talk to the card */ 131 static u_int32_t emu_rd(struct sc_info *, int, int); 132 static void emu_wr(struct sc_info *, int, u_int32_t, int); 133 134 /* -------------------------------------------------------------------- */ 135 136 static u_int32_t emu_rfmt_ac97[] = { 137 AFMT_S16_LE, 138 AFMT_STEREO | AFMT_S16_LE, 139 0 140 }; 141 142 static u_int32_t emu_rfmt_mic[] = { 143 AFMT_U8, 144 0 145 }; 146 147 static u_int32_t emu_rfmt_efx[] = { 148 AFMT_STEREO | AFMT_S16_LE, 149 0 150 }; 151 152 static struct pcmchan_caps emu_reccaps[3] = { 153 {8000, 48000, emu_rfmt_ac97, 0}, 154 {8000, 8000, emu_rfmt_mic, 0}, 155 {48000, 48000, emu_rfmt_efx, 0}, 156 }; 157 158 static u_int32_t emu_pfmt[] = { 159 AFMT_U8, 160 AFMT_STEREO | AFMT_U8, 161 AFMT_S16_LE, 162 AFMT_STEREO | AFMT_S16_LE, 163 0 164 }; 165 166 static struct pcmchan_caps emu_playcaps = {4000, 48000, emu_pfmt, 0}; 167 168 static int adcspeed[8] = {48000, 44100, 32000, 24000, 22050, 16000, 11025, 8000}; 169 170 /* -------------------------------------------------------------------- */ 171 /* Hardware */ 172 static u_int32_t 173 emu_rd(struct sc_info *sc, int regno, int size) 174 { 175 switch (size) { 176 case 1: 177 return bus_space_read_1(sc->st, sc->sh, regno); 178 case 2: 179 return bus_space_read_2(sc->st, sc->sh, regno); 180 case 4: 181 return bus_space_read_4(sc->st, sc->sh, regno); 182 default: 183 return 0xffffffff; 184 } 185 } 186 187 static void 188 emu_wr(struct sc_info *sc, int regno, u_int32_t data, int size) 189 { 190 switch (size) { 191 case 1: 192 bus_space_write_1(sc->st, sc->sh, regno, data); 193 break; 194 case 2: 195 bus_space_write_2(sc->st, sc->sh, regno, data); 196 break; 197 case 4: 198 bus_space_write_4(sc->st, sc->sh, regno, data); 199 break; 200 } 201 } 202 203 static u_int32_t 204 emu_rdptr(struct sc_info *sc, int chn, int reg) 205 { 206 u_int32_t ptr, val, mask, size, offset; 207 208 ptr = ((reg << 16) & PTR_ADDRESS_MASK) | (chn & PTR_CHANNELNUM_MASK); 209 emu_wr(sc, PTR, ptr, 4); 210 val = emu_rd(sc, DATA, 4); 211 if (reg & 0xff000000) { 212 size = (reg >> 24) & 0x3f; 213 offset = (reg >> 16) & 0x1f; 214 mask = ((1 << size) - 1) << offset; 215 val &= mask; 216 val >>= offset; 217 } 218 return val; 219 } 220 221 static void 222 emu_wrptr(struct sc_info *sc, int chn, int reg, u_int32_t data) 223 { 224 u_int32_t ptr, mask, size, offset; 225 226 ptr = ((reg << 16) & PTR_ADDRESS_MASK) | (chn & PTR_CHANNELNUM_MASK); 227 emu_wr(sc, PTR, ptr, 4); 228 if (reg & 0xff000000) { 229 size = (reg >> 24) & 0x3f; 230 offset = (reg >> 16) & 0x1f; 231 mask = ((1 << size) - 1) << offset; 232 data <<= offset; 233 data &= mask; 234 data |= emu_rd(sc, DATA, 4) & ~mask; 235 } 236 emu_wr(sc, DATA, data, 4); 237 } 238 239 static void 240 emu_wrefx(struct sc_info *sc, unsigned int pc, unsigned int data) 241 { 242 emu_wrptr(sc, 0, MICROCODEBASE + pc, data); 243 } 244 245 /* -------------------------------------------------------------------- */ 246 /* ac97 codec */ 247 /* no locking needed */ 248 249 static int 250 emu_rdcd(kobj_t obj, void *devinfo, int regno) 251 { 252 struct sc_info *sc = (struct sc_info *)devinfo; 253 254 emu_wr(sc, AC97ADDRESS, regno, 1); 255 return emu_rd(sc, AC97DATA, 2); 256 } 257 258 static int 259 emu_wrcd(kobj_t obj, void *devinfo, int regno, u_int32_t data) 260 { 261 struct sc_info *sc = (struct sc_info *)devinfo; 262 263 emu_wr(sc, AC97ADDRESS, regno, 1); 264 emu_wr(sc, AC97DATA, data, 2); 265 return 0; 266 } 267 268 static kobj_method_t emu_ac97_methods[] = { 269 KOBJMETHOD(ac97_read, emu_rdcd), 270 KOBJMETHOD(ac97_write, emu_wrcd), 271 { 0, 0 } 272 }; 273 AC97_DECLARE(emu_ac97); 274 275 /* -------------------------------------------------------------------- */ 276 /* stuff */ 277 static int 278 emu_settimer(struct sc_info *sc) 279 { 280 struct sc_pchinfo *pch; 281 struct sc_rchinfo *rch; 282 int i, tmp, rate; 283 284 rate = 0; 285 for (i = 0; i < EMU_CHANS; i++) { 286 pch = &sc->pch[i]; 287 if (pch->buffer) { 288 tmp = (pch->spd * sndbuf_getbps(pch->buffer)) / pch->blksz; 289 if (tmp > rate) 290 rate = tmp; 291 } 292 } 293 294 for (i = 0; i < 3; i++) { 295 rch = &sc->rch[i]; 296 if (rch->buffer) { 297 tmp = (rch->spd * sndbuf_getbps(rch->buffer)) / rch->blksz; 298 if (tmp > rate) 299 rate = tmp; 300 } 301 } 302 RANGE(rate, 48, 9600); 303 sc->timerinterval = 48000 / rate; 304 emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2); 305 306 return sc->timerinterval; 307 } 308 309 static int 310 emu_enatimer(struct sc_info *sc, int go) 311 { 312 u_int32_t x; 313 if (go) { 314 if (sc->timer++ == 0) { 315 x = emu_rd(sc, INTE, 4); 316 x |= INTE_INTERVALTIMERENB; 317 emu_wr(sc, INTE, x, 4); 318 } 319 } else { 320 sc->timer = 0; 321 x = emu_rd(sc, INTE, 4); 322 x &= ~INTE_INTERVALTIMERENB; 323 emu_wr(sc, INTE, x, 4); 324 } 325 return 0; 326 } 327 328 static void 329 emu_enastop(struct sc_info *sc, char channel, int enable) 330 { 331 int reg = (channel & 0x20)? SOLEH : SOLEL; 332 channel &= 0x1f; 333 reg |= 1 << 24; 334 reg |= channel << 16; 335 emu_wrptr(sc, 0, reg, enable); 336 } 337 338 static int 339 emu_recval(int speed) { 340 int val; 341 342 val = 0; 343 while (val < 7 && speed < adcspeed[val]) 344 val++; 345 return val; 346 } 347 348 static u_int32_t 349 emu_rate_to_pitch(u_int32_t rate) 350 { 351 static u_int32_t logMagTable[128] = { 352 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2, 353 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5, 354 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081, 355 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191, 356 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7, 357 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829, 358 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e, 359 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26, 360 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d, 361 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885, 362 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899, 363 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c, 364 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3, 365 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3, 366 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83, 367 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df 368 }; 369 static char logSlopeTable[128] = { 370 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58, 371 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53, 372 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f, 373 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b, 374 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47, 375 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44, 376 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41, 377 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e, 378 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c, 379 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39, 380 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37, 381 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35, 382 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34, 383 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32, 384 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30, 385 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f 386 }; 387 int i; 388 389 if (rate == 0) 390 return 0; /* Bail out if no leading "1" */ 391 rate *= 11185; /* Scale 48000 to 0x20002380 */ 392 for (i = 31; i > 0; i--) { 393 if (rate & 0x80000000) { /* Detect leading "1" */ 394 return (((u_int32_t) (i - 15) << 20) + 395 logMagTable[0x7f & (rate >> 24)] + 396 (0x7f & (rate >> 17)) * 397 logSlopeTable[0x7f & (rate >> 24)]); 398 } 399 rate <<= 1; 400 } 401 402 return 0; /* Should never reach this point */ 403 } 404 405 static u_int32_t 406 emu_rate_to_linearpitch(u_int32_t rate) 407 { 408 rate = (rate << 8) / 375; 409 return (rate >> 1) + (rate & 1); 410 } 411 412 static struct emu_voice * 413 emu_valloc(struct sc_info *sc) 414 { 415 struct emu_voice *v; 416 int i; 417 418 v = NULL; 419 for (i = 0; i < 64 && sc->voice[i].busy; i++); 420 if (i < 64) { 421 v = &sc->voice[i]; 422 v->busy = 1; 423 } 424 return v; 425 } 426 427 static int 428 emu_vinit(struct sc_info *sc, struct emu_voice *m, struct emu_voice *s, 429 u_int32_t sz, struct snd_dbuf *b) 430 { 431 void *buf; 432 433 buf = emu_memalloc(sc, sz); 434 if (buf == NULL) 435 return -1; 436 if (b != NULL) 437 sndbuf_setup(b, buf, sz); 438 m->start = emu_memstart(sc, buf) * EMUPAGESIZE; 439 m->end = m->start + sz; 440 m->channel = NULL; 441 m->speed = 0; 442 m->b16 = 0; 443 m->stereo = 0; 444 m->running = 0; 445 m->ismaster = 1; 446 m->vol = 0xff; 447 m->buf = vtophys(buf); 448 m->slave = s; 449 if (s != NULL) { 450 s->start = m->start; 451 s->end = m->end; 452 s->channel = NULL; 453 s->speed = 0; 454 s->b16 = 0; 455 s->stereo = 0; 456 s->running = 0; 457 s->ismaster = 0; 458 s->vol = m->vol; 459 s->buf = m->buf; 460 s->slave = NULL; 461 } 462 return 0; 463 } 464 465 static void 466 emu_vsetup(struct sc_pchinfo *ch) 467 { 468 struct emu_voice *v = ch->master; 469 470 if (ch->fmt) { 471 v->b16 = (ch->fmt & AFMT_16BIT)? 1 : 0; 472 v->stereo = (ch->fmt & AFMT_STEREO)? 1 : 0; 473 if (v->slave != NULL) { 474 v->slave->b16 = v->b16; 475 v->slave->stereo = v->stereo; 476 } 477 } 478 if (ch->spd) { 479 v->speed = ch->spd; 480 if (v->slave != NULL) 481 v->slave->speed = v->speed; 482 } 483 } 484 485 static void 486 emu_vwrite(struct sc_info *sc, struct emu_voice *v) 487 { 488 int s; 489 int l, r, x, y; 490 u_int32_t sa, ea, start, val, silent_page; 491 492 s = (v->stereo? 1 : 0) + (v->b16? 1 : 0); 493 494 sa = v->start >> s; 495 ea = v->end >> s; 496 497 l = r = x = y = v->vol; 498 if (v->stereo) { 499 l = v->ismaster? l : 0; 500 r = v->ismaster? 0 : r; 501 } 502 503 emu_wrptr(sc, v->vnum, CPF, v->stereo? CPF_STEREO_MASK : 0); 504 val = v->stereo? 28 : 30; 505 val *= v->b16? 1 : 2; 506 start = sa + val; 507 508 emu_wrptr(sc, v->vnum, FXRT, 0xd01c0000); 509 510 emu_wrptr(sc, v->vnum, PTRX, (x << 8) | r); 511 emu_wrptr(sc, v->vnum, DSL, ea | (y << 24)); 512 emu_wrptr(sc, v->vnum, PSST, sa | (l << 24)); 513 emu_wrptr(sc, v->vnum, CCCA, start | (v->b16? 0 : CCCA_8BITSELECT)); 514 515 emu_wrptr(sc, v->vnum, Z1, 0); 516 emu_wrptr(sc, v->vnum, Z2, 0); 517 518 silent_page = ((u_int32_t)vtophys(sc->mem.silent_page) << 1) | MAP_PTI_MASK; 519 emu_wrptr(sc, v->vnum, MAPA, silent_page); 520 emu_wrptr(sc, v->vnum, MAPB, silent_page); 521 522 emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK); 523 emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK); 524 emu_wrptr(sc, v->vnum, ATKHLDM, 0); 525 emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK); 526 emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000); 527 emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000); 528 emu_wrptr(sc, v->vnum, FMMOD, 0); 529 emu_wrptr(sc, v->vnum, TREMFRQ, 0); 530 emu_wrptr(sc, v->vnum, FM2FRQ2, 0); 531 emu_wrptr(sc, v->vnum, ENVVAL, 0x8000); 532 533 emu_wrptr(sc, v->vnum, ATKHLDV, ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK); 534 emu_wrptr(sc, v->vnum, ENVVOL, 0x8000); 535 536 emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f); 537 emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0); 538 539 if (v->slave != NULL) 540 emu_vwrite(sc, v->slave); 541 } 542 543 static void 544 emu_vtrigger(struct sc_info *sc, struct emu_voice *v, int go) 545 { 546 u_int32_t pitch_target, initial_pitch; 547 u_int32_t cra, cs, ccis; 548 u_int32_t sample, i; 549 550 if (go) { 551 cra = 64; 552 cs = v->stereo? 4 : 2; 553 ccis = v->stereo? 28 : 30; 554 ccis *= v->b16? 1 : 2; 555 sample = v->b16? 0x00000000 : 0x80808080; 556 557 for (i = 0; i < cs; i++) 558 emu_wrptr(sc, v->vnum, CD0 + i, sample); 559 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0); 560 emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra); 561 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis); 562 563 emu_wrptr(sc, v->vnum, IFATN, 0xff00); 564 emu_wrptr(sc, v->vnum, VTFT, 0xffffffff); 565 emu_wrptr(sc, v->vnum, CVCF, 0xffffffff); 566 emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f); 567 emu_enastop(sc, v->vnum, 0); 568 569 pitch_target = emu_rate_to_linearpitch(v->speed); 570 initial_pitch = emu_rate_to_pitch(v->speed) >> 8; 571 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target); 572 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target); 573 emu_wrptr(sc, v->vnum, IP, initial_pitch); 574 } else { 575 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0); 576 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0); 577 emu_wrptr(sc, v->vnum, IFATN, 0xffff); 578 emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff); 579 emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff); 580 emu_wrptr(sc, v->vnum, IP, 0); 581 emu_enastop(sc, v->vnum, 1); 582 } 583 if (v->slave != NULL) 584 emu_vtrigger(sc, v->slave, go); 585 } 586 587 static int 588 emu_vpos(struct sc_info *sc, struct emu_voice *v) 589 { 590 int s, ptr; 591 592 s = (v->b16? 1 : 0) + (v->stereo? 1 : 0); 593 ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s; 594 return ptr & ~0x0000001f; 595 } 596 597 #ifdef EMUDEBUG 598 static void 599 emu_vdump(struct sc_info *sc, struct emu_voice *v) 600 { 601 char *regname[] = { "cpf", "ptrx", "cvcf", "vtft", "z2", "z1", "psst", "dsl", 602 "ccca", "ccr", "clp", "fxrt", "mapa", "mapb", NULL, NULL, 603 "envvol", "atkhldv", "dcysusv", "lfoval1", 604 "envval", "atkhldm", "dcysusm", "lfoval2", 605 "ip", "ifatn", "pefe", "fmmod", "tremfrq", "fmfrq2", 606 "tempenv" }; 607 int i, x; 608 609 printf("voice number %d\n", v->vnum); 610 for (i = 0, x = 0; i <= 0x1e; i++) { 611 if (regname[i] == NULL) 612 continue; 613 printf("%s\t[%08x]", regname[i], emu_rdptr(sc, v->vnum, i)); 614 printf("%s", (x == 2)? "\n" : "\t"); 615 x++; 616 if (x > 2) 617 x = 0; 618 } 619 printf("\n\n"); 620 } 621 #endif 622 623 /* channel interface */ 624 static void * 625 emupchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 626 { 627 struct sc_info *sc = devinfo; 628 struct sc_pchinfo *ch; 629 void *r; 630 631 KASSERT(dir == PCMDIR_PLAY, ("emupchan_init: bad direction")); 632 ch = &sc->pch[sc->pnum++]; 633 ch->buffer = b; 634 ch->parent = sc; 635 ch->channel = c; 636 ch->blksz = sc->bufsz / 2; 637 ch->fmt = AFMT_U8; 638 ch->spd = 8000; 639 snd_mtxlock(sc->lock); 640 ch->master = emu_valloc(sc); 641 ch->slave = emu_valloc(sc); 642 r = (emu_vinit(sc, ch->master, ch->slave, sc->bufsz, ch->buffer))? NULL : ch; 643 snd_mtxunlock(sc->lock); 644 645 return r; 646 } 647 648 static int 649 emupchan_free(kobj_t obj, void *data) 650 { 651 struct sc_pchinfo *ch = data; 652 struct sc_info *sc = ch->parent; 653 int r; 654 655 snd_mtxlock(sc->lock); 656 r = emu_memfree(sc, sndbuf_getbuf(ch->buffer)); 657 snd_mtxunlock(sc->lock); 658 659 return r; 660 } 661 662 static int 663 emupchan_setformat(kobj_t obj, void *data, u_int32_t format) 664 { 665 struct sc_pchinfo *ch = data; 666 667 ch->fmt = format; 668 return 0; 669 } 670 671 static int 672 emupchan_setspeed(kobj_t obj, void *data, u_int32_t speed) 673 { 674 struct sc_pchinfo *ch = data; 675 676 ch->spd = speed; 677 return ch->spd; 678 } 679 680 static int 681 emupchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 682 { 683 struct sc_pchinfo *ch = data; 684 struct sc_info *sc = ch->parent; 685 int irqrate, blksz; 686 687 ch->blksz = blocksize; 688 snd_mtxlock(sc->lock); 689 emu_settimer(sc); 690 irqrate = 48000 / sc->timerinterval; 691 snd_mtxunlock(sc->lock); 692 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate; 693 return blocksize; 694 } 695 696 static int 697 emupchan_trigger(kobj_t obj, void *data, int go) 698 { 699 struct sc_pchinfo *ch = data; 700 struct sc_info *sc = ch->parent; 701 702 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 703 return 0; 704 705 snd_mtxlock(sc->lock); 706 if (go == PCMTRIG_START) { 707 emu_vsetup(ch); 708 emu_vwrite(sc, ch->master); 709 emu_settimer(sc); 710 emu_enatimer(sc, 1); 711 #ifdef EMUDEBUG 712 printf("start [%d bit, %s, %d hz]\n", 713 ch->master->b16? 16 : 8, 714 ch->master->stereo? "stereo" : "mono", 715 ch->master->speed); 716 emu_vdump(sc, ch->master); 717 emu_vdump(sc, ch->slave); 718 #endif 719 } 720 ch->run = (go == PCMTRIG_START)? 1 : 0; 721 emu_vtrigger(sc, ch->master, ch->run); 722 snd_mtxunlock(sc->lock); 723 return 0; 724 } 725 726 static int 727 emupchan_getptr(kobj_t obj, void *data) 728 { 729 struct sc_pchinfo *ch = data; 730 struct sc_info *sc = ch->parent; 731 int r; 732 733 snd_mtxlock(sc->lock); 734 r = emu_vpos(sc, ch->master); 735 snd_mtxunlock(sc->lock); 736 737 return r; 738 } 739 740 static struct pcmchan_caps * 741 emupchan_getcaps(kobj_t obj, void *data) 742 { 743 return &emu_playcaps; 744 } 745 746 static kobj_method_t emupchan_methods[] = { 747 KOBJMETHOD(channel_init, emupchan_init), 748 KOBJMETHOD(channel_free, emupchan_free), 749 KOBJMETHOD(channel_setformat, emupchan_setformat), 750 KOBJMETHOD(channel_setspeed, emupchan_setspeed), 751 KOBJMETHOD(channel_setblocksize, emupchan_setblocksize), 752 KOBJMETHOD(channel_trigger, emupchan_trigger), 753 KOBJMETHOD(channel_getptr, emupchan_getptr), 754 KOBJMETHOD(channel_getcaps, emupchan_getcaps), 755 { 0, 0 } 756 }; 757 CHANNEL_DECLARE(emupchan); 758 759 /* channel interface */ 760 static void * 761 emurchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 762 { 763 struct sc_info *sc = devinfo; 764 struct sc_rchinfo *ch; 765 766 KASSERT(dir == PCMDIR_REC, ("emurchan_init: bad direction")); 767 ch = &sc->rch[sc->rnum]; 768 ch->buffer = b; 769 ch->parent = sc; 770 ch->channel = c; 771 ch->blksz = sc->bufsz / 2; 772 ch->fmt = AFMT_U8; 773 ch->spd = 8000; 774 ch->num = sc->rnum; 775 switch(sc->rnum) { 776 case 0: 777 ch->idxreg = ADCIDX; 778 ch->basereg = ADCBA; 779 ch->sizereg = ADCBS; 780 ch->setupreg = ADCCR; 781 ch->irqmask = INTE_ADCBUFENABLE; 782 break; 783 784 case 1: 785 ch->idxreg = FXIDX; 786 ch->basereg = FXBA; 787 ch->sizereg = FXBS; 788 ch->setupreg = FXWC; 789 ch->irqmask = INTE_EFXBUFENABLE; 790 break; 791 792 case 2: 793 ch->idxreg = MICIDX; 794 ch->basereg = MICBA; 795 ch->sizereg = MICBS; 796 ch->setupreg = 0; 797 ch->irqmask = INTE_MICBUFENABLE; 798 break; 799 } 800 sc->rnum++; 801 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, sc->bufsz) == -1) 802 return NULL; 803 else { 804 snd_mtxlock(sc->lock); 805 emu_wrptr(sc, 0, ch->basereg, vtophys(sndbuf_getbuf(ch->buffer))); 806 emu_wrptr(sc, 0, ch->sizereg, 0); /* off */ 807 snd_mtxunlock(sc->lock); 808 return ch; 809 } 810 } 811 812 static int 813 emurchan_setformat(kobj_t obj, void *data, u_int32_t format) 814 { 815 struct sc_rchinfo *ch = data; 816 817 ch->fmt = format; 818 return 0; 819 } 820 821 static int 822 emurchan_setspeed(kobj_t obj, void *data, u_int32_t speed) 823 { 824 struct sc_rchinfo *ch = data; 825 826 if (ch->num == 0) 827 speed = adcspeed[emu_recval(speed)]; 828 if (ch->num == 1) 829 speed = 48000; 830 if (ch->num == 2) 831 speed = 8000; 832 ch->spd = speed; 833 return ch->spd; 834 } 835 836 static int 837 emurchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 838 { 839 struct sc_rchinfo *ch = data; 840 struct sc_info *sc = ch->parent; 841 int irqrate, blksz; 842 843 ch->blksz = blocksize; 844 snd_mtxlock(sc->lock); 845 emu_settimer(sc); 846 irqrate = 48000 / sc->timerinterval; 847 snd_mtxunlock(sc->lock); 848 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate; 849 return blocksize; 850 } 851 852 /* semantic note: must start at beginning of buffer */ 853 static int 854 emurchan_trigger(kobj_t obj, void *data, int go) 855 { 856 struct sc_rchinfo *ch = data; 857 struct sc_info *sc = ch->parent; 858 u_int32_t val, sz; 859 860 switch(sc->bufsz) { 861 case 4096: 862 sz = ADCBS_BUFSIZE_4096; 863 break; 864 865 case 8192: 866 sz = ADCBS_BUFSIZE_8192; 867 break; 868 869 case 16384: 870 sz = ADCBS_BUFSIZE_16384; 871 break; 872 873 case 32768: 874 sz = ADCBS_BUFSIZE_32768; 875 break; 876 877 case 65536: 878 sz = ADCBS_BUFSIZE_65536; 879 break; 880 881 default: 882 sz = ADCBS_BUFSIZE_4096; 883 } 884 885 snd_mtxlock(sc->lock); 886 switch(go) { 887 case PCMTRIG_START: 888 ch->run = 1; 889 emu_wrptr(sc, 0, ch->sizereg, sz); 890 if (ch->num == 0) { 891 val = ADCCR_LCHANENABLE; 892 if (ch->fmt & AFMT_STEREO) 893 val |= ADCCR_RCHANENABLE; 894 val |= emu_recval(ch->spd); 895 emu_wrptr(sc, 0, ch->setupreg, 0); 896 emu_wrptr(sc, 0, ch->setupreg, val); 897 } 898 val = emu_rd(sc, INTE, 4); 899 val |= ch->irqmask; 900 emu_wr(sc, INTE, val, 4); 901 break; 902 903 case PCMTRIG_STOP: 904 case PCMTRIG_ABORT: 905 ch->run = 0; 906 emu_wrptr(sc, 0, ch->sizereg, 0); 907 if (ch->setupreg) 908 emu_wrptr(sc, 0, ch->setupreg, 0); 909 val = emu_rd(sc, INTE, 4); 910 val &= ~ch->irqmask; 911 emu_wr(sc, INTE, val, 4); 912 break; 913 914 case PCMTRIG_EMLDMAWR: 915 case PCMTRIG_EMLDMARD: 916 default: 917 break; 918 } 919 snd_mtxunlock(sc->lock); 920 921 return 0; 922 } 923 924 static int 925 emurchan_getptr(kobj_t obj, void *data) 926 { 927 struct sc_rchinfo *ch = data; 928 struct sc_info *sc = ch->parent; 929 int r; 930 931 snd_mtxlock(sc->lock); 932 r = emu_rdptr(sc, 0, ch->idxreg) & 0x0000ffff; 933 snd_mtxunlock(sc->lock); 934 935 return r; 936 } 937 938 static struct pcmchan_caps * 939 emurchan_getcaps(kobj_t obj, void *data) 940 { 941 struct sc_rchinfo *ch = data; 942 943 return &emu_reccaps[ch->num]; 944 } 945 946 static kobj_method_t emurchan_methods[] = { 947 KOBJMETHOD(channel_init, emurchan_init), 948 KOBJMETHOD(channel_setformat, emurchan_setformat), 949 KOBJMETHOD(channel_setspeed, emurchan_setspeed), 950 KOBJMETHOD(channel_setblocksize, emurchan_setblocksize), 951 KOBJMETHOD(channel_trigger, emurchan_trigger), 952 KOBJMETHOD(channel_getptr, emurchan_getptr), 953 KOBJMETHOD(channel_getcaps, emurchan_getcaps), 954 { 0, 0 } 955 }; 956 CHANNEL_DECLARE(emurchan); 957 958 /* -------------------------------------------------------------------- */ 959 /* The interrupt handler */ 960 static void 961 emu_intr(void *p) 962 { 963 struct sc_info *sc = (struct sc_info *)p; 964 u_int32_t stat, ack, i, x; 965 966 while (1) { 967 stat = emu_rd(sc, IPR, 4); 968 if (stat == 0) 969 break; 970 ack = 0; 971 972 /* process irq */ 973 if (stat & IPR_INTERVALTIMER) { 974 ack |= IPR_INTERVALTIMER; 975 x = 0; 976 for (i = 0; i < EMU_CHANS; i++) { 977 if (sc->pch[i].run) { 978 x = 1; 979 chn_intr(sc->pch[i].channel); 980 } 981 } 982 if (x == 0) 983 emu_enatimer(sc, 0); 984 } 985 986 987 if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) { 988 ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL); 989 if (sc->rch[0].channel) 990 chn_intr(sc->rch[0].channel); 991 } 992 if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) { 993 ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL); 994 if (sc->rch[1].channel) 995 chn_intr(sc->rch[1].channel); 996 } 997 if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) { 998 ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL); 999 if (sc->rch[2].channel) 1000 chn_intr(sc->rch[2].channel); 1001 } 1002 if (stat & IPR_PCIERROR) { 1003 ack |= IPR_PCIERROR; 1004 device_printf(sc->dev, "pci error\n"); 1005 /* we still get an nmi with ecc ram even if we ack this */ 1006 } 1007 if (stat & IPR_SAMPLERATETRACKER) { 1008 ack |= IPR_SAMPLERATETRACKER; 1009 /* device_printf(sc->dev, "sample rate tracker lock status change\n"); */ 1010 } 1011 1012 if (stat & ~ack) 1013 device_printf(sc->dev, "dodgy irq: %x (harmless)\n", stat & ~ack); 1014 1015 emu_wr(sc, IPR, stat, 4); 1016 } 1017 } 1018 1019 /* -------------------------------------------------------------------- */ 1020 1021 static void 1022 emu_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) 1023 { 1024 void **phys = arg; 1025 1026 *phys = error? 0 : (void *)segs->ds_addr; 1027 1028 if (bootverbose) { 1029 printf("emu: setmap (%lx, %lx), nseg=%d, error=%d\n", 1030 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len, 1031 nseg, error); 1032 } 1033 } 1034 1035 static void * 1036 emu_malloc(struct sc_info *sc, u_int32_t sz) 1037 { 1038 void *buf, *phys = 0; 1039 bus_dmamap_t map; 1040 1041 if (bus_dmamem_alloc(sc->parent_dmat, &buf, BUS_DMA_NOWAIT, &map)) 1042 return NULL; 1043 if (bus_dmamap_load(sc->parent_dmat, map, buf, sz, emu_setmap, &phys, 0) 1044 || !phys) 1045 return NULL; 1046 return buf; 1047 } 1048 1049 static void 1050 emu_free(struct sc_info *sc, void *buf) 1051 { 1052 bus_dmamem_free(sc->parent_dmat, buf, NULL); 1053 } 1054 1055 static void * 1056 emu_memalloc(struct sc_info *sc, u_int32_t sz) 1057 { 1058 u_int32_t blksz, start, idx, ofs, tmp, found; 1059 struct emu_mem *mem = &sc->mem; 1060 struct emu_memblk *blk; 1061 void *buf; 1062 1063 blksz = sz / EMUPAGESIZE; 1064 if (sz > (blksz * EMUPAGESIZE)) 1065 blksz++; 1066 /* find a free block in the bitmap */ 1067 found = 0; 1068 start = 1; 1069 while (!found && start + blksz < MAXPAGES) { 1070 found = 1; 1071 for (idx = start; idx < start + blksz; idx++) 1072 if (mem->bmap[idx >> 3] & (1 << (idx & 7))) 1073 found = 0; 1074 if (!found) 1075 start++; 1076 } 1077 if (!found) 1078 return NULL; 1079 blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT); 1080 if (blk == NULL) 1081 return NULL; 1082 buf = emu_malloc(sc, sz); 1083 if (buf == NULL) { 1084 free(blk, M_DEVBUF); 1085 return NULL; 1086 } 1087 blk->buf = buf; 1088 blk->pte_start = start; 1089 blk->pte_size = blksz; 1090 /* printf("buf %p, pte_start %d, pte_size %d\n", blk->buf, blk->pte_start, blk->pte_size); */ 1091 ofs = 0; 1092 for (idx = start; idx < start + blksz; idx++) { 1093 mem->bmap[idx >> 3] |= 1 << (idx & 7); 1094 tmp = (u_int32_t)vtophys((u_int8_t *)buf + ofs); 1095 /* printf("pte[%d] -> %x phys, %x virt\n", idx, tmp, ((u_int32_t)buf) + ofs); */ 1096 mem->ptb_pages[idx] = (tmp << 1) | idx; 1097 ofs += EMUPAGESIZE; 1098 } 1099 SLIST_INSERT_HEAD(&mem->blocks, blk, link); 1100 return buf; 1101 } 1102 1103 static int 1104 emu_memfree(struct sc_info *sc, void *buf) 1105 { 1106 u_int32_t idx, tmp; 1107 struct emu_mem *mem = &sc->mem; 1108 struct emu_memblk *blk, *i; 1109 1110 blk = NULL; 1111 SLIST_FOREACH(i, &mem->blocks, link) { 1112 if (i->buf == buf) 1113 blk = i; 1114 } 1115 if (blk == NULL) 1116 return EINVAL; 1117 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link); 1118 emu_free(sc, buf); 1119 tmp = (u_int32_t)vtophys(sc->mem.silent_page) << 1; 1120 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) { 1121 mem->bmap[idx >> 3] &= ~(1 << (idx & 7)); 1122 mem->ptb_pages[idx] = tmp | idx; 1123 } 1124 free(blk, M_DEVBUF); 1125 return 0; 1126 } 1127 1128 static int 1129 emu_memstart(struct sc_info *sc, void *buf) 1130 { 1131 struct emu_mem *mem = &sc->mem; 1132 struct emu_memblk *blk, *i; 1133 1134 blk = NULL; 1135 SLIST_FOREACH(i, &mem->blocks, link) { 1136 if (i->buf == buf) 1137 blk = i; 1138 } 1139 if (blk == NULL) 1140 return -EINVAL; 1141 return blk->pte_start; 1142 } 1143 1144 static void 1145 emu_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y, u_int32_t *pc) 1146 { 1147 emu_wrefx(sc, (*pc) * 2, (x << 10) | y); 1148 emu_wrefx(sc, (*pc) * 2 + 1, (op << 20) | (z << 10) | w); 1149 (*pc)++; 1150 } 1151 1152 static void 1153 emu_initefx(struct sc_info *sc) 1154 { 1155 int i; 1156 u_int32_t pc = 16; 1157 1158 for (i = 0; i < 512; i++) { 1159 emu_wrefx(sc, i * 2, 0x10040); 1160 emu_wrefx(sc, i * 2 + 1, 0x610040); 1161 } 1162 1163 for (i = 0; i < 256; i++) 1164 emu_wrptr(sc, 0, FXGPREGBASE + i, 0); 1165 1166 /* FX-8010 DSP Registers: 1167 FX Bus 1168 0x000-0x00f : 16 registers 1169 Input 1170 0x010/0x011 : AC97 Codec (l/r) 1171 0x012/0x013 : ADC, S/PDIF (l/r) 1172 0x014/0x015 : Mic(left), Zoom (l/r) 1173 0x016/0x017 : APS S/PDIF?? (l/r) 1174 Output 1175 0x020/0x021 : AC97 Output (l/r) 1176 0x022/0x023 : TOS link out (l/r) 1177 0x024/0x025 : ??? (l/r) 1178 0x026/0x027 : LiveDrive Headphone (l/r) 1179 0x028/0x029 : Rear Channel (l/r) 1180 0x02a/0x02b : ADC Recording Buffer (l/r) 1181 Constants 1182 0x040 - 0x044 = 0 - 4 1183 0x045 = 0x8, 0x046 = 0x10, 0x047 = 0x20 1184 0x048 = 0x100, 0x049 = 0x10000, 0x04a = 0x80000 1185 0x04b = 0x10000000, 0x04c = 0x20000000, 0x04d = 0x40000000 1186 0x04e = 0x80000000, 0x04f = 0x7fffffff 1187 Temporary Values 1188 0x056 : Accumulator 1189 0x058 : Noise source? 1190 0x059 : Noise source? 1191 General Purpose Registers 1192 0x100 - 0x1ff 1193 Tank Memory Data Registers 1194 0x200 - 0x2ff 1195 Tank Memory Address Registers 1196 0x300 - 0x3ff 1197 */ 1198 1199 /* Operators: 1200 0 : z := w + (x * y >> 31) 1201 4 : z := w + x * y 1202 6 : z := w + x + y 1203 */ 1204 1205 /* Routing - this will be configurable in later version */ 1206 1207 /* GPR[0/1] = FX * 4 + SPDIF-in */ 1208 emu_addefxop(sc, 4, 0x100, 0x12, 0, 0x44, &pc); 1209 emu_addefxop(sc, 4, 0x101, 0x13, 1, 0x44, &pc); 1210 /* GPR[0/1] += APS-input */ 1211 emu_addefxop(sc, 6, 0x100, 0x100, 0x40, sc->APS ? 0x16 : 0x40, &pc); 1212 emu_addefxop(sc, 6, 0x101, 0x101, 0x40, sc->APS ? 0x17 : 0x40, &pc); 1213 /* FrontOut (AC97) = GPR[0/1] */ 1214 emu_addefxop(sc, 6, 0x20, 0x40, 0x40, 0x100, &pc); 1215 emu_addefxop(sc, 6, 0x21, 0x40, 0x41, 0x101, &pc); 1216 /* RearOut = (GPR[0/1] * RearVolume) >> 31 */ 1217 /* RearVolume = GRP[0x10/0x11] */ 1218 emu_addefxop(sc, 0, 0x28, 0x40, 0x110, 0x100, &pc); 1219 emu_addefxop(sc, 0, 0x29, 0x40, 0x111, 0x101, &pc); 1220 /* TOS out = GPR[0/1] */ 1221 emu_addefxop(sc, 6, 0x22, 0x40, 0x40, 0x100, &pc); 1222 emu_addefxop(sc, 6, 0x23, 0x40, 0x40, 0x101, &pc); 1223 /* Mute Out2 */ 1224 emu_addefxop(sc, 6, 0x24, 0x40, 0x40, 0x40, &pc); 1225 emu_addefxop(sc, 6, 0x25, 0x40, 0x40, 0x40, &pc); 1226 /* Mute Out3 */ 1227 emu_addefxop(sc, 6, 0x26, 0x40, 0x40, 0x40, &pc); 1228 emu_addefxop(sc, 6, 0x27, 0x40, 0x40, 0x40, &pc); 1229 /* Input0 (AC97) -> Record */ 1230 emu_addefxop(sc, 6, 0x2a, 0x40, 0x40, 0x10, &pc); 1231 emu_addefxop(sc, 6, 0x2b, 0x40, 0x40, 0x11, &pc); 1232 1233 emu_wrptr(sc, 0, DBG, 0); 1234 } 1235 1236 /* Probe and attach the card */ 1237 static int 1238 emu_init(struct sc_info *sc) 1239 { 1240 u_int32_t spcs, ch, tmp, i; 1241 1242 /* disable audio and lock cache */ 1243 emu_wr(sc, HCFG, HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE | HCFG_MUTEBUTTONENABLE, 4); 1244 1245 /* reset recording buffers */ 1246 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE); 1247 emu_wrptr(sc, 0, MICBA, 0); 1248 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE); 1249 emu_wrptr(sc, 0, FXBA, 0); 1250 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE); 1251 emu_wrptr(sc, 0, ADCBA, 0); 1252 1253 /* disable channel interrupt */ 1254 emu_wr(sc, INTE, INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE, 4); 1255 emu_wrptr(sc, 0, CLIEL, 0); 1256 emu_wrptr(sc, 0, CLIEH, 0); 1257 emu_wrptr(sc, 0, SOLEL, 0); 1258 emu_wrptr(sc, 0, SOLEH, 0); 1259 1260 /* init envelope engine */ 1261 for (ch = 0; ch < NUM_G; ch++) { 1262 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF); 1263 emu_wrptr(sc, ch, IP, 0); 1264 emu_wrptr(sc, ch, VTFT, 0xffff); 1265 emu_wrptr(sc, ch, CVCF, 0xffff); 1266 emu_wrptr(sc, ch, PTRX, 0); 1267 emu_wrptr(sc, ch, CPF, 0); 1268 emu_wrptr(sc, ch, CCR, 0); 1269 1270 emu_wrptr(sc, ch, PSST, 0); 1271 emu_wrptr(sc, ch, DSL, 0x10); 1272 emu_wrptr(sc, ch, CCCA, 0); 1273 emu_wrptr(sc, ch, Z1, 0); 1274 emu_wrptr(sc, ch, Z2, 0); 1275 emu_wrptr(sc, ch, FXRT, 0xd01c0000); 1276 1277 emu_wrptr(sc, ch, ATKHLDM, 0); 1278 emu_wrptr(sc, ch, DCYSUSM, 0); 1279 emu_wrptr(sc, ch, IFATN, 0xffff); 1280 emu_wrptr(sc, ch, PEFE, 0); 1281 emu_wrptr(sc, ch, FMMOD, 0); 1282 emu_wrptr(sc, ch, TREMFRQ, 24); /* 1 Hz */ 1283 emu_wrptr(sc, ch, FM2FRQ2, 24); /* 1 Hz */ 1284 emu_wrptr(sc, ch, TEMPENV, 0); 1285 1286 /*** these are last so OFF prevents writing ***/ 1287 emu_wrptr(sc, ch, LFOVAL2, 0); 1288 emu_wrptr(sc, ch, LFOVAL1, 0); 1289 emu_wrptr(sc, ch, ATKHLDV, 0); 1290 emu_wrptr(sc, ch, ENVVOL, 0); 1291 emu_wrptr(sc, ch, ENVVAL, 0); 1292 1293 sc->voice[ch].vnum = ch; 1294 sc->voice[ch].slave = NULL; 1295 sc->voice[ch].busy = 0; 1296 sc->voice[ch].ismaster = 0; 1297 sc->voice[ch].running = 0; 1298 sc->voice[ch].b16 = 0; 1299 sc->voice[ch].stereo = 0; 1300 sc->voice[ch].speed = 0; 1301 sc->voice[ch].start = 0; 1302 sc->voice[ch].end = 0; 1303 sc->voice[ch].channel = NULL; 1304 } 1305 sc->pnum = sc->rnum = 0; 1306 1307 /* 1308 * Init to 0x02109204 : 1309 * Clock accuracy = 0 (1000ppm) 1310 * Sample Rate = 2 (48kHz) 1311 * Audio Channel = 1 (Left of 2) 1312 * Source Number = 0 (Unspecified) 1313 * Generation Status = 1 (Original for Cat Code 12) 1314 * Cat Code = 12 (Digital Signal Mixer) 1315 * Mode = 0 (Mode 0) 1316 * Emphasis = 0 (None) 1317 * CP = 1 (Copyright unasserted) 1318 * AN = 0 (Audio data) 1319 * P = 0 (Consumer) 1320 */ 1321 spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1322 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1323 SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 | 1324 SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1325 emu_wrptr(sc, 0, SPCS0, spcs); 1326 emu_wrptr(sc, 0, SPCS1, spcs); 1327 emu_wrptr(sc, 0, SPCS2, spcs); 1328 1329 emu_initefx(sc); 1330 1331 SLIST_INIT(&sc->mem.blocks); 1332 sc->mem.ptb_pages = emu_malloc(sc, MAXPAGES * sizeof(u_int32_t)); 1333 if (sc->mem.ptb_pages == NULL) 1334 return -1; 1335 1336 sc->mem.silent_page = emu_malloc(sc, EMUPAGESIZE); 1337 if (sc->mem.silent_page == NULL) { 1338 emu_free(sc, sc->mem.ptb_pages); 1339 return -1; 1340 } 1341 /* Clear page with silence & setup all pointers to this page */ 1342 bzero(sc->mem.silent_page, EMUPAGESIZE); 1343 tmp = (u_int32_t)vtophys(sc->mem.silent_page) << 1; 1344 for (i = 0; i < MAXPAGES; i++) 1345 sc->mem.ptb_pages[i] = tmp | i; 1346 1347 emu_wrptr(sc, 0, PTB, vtophys(sc->mem.ptb_pages)); 1348 emu_wrptr(sc, 0, TCB, 0); /* taken from original driver */ 1349 emu_wrptr(sc, 0, TCBS, 0); /* taken from original driver */ 1350 1351 for (ch = 0; ch < NUM_G; ch++) { 1352 emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK); 1353 emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK); 1354 } 1355 1356 /* emu_memalloc(sc, EMUPAGESIZE); */ 1357 /* 1358 * Hokay, now enable the AUD bit 1359 * Enable Audio = 1 1360 * Mute Disable Audio = 0 1361 * Lock Tank Memory = 1 1362 * Lock Sound Memory = 0 1363 * Auto Mute = 1 1364 */ 1365 tmp = HCFG_AUDIOENABLE | HCFG_LOCKTANKCACHE | HCFG_AUTOMUTE; 1366 if (sc->rev >= 6) 1367 tmp |= HCFG_JOYENABLE; 1368 emu_wr(sc, HCFG, tmp, 4); 1369 1370 /* TOSLink detection */ 1371 sc->tos_link = 0; 1372 tmp = emu_rd(sc, HCFG, 4); 1373 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { 1374 emu_wr(sc, HCFG, tmp | 0x800, 4); 1375 DELAY(50); 1376 if (tmp != (emu_rd(sc, HCFG, 4) & ~0x800)) { 1377 sc->tos_link = 1; 1378 emu_wr(sc, HCFG, tmp, 4); 1379 } 1380 } 1381 1382 return 0; 1383 } 1384 1385 static int 1386 emu_uninit(struct sc_info *sc) 1387 { 1388 u_int32_t ch; 1389 1390 emu_wr(sc, INTE, 0, 4); 1391 for (ch = 0; ch < NUM_G; ch++) 1392 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF); 1393 for (ch = 0; ch < NUM_G; ch++) { 1394 emu_wrptr(sc, ch, VTFT, 0); 1395 emu_wrptr(sc, ch, CVCF, 0); 1396 emu_wrptr(sc, ch, PTRX, 0); 1397 emu_wrptr(sc, ch, CPF, 0); 1398 } 1399 1400 /* disable audio and lock cache */ 1401 emu_wr(sc, HCFG, HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE | HCFG_MUTEBUTTONENABLE, 4); 1402 1403 emu_wrptr(sc, 0, PTB, 0); 1404 /* reset recording buffers */ 1405 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE); 1406 emu_wrptr(sc, 0, MICBA, 0); 1407 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE); 1408 emu_wrptr(sc, 0, FXBA, 0); 1409 emu_wrptr(sc, 0, FXWC, 0); 1410 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE); 1411 emu_wrptr(sc, 0, ADCBA, 0); 1412 emu_wrptr(sc, 0, TCB, 0); 1413 emu_wrptr(sc, 0, TCBS, 0); 1414 1415 /* disable channel interrupt */ 1416 emu_wrptr(sc, 0, CLIEL, 0); 1417 emu_wrptr(sc, 0, CLIEH, 0); 1418 emu_wrptr(sc, 0, SOLEL, 0); 1419 emu_wrptr(sc, 0, SOLEH, 0); 1420 1421 /* init envelope engine */ 1422 if (!SLIST_EMPTY(&sc->mem.blocks)) 1423 device_printf(sc->dev, "warning: memblock list not empty\n"); 1424 emu_free(sc, sc->mem.ptb_pages); 1425 emu_free(sc, sc->mem.silent_page); 1426 1427 return 0; 1428 } 1429 1430 static int 1431 emu_pci_probe(device_t dev) 1432 { 1433 char *s = NULL; 1434 1435 switch (pci_get_devid(dev)) { 1436 case EMU10K1_PCI_ID: 1437 s = "Creative EMU10K1"; 1438 break; 1439 /* 1440 case EMU10K2_PCI_ID: 1441 s = "Creative EMU10K2"; 1442 break; 1443 */ 1444 default: 1445 return ENXIO; 1446 } 1447 1448 device_set_desc(dev, s); 1449 return 0; 1450 } 1451 1452 static int 1453 emu_pci_attach(device_t dev) 1454 { 1455 struct ac97_info *codec = NULL; 1456 struct sc_info *sc; 1457 u_int32_t data; 1458 int i, gotmic; 1459 char status[SND_STATUSLEN]; 1460 1461 if ((sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO)) == NULL) { 1462 device_printf(dev, "cannot allocate softc\n"); 1463 return ENXIO; 1464 } 1465 1466 sc->lock = snd_mtxcreate(device_get_nameunit(dev), "sound softc"); 1467 sc->dev = dev; 1468 sc->type = pci_get_devid(dev); 1469 sc->rev = pci_get_revid(dev); 1470 1471 data = pci_read_config(dev, PCIR_COMMAND, 2); 1472 data |= (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN); 1473 pci_write_config(dev, PCIR_COMMAND, data, 2); 1474 data = pci_read_config(dev, PCIR_COMMAND, 2); 1475 1476 i = PCIR_MAPS; 1477 sc->reg = bus_alloc_resource(dev, SYS_RES_IOPORT, &i, 0, ~0, 1, RF_ACTIVE); 1478 if (sc->reg == NULL) { 1479 device_printf(dev, "unable to map register space\n"); 1480 goto bad; 1481 } 1482 sc->st = rman_get_bustag(sc->reg); 1483 sc->sh = rman_get_bushandle(sc->reg); 1484 1485 sc->bufsz = pcm_getbuffersize(dev, 4096, EMU_DEFAULT_BUFSZ, 65536); 1486 1487 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 1488 /*lowaddr*/1 << 31, /* can only access 0-2gb */ 1489 /*highaddr*/BUS_SPACE_MAXADDR, 1490 /*filter*/NULL, /*filterarg*/NULL, 1491 /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 1492 /*flags*/0, &sc->parent_dmat) != 0) { 1493 device_printf(dev, "unable to create dma tag\n"); 1494 goto bad; 1495 } 1496 1497 if (emu_init(sc) == -1) { 1498 device_printf(dev, "unable to initialize the card\n"); 1499 goto bad; 1500 } 1501 1502 codec = AC97_CREATE(dev, sc, emu_ac97); 1503 if (codec == NULL) goto bad; 1504 gotmic = (ac97_getcaps(codec) & AC97_CAP_MICCHANNEL)? 1 : 0; 1505 if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad; 1506 1507 i = 0; 1508 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &i, 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 1509 if (!sc->irq || snd_setup_intr(dev, sc->irq, INTR_MPSAFE, emu_intr, sc, &sc->ih)) { 1510 device_printf(dev, "unable to map interrupt\n"); 1511 goto bad; 1512 } 1513 1514 snprintf(status, SND_STATUSLEN, "at io 0x%lx irq %ld", rman_get_start(sc->reg), rman_get_start(sc->irq)); 1515 1516 if (pcm_register(dev, sc, EMU_CHANS, gotmic? 3 : 2)) goto bad; 1517 for (i = 0; i < EMU_CHANS; i++) 1518 pcm_addchan(dev, PCMDIR_PLAY, &emupchan_class, sc); 1519 for (i = 0; i < (gotmic? 3 : 2); i++) 1520 pcm_addchan(dev, PCMDIR_REC, &emurchan_class, sc); 1521 1522 pcm_setstatus(dev, status); 1523 1524 return 0; 1525 1526 bad: 1527 if (codec) ac97_destroy(codec); 1528 if (sc->reg) bus_release_resource(dev, SYS_RES_IOPORT, PCIR_MAPS, sc->reg); 1529 if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih); 1530 if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 1531 if (sc->parent_dmat) bus_dma_tag_destroy(sc->parent_dmat); 1532 if (sc->lock) snd_mtxfree(sc->lock); 1533 free(sc, M_DEVBUF); 1534 return ENXIO; 1535 } 1536 1537 static int 1538 emu_pci_detach(device_t dev) 1539 { 1540 int r; 1541 struct sc_info *sc; 1542 1543 r = pcm_unregister(dev); 1544 if (r) 1545 return r; 1546 1547 sc = pcm_getdevinfo(dev); 1548 /* shutdown chip */ 1549 emu_uninit(sc); 1550 1551 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_MAPS, sc->reg); 1552 bus_teardown_intr(dev, sc->irq, sc->ih); 1553 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 1554 bus_dma_tag_destroy(sc->parent_dmat); 1555 snd_mtxfree(sc->lock); 1556 free(sc, M_DEVBUF); 1557 1558 return 0; 1559 } 1560 1561 /* add suspend, resume */ 1562 static device_method_t emu_methods[] = { 1563 /* Device interface */ 1564 DEVMETHOD(device_probe, emu_pci_probe), 1565 DEVMETHOD(device_attach, emu_pci_attach), 1566 DEVMETHOD(device_detach, emu_pci_detach), 1567 1568 { 0, 0 } 1569 }; 1570 1571 static driver_t emu_driver = { 1572 "pcm", 1573 emu_methods, 1574 PCM_SOFTC_SIZE, 1575 }; 1576 1577 DRIVER_MODULE(snd_emu10k1, pci, emu_driver, pcm_devclass, 0, 0); 1578 MODULE_DEPEND(snd_emu10k1, snd_pcm, PCM_MINVER, PCM_PREFVER, PCM_MAXVER); 1579 MODULE_VERSION(snd_emu10k1, 1); 1580 1581 /* dummy driver to silence the joystick device */ 1582 static int 1583 emujoy_pci_probe(device_t dev) 1584 { 1585 char *s = NULL; 1586 1587 switch (pci_get_devid(dev)) { 1588 case 0x70021102: 1589 s = "Creative EMU10K1 Joystick"; 1590 device_quiet(dev); 1591 break; 1592 case 0x70031102: 1593 s = "Creative EMU10K2 Joystick"; 1594 device_quiet(dev); 1595 break; 1596 } 1597 1598 if (s) device_set_desc(dev, s); 1599 return s? -1000 : ENXIO; 1600 } 1601 1602 static int 1603 emujoy_pci_attach(device_t dev) 1604 { 1605 return 0; 1606 } 1607 1608 static int 1609 emujoy_pci_detach(device_t dev) 1610 { 1611 return 0; 1612 } 1613 1614 static device_method_t emujoy_methods[] = { 1615 DEVMETHOD(device_probe, emujoy_pci_probe), 1616 DEVMETHOD(device_attach, emujoy_pci_attach), 1617 DEVMETHOD(device_detach, emujoy_pci_detach), 1618 1619 { 0, 0 } 1620 }; 1621 1622 static driver_t emujoy_driver = { 1623 "emujoy", 1624 emujoy_methods, 1625 8, 1626 }; 1627 1628 static devclass_t emujoy_devclass; 1629 1630 DRIVER_MODULE(emujoy, pci, emujoy_driver, emujoy_devclass, 0, 0); 1631 1632