1 /*- 2 * Copyright (c) 2004 David O'Brien <obrien@FreeBSD.org> 3 * Copyright (c) 2003 Orlando Bassotto <orlando.bassotto@ieo-research.it> 4 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: src/sys/dev/sound/pci/emu10k1.c,v 1.55.2.1 2005/12/30 19:55:53 netchild Exp $ 29 */ 30 31 #include <dev/sound/pcm/sound.h> 32 #include <dev/sound/pcm/ac97.h> 33 #include <gnu/dev/sound/pci/emu10k1.h> 34 #include "emu10k1-alsa%diked.h" 35 36 #include <bus/pci/pcireg.h> 37 #include <bus/pci/pcivar.h> 38 #include <sys/queue.h> 39 40 SND_DECLARE_FILE("$DragonFly: src/sys/dev/sound/pci/emu10k1.c,v 1.14 2008/01/06 16:55:51 swildner Exp $"); 41 42 /* -------------------------------------------------------------------- */ 43 44 #define NUM_G 64 /* use all channels */ 45 #define WAVEOUT_MAXBUFSIZE 32768 46 #define EMUPAGESIZE 4096 /* don't change */ 47 #define EMUMAXPAGES (WAVEOUT_MAXBUFSIZE * NUM_G / EMUPAGESIZE) 48 #define EMU10K1_PCI_ID 0x00021102 /* 1102 => Creative Labs Vendor ID */ 49 #define EMU10K2_PCI_ID 0x00041102 50 #define EMU10K3_PCI_ID 0x00081102 51 #define EMU_DEFAULT_BUFSZ 4096 52 #define EMU_MAX_CHANS 8 53 #define EMU_CHANS 4 54 55 #define MAXREQVOICES 8 56 #define RESERVED 0 57 #define NUM_MIDI 16 58 #define NUM_FXSENDS 4 59 60 #define TMEMSIZE 256*1024 61 #define TMEMSIZEREG 4 62 63 #define ENABLE 0xffffffff 64 #define DISABLE 0x00000000 65 #define ENV_ON DCYSUSV_CHANNELENABLE_MASK 66 #define ENV_OFF 0x00 /* XXX: should this be 1? */ 67 68 #define A_IOCFG_GPOUT_A 0x40 /* Analog Output */ 69 #define A_IOCFG_GPOUT_D 0x04 /* Digital Output */ 70 #define A_IOCFG_GPOUT_AD (A_IOCFG_GPOUT_A|A_IOCFG_GPOUT_D) /* A_IOCFG_GPOUT0 */ 71 72 struct emu_memblk { 73 SLIST_ENTRY(emu_memblk) link; 74 void *buf; 75 bus_addr_t buf_addr; 76 u_int32_t pte_start, pte_size; 77 }; 78 79 struct emu_mem { 80 u_int8_t bmap[EMUMAXPAGES / 8]; 81 u_int32_t *ptb_pages; 82 void *silent_page; 83 bus_addr_t silent_page_addr; 84 bus_addr_t ptb_pages_addr; 85 SLIST_HEAD(, emu_memblk) blocks; 86 }; 87 88 struct emu_voice { 89 int vnum; 90 int b16:1, stereo:1, busy:1, running:1, ismaster:1; 91 int speed; 92 int start, end, vol; 93 int fxrt1; /* FX routing */ 94 int fxrt2; /* FX routing (only for audigy) */ 95 u_int32_t buf; 96 struct emu_voice *slave; 97 struct pcm_channel *channel; 98 }; 99 100 struct sc_info; 101 102 /* channel registers */ 103 struct sc_pchinfo { 104 int spd, fmt, blksz, run; 105 struct emu_voice *master, *slave; 106 struct snd_dbuf *buffer; 107 struct pcm_channel *channel; 108 struct sc_info *parent; 109 }; 110 111 struct sc_rchinfo { 112 int spd, fmt, run, blksz, num; 113 u_int32_t idxreg, basereg, sizereg, setupreg, irqmask; 114 struct snd_dbuf *buffer; 115 struct pcm_channel *channel; 116 struct sc_info *parent; 117 }; 118 119 /* device private data */ 120 struct sc_info { 121 device_t dev; 122 u_int32_t type, rev; 123 u_int32_t tos_link:1, APS:1, audigy:1, audigy2:1; 124 u_int32_t addrmask; /* wider if audigy */ 125 126 bus_space_tag_t st; 127 bus_space_handle_t sh; 128 bus_dma_tag_t parent_dmat; 129 130 struct resource *reg, *irq; 131 void *ih; 132 sndlock_t lock; 133 134 unsigned int bufsz; 135 int timer, timerinterval; 136 int pnum, rnum; 137 int nchans; 138 struct emu_mem mem; 139 struct emu_voice voice[64]; 140 struct sc_pchinfo pch[EMU_MAX_CHANS]; 141 struct sc_rchinfo rch[3]; 142 }; 143 144 /* -------------------------------------------------------------------- */ 145 146 /* 147 * prototypes 148 */ 149 150 /* stuff */ 151 static int emu_init(struct sc_info *); 152 static void emu_intr(void *); 153 static void *emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr); 154 static void *emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr); 155 static int emu_memfree(struct sc_info *sc, void *buf); 156 static int emu_memstart(struct sc_info *sc, void *buf); 157 #ifdef EMUDEBUG 158 static void emu_vdump(struct sc_info *sc, struct emu_voice *v); 159 #endif 160 161 /* talk to the card */ 162 static u_int32_t emu_rd(struct sc_info *, int, int); 163 static void emu_wr(struct sc_info *, int, u_int32_t, int); 164 165 /* -------------------------------------------------------------------- */ 166 167 static u_int32_t emu_rfmt_ac97[] = { 168 AFMT_S16_LE, 169 AFMT_STEREO | AFMT_S16_LE, 170 0 171 }; 172 173 static u_int32_t emu_rfmt_mic[] = { 174 AFMT_U8, 175 0 176 }; 177 178 static u_int32_t emu_rfmt_efx[] = { 179 AFMT_STEREO | AFMT_S16_LE, 180 0 181 }; 182 183 static struct pcmchan_caps emu_reccaps[3] = { 184 {8000, 48000, emu_rfmt_ac97, 0}, 185 {8000, 8000, emu_rfmt_mic, 0}, 186 {48000, 48000, emu_rfmt_efx, 0}, 187 }; 188 189 static u_int32_t emu_pfmt[] = { 190 AFMT_U8, 191 AFMT_STEREO | AFMT_U8, 192 AFMT_S16_LE, 193 AFMT_STEREO | AFMT_S16_LE, 194 0 195 }; 196 197 static struct pcmchan_caps emu_playcaps = {4000, 48000, emu_pfmt, 0}; 198 199 static int adcspeed[8] = {48000, 44100, 32000, 24000, 22050, 16000, 11025, 8000}; 200 /* audigy supports 12kHz. */ 201 static int audigy_adcspeed[9] = { 202 48000, 44100, 32000, 24000, 22050, 16000, 12000, 11025, 8000 203 }; 204 205 /* -------------------------------------------------------------------- */ 206 /* Hardware */ 207 static u_int32_t 208 emu_rd(struct sc_info *sc, int regno, int size) 209 { 210 switch (size) { 211 case 1: 212 return bus_space_read_1(sc->st, sc->sh, regno); 213 case 2: 214 return bus_space_read_2(sc->st, sc->sh, regno); 215 case 4: 216 return bus_space_read_4(sc->st, sc->sh, regno); 217 default: 218 return 0xffffffff; 219 } 220 } 221 222 static void 223 emu_wr(struct sc_info *sc, int regno, u_int32_t data, int size) 224 { 225 switch (size) { 226 case 1: 227 bus_space_write_1(sc->st, sc->sh, regno, data); 228 break; 229 case 2: 230 bus_space_write_2(sc->st, sc->sh, regno, data); 231 break; 232 case 4: 233 bus_space_write_4(sc->st, sc->sh, regno, data); 234 break; 235 } 236 } 237 238 static u_int32_t 239 emu_rdptr(struct sc_info *sc, int chn, int reg) 240 { 241 u_int32_t ptr, val, mask, size, offset; 242 243 ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK); 244 emu_wr(sc, PTR, ptr, 4); 245 val = emu_rd(sc, DATA, 4); 246 if (reg & 0xff000000) { 247 size = (reg >> 24) & 0x3f; 248 offset = (reg >> 16) & 0x1f; 249 mask = ((1 << size) - 1) << offset; 250 val &= mask; 251 val >>= offset; 252 } 253 return val; 254 } 255 256 static void 257 emu_wrptr(struct sc_info *sc, int chn, int reg, u_int32_t data) 258 { 259 u_int32_t ptr, mask, size, offset; 260 261 ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK); 262 emu_wr(sc, PTR, ptr, 4); 263 if (reg & 0xff000000) { 264 size = (reg >> 24) & 0x3f; 265 offset = (reg >> 16) & 0x1f; 266 mask = ((1 << size) - 1) << offset; 267 data <<= offset; 268 data &= mask; 269 data |= emu_rd(sc, DATA, 4) & ~mask; 270 } 271 emu_wr(sc, DATA, data, 4); 272 } 273 274 static void 275 emu_wrefx(struct sc_info *sc, unsigned int pc, unsigned int data) 276 { 277 pc += sc->audigy ? AUDIGY_CODEBASE : MICROCODEBASE; 278 emu_wrptr(sc, 0, pc, data); 279 } 280 281 /* -------------------------------------------------------------------- */ 282 /* ac97 codec */ 283 /* no locking needed */ 284 285 static int 286 emu_rdcd(kobj_t obj, void *devinfo, int regno) 287 { 288 struct sc_info *sc = (struct sc_info *)devinfo; 289 290 emu_wr(sc, AC97ADDRESS, regno, 1); 291 return emu_rd(sc, AC97DATA, 2); 292 } 293 294 static int 295 emu_wrcd(kobj_t obj, void *devinfo, int regno, u_int32_t data) 296 { 297 struct sc_info *sc = (struct sc_info *)devinfo; 298 299 emu_wr(sc, AC97ADDRESS, regno, 1); 300 emu_wr(sc, AC97DATA, data, 2); 301 return 0; 302 } 303 304 static kobj_method_t emu_ac97_methods[] = { 305 KOBJMETHOD(ac97_read, emu_rdcd), 306 KOBJMETHOD(ac97_write, emu_wrcd), 307 KOBJMETHOD_END 308 }; 309 AC97_DECLARE(emu_ac97); 310 311 /* -------------------------------------------------------------------- */ 312 /* stuff */ 313 static int 314 emu_settimer(struct sc_info *sc) 315 { 316 struct sc_pchinfo *pch; 317 struct sc_rchinfo *rch; 318 int i, tmp, rate; 319 320 rate = 0; 321 for (i = 0; i < sc->nchans; i++) { 322 pch = &sc->pch[i]; 323 if (pch->buffer) { 324 tmp = (pch->spd * sndbuf_getbps(pch->buffer)) 325 / pch->blksz; 326 if (tmp > rate) 327 rate = tmp; 328 } 329 } 330 331 for (i = 0; i < 3; i++) { 332 rch = &sc->rch[i]; 333 if (rch->buffer) { 334 tmp = (rch->spd * sndbuf_getbps(rch->buffer)) 335 / rch->blksz; 336 if (tmp > rate) 337 rate = tmp; 338 } 339 } 340 RANGE(rate, 48, 9600); 341 sc->timerinterval = 48000 / rate; 342 emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2); 343 344 return sc->timerinterval; 345 } 346 347 static int 348 emu_enatimer(struct sc_info *sc, int go) 349 { 350 u_int32_t x; 351 if (go) { 352 if (sc->timer++ == 0) { 353 x = emu_rd(sc, INTE, 4); 354 x |= INTE_INTERVALTIMERENB; 355 emu_wr(sc, INTE, x, 4); 356 } 357 } else { 358 sc->timer = 0; 359 x = emu_rd(sc, INTE, 4); 360 x &= ~INTE_INTERVALTIMERENB; 361 emu_wr(sc, INTE, x, 4); 362 } 363 return 0; 364 } 365 366 static void 367 emu_enastop(struct sc_info *sc, char channel, int enable) 368 { 369 int reg = (channel & 0x20) ? SOLEH : SOLEL; 370 channel &= 0x1f; 371 reg |= 1 << 24; 372 reg |= channel << 16; 373 emu_wrptr(sc, 0, reg, enable); 374 } 375 376 static int 377 emu_recval(int speed) { 378 int val; 379 380 val = 0; 381 while (val < 7 && speed < adcspeed[val]) 382 val++; 383 return val; 384 } 385 386 static int 387 audigy_recval(int speed) { 388 int val; 389 390 val = 0; 391 while (val < 8 && speed < audigy_adcspeed[val]) 392 val++; 393 return val; 394 } 395 396 static u_int32_t 397 emu_rate_to_pitch(u_int32_t rate) 398 { 399 static u_int32_t logMagTable[128] = { 400 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2, 401 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5, 402 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081, 403 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191, 404 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7, 405 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829, 406 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e, 407 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26, 408 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d, 409 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885, 410 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899, 411 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c, 412 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3, 413 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3, 414 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83, 415 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df 416 }; 417 static char logSlopeTable[128] = { 418 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58, 419 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53, 420 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f, 421 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b, 422 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47, 423 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44, 424 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41, 425 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e, 426 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c, 427 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39, 428 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37, 429 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35, 430 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34, 431 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32, 432 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30, 433 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f 434 }; 435 int i; 436 437 if (rate == 0) 438 return 0; /* Bail out if no leading "1" */ 439 rate *= 11185; /* Scale 48000 to 0x20002380 */ 440 for (i = 31; i > 0; i--) { 441 if (rate & 0x80000000) { /* Detect leading "1" */ 442 return (((u_int32_t) (i - 15) << 20) + 443 logMagTable[0x7f & (rate >> 24)] + 444 (0x7f & (rate >> 17)) * 445 logSlopeTable[0x7f & (rate >> 24)]); 446 } 447 rate <<= 1; 448 } 449 450 return 0; /* Should never reach this point */ 451 } 452 453 static u_int32_t 454 emu_rate_to_linearpitch(u_int32_t rate) 455 { 456 rate = (rate << 8) / 375; 457 return (rate >> 1) + (rate & 1); 458 } 459 460 static struct emu_voice * 461 emu_valloc(struct sc_info *sc) 462 { 463 struct emu_voice *v; 464 int i; 465 466 v = NULL; 467 for (i = 0; i < 64 && sc->voice[i].busy; i++); 468 if (i < 64) { 469 v = &sc->voice[i]; 470 v->busy = 1; 471 } 472 return v; 473 } 474 475 static int 476 emu_vinit(struct sc_info *sc, struct emu_voice *m, struct emu_voice *s, 477 u_int32_t sz, struct snd_dbuf *b) 478 { 479 void *buf; 480 bus_addr_t tmp_addr; 481 482 buf = emu_memalloc(sc, sz, &tmp_addr); 483 if (buf == NULL) 484 return -1; 485 if (b != NULL) 486 sndbuf_setup(b, buf, sz); 487 m->start = emu_memstart(sc, buf) * EMUPAGESIZE; 488 m->end = m->start + sz; 489 m->channel = NULL; 490 m->speed = 0; 491 m->b16 = 0; 492 m->stereo = 0; 493 m->running = 0; 494 m->ismaster = 1; 495 m->vol = 0xff; 496 m->buf = tmp_addr; 497 m->slave = s; 498 if (sc->audigy) { 499 m->fxrt1 = FXBUS_MIDI_CHORUS | FXBUS_PCM_RIGHT << 8 | 500 FXBUS_PCM_LEFT << 16 | FXBUS_MIDI_REVERB << 24; 501 m->fxrt2 = 0x3f3f3f3f; /* No effects on second route */ 502 } else { 503 m->fxrt1 = FXBUS_MIDI_CHORUS | FXBUS_PCM_RIGHT << 4 | 504 FXBUS_PCM_LEFT << 8 | FXBUS_MIDI_REVERB << 12; 505 m->fxrt2 = 0; 506 } 507 508 if (s != NULL) { 509 s->start = m->start; 510 s->end = m->end; 511 s->channel = NULL; 512 s->speed = 0; 513 s->b16 = 0; 514 s->stereo = 0; 515 s->running = 0; 516 s->ismaster = 0; 517 s->vol = m->vol; 518 s->buf = m->buf; 519 s->fxrt1 = m->fxrt1; 520 s->fxrt2 = m->fxrt2; 521 s->slave = NULL; 522 } 523 return 0; 524 } 525 526 static void 527 emu_vsetup(struct sc_pchinfo *ch) 528 { 529 struct emu_voice *v = ch->master; 530 531 if (ch->fmt) { 532 v->b16 = (ch->fmt & AFMT_16BIT) ? 1 : 0; 533 v->stereo = (ch->fmt & AFMT_STEREO) ? 1 : 0; 534 if (v->slave != NULL) { 535 v->slave->b16 = v->b16; 536 v->slave->stereo = v->stereo; 537 } 538 } 539 if (ch->spd) { 540 v->speed = ch->spd; 541 if (v->slave != NULL) 542 v->slave->speed = v->speed; 543 } 544 } 545 546 static void 547 emu_vwrite(struct sc_info *sc, struct emu_voice *v) 548 { 549 int s; 550 int l, r, x, y; 551 u_int32_t sa, ea, start, val, silent_page; 552 553 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0); 554 555 sa = v->start >> s; 556 ea = v->end >> s; 557 558 l = r = x = y = v->vol; 559 if (v->stereo) { 560 l = v->ismaster ? l : 0; 561 r = v->ismaster ? 0 : r; 562 } 563 564 emu_wrptr(sc, v->vnum, CPF, v->stereo ? CPF_STEREO_MASK : 0); 565 val = v->stereo ? 28 : 30; 566 val *= v->b16 ? 1 : 2; 567 start = sa + val; 568 569 if (sc->audigy) { 570 emu_wrptr(sc, v->vnum, A_FXRT1, v->fxrt1); 571 emu_wrptr(sc, v->vnum, A_FXRT2, v->fxrt2); 572 emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, 0); 573 } 574 else 575 emu_wrptr(sc, v->vnum, FXRT, v->fxrt1 << 16); 576 577 emu_wrptr(sc, v->vnum, PTRX, (x << 8) | r); 578 emu_wrptr(sc, v->vnum, DSL, ea | (y << 24)); 579 emu_wrptr(sc, v->vnum, PSST, sa | (l << 24)); 580 emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT)); 581 582 emu_wrptr(sc, v->vnum, Z1, 0); 583 emu_wrptr(sc, v->vnum, Z2, 0); 584 585 silent_page = ((u_int32_t)(sc->mem.silent_page_addr) << 1) 586 | MAP_PTI_MASK; 587 emu_wrptr(sc, v->vnum, MAPA, silent_page); 588 emu_wrptr(sc, v->vnum, MAPB, silent_page); 589 590 emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK); 591 emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK); 592 emu_wrptr(sc, v->vnum, ATKHLDM, 0); 593 emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK); 594 emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000); 595 emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000); 596 emu_wrptr(sc, v->vnum, FMMOD, 0); 597 emu_wrptr(sc, v->vnum, TREMFRQ, 0); 598 emu_wrptr(sc, v->vnum, FM2FRQ2, 0); 599 emu_wrptr(sc, v->vnum, ENVVAL, 0x8000); 600 601 emu_wrptr(sc, v->vnum, ATKHLDV, 602 ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK); 603 emu_wrptr(sc, v->vnum, ENVVOL, 0x8000); 604 605 emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f); 606 emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0); 607 608 if (v->slave != NULL) 609 emu_vwrite(sc, v->slave); 610 } 611 612 static void 613 emu_vtrigger(struct sc_info *sc, struct emu_voice *v, int go) 614 { 615 u_int32_t pitch_target, initial_pitch; 616 u_int32_t cra, cs, ccis; 617 u_int32_t sample, i; 618 619 if (go) { 620 cra = 64; 621 cs = v->stereo ? 4 : 2; 622 ccis = v->stereo ? 28 : 30; 623 ccis *= v->b16 ? 1 : 2; 624 sample = v->b16 ? 0x00000000 : 0x80808080; 625 626 for (i = 0; i < cs; i++) 627 emu_wrptr(sc, v->vnum, CD0 + i, sample); 628 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0); 629 emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra); 630 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis); 631 632 emu_wrptr(sc, v->vnum, IFATN, 0xff00); 633 emu_wrptr(sc, v->vnum, VTFT, 0xffffffff); 634 emu_wrptr(sc, v->vnum, CVCF, 0xffffffff); 635 emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f); 636 emu_enastop(sc, v->vnum, 0); 637 638 pitch_target = emu_rate_to_linearpitch(v->speed); 639 initial_pitch = emu_rate_to_pitch(v->speed) >> 8; 640 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target); 641 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target); 642 emu_wrptr(sc, v->vnum, IP, initial_pitch); 643 } else { 644 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0); 645 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0); 646 emu_wrptr(sc, v->vnum, IFATN, 0xffff); 647 emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff); 648 emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff); 649 emu_wrptr(sc, v->vnum, IP, 0); 650 emu_enastop(sc, v->vnum, 1); 651 } 652 if (v->slave != NULL) 653 emu_vtrigger(sc, v->slave, go); 654 } 655 656 static int 657 emu_vpos(struct sc_info *sc, struct emu_voice *v) 658 { 659 int s, ptr; 660 661 s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0); 662 ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s; 663 return ptr & ~0x0000001f; 664 } 665 666 #ifdef EMUDEBUG 667 static void 668 emu_vdump(struct sc_info *sc, struct emu_voice *v) 669 { 670 char *regname[] = { 671 "cpf", "ptrx", "cvcf", "vtft", "z2", "z1", "psst", "dsl", 672 "ccca", "ccr", "clp", "fxrt", "mapa", "mapb", NULL, NULL, 673 "envvol", "atkhldv", "dcysusv", "lfoval1", 674 "envval", "atkhldm", "dcysusm", "lfoval2", 675 "ip", "ifatn", "pefe", "fmmod", "tremfrq", "fmfrq2", 676 "tempenv" 677 }; 678 char *regname2[] = { 679 "mudata1", "mustat1", "mudata2", "mustat2", 680 "fxwc1", "fxwc2", "spdrate", NULL, NULL, 681 NULL, NULL, NULL, "fxrt2", "sndamnt", "fxrt1", 682 NULL, NULL 683 }; 684 int i, x; 685 686 kprintf("voice number %d\n", v->vnum); 687 for (i = 0, x = 0; i <= 0x1e; i++) { 688 if (regname[i] == NULL) 689 continue; 690 kprintf("%s\t[%08x]", regname[i], emu_rdptr(sc, v->vnum, i)); 691 kprintf("%s", (x == 2) ? "\n" : "\t"); 692 x++; 693 if (x > 2) 694 x = 0; 695 } 696 697 /* Print out audigy extra registers */ 698 if (sc->audigy) { 699 for (i = 0; i <= 0xe; i++) { 700 if (regname2[i] == NULL) 701 continue; 702 kprintf("%s\t[%08x]", regname2[i], 703 emu_rdptr(sc, v->vnum, i + 0x70)); 704 kprintf("%s", (x == 2)? "\n" : "\t"); 705 x++; 706 if (x > 2) 707 x = 0; 708 } 709 } 710 kprintf("\n\n"); 711 } 712 #endif 713 714 /* channel interface */ 715 static void * 716 emupchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, 717 struct pcm_channel *c, int dir) 718 { 719 struct sc_info *sc = devinfo; 720 struct sc_pchinfo *ch; 721 void *r; 722 723 KASSERT(dir == PCMDIR_PLAY, ("emupchan_init: bad direction")); 724 ch = &sc->pch[sc->pnum++]; 725 ch->buffer = b; 726 ch->parent = sc; 727 ch->channel = c; 728 ch->blksz = sc->bufsz / 2; 729 ch->fmt = AFMT_U8; 730 ch->spd = 8000; 731 snd_mtxlock(sc->lock); 732 ch->master = emu_valloc(sc); 733 ch->slave = emu_valloc(sc); 734 snd_mtxunlock(sc->lock); 735 r = (emu_vinit(sc, ch->master, ch->slave, sc->bufsz, ch->buffer)) 736 ? NULL : ch; 737 738 return r; 739 } 740 741 static int 742 emupchan_free(kobj_t obj, void *data) 743 { 744 struct sc_pchinfo *ch = data; 745 struct sc_info *sc = ch->parent; 746 int r; 747 748 snd_mtxlock(sc->lock); 749 r = emu_memfree(sc, sndbuf_getbuf(ch->buffer)); 750 snd_mtxunlock(sc->lock); 751 752 return r; 753 } 754 755 static int 756 emupchan_setformat(kobj_t obj, void *data, u_int32_t format) 757 { 758 struct sc_pchinfo *ch = data; 759 760 ch->fmt = format; 761 return 0; 762 } 763 764 static int 765 emupchan_setspeed(kobj_t obj, void *data, u_int32_t speed) 766 { 767 struct sc_pchinfo *ch = data; 768 769 ch->spd = speed; 770 return ch->spd; 771 } 772 773 static int 774 emupchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 775 { 776 struct sc_pchinfo *ch = data; 777 struct sc_info *sc = ch->parent; 778 779 ch->blksz = blocksize; 780 snd_mtxlock(sc->lock); 781 emu_settimer(sc); 782 snd_mtxunlock(sc->lock); 783 return blocksize; 784 } 785 786 static int 787 emupchan_trigger(kobj_t obj, void *data, int go) 788 { 789 struct sc_pchinfo *ch = data; 790 struct sc_info *sc = ch->parent; 791 792 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 793 return 0; 794 795 snd_mtxlock(sc->lock); 796 if (go == PCMTRIG_START) { 797 emu_vsetup(ch); 798 emu_vwrite(sc, ch->master); 799 emu_settimer(sc); 800 emu_enatimer(sc, 1); 801 #ifdef EMUDEBUG 802 kprintf("start [%d bit, %s, %d hz]\n", 803 ch->master->b16 ? 16 : 8, 804 ch->master->stereo ? "stereo" : "mono", 805 ch->master->speed); 806 emu_vdump(sc, ch->master); 807 emu_vdump(sc, ch->slave); 808 #endif 809 } 810 ch->run = (go == PCMTRIG_START) ? 1 : 0; 811 emu_vtrigger(sc, ch->master, ch->run); 812 snd_mtxunlock(sc->lock); 813 return 0; 814 } 815 816 static int 817 emupchan_getptr(kobj_t obj, void *data) 818 { 819 struct sc_pchinfo *ch = data; 820 struct sc_info *sc = ch->parent; 821 int r; 822 823 snd_mtxlock(sc->lock); 824 r = emu_vpos(sc, ch->master); 825 snd_mtxunlock(sc->lock); 826 827 return r; 828 } 829 830 static struct pcmchan_caps * 831 emupchan_getcaps(kobj_t obj, void *data) 832 { 833 return &emu_playcaps; 834 } 835 836 static kobj_method_t emupchan_methods[] = { 837 KOBJMETHOD(channel_init, emupchan_init), 838 KOBJMETHOD(channel_free, emupchan_free), 839 KOBJMETHOD(channel_setformat, emupchan_setformat), 840 KOBJMETHOD(channel_setspeed, emupchan_setspeed), 841 KOBJMETHOD(channel_setblocksize, emupchan_setblocksize), 842 KOBJMETHOD(channel_trigger, emupchan_trigger), 843 KOBJMETHOD(channel_getptr, emupchan_getptr), 844 KOBJMETHOD(channel_getcaps, emupchan_getcaps), 845 KOBJMETHOD_END 846 }; 847 CHANNEL_DECLARE(emupchan); 848 849 /* channel interface */ 850 static void * 851 emurchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, 852 struct pcm_channel *c, int dir) 853 { 854 struct sc_info *sc = devinfo; 855 struct sc_rchinfo *ch; 856 857 KASSERT(dir == PCMDIR_REC, ("emurchan_init: bad direction")); 858 ch = &sc->rch[sc->rnum]; 859 ch->buffer = b; 860 ch->parent = sc; 861 ch->channel = c; 862 ch->blksz = sc->bufsz / 2; 863 ch->fmt = AFMT_U8; 864 ch->spd = 8000; 865 ch->num = sc->rnum; 866 switch(sc->rnum) { 867 case 0: 868 ch->idxreg = sc->audigy ? A_ADCIDX : ADCIDX; 869 ch->basereg = ADCBA; 870 ch->sizereg = ADCBS; 871 ch->setupreg = ADCCR; 872 ch->irqmask = INTE_ADCBUFENABLE; 873 break; 874 875 case 1: 876 ch->idxreg = FXIDX; 877 ch->basereg = FXBA; 878 ch->sizereg = FXBS; 879 ch->setupreg = FXWC; 880 ch->irqmask = INTE_EFXBUFENABLE; 881 break; 882 883 case 2: 884 ch->idxreg = MICIDX; 885 ch->basereg = MICBA; 886 ch->sizereg = MICBS; 887 ch->setupreg = 0; 888 ch->irqmask = INTE_MICBUFENABLE; 889 break; 890 } 891 sc->rnum++; 892 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, sc->bufsz) != 0) 893 return NULL; 894 else { 895 snd_mtxlock(sc->lock); 896 emu_wrptr(sc, 0, ch->basereg, sndbuf_getbufaddr(ch->buffer)); 897 emu_wrptr(sc, 0, ch->sizereg, 0); /* off */ 898 snd_mtxunlock(sc->lock); 899 return ch; 900 } 901 } 902 903 static int 904 emurchan_setformat(kobj_t obj, void *data, u_int32_t format) 905 { 906 struct sc_rchinfo *ch = data; 907 908 ch->fmt = format; 909 return 0; 910 } 911 912 static int 913 emurchan_setspeed(kobj_t obj, void *data, u_int32_t speed) 914 { 915 struct sc_rchinfo *ch = data; 916 917 if (ch->num == 0) { 918 if (ch->parent->audigy) 919 speed = audigy_adcspeed[audigy_recval(speed)]; 920 else 921 speed = adcspeed[emu_recval(speed)]; 922 } 923 if (ch->num == 1) 924 speed = 48000; 925 if (ch->num == 2) 926 speed = 8000; 927 ch->spd = speed; 928 return ch->spd; 929 } 930 931 static int 932 emurchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 933 { 934 struct sc_rchinfo *ch = data; 935 struct sc_info *sc = ch->parent; 936 937 ch->blksz = blocksize; 938 snd_mtxlock(sc->lock); 939 emu_settimer(sc); 940 snd_mtxunlock(sc->lock); 941 return blocksize; 942 } 943 944 /* semantic note: must start at beginning of buffer */ 945 static int 946 emurchan_trigger(kobj_t obj, void *data, int go) 947 { 948 struct sc_rchinfo *ch = data; 949 struct sc_info *sc = ch->parent; 950 u_int32_t val, sz; 951 952 switch(sc->bufsz) { 953 case 4096: 954 sz = ADCBS_BUFSIZE_4096; 955 break; 956 957 case 8192: 958 sz = ADCBS_BUFSIZE_8192; 959 break; 960 961 case 16384: 962 sz = ADCBS_BUFSIZE_16384; 963 break; 964 965 case 32768: 966 sz = ADCBS_BUFSIZE_32768; 967 break; 968 969 case 65536: 970 sz = ADCBS_BUFSIZE_65536; 971 break; 972 973 default: 974 sz = ADCBS_BUFSIZE_4096; 975 } 976 977 snd_mtxlock(sc->lock); 978 switch(go) { 979 case PCMTRIG_START: 980 ch->run = 1; 981 emu_wrptr(sc, 0, ch->sizereg, sz); 982 if (ch->num == 0) { 983 if (sc->audigy) { 984 val = A_ADCCR_LCHANENABLE; 985 if (ch->fmt & AFMT_STEREO) 986 val |= A_ADCCR_RCHANENABLE; 987 val |= audigy_recval(ch->spd); 988 } else { 989 val = ADCCR_LCHANENABLE; 990 if (ch->fmt & AFMT_STEREO) 991 val |= ADCCR_RCHANENABLE; 992 val |= emu_recval(ch->spd); 993 } 994 995 emu_wrptr(sc, 0, ch->setupreg, 0); 996 emu_wrptr(sc, 0, ch->setupreg, val); 997 } 998 val = emu_rd(sc, INTE, 4); 999 val |= ch->irqmask; 1000 emu_wr(sc, INTE, val, 4); 1001 break; 1002 1003 case PCMTRIG_STOP: 1004 case PCMTRIG_ABORT: 1005 ch->run = 0; 1006 emu_wrptr(sc, 0, ch->sizereg, 0); 1007 if (ch->setupreg) 1008 emu_wrptr(sc, 0, ch->setupreg, 0); 1009 val = emu_rd(sc, INTE, 4); 1010 val &= ~ch->irqmask; 1011 emu_wr(sc, INTE, val, 4); 1012 break; 1013 1014 case PCMTRIG_EMLDMAWR: 1015 case PCMTRIG_EMLDMARD: 1016 default: 1017 break; 1018 } 1019 snd_mtxunlock(sc->lock); 1020 1021 return 0; 1022 } 1023 1024 static int 1025 emurchan_getptr(kobj_t obj, void *data) 1026 { 1027 struct sc_rchinfo *ch = data; 1028 struct sc_info *sc = ch->parent; 1029 int r; 1030 1031 snd_mtxlock(sc->lock); 1032 r = emu_rdptr(sc, 0, ch->idxreg) & 0x0000ffff; 1033 snd_mtxunlock(sc->lock); 1034 1035 return r; 1036 } 1037 1038 static struct pcmchan_caps * 1039 emurchan_getcaps(kobj_t obj, void *data) 1040 { 1041 struct sc_rchinfo *ch = data; 1042 1043 return &emu_reccaps[ch->num]; 1044 } 1045 1046 static kobj_method_t emurchan_methods[] = { 1047 KOBJMETHOD(channel_init, emurchan_init), 1048 KOBJMETHOD(channel_setformat, emurchan_setformat), 1049 KOBJMETHOD(channel_setspeed, emurchan_setspeed), 1050 KOBJMETHOD(channel_setblocksize, emurchan_setblocksize), 1051 KOBJMETHOD(channel_trigger, emurchan_trigger), 1052 KOBJMETHOD(channel_getptr, emurchan_getptr), 1053 KOBJMETHOD(channel_getcaps, emurchan_getcaps), 1054 KOBJMETHOD_END 1055 }; 1056 CHANNEL_DECLARE(emurchan); 1057 1058 /* -------------------------------------------------------------------- */ 1059 /* The interrupt handler */ 1060 static void 1061 emu_intr(void *data) 1062 { 1063 struct sc_info *sc = data; 1064 u_int32_t stat, ack, i, x; 1065 1066 snd_mtxlock(sc->lock); 1067 while (1) { 1068 stat = emu_rd(sc, IPR, 4); 1069 if (stat == 0) 1070 break; 1071 ack = 0; 1072 1073 /* process irq */ 1074 if (stat & IPR_INTERVALTIMER) 1075 ack |= IPR_INTERVALTIMER; 1076 1077 if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) 1078 ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL); 1079 1080 if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) 1081 ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL); 1082 1083 if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) 1084 ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL); 1085 1086 if (stat & IPR_PCIERROR) { 1087 ack |= IPR_PCIERROR; 1088 device_printf(sc->dev, "pci error\n"); 1089 /* we still get an nmi with ecc ram even if we ack this */ 1090 } 1091 if (stat & IPR_SAMPLERATETRACKER) { 1092 ack |= IPR_SAMPLERATETRACKER; 1093 #ifdef EMUDEBUG 1094 device_printf(sc->dev, 1095 "sample rate tracker lock status change\n"); 1096 #endif 1097 } 1098 1099 if (stat & ~ack) 1100 device_printf(sc->dev, "dodgy irq: %x (harmless)\n", 1101 stat & ~ack); 1102 1103 emu_wr(sc, IPR, stat, 4); 1104 1105 if (ack) { 1106 snd_mtxunlock(sc->lock); 1107 1108 if (ack & IPR_INTERVALTIMER) { 1109 x = 0; 1110 for (i = 0; i < sc->nchans; i++) { 1111 if (sc->pch[i].run) { 1112 x = 1; 1113 chn_intr(sc->pch[i].channel); 1114 } 1115 } 1116 if (x == 0) 1117 emu_enatimer(sc, 0); 1118 } 1119 1120 1121 if (ack & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) { 1122 if (sc->rch[0].channel) 1123 chn_intr(sc->rch[0].channel); 1124 } 1125 if (ack & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) { 1126 if (sc->rch[1].channel) 1127 chn_intr(sc->rch[1].channel); 1128 } 1129 if (ack & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) { 1130 if (sc->rch[2].channel) 1131 chn_intr(sc->rch[2].channel); 1132 } 1133 1134 snd_mtxlock(sc->lock); 1135 } 1136 } 1137 snd_mtxunlock(sc->lock); 1138 } 1139 1140 /* -------------------------------------------------------------------- */ 1141 1142 static void 1143 emu_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) 1144 { 1145 bus_addr_t *phys = arg; 1146 1147 *phys = error ? 0 : (bus_addr_t)segs->ds_addr; 1148 1149 if (bootverbose) { 1150 kprintf("emu: setmap (%lx, %lx), nseg=%d, error=%d\n", 1151 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len, 1152 nseg, error); 1153 } 1154 } 1155 1156 static void * 1157 emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr) 1158 { 1159 void *buf; 1160 bus_dmamap_t map; 1161 1162 *addr = 0; 1163 if (bus_dmamem_alloc(sc->parent_dmat, &buf, BUS_DMA_NOWAIT, &map)) 1164 return NULL; 1165 if (bus_dmamap_load(sc->parent_dmat, map, buf, sz, emu_setmap, addr, 0) 1166 || !*addr) 1167 return NULL; 1168 return buf; 1169 } 1170 1171 static void 1172 emu_free(struct sc_info *sc, void *buf) 1173 { 1174 bus_dmamem_free(sc->parent_dmat, buf, NULL); 1175 } 1176 1177 static void * 1178 emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr) 1179 { 1180 u_int32_t blksz, start, idx, ofs, tmp, found; 1181 struct emu_mem *mem = &sc->mem; 1182 struct emu_memblk *blk; 1183 void *buf; 1184 1185 blksz = sz / EMUPAGESIZE; 1186 if (sz > (blksz * EMUPAGESIZE)) 1187 blksz++; 1188 /* find a kfree block in the bitmap */ 1189 found = 0; 1190 start = 1; 1191 while (!found && start + blksz < EMUMAXPAGES) { 1192 found = 1; 1193 for (idx = start; idx < start + blksz; idx++) 1194 if (mem->bmap[idx >> 3] & (1 << (idx & 7))) 1195 found = 0; 1196 if (!found) 1197 start++; 1198 } 1199 if (!found) 1200 return NULL; 1201 blk = kmalloc(sizeof(*blk), M_DEVBUF, M_WAITOK); 1202 buf = emu_malloc(sc, sz, &blk->buf_addr); 1203 *addr = blk->buf_addr; 1204 if (buf == NULL) { 1205 kfree(blk, M_DEVBUF); 1206 return NULL; 1207 } 1208 blk->buf = buf; 1209 blk->pte_start = start; 1210 blk->pte_size = blksz; 1211 #ifdef EMUDEBUG 1212 kprintf("buf %p, pte_start %d, pte_size %d\n", blk->buf, 1213 blk->pte_start, blk->pte_size); 1214 #endif 1215 ofs = 0; 1216 for (idx = start; idx < start + blksz; idx++) { 1217 mem->bmap[idx >> 3] |= 1 << (idx & 7); 1218 tmp = (u_int32_t)(u_long)((u_int8_t *)blk->buf_addr + ofs); 1219 #ifdef EMUDEBUG 1220 kprintf("pte[%d] -> %x phys, %x virt\n", idx, tmp, 1221 ((u_int32_t)buf) + ofs); 1222 #endif 1223 mem->ptb_pages[idx] = (tmp << 1) | idx; 1224 ofs += EMUPAGESIZE; 1225 } 1226 SLIST_INSERT_HEAD(&mem->blocks, blk, link); 1227 return buf; 1228 } 1229 1230 static int 1231 emu_memfree(struct sc_info *sc, void *buf) 1232 { 1233 u_int32_t idx, tmp; 1234 struct emu_mem *mem = &sc->mem; 1235 struct emu_memblk *blk, *i; 1236 1237 blk = NULL; 1238 SLIST_FOREACH(i, &mem->blocks, link) { 1239 if (i->buf == buf) 1240 blk = i; 1241 } 1242 if (blk == NULL) 1243 return EINVAL; 1244 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link); 1245 emu_free(sc, buf); 1246 tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1; 1247 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) { 1248 mem->bmap[idx >> 3] &= ~(1 << (idx & 7)); 1249 mem->ptb_pages[idx] = tmp | idx; 1250 } 1251 kfree(blk, M_DEVBUF); 1252 return 0; 1253 } 1254 1255 static int 1256 emu_memstart(struct sc_info *sc, void *buf) 1257 { 1258 struct emu_mem *mem = &sc->mem; 1259 struct emu_memblk *blk, *i; 1260 1261 blk = NULL; 1262 SLIST_FOREACH(i, &mem->blocks, link) { 1263 if (i->buf == buf) 1264 blk = i; 1265 } 1266 if (blk == NULL) 1267 return -EINVAL; 1268 return blk->pte_start; 1269 } 1270 1271 static void 1272 emu_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y, 1273 u_int32_t *pc) 1274 { 1275 emu_wrefx(sc, (*pc) * 2, (x << 10) | y); 1276 emu_wrefx(sc, (*pc) * 2 + 1, (op << 20) | (z << 10) | w); 1277 (*pc)++; 1278 } 1279 1280 static void 1281 audigy_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y, 1282 u_int32_t *pc) 1283 { 1284 emu_wrefx(sc, (*pc) * 2, (x << 12) | y); 1285 emu_wrefx(sc, (*pc) * 2 + 1, (op << 24) | (z << 12) | w); 1286 (*pc)++; 1287 } 1288 1289 static void 1290 audigy_initefx(struct sc_info *sc) 1291 { 1292 int i; 1293 u_int32_t pc = 0; 1294 1295 /* skip 0, 0, -1, 0 - NOPs */ 1296 for (i = 0; i < 512; i++) 1297 audigy_addefxop(sc, 0x0f, 0x0c0, 0x0c0, 0x0cf, 0x0c0, &pc); 1298 1299 for (i = 0; i < 512; i++) 1300 emu_wrptr(sc, 0, A_FXGPREGBASE + i, 0x0); 1301 1302 pc = 16; 1303 1304 /* stop fx processor */ 1305 emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP); 1306 1307 /* Audigy 2 (EMU10K2) DSP Registers: 1308 FX Bus 1309 0x000-0x00f : 16 registers (???) 1310 Input 1311 0x040/0x041 : AC97 Codec (l/r) 1312 0x042/0x043 : ADC, S/PDIF (l/r) 1313 0x044/0x045 : Optical S/PDIF in (l/r) 1314 0x046/0x047 : ??? 1315 0x048/0x049 : Line/Mic 2 (l/r) 1316 0x04a/0x04b : RCA S/PDIF (l/r) 1317 0x04c/0x04d : Aux 2 (l/r) 1318 Output 1319 0x060/0x061 : Digital Front (l/r) 1320 0x062/0x063 : Digital Center/LFE 1321 0x064/0x065 : AudigyDrive Heaphone (l/r) 1322 0x066/0x067 : Digital Rear (l/r) 1323 0x068/0x069 : Analog Front (l/r) 1324 0x06a/0x06b : Analog Center/LFE 1325 0x06c/0x06d : ??? 1326 0x06e/0x06f : Analog Rear (l/r) 1327 0x070/0x071 : AC97 Output (l/r) 1328 0x072/0x073 : ??? 1329 0x074/0x075 : ??? 1330 0x076/0x077 : ADC Recording Buffer (l/r) 1331 Constants 1332 0x0c0 - 0x0c4 = 0 - 4 1333 0x0c5 = 0x8, 0x0c6 = 0x10, 0x0c7 = 0x20 1334 0x0c8 = 0x100, 0x0c9 = 0x10000, 0x0ca = 0x80000 1335 0x0cb = 0x10000000, 0x0cc = 0x20000000, 0x0cd = 0x40000000 1336 0x0ce = 0x80000000, 0x0cf = 0x7fffffff, 0x0d0 = 0xffffffff 1337 0x0d1 = 0xfffffffe, 0x0d2 = 0xc0000000, 0x0d3 = 0x41fbbcdc 1338 0x0d4 = 0x5a7ef9db, 0x0d5 = 0x00100000, 0x0dc = 0x00000001 (???) 1339 Temporary Values 1340 0x0d6 : Accumulator (???) 1341 0x0d7 : Condition Register 1342 0x0d8 : Noise source 1343 0x0d9 : Noise source 1344 Tank Memory Data Registers 1345 0x200 - 0x2ff 1346 Tank Memory Address Registers 1347 0x300 - 0x3ff 1348 General Purpose Registers 1349 0x400 - 0x5ff 1350 */ 1351 1352 /* AC97Output[l/r] = FXBus PCM[l/r] */ 1353 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_L), A_C_00000000, 1354 A_C_00000000, A_FXBUS(FXBUS_PCM_LEFT), &pc); 1355 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_R), A_C_00000000, 1356 A_C_00000000, A_FXBUS(FXBUS_PCM_RIGHT), &pc); 1357 1358 /* GPR[0/1] = RCA S/PDIF[l/r] -- Master volume */ 1359 audigy_addefxop(sc, iACC3, A_GPR(0), A_C_00000000, 1360 A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_L), &pc); 1361 audigy_addefxop(sc, iACC3, A_GPR(1), A_C_00000000, 1362 A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_R), &pc); 1363 1364 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */ 1365 audigy_addefxop(sc, iINTERP, A_GPR(2), A_GPR(1), 1366 A_C_40000000, A_GPR(0), &pc); 1367 1368 /* Headphones[l/r] = GPR[0/1] */ 1369 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_L), 1370 A_C_00000000, A_C_00000000, A_GPR(0), &pc); 1371 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_R), 1372 A_C_00000000, A_C_00000000, A_GPR(1), &pc); 1373 1374 /* Analog Front[l/r] = GPR[0/1] */ 1375 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_L), A_C_00000000, 1376 A_C_00000000, A_GPR(0), &pc); 1377 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_R), A_C_00000000, 1378 A_C_00000000, A_GPR(1), &pc); 1379 1380 /* Digital Front[l/r] = GPR[0/1] */ 1381 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L), A_C_00000000, 1382 A_C_00000000, A_GPR(0), &pc); 1383 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_R), A_C_00000000, 1384 A_C_00000000, A_GPR(1), &pc); 1385 1386 /* Center and Subwoofer configuration */ 1387 /* Analog Center = GPR[0] + GPR[2] */ 1388 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ACENTER), A_C_00000000, 1389 A_GPR(0), A_GPR(2), &pc); 1390 /* Analog Sub = GPR[1] + GPR[2] */ 1391 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ALFE), A_C_00000000, 1392 A_GPR(1), A_GPR(2), &pc); 1393 1394 /* Digital Center = GPR[0] + GPR[2] */ 1395 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_CENTER), A_C_00000000, 1396 A_GPR(0), A_GPR(2), &pc); 1397 /* Digital Sub = GPR[1] + GPR[2] */ 1398 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_LFE), A_C_00000000, 1399 A_GPR(1), A_GPR(2), &pc); 1400 1401 #if 0 1402 /* Analog Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */ 1403 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */ 1404 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000, 1405 A_GPR(16), A_GPR(0), &pc); 1406 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000, 1407 A_GPR(17), A_GPR(1), &pc); 1408 1409 /* Digital Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */ 1410 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */ 1411 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000, 1412 A_GPR(16), A_GPR(0), &pc); 1413 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000, 1414 A_GPR(17), A_GPR(1), &pc); 1415 #else 1416 /* XXX This is just a copy to the channel, since we do not have 1417 * a patch manager, it is useful for have another output enabled. 1418 */ 1419 1420 /* Analog Rear[l/r] = GPR[0/1] */ 1421 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000, 1422 A_C_00000000, A_GPR(0), &pc); 1423 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000, 1424 A_C_00000000, A_GPR(1), &pc); 1425 1426 /* Digital Rear[l/r] = GPR[0/1] */ 1427 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000, 1428 A_C_00000000, A_GPR(0), &pc); 1429 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000, 1430 A_C_00000000, A_GPR(1), &pc); 1431 #endif 1432 1433 /* ADC Recording buffer[l/r] = AC97Input[l/r] */ 1434 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_L), A_C_00000000, 1435 A_C_00000000, A_EXTIN(A_EXTIN_AC97_L), &pc); 1436 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_R), A_C_00000000, 1437 A_C_00000000, A_EXTIN(A_EXTIN_AC97_R), &pc); 1438 1439 /* resume normal operations */ 1440 emu_wrptr(sc, 0, A_DBG, 0); 1441 } 1442 1443 static void 1444 emu_initefx(struct sc_info *sc) 1445 { 1446 int i; 1447 u_int32_t pc = 16; 1448 1449 /* acc3 0,0,0,0 - NOPs */ 1450 for (i = 0; i < 512; i++) { 1451 emu_wrefx(sc, i * 2, 0x10040); 1452 emu_wrefx(sc, i * 2 + 1, 0x610040); 1453 } 1454 1455 for (i = 0; i < 256; i++) 1456 emu_wrptr(sc, 0, FXGPREGBASE + i, 0); 1457 1458 /* FX-8010 DSP Registers: 1459 FX Bus 1460 0x000-0x00f : 16 registers 1461 Input 1462 0x010/0x011 : AC97 Codec (l/r) 1463 0x012/0x013 : ADC, S/PDIF (l/r) 1464 0x014/0x015 : Mic(left), Zoom (l/r) 1465 0x016/0x017 : TOS link in (l/r) 1466 0x018/0x019 : Line/Mic 1 (l/r) 1467 0x01a/0x01b : COAX S/PDIF (l/r) 1468 0x01c/0x01d : Line/Mic 2 (l/r) 1469 Output 1470 0x020/0x021 : AC97 Output (l/r) 1471 0x022/0x023 : TOS link out (l/r) 1472 0x024/0x025 : Center/LFE 1473 0x026/0x027 : LiveDrive Headphone (l/r) 1474 0x028/0x029 : Rear Channel (l/r) 1475 0x02a/0x02b : ADC Recording Buffer (l/r) 1476 0x02c : Mic Recording Buffer 1477 0x031/0x032 : Analog Center/LFE 1478 Constants 1479 0x040 - 0x044 = 0 - 4 1480 0x045 = 0x8, 0x046 = 0x10, 0x047 = 0x20 1481 0x048 = 0x100, 0x049 = 0x10000, 0x04a = 0x80000 1482 0x04b = 0x10000000, 0x04c = 0x20000000, 0x04d = 0x40000000 1483 0x04e = 0x80000000, 0x04f = 0x7fffffff, 0x050 = 0xffffffff 1484 0x051 = 0xfffffffe, 0x052 = 0xc0000000, 0x053 = 0x41fbbcdc 1485 0x054 = 0x5a7ef9db, 0x055 = 0x00100000 1486 Temporary Values 1487 0x056 : Accumulator 1488 0x057 : Condition Register 1489 0x058 : Noise source 1490 0x059 : Noise source 1491 0x05a : IRQ Register 1492 0x05b : TRAM Delay Base Address Count 1493 General Purpose Registers 1494 0x100 - 0x1ff 1495 Tank Memory Data Registers 1496 0x200 - 0x2ff 1497 Tank Memory Address Registers 1498 0x300 - 0x3ff 1499 */ 1500 1501 /* Routing - this will be configurable in later version */ 1502 1503 /* GPR[0/1] = FX * 4 + SPDIF-in */ 1504 emu_addefxop(sc, iMACINT0, GPR(0), EXTIN(EXTIN_SPDIF_CD_L), 1505 FXBUS(FXBUS_PCM_LEFT), C_00000004, &pc); 1506 emu_addefxop(sc, iMACINT0, GPR(1), EXTIN(EXTIN_SPDIF_CD_R), 1507 FXBUS(FXBUS_PCM_RIGHT), C_00000004, &pc); 1508 1509 /* GPR[0/1] += APS-input */ 1510 emu_addefxop(sc, iACC3, GPR(0), GPR(0), C_00000000, 1511 sc->APS ? EXTIN(EXTIN_TOSLINK_L) : C_00000000, &pc); 1512 emu_addefxop(sc, iACC3, GPR(1), GPR(1), C_00000000, 1513 sc->APS ? EXTIN(EXTIN_TOSLINK_R) : C_00000000, &pc); 1514 1515 /* FrontOut (AC97) = GPR[0/1] */ 1516 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_L), C_00000000, 1517 C_00000000, GPR(0), &pc); 1518 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_R), C_00000000, 1519 C_00000001, GPR(1), &pc); 1520 1521 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */ 1522 emu_addefxop(sc, iINTERP, GPR(2), GPR(1), C_40000000, GPR(0), &pc); 1523 1524 #if 0 1525 /* RearOut = (GPR[0/1] * RearVolume) >> 31 */ 1526 /* RearVolume = GPR[0x10/0x11] */ 1527 emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_L), C_00000000, 1528 GPR(16), GPR(0), &pc); 1529 emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_R), C_00000000, 1530 GPR(17), GPR(1), &pc); 1531 #else 1532 /* XXX This is just a copy to the channel, since we do not have 1533 * a patch manager, it is useful for have another output enabled. 1534 */ 1535 1536 /* Rear[l/r] = GPR[0/1] */ 1537 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_L), C_00000000, 1538 C_00000000, GPR(0), &pc); 1539 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_R), C_00000000, 1540 C_00000000, GPR(1), &pc); 1541 #endif 1542 1543 /* TOS out[l/r] = GPR[0/1] */ 1544 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_L), C_00000000, 1545 C_00000000, GPR(0), &pc); 1546 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_R), C_00000000, 1547 C_00000000, GPR(1), &pc); 1548 1549 /* Center and Subwoofer configuration */ 1550 /* Analog Center = GPR[0] + GPR[2] */ 1551 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ACENTER), C_00000000, 1552 GPR(0), GPR(2), &pc); 1553 /* Analog Sub = GPR[1] + GPR[2] */ 1554 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ALFE), C_00000000, 1555 GPR(1), GPR(2), &pc); 1556 /* Digital Center = GPR[0] + GPR[2] */ 1557 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_CENTER), C_00000000, 1558 GPR(0), GPR(2), &pc); 1559 /* Digital Sub = GPR[1] + GPR[2] */ 1560 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_LFE), C_00000000, 1561 GPR(1), GPR(2), &pc); 1562 1563 /* Headphones[l/r] = GPR[0/1] */ 1564 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_L), C_00000000, 1565 C_00000000, GPR(0), &pc); 1566 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_R), C_00000000, 1567 C_00000000, GPR(1), &pc); 1568 1569 /* ADC Recording buffer[l/r] = AC97Input[l/r] */ 1570 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_L), C_00000000, 1571 C_00000000, EXTIN(EXTIN_AC97_L), &pc); 1572 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_R), C_00000000, 1573 C_00000000, EXTIN(EXTIN_AC97_R), &pc); 1574 1575 /* resume normal operations */ 1576 emu_wrptr(sc, 0, DBG, 0); 1577 } 1578 1579 /* Probe and attach the card */ 1580 static int 1581 emu_init(struct sc_info *sc) 1582 { 1583 u_int32_t spcs, ch, tmp, i; 1584 1585 if (sc->audigy) { 1586 /* enable additional AC97 slots */ 1587 emu_wrptr(sc, 0, AC97SLOT, AC97SLOT_CNTR | AC97SLOT_LFE); 1588 } 1589 1590 /* disable audio and lock cache */ 1591 emu_wr(sc, HCFG, 1592 HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 1593 4); 1594 1595 /* reset recording buffers */ 1596 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE); 1597 emu_wrptr(sc, 0, MICBA, 0); 1598 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE); 1599 emu_wrptr(sc, 0, FXBA, 0); 1600 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE); 1601 emu_wrptr(sc, 0, ADCBA, 0); 1602 1603 /* disable channel interrupt */ 1604 emu_wr(sc, INTE, 1605 INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE, 1606 4); 1607 emu_wrptr(sc, 0, CLIEL, 0); 1608 emu_wrptr(sc, 0, CLIEH, 0); 1609 emu_wrptr(sc, 0, SOLEL, 0); 1610 emu_wrptr(sc, 0, SOLEH, 0); 1611 1612 /* wonder what these do... */ 1613 if (sc->audigy) { 1614 emu_wrptr(sc, 0, SPBYPASS, 0xf00); 1615 emu_wrptr(sc, 0, AC97SLOT, 0x3); 1616 } 1617 1618 /* init envelope engine */ 1619 for (ch = 0; ch < NUM_G; ch++) { 1620 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF); 1621 emu_wrptr(sc, ch, IP, 0); 1622 emu_wrptr(sc, ch, VTFT, 0xffff); 1623 emu_wrptr(sc, ch, CVCF, 0xffff); 1624 emu_wrptr(sc, ch, PTRX, 0); 1625 emu_wrptr(sc, ch, CPF, 0); 1626 emu_wrptr(sc, ch, CCR, 0); 1627 1628 emu_wrptr(sc, ch, PSST, 0); 1629 emu_wrptr(sc, ch, DSL, 0x10); 1630 emu_wrptr(sc, ch, CCCA, 0); 1631 emu_wrptr(sc, ch, Z1, 0); 1632 emu_wrptr(sc, ch, Z2, 0); 1633 emu_wrptr(sc, ch, FXRT, 0xd01c0000); 1634 1635 emu_wrptr(sc, ch, ATKHLDM, 0); 1636 emu_wrptr(sc, ch, DCYSUSM, 0); 1637 emu_wrptr(sc, ch, IFATN, 0xffff); 1638 emu_wrptr(sc, ch, PEFE, 0); 1639 emu_wrptr(sc, ch, FMMOD, 0); 1640 emu_wrptr(sc, ch, TREMFRQ, 24); /* 1 Hz */ 1641 emu_wrptr(sc, ch, FM2FRQ2, 24); /* 1 Hz */ 1642 emu_wrptr(sc, ch, TEMPENV, 0); 1643 1644 /*** these are last so OFF prevents writing ***/ 1645 emu_wrptr(sc, ch, LFOVAL2, 0); 1646 emu_wrptr(sc, ch, LFOVAL1, 0); 1647 emu_wrptr(sc, ch, ATKHLDV, 0); 1648 emu_wrptr(sc, ch, ENVVOL, 0); 1649 emu_wrptr(sc, ch, ENVVAL, 0); 1650 1651 if (sc->audigy) { 1652 /* audigy cards need this to initialize correctly */ 1653 emu_wrptr(sc, ch, 0x4c, 0); 1654 emu_wrptr(sc, ch, 0x4d, 0); 1655 emu_wrptr(sc, ch, 0x4e, 0); 1656 emu_wrptr(sc, ch, 0x4f, 0); 1657 /* set default routing */ 1658 emu_wrptr(sc, ch, A_FXRT1, 0x03020100); 1659 emu_wrptr(sc, ch, A_FXRT2, 0x3f3f3f3f); 1660 emu_wrptr(sc, ch, A_SENDAMOUNTS, 0); 1661 } 1662 1663 sc->voice[ch].vnum = ch; 1664 sc->voice[ch].slave = NULL; 1665 sc->voice[ch].busy = 0; 1666 sc->voice[ch].ismaster = 0; 1667 sc->voice[ch].running = 0; 1668 sc->voice[ch].b16 = 0; 1669 sc->voice[ch].stereo = 0; 1670 sc->voice[ch].speed = 0; 1671 sc->voice[ch].start = 0; 1672 sc->voice[ch].end = 0; 1673 sc->voice[ch].channel = NULL; 1674 } 1675 sc->pnum = sc->rnum = 0; 1676 1677 /* 1678 * Init to 0x02109204 : 1679 * Clock accuracy = 0 (1000ppm) 1680 * Sample Rate = 2 (48kHz) 1681 * Audio Channel = 1 (Left of 2) 1682 * Source Number = 0 (Unspecified) 1683 * Generation Status = 1 (Original for Cat Code 12) 1684 * Cat Code = 12 (Digital Signal Mixer) 1685 * Mode = 0 (Mode 0) 1686 * Emphasis = 0 (None) 1687 * CP = 1 (Copyright unasserted) 1688 * AN = 0 (Audio data) 1689 * P = 0 (Consumer) 1690 */ 1691 spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1692 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1693 SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 | 1694 SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1695 emu_wrptr(sc, 0, SPCS0, spcs); 1696 emu_wrptr(sc, 0, SPCS1, spcs); 1697 emu_wrptr(sc, 0, SPCS2, spcs); 1698 1699 if (!sc->audigy) 1700 emu_initefx(sc); 1701 else if (sc->audigy2) { /* Audigy 2 */ 1702 /* from ALSA initialization code: */ 1703 1704 /* Hack for Alice3 to work independent of haP16V driver */ 1705 u_int32_t tmp; 1706 1707 /* Setup SRCMulti_I2S SamplingRate */ 1708 tmp = emu_rdptr(sc, 0, A_SPDIF_SAMPLERATE) & 0xfffff1ff; 1709 emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, tmp | 0x400); 1710 1711 /* Setup SRCSel (Enable SPDIF, I2S SRCMulti) */ 1712 emu_wr(sc, 0x20, 0x00600000, 4); 1713 emu_wr(sc, 0x24, 0x00000014, 4); 1714 1715 /* Setup SRCMulti Input Audio Enable */ 1716 emu_wr(sc, 0x20, 0x006e0000, 4); 1717 emu_wr(sc, 0x24, 0xff00ff00, 4); 1718 } 1719 1720 SLIST_INIT(&sc->mem.blocks); 1721 sc->mem.ptb_pages = emu_malloc(sc, EMUMAXPAGES * sizeof(u_int32_t), 1722 &sc->mem.ptb_pages_addr); 1723 if (sc->mem.ptb_pages == NULL) 1724 return -1; 1725 1726 sc->mem.silent_page = emu_malloc(sc, EMUPAGESIZE, 1727 &sc->mem.silent_page_addr); 1728 if (sc->mem.silent_page == NULL) { 1729 emu_free(sc, sc->mem.ptb_pages); 1730 return -1; 1731 } 1732 /* Clear page with silence & setup all pointers to this page */ 1733 bzero(sc->mem.silent_page, EMUPAGESIZE); 1734 tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1; 1735 for (i = 0; i < EMUMAXPAGES; i++) 1736 sc->mem.ptb_pages[i] = tmp | i; 1737 1738 emu_wrptr(sc, 0, PTB, (sc->mem.ptb_pages_addr)); 1739 emu_wrptr(sc, 0, TCB, 0); /* taken from original driver */ 1740 emu_wrptr(sc, 0, TCBS, 0); /* taken from original driver */ 1741 1742 for (ch = 0; ch < NUM_G; ch++) { 1743 emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK); 1744 emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK); 1745 } 1746 1747 /* emu_memalloc(sc, EMUPAGESIZE); */ 1748 /* 1749 * Hokay, now enable the AUD bit 1750 * 1751 * Audigy 1752 * Enable Audio = 0 (enabled after fx processor initialization) 1753 * Mute Disable Audio = 0 1754 * Joystick = 1 1755 * 1756 * Audigy 2 1757 * Enable Audio = 1 1758 * Mute Disable Audio = 0 1759 * Joystick = 1 1760 * GP S/PDIF AC3 Enable = 1 1761 * CD S/PDIF AC3 Enable = 1 1762 * 1763 * EMU10K1 1764 * Enable Audio = 1 1765 * Mute Disable Audio = 0 1766 * Lock Tank Memory = 1 1767 * Lock Sound Memory = 0 1768 * Auto Mute = 1 1769 */ 1770 1771 if (sc->audigy) { 1772 tmp = HCFG_AUTOMUTE | HCFG_JOYENABLE; 1773 if (sc->audigy2) /* Audigy 2 */ 1774 tmp = HCFG_AUDIOENABLE | HCFG_AC3ENABLE_CDSPDIF | 1775 HCFG_AC3ENABLE_GPSPDIF; 1776 emu_wr(sc, HCFG, tmp, 4); 1777 1778 audigy_initefx(sc); 1779 1780 /* from ALSA initialization code: */ 1781 1782 /* enable audio and disable both audio/digital outputs */ 1783 emu_wr(sc, HCFG, emu_rd(sc, HCFG, 4) | HCFG_AUDIOENABLE, 4); 1784 emu_wr(sc, A_IOCFG, emu_rd(sc, A_IOCFG, 4) & ~A_IOCFG_GPOUT_AD, 1785 4); 1786 if (sc->audigy2) { /* Audigy 2 */ 1787 /* Unmute Analog. 1788 * Set GPO6 to 1 for Apollo. This has to be done after 1789 * init Alice3 I2SOut beyond 48kHz. 1790 * So, sequence is important. 1791 */ 1792 emu_wr(sc, A_IOCFG, 1793 emu_rd(sc, A_IOCFG, 4) | A_IOCFG_GPOUT_A, 4); 1794 } 1795 } else { 1796 /* EMU10K1 initialization code */ 1797 tmp = HCFG_AUDIOENABLE | HCFG_LOCKTANKCACHE_MASK 1798 | HCFG_AUTOMUTE; 1799 if (sc->rev >= 6) 1800 tmp |= HCFG_JOYENABLE; 1801 1802 emu_wr(sc, HCFG, tmp, 4); 1803 1804 /* TOSLink detection */ 1805 sc->tos_link = 0; 1806 tmp = emu_rd(sc, HCFG, 4); 1807 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { 1808 emu_wr(sc, HCFG, tmp | HCFG_GPOUT1, 4); 1809 DELAY(50); 1810 if (tmp != (emu_rd(sc, HCFG, 4) & ~HCFG_GPOUT1)) { 1811 sc->tos_link = 1; 1812 emu_wr(sc, HCFG, tmp, 4); 1813 } 1814 } 1815 } 1816 1817 return 0; 1818 } 1819 1820 static int 1821 emu_uninit(struct sc_info *sc) 1822 { 1823 u_int32_t ch; 1824 1825 emu_wr(sc, INTE, 0, 4); 1826 for (ch = 0; ch < NUM_G; ch++) 1827 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF); 1828 for (ch = 0; ch < NUM_G; ch++) { 1829 emu_wrptr(sc, ch, VTFT, 0); 1830 emu_wrptr(sc, ch, CVCF, 0); 1831 emu_wrptr(sc, ch, PTRX, 0); 1832 emu_wrptr(sc, ch, CPF, 0); 1833 } 1834 1835 if (sc->audigy) { /* stop fx processor */ 1836 emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP); 1837 } 1838 1839 /* disable audio and lock cache */ 1840 emu_wr(sc, HCFG, 1841 HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 1842 4); 1843 1844 emu_wrptr(sc, 0, PTB, 0); 1845 /* reset recording buffers */ 1846 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE); 1847 emu_wrptr(sc, 0, MICBA, 0); 1848 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE); 1849 emu_wrptr(sc, 0, FXBA, 0); 1850 emu_wrptr(sc, 0, FXWC, 0); 1851 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE); 1852 emu_wrptr(sc, 0, ADCBA, 0); 1853 emu_wrptr(sc, 0, TCB, 0); 1854 emu_wrptr(sc, 0, TCBS, 0); 1855 1856 /* disable channel interrupt */ 1857 emu_wrptr(sc, 0, CLIEL, 0); 1858 emu_wrptr(sc, 0, CLIEH, 0); 1859 emu_wrptr(sc, 0, SOLEL, 0); 1860 emu_wrptr(sc, 0, SOLEH, 0); 1861 1862 /* init envelope engine */ 1863 if (!SLIST_EMPTY(&sc->mem.blocks)) 1864 device_printf(sc->dev, "warning: memblock list not empty\n"); 1865 emu_free(sc, sc->mem.ptb_pages); 1866 emu_free(sc, sc->mem.silent_page); 1867 1868 return 0; 1869 } 1870 1871 static int 1872 emu_pci_probe(device_t dev) 1873 { 1874 char *s = NULL; 1875 1876 switch (pci_get_devid(dev)) { 1877 case EMU10K1_PCI_ID: 1878 s = "Creative EMU10K1"; 1879 break; 1880 1881 case EMU10K2_PCI_ID: 1882 if (pci_get_revid(dev) == 0x04) 1883 s = "Creative Audigy 2 (EMU10K2)"; 1884 else 1885 s = "Creative Audigy (EMU10K2)"; 1886 break; 1887 1888 case EMU10K3_PCI_ID: 1889 s = "Creative Audigy 2 (EMU10K3)"; 1890 break; 1891 1892 default: 1893 return ENXIO; 1894 } 1895 1896 device_set_desc(dev, s); 1897 return BUS_PROBE_DEFAULT; 1898 } 1899 1900 static int 1901 emu_pci_attach(device_t dev) 1902 { 1903 struct ac97_info *codec = NULL; 1904 struct sc_info *sc; 1905 u_int32_t data; 1906 int i, gotmic; 1907 char status[SND_STATUSLEN]; 1908 1909 sc = kmalloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); 1910 1911 sc->lock = snd_mtxcreate(device_get_nameunit(dev), "sound softc"); 1912 sc->dev = dev; 1913 sc->type = pci_get_devid(dev); 1914 sc->rev = pci_get_revid(dev); 1915 sc->audigy = sc->type == EMU10K2_PCI_ID || sc->type == EMU10K3_PCI_ID; 1916 sc->audigy2 = (sc->audigy && sc->rev == 0x04); 1917 sc->nchans = sc->audigy ? 8 : 4; 1918 sc->addrmask = sc->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK; 1919 1920 data = pci_read_config(dev, PCIR_COMMAND, 2); 1921 data |= (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN); 1922 pci_write_config(dev, PCIR_COMMAND, data, 2); 1923 data = pci_read_config(dev, PCIR_COMMAND, 2); 1924 1925 i = PCIR_BAR(0); 1926 sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE); 1927 if (sc->reg == NULL) { 1928 device_printf(dev, "unable to map register space\n"); 1929 goto bad; 1930 } 1931 sc->st = rman_get_bustag(sc->reg); 1932 sc->sh = rman_get_bushandle(sc->reg); 1933 1934 sc->bufsz = pcm_getbuffersize(dev, 4096, EMU_DEFAULT_BUFSZ, 65536); 1935 1936 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 1937 /*lowaddr*/1 << 31, /* can only access 0-2gb */ 1938 /*highaddr*/BUS_SPACE_MAXADDR, 1939 /*filter*/NULL, /*filterarg*/NULL, 1940 /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 1941 /*flags*/0, 1942 &sc->parent_dmat) != 0) { 1943 device_printf(dev, "unable to create dma tag\n"); 1944 goto bad; 1945 } 1946 1947 if (emu_init(sc) == -1) { 1948 device_printf(dev, "unable to initialize the card\n"); 1949 goto bad; 1950 } 1951 1952 codec = AC97_CREATE(dev, sc, emu_ac97); 1953 if (codec == NULL) goto bad; 1954 gotmic = (ac97_getcaps(codec) & AC97_CAP_MICCHANNEL) ? 1 : 0; 1955 if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad; 1956 1957 i = 0; 1958 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, 1959 RF_ACTIVE | RF_SHAREABLE); 1960 if (!sc->irq || 1961 snd_setup_intr(dev, sc->irq, INTR_MPSAFE, emu_intr, sc, &sc->ih)) { 1962 device_printf(dev, "unable to map interrupt\n"); 1963 goto bad; 1964 } 1965 1966 ksnprintf(status, SND_STATUSLEN, "at io 0x%lx irq %ld %s", 1967 rman_get_start(sc->reg), rman_get_start(sc->irq), 1968 PCM_KLDSTRING(snd_emu10k1)); 1969 1970 if (pcm_register(dev, sc, sc->nchans, gotmic ? 3 : 2)) goto bad; 1971 for (i = 0; i < sc->nchans; i++) 1972 pcm_addchan(dev, PCMDIR_PLAY, &emupchan_class, sc); 1973 for (i = 0; i < (gotmic ? 3 : 2); i++) 1974 pcm_addchan(dev, PCMDIR_REC, &emurchan_class, sc); 1975 1976 pcm_setstatus(dev, status); 1977 1978 return 0; 1979 1980 bad: 1981 if (codec) ac97_destroy(codec); 1982 if (sc->reg) bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 1983 if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih); 1984 if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 1985 if (sc->parent_dmat) bus_dma_tag_destroy(sc->parent_dmat); 1986 if (sc->lock) snd_mtxfree(sc->lock); 1987 kfree(sc, M_DEVBUF); 1988 return ENXIO; 1989 } 1990 1991 static int 1992 emu_pci_detach(device_t dev) 1993 { 1994 int r; 1995 struct sc_info *sc; 1996 1997 r = pcm_unregister(dev); 1998 if (r) 1999 return r; 2000 2001 sc = pcm_getdevinfo(dev); 2002 /* shutdown chip */ 2003 emu_uninit(sc); 2004 2005 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 2006 bus_teardown_intr(dev, sc->irq, sc->ih); 2007 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 2008 bus_dma_tag_destroy(sc->parent_dmat); 2009 snd_mtxfree(sc->lock); 2010 kfree(sc, M_DEVBUF); 2011 2012 return 0; 2013 } 2014 2015 /* add suspend, resume */ 2016 static device_method_t emu_methods[] = { 2017 /* Device interface */ 2018 DEVMETHOD(device_probe, emu_pci_probe), 2019 DEVMETHOD(device_attach, emu_pci_attach), 2020 DEVMETHOD(device_detach, emu_pci_detach), 2021 2022 DEVMETHOD_END 2023 }; 2024 2025 static driver_t emu_driver = { 2026 "pcm", 2027 emu_methods, 2028 PCM_SOFTC_SIZE, 2029 }; 2030 2031 DRIVER_MODULE(snd_emu10k1, pci, emu_driver, pcm_devclass, NULL, NULL); 2032 DRIVER_MODULE(snd_emu10k1, cardbus, emu_driver, pcm_devclass, NULL, NULL); 2033 MODULE_DEPEND(snd_emu10k1, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); 2034 MODULE_VERSION(snd_emu10k1, 1); 2035 2036 /* dummy driver to silence the joystick device */ 2037 static int 2038 emujoy_pci_probe(device_t dev) 2039 { 2040 char *s = NULL; 2041 2042 switch (pci_get_devid(dev)) { 2043 case 0x70021102: 2044 s = "Creative EMU10K1 Joystick"; 2045 device_quiet(dev); 2046 break; 2047 case 0x70031102: 2048 s = "Creative EMU10K2 Joystick"; 2049 device_quiet(dev); 2050 break; 2051 } 2052 2053 if (s) device_set_desc(dev, s); 2054 return s ? -1000 : ENXIO; 2055 } 2056 2057 static int 2058 emujoy_pci_attach(device_t dev) 2059 { 2060 return 0; 2061 } 2062 2063 static int 2064 emujoy_pci_detach(device_t dev) 2065 { 2066 return 0; 2067 } 2068 2069 static device_method_t emujoy_methods[] = { 2070 DEVMETHOD(device_probe, emujoy_pci_probe), 2071 DEVMETHOD(device_attach, emujoy_pci_attach), 2072 DEVMETHOD(device_detach, emujoy_pci_detach), 2073 2074 DEVMETHOD_END 2075 }; 2076 2077 static driver_t emujoy_driver = { 2078 "emujoy", 2079 emujoy_methods, 2080 8, 2081 }; 2082 2083 static devclass_t emujoy_devclass; 2084 2085 DRIVER_MODULE(emujoy, pci, emujoy_driver, emujoy_devclass, NULL, NULL); 2086 2087