1 /*- 2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 3 * boards based on the ES1370, ES1371 and ES1373 chips. 4 * 5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 6 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in 18 * the documentation and/or other materials provided with the 19 * distribution. 20 * 21 * 3. All advertising materials mentioning features or use of this 22 * software must display the following acknowledgement: 23 * This product includes software developed by Joachim Kuebart. 24 * 25 * 4. The name of the author may not be used to endorse or promote 26 * products derived from this software without specific prior 27 * written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 39 * OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * $FreeBSD: src/sys/dev/sound/pci/es137x.c,v 1.55.2.2 2006/01/16 02:08:56 ariff Exp $ 42 * $DragonFly: src/sys/dev/sound/pci/es137x.c,v 1.10 2007/06/16 20:07:19 dillon Exp $ 43 */ 44 45 /* 46 * Part of this code was heavily inspired by the linux driver from 47 * Thomas Sailer (sailer@ife.ee.ethz.ch) 48 * Just about everything has been touched and reworked in some way but 49 * the all the underlying sequences/timing/register values are from 50 * Thomas' code. 51 * 52 */ 53 54 #include <dev/sound/pcm/sound.h> 55 #include <dev/sound/pcm/ac97.h> 56 #include <dev/sound/pci/es137x.h> 57 58 #include <bus/pci/pcireg.h> 59 #include <bus/pci/pcivar.h> 60 61 #include <sys/sysctl.h> 62 63 #include "mixer_if.h" 64 65 SND_DECLARE_FILE("$DragonFly: src/sys/dev/sound/pci/es137x.c,v 1.10 2007/06/16 20:07:19 dillon Exp $"); 66 67 static int debug = 0; 68 SYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, ""); 69 70 #define MEM_MAP_REG 0x14 71 72 /* PCI IDs of supported chips */ 73 #define ES1370_PCI_ID 0x50001274 74 #define ES1371_PCI_ID 0x13711274 75 #define ES1371_PCI_ID2 0x13713274 76 #define CT5880_PCI_ID 0x58801274 77 #define CT4730_PCI_ID 0x89381102 78 79 #define ES1371REV_ES1371_A 0x02 80 #define ES1371REV_ES1371_B 0x09 81 82 #define ES1371REV_ES1373_8 0x08 83 #define ES1371REV_ES1373_A 0x04 84 #define ES1371REV_ES1373_B 0x06 85 86 #define ES1371REV_CT5880_A 0x07 87 88 #define CT5880REV_CT5880_C 0x02 89 #define CT5880REV_CT5880_D 0x03 90 #define CT5880REV_CT5880_E 0x04 91 92 #define CT4730REV_CT4730_A 0x00 93 94 #define ES_DEFAULT_BUFSZ 4096 95 96 /* 2 DAC for playback, 1 ADC for record */ 97 #define ES_DAC1 0 98 #define ES_DAC2 1 99 #define ES_ADC 2 100 #define ES_NCHANS 3 101 102 #define ES1370_DAC1_MINSPEED 5512 103 #define ES1370_DAC1_MAXSPEED 44100 104 105 /* device private data */ 106 struct es_info; 107 108 struct es_chinfo { 109 struct es_info *parent; 110 struct pcm_channel *channel; 111 struct snd_dbuf *buffer; 112 struct pcmchan_caps caps; 113 int dir, num, index; 114 u_int32_t fmt, blksz, bufsz; 115 }; 116 117 /* 118 * 32bit Ensoniq Configuration (es->escfg). 119 * ---------------------------------------- 120 * 121 * +-------+--------+------+------+---------+--------+---------+---------+ 122 * len | 16 | 1 | 1 | 1 | 2 | 2 | 1 | 8 | 123 * +-------+--------+------+------+---------+--------+---------+---------+ 124 * | fixed | single | | | | | is | general | 125 * | rate | pcm | DACx | DACy | numplay | numrec | es1370? | purpose | 126 * | | mixer | | | | | | | 127 * +-------+--------+------+------+---------+--------+---------+---------+ 128 */ 129 #define ES_FIXED_RATE(cfgv) \ 130 (((cfgv) & 0xffff0000) >> 16) 131 #define ES_SET_FIXED_RATE(cfgv, nv) \ 132 (((cfgv) & ~0xffff0000) | (((nv) & 0xffff) << 16)) 133 #define ES_SINGLE_PCM_MIX(cfgv) \ 134 (((cfgv) & 0x8000) >> 15) 135 #define ES_SET_SINGLE_PCM_MIX(cfgv, nv) \ 136 (((cfgv) & ~0x8000) | (((nv) ? 1 : 0) << 15)) 137 #define ES_DAC_FIRST(cfgv) \ 138 (((cfgv) & 0x4000) >> 14) 139 #define ES_SET_DAC_FIRST(cfgv, nv) \ 140 (((cfgv) & ~0x4000) | (((nv) & 0x1) << 14)) 141 #define ES_DAC_SECOND(cfgv) \ 142 (((cfgv) & 0x2000) >> 13) 143 #define ES_SET_DAC_SECOND(cfgv, nv) \ 144 (((cfgv) & ~0x2000) | (((nv) & 0x1) << 13)) 145 #define ES_NUMPLAY(cfgv) \ 146 (((cfgv) & 0x1800) >> 11) 147 #define ES_SET_NUMPLAY(cfgv, nv) \ 148 (((cfgv) & ~0x1800) | (((nv) & 0x3) << 11)) 149 #define ES_NUMREC(cfgv) \ 150 (((cfgv) & 0x600) >> 9) 151 #define ES_SET_NUMREC(cfgv, nv) \ 152 (((cfgv) & ~0x600) | (((nv) & 0x3) << 9)) 153 #define ES_IS_ES1370(cfgv) \ 154 (((cfgv) & 0x100) >> 8) 155 #define ES_SET_IS_ES1370(cfgv, nv) \ 156 (((cfgv) & ~0x100) | (((nv) ? 1 : 0) << 8)) 157 #define ES_GP(cfgv) \ 158 ((cfgv) & 0xff) 159 #define ES_SET_GP(cfgv, nv) \ 160 (((cfgv) & ~0xff) | ((nv) & 0xff)) 161 162 #define ES_DAC1_ENABLED(cfgv) \ 163 (ES_NUMPLAY(cfgv) > 1 || \ 164 (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC1)) 165 #define ES_DAC2_ENABLED(cfgv) \ 166 (ES_NUMPLAY(cfgv) > 1 || \ 167 (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC2)) 168 169 /* 170 * DAC 1/2 configuration through kernel hint - hint.pcm.<unit>.dac="val" 171 * 172 * 0 = Enable both DACs - Default 173 * 1 = Enable single DAC (DAC1) 174 * 2 = Enable single DAC (DAC2) 175 * 3 = Enable both DACs, swap position (DAC2 comes first instead of DAC1) 176 */ 177 #define ES_DEFAULT_DAC_CFG 2 178 179 struct es_info { 180 bus_space_tag_t st; 181 bus_space_handle_t sh; 182 bus_dma_tag_t parent_dmat; 183 184 struct resource *reg, *irq; 185 int regtype, regid, irqid; 186 void *ih; 187 188 device_t dev; 189 int num; 190 unsigned int bufsz; 191 192 /* Contents of board's registers */ 193 uint32_t ctrl; 194 uint32_t sctrl; 195 uint32_t escfg; 196 struct es_chinfo ch[ES_NCHANS]; 197 sndlock_t lock; 198 }; 199 200 #define ES_LOCK(sc) snd_mtxlock((sc)->lock) 201 #define ES_UNLOCK(sc) snd_mtxunlock((sc)->lock) 202 #define ES_LOCK_ASSERT(sc) snd_mtxassert((sc)->lock) 203 204 /* prototypes */ 205 static void es_intr(void *); 206 static uint32_t es1371_wait_src_ready(struct es_info *); 207 static void es1371_src_write(struct es_info *, u_short, unsigned short); 208 static u_int es1371_adc_rate(struct es_info *, u_int, int); 209 static u_int es1371_dac_rate(struct es_info *, u_int, int); 210 static int es1371_init(struct es_info *); 211 static int es1370_init(struct es_info *); 212 static int es1370_wrcodec(struct es_info *, u_char, u_char); 213 214 static u_int32_t es_fmt[] = { 215 AFMT_U8, 216 AFMT_STEREO | AFMT_U8, 217 AFMT_S16_LE, 218 AFMT_STEREO | AFMT_S16_LE, 219 0 220 }; 221 static struct pcmchan_caps es_caps = {4000, 48000, es_fmt, 0}; 222 223 static const struct { 224 unsigned volidx:4; 225 unsigned left:4; 226 unsigned right:4; 227 unsigned stereo:1; 228 unsigned recmask:13; 229 unsigned avail:1; 230 } mixtable[SOUND_MIXER_NRDEVICES] = { 231 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x1f7f, 1 }, 232 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 233 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 234 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 235 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 236 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 237 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 238 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 239 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 240 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 241 }; 242 243 static __inline u_int32_t 244 es_rd(struct es_info *es, int regno, int size) 245 { 246 switch (size) { 247 case 1: 248 return bus_space_read_1(es->st, es->sh, regno); 249 case 2: 250 return bus_space_read_2(es->st, es->sh, regno); 251 case 4: 252 return bus_space_read_4(es->st, es->sh, regno); 253 default: 254 return 0xFFFFFFFF; 255 } 256 } 257 258 static __inline void 259 es_wr(struct es_info *es, int regno, u_int32_t data, int size) 260 { 261 262 switch (size) { 263 case 1: 264 bus_space_write_1(es->st, es->sh, regno, data); 265 break; 266 case 2: 267 bus_space_write_2(es->st, es->sh, regno, data); 268 break; 269 case 4: 270 bus_space_write_4(es->st, es->sh, regno, data); 271 break; 272 } 273 } 274 275 /* -------------------------------------------------------------------- */ 276 /* The es1370 mixer interface */ 277 278 static int 279 es1370_mixinit(struct snd_mixer *m) 280 { 281 struct es_info *es; 282 int i; 283 u_int32_t v; 284 285 es = mix_getdevinfo(m); 286 v = 0; 287 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 288 if (mixtable[i].avail) v |= (1 << i); 289 /* 290 * Each DAC1/2 for ES1370 can be controlled independently 291 * DAC1 = controlled by synth 292 * DAC2 = controlled by pcm 293 * This is indeed can confuse user if DAC1 become primary playback 294 * channel. Try to be smart and combine both if necessary. 295 */ 296 if (ES_SINGLE_PCM_MIX(es->escfg)) 297 v &= ~(1 << SOUND_MIXER_SYNTH); 298 mix_setdevs(m, v); 299 v = 0; 300 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 301 if (mixtable[i].recmask) v |= (1 << i); 302 if (ES_SINGLE_PCM_MIX(es->escfg)) /* ditto */ 303 v &= ~(1 << SOUND_MIXER_SYNTH); 304 mix_setrecdevs(m, v); 305 return 0; 306 } 307 308 static int 309 es1370_mixset(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) 310 { 311 struct es_info *es; 312 int l, r, rl, rr, set_dac1; 313 314 if (!mixtable[dev].avail) return -1; 315 l = left; 316 r = mixtable[dev].stereo? right : l; 317 if (mixtable[dev].left == 0xf) { 318 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 319 } else { 320 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 321 } 322 es = mix_getdevinfo(m); 323 ES_LOCK(es); 324 if (dev == SOUND_MIXER_PCM && (ES_SINGLE_PCM_MIX(es->escfg)) && 325 ES_DAC1_ENABLED(es->escfg)) { 326 set_dac1 = 1; 327 } else { 328 set_dac1 = 0; 329 } 330 if (mixtable[dev].stereo) { 331 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; 332 es1370_wrcodec(es, mixtable[dev].right, rr); 333 if (set_dac1 && mixtable[SOUND_MIXER_SYNTH].stereo) 334 es1370_wrcodec(es, mixtable[SOUND_MIXER_SYNTH].right, rr); 335 } 336 es1370_wrcodec(es, mixtable[dev].left, rl); 337 if (set_dac1) 338 es1370_wrcodec(es, mixtable[SOUND_MIXER_SYNTH].left, rl); 339 ES_UNLOCK(es); 340 341 return l | (r << 8); 342 } 343 344 static int 345 es1370_mixsetrecsrc(struct snd_mixer *m, u_int32_t src) 346 { 347 struct es_info *es; 348 int i, j = 0; 349 350 es = mix_getdevinfo(m); 351 if (src == 0) src = 1 << SOUND_MIXER_MIC; 352 src &= mix_getrecdevs(m); 353 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 354 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 355 356 ES_LOCK(es); 357 if ((src & (1 << SOUND_MIXER_PCM)) && ES_SINGLE_PCM_MIX(es->escfg) && 358 ES_DAC1_ENABLED(es->escfg)) { 359 j |= mixtable[SOUND_MIXER_SYNTH].recmask; 360 } 361 es1370_wrcodec(es, CODEC_LIMIX1, j & 0x55); 362 es1370_wrcodec(es, CODEC_RIMIX1, j & 0xaa); 363 es1370_wrcodec(es, CODEC_LIMIX2, (j >> 8) & 0x17); 364 es1370_wrcodec(es, CODEC_RIMIX2, (j >> 8) & 0x0f); 365 es1370_wrcodec(es, CODEC_OMIX1, 0x7f); 366 es1370_wrcodec(es, CODEC_OMIX2, 0x3f); 367 ES_UNLOCK(es); 368 369 return src; 370 } 371 372 static kobj_method_t es1370_mixer_methods[] = { 373 KOBJMETHOD(mixer_init, es1370_mixinit), 374 KOBJMETHOD(mixer_set, es1370_mixset), 375 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc), 376 { 0, 0 } 377 }; 378 MIXER_DECLARE(es1370_mixer); 379 380 /* -------------------------------------------------------------------- */ 381 382 static int 383 es1370_wrcodec(struct es_info *es, u_char i, u_char data) 384 { 385 u_int t; 386 387 ES_LOCK_ASSERT(es); 388 389 for (t = 0; t < 0x1000; t++) { 390 if ((es_rd(es, ES1370_REG_STATUS, 4) & 391 STAT_CSTAT) == 0) { 392 es_wr(es, ES1370_REG_CODEC, 393 ((u_short)i << CODEC_INDEX_SHIFT) | data, 2); 394 return 0; 395 } 396 DELAY(1); 397 } 398 device_printf(es->dev, "%s: timed out\n", __func__); 399 return -1; 400 } 401 402 /* -------------------------------------------------------------------- */ 403 404 /* channel interface */ 405 static void * 406 eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 407 { 408 struct es_info *es = devinfo; 409 struct es_chinfo *ch; 410 uint32_t index; 411 412 ES_LOCK(es); 413 414 if (dir == PCMDIR_PLAY) { 415 index = ES_GP(es->escfg); 416 es->escfg = ES_SET_GP(es->escfg, index + 1); 417 if (index == 0) { 418 index = ES_DAC_FIRST(es->escfg); 419 } else if (index == 1) { 420 index = ES_DAC_SECOND(es->escfg); 421 } else { 422 device_printf(es->dev, "Invalid ES_GP index: %d\n", index); 423 ES_UNLOCK(es); 424 return NULL; 425 } 426 if (!(index == ES_DAC1 || index == ES_DAC2)) { 427 device_printf(es->dev, "Unknown DAC: %d\n", 428 index + 1); 429 ES_UNLOCK(es); 430 return NULL; 431 } 432 if (es->ch[index].channel != NULL) { 433 device_printf(es->dev, "DAC%d already initialized!\n", 434 index + 1); 435 ES_UNLOCK(es); 436 return NULL; 437 } 438 } else 439 index = ES_ADC; 440 441 ch = &es->ch[index]; 442 ch->index = index; 443 ch->num = es->num++; 444 ch->caps = es_caps; 445 if (ES_IS_ES1370(es->escfg)) { 446 if (ch->index == ES_DAC1) { 447 ch->caps.maxspeed = ES1370_DAC1_MAXSPEED; 448 ch->caps.minspeed = ES1370_DAC1_MINSPEED; 449 } else { 450 uint32_t fixed_rate = ES_FIXED_RATE(es->escfg); 451 if (!(fixed_rate < es_caps.minspeed || 452 fixed_rate > es_caps.maxspeed)) { 453 ch->caps.maxspeed = fixed_rate; 454 ch->caps.minspeed = fixed_rate; 455 } 456 } 457 } 458 ch->parent = es; 459 ch->channel = c; 460 ch->buffer = b; 461 ch->bufsz = es->bufsz; 462 ch->blksz = ch->bufsz / 2; 463 ch->dir = dir; 464 ES_UNLOCK(es); 465 if (sndbuf_alloc(ch->buffer, es->parent_dmat, ch->bufsz) != 0) 466 return NULL; 467 ES_LOCK(es); 468 if (dir == PCMDIR_PLAY) { 469 if (ch->index == ES_DAC1) { 470 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_DAC1_FRAMEADR >> 8, 1); 471 es_wr(es, ES1370_REG_DAC1_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer), 4); 472 es_wr(es, ES1370_REG_DAC1_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 473 } else { 474 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMEADR >> 8, 1); 475 es_wr(es, ES1370_REG_DAC2_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer), 4); 476 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 477 } 478 } else { 479 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8, 1); 480 es_wr(es, ES1370_REG_ADC_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer), 4); 481 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 482 } 483 ES_UNLOCK(es); 484 return ch; 485 } 486 487 static int 488 eschan_setformat(kobj_t obj, void *data, u_int32_t format) 489 { 490 struct es_chinfo *ch = data; 491 struct es_info *es = ch->parent; 492 493 ES_LOCK(es); 494 if (ch->dir == PCMDIR_PLAY) { 495 if (ch->index == ES_DAC1) { 496 es->sctrl &= ~SCTRL_P1FMT; 497 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P1SEB; 498 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P1SMB; 499 } else { 500 es->sctrl &= ~SCTRL_P2FMT; 501 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 502 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 503 } 504 } else { 505 es->sctrl &= ~SCTRL_R1FMT; 506 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 507 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 508 } 509 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 510 ES_UNLOCK(es); 511 ch->fmt = format; 512 return 0; 513 } 514 515 static int 516 eschan1370_setspeed(kobj_t obj, void *data, u_int32_t speed) 517 { 518 struct es_chinfo *ch = data; 519 struct es_info *es = ch->parent; 520 521 /* Fixed rate , do nothing. */ 522 if (ch->caps.minspeed == ch->caps.maxspeed) 523 return ch->caps.maxspeed; 524 if (speed < ch->caps.minspeed) 525 speed = ch->caps.minspeed; 526 if (speed > ch->caps.maxspeed) 527 speed = ch->caps.maxspeed; 528 ES_LOCK(es); 529 if (ch->index == ES_DAC1) { 530 /* 531 * DAC1 does not support continuous rate settings. 532 * Pick the nearest and use it since FEEDER_RATE will 533 * do the the proper conversion for us. 534 */ 535 es->ctrl &= ~CTRL_WTSRSEL; 536 if (speed < 8268) { 537 speed = 5512; 538 es->ctrl |= 0 << CTRL_SH_WTSRSEL; 539 } else if (speed < 16537) { 540 speed = 11025; 541 es->ctrl |= 1 << CTRL_SH_WTSRSEL; 542 } else if (speed < 33075) { 543 speed = 22050; 544 es->ctrl |= 2 << CTRL_SH_WTSRSEL; 545 } else { 546 speed = 44100; 547 es->ctrl |= 3 << CTRL_SH_WTSRSEL; 548 } 549 } else { 550 es->ctrl &= ~CTRL_PCLKDIV; 551 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 552 } 553 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 554 ES_UNLOCK(es); 555 return speed; 556 } 557 558 static int 559 eschan1371_setspeed(kobj_t obj, void *data, u_int32_t speed) 560 { 561 struct es_chinfo *ch = data; 562 struct es_info *es = ch->parent; 563 uint32_t i; 564 int delta; 565 566 ES_LOCK(es); 567 if (ch->dir == PCMDIR_PLAY) 568 i = es1371_dac_rate(es, speed, ch->index); /* play */ 569 else 570 i = es1371_adc_rate(es, speed, ch->index); /* record */ 571 ES_UNLOCK(es); 572 delta = (speed > i) ? speed - i : i - speed; 573 if (delta < 2) 574 return speed; 575 return i; 576 } 577 578 static int 579 eschan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 580 { 581 struct es_info *es; 582 struct es_chinfo *ch = data; 583 uint32_t oblksz, obufsz; 584 int error; 585 586 oblksz = ch->blksz; 587 obufsz = ch->bufsz; 588 ch->blksz = blocksize; 589 ch->bufsz = ch->blksz * 2; 590 error = sndbuf_resize(ch->buffer, 2, ch->blksz); 591 if (error != 0) { 592 ch->blksz = oblksz; 593 ch->bufsz = obufsz; 594 es = ch->parent; 595 device_printf(es->dev, "unable to set block size, blksz = %d, " 596 "error = %d", blocksize, error); 597 } 598 return ch->blksz; 599 } 600 601 static int 602 eschan_trigger(kobj_t obj, void *data, int go) 603 { 604 struct es_chinfo *ch = data; 605 struct es_info *es = ch->parent; 606 uint32_t cnt, b = 0; 607 608 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 609 return 0; 610 611 cnt = (ch->blksz / sndbuf_getbps(ch->buffer)) - 1; 612 if (ch->fmt & AFMT_16BIT) 613 b |= 0x02; 614 if (ch->fmt & AFMT_STEREO) 615 b |= 0x01; 616 ES_LOCK(es); 617 if (ch->dir == PCMDIR_PLAY) { 618 if (go == PCMTRIG_START) { 619 if (ch->index == ES_DAC1) { 620 es->ctrl |= CTRL_DAC1_EN; 621 es->sctrl &= ~(SCTRL_P1LOOPSEL | SCTRL_P1PAUSE | SCTRL_P1SCTRLD); 622 es->sctrl |= SCTRL_P1INTEN | b; 623 es_wr(es, ES1370_REG_DAC1_SCOUNT, cnt, 4); 624 /* start at beginning of buffer */ 625 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_DAC1_FRAMECNT >> 8, 4); 626 es_wr(es, ES1370_REG_DAC1_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 627 } else { 628 es->ctrl |= CTRL_DAC2_EN; 629 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN); 630 es->sctrl |= SCTRL_P2INTEN | (b << 2) | 631 (((b & 2) ? : 1) << SCTRL_SH_P2ENDINC); 632 es_wr(es, ES1370_REG_DAC2_SCOUNT, cnt, 4); 633 /* start at beginning of buffer */ 634 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMECNT >> 8, 4); 635 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 636 } 637 } else es->ctrl &= ~(ch->index == ES_DAC1 ? CTRL_DAC1_EN : CTRL_DAC2_EN); 638 } else { 639 if (go == PCMTRIG_START) { 640 es->ctrl |= CTRL_ADC_EN; 641 es->sctrl &= ~SCTRL_R1LOOPSEL; 642 es->sctrl |= SCTRL_R1INTEN | (b << 4); 643 es_wr(es, ES1370_REG_ADC_SCOUNT, cnt, 4); 644 /* start at beginning of buffer */ 645 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMECNT >> 8, 4); 646 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 647 } else es->ctrl &= ~CTRL_ADC_EN; 648 } 649 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 650 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 651 ES_UNLOCK(es); 652 return 0; 653 } 654 655 static int 656 eschan_getptr(kobj_t obj, void *data) 657 { 658 struct es_chinfo *ch = data; 659 struct es_info *es = ch->parent; 660 u_int32_t reg, cnt; 661 662 if (ch->dir == PCMDIR_PLAY) { 663 if (ch->index == ES_DAC1) 664 reg = ES1370_REG_DAC1_FRAMECNT; 665 else 666 reg = ES1370_REG_DAC2_FRAMECNT; 667 } else 668 reg = ES1370_REG_ADC_FRAMECNT; 669 ES_LOCK(es); 670 es_wr(es, ES1370_REG_MEMPAGE, reg >> 8, 4); 671 cnt = es_rd(es, reg & 0x000000ff, 4) >> 16; 672 ES_UNLOCK(es); 673 /* cnt is longwords */ 674 return cnt << 2; 675 } 676 677 static struct pcmchan_caps * 678 eschan_getcaps(kobj_t obj, void *data) 679 { 680 struct es_chinfo *ch = data; 681 682 return &ch->caps; 683 } 684 685 static kobj_method_t eschan1370_methods[] = { 686 KOBJMETHOD(channel_init, eschan_init), 687 KOBJMETHOD(channel_setformat, eschan_setformat), 688 KOBJMETHOD(channel_setspeed, eschan1370_setspeed), 689 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 690 KOBJMETHOD(channel_trigger, eschan_trigger), 691 KOBJMETHOD(channel_getptr, eschan_getptr), 692 KOBJMETHOD(channel_getcaps, eschan_getcaps), 693 { 0, 0 } 694 }; 695 CHANNEL_DECLARE(eschan1370); 696 697 static kobj_method_t eschan1371_methods[] = { 698 KOBJMETHOD(channel_init, eschan_init), 699 KOBJMETHOD(channel_setformat, eschan_setformat), 700 KOBJMETHOD(channel_setspeed, eschan1371_setspeed), 701 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 702 KOBJMETHOD(channel_trigger, eschan_trigger), 703 KOBJMETHOD(channel_getptr, eschan_getptr), 704 KOBJMETHOD(channel_getcaps, eschan_getcaps), 705 { 0, 0 } 706 }; 707 CHANNEL_DECLARE(eschan1371); 708 709 /* -------------------------------------------------------------------- */ 710 /* The interrupt handler */ 711 static void 712 es_intr(void *p) 713 { 714 struct es_info *es = p; 715 uint32_t intsrc, sctrl; 716 717 ES_LOCK(es); 718 intsrc = es_rd(es, ES1370_REG_STATUS, 4); 719 if ((intsrc & STAT_INTR) == 0) { 720 ES_UNLOCK(es); 721 return; 722 } 723 724 sctrl = es->sctrl; 725 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 726 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 727 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 728 729 es_wr(es, ES1370_REG_SERIAL_CONTROL, sctrl, 4); 730 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 731 ES_UNLOCK(es); 732 733 if (intsrc & STAT_ADC) chn_intr(es->ch[ES_ADC].channel); 734 if (intsrc & STAT_DAC1) chn_intr(es->ch[ES_DAC1].channel); 735 if (intsrc & STAT_DAC2) chn_intr(es->ch[ES_DAC2].channel); 736 } 737 738 /* ES1370 specific */ 739 static int 740 es1370_init(struct es_info *es) 741 { 742 uint32_t fixed_rate; 743 int r, single_pcm; 744 745 /* ES1370 default to fixed rate operation */ 746 if (resource_int_value(device_get_name(es->dev), 747 device_get_unit(es->dev), "fixed_rate", &r) == 0) { 748 fixed_rate = r; 749 if (fixed_rate) { 750 if (fixed_rate < es_caps.minspeed) 751 fixed_rate = es_caps.minspeed; 752 if (fixed_rate > es_caps.maxspeed) 753 fixed_rate = es_caps.maxspeed; 754 } 755 } else 756 fixed_rate = es_caps.maxspeed; 757 758 if (resource_int_value(device_get_name(es->dev), 759 device_get_unit(es->dev), "single_pcm_mixer", &r) == 0) 760 single_pcm = (r) ? 1 : 0; 761 else 762 single_pcm = 1; 763 764 ES_LOCK(es); 765 if (ES_NUMPLAY(es->escfg) == 1) 766 single_pcm = 1; 767 /* This is ES1370 */ 768 es->escfg = ES_SET_IS_ES1370(es->escfg, 1); 769 if (fixed_rate) { 770 es->escfg = ES_SET_FIXED_RATE(es->escfg, fixed_rate); 771 } else { 772 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0); 773 fixed_rate = DSP_DEFAULT_SPEED; 774 } 775 if (single_pcm) { 776 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 1); 777 } else { 778 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 0); 779 } 780 es->ctrl = CTRL_CDC_EN | CTRL_JYSTK_EN | CTRL_SERR_DIS | 781 (DAC2_SRTODIV(fixed_rate) << CTRL_SH_PCLKDIV); 782 es->ctrl |= 3 << CTRL_SH_WTSRSEL; 783 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 784 785 es->sctrl = 0; 786 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 787 788 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 789 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 790 * {LR,B}CLK2 and run off the LRCLK2 791 * PLL; program DAC_SYNC=0! */ 792 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 793 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ 794 ES_UNLOCK(es); 795 796 return 0; 797 } 798 799 /* ES1371 specific */ 800 int 801 es1371_init(struct es_info *es) 802 { 803 uint32_t cssr, devid, revid, subdev; 804 int idx; 805 806 ES_LOCK(es); 807 /* This is NOT ES1370 */ 808 es->escfg = ES_SET_IS_ES1370(es->escfg, 0); 809 es->num = 0; 810 es->sctrl = 0; 811 cssr = 0; 812 devid = pci_get_devid(es->dev); 813 revid = pci_get_revid(es->dev); 814 subdev = (pci_get_subdevice(es->dev) << 16) | pci_get_subvendor(es->dev); 815 /* 816 * Joyport blacklist. Either we're facing with broken hardware 817 * or because this hardware need special (unknown) initialization 818 * procedures. 819 */ 820 switch (subdev) { 821 case 0x20001274: /* old Ensoniq */ 822 es->ctrl = 0; 823 break; 824 default: 825 es->ctrl = CTRL_JYSTK_EN; 826 break; 827 } 828 if (devid == CT4730_PCI_ID) { 829 /* XXX amplifier hack? */ 830 es->ctrl |= (1 << 16); 831 } 832 /* initialize the chips */ 833 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 834 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 835 es_wr(es, ES1371_REG_LEGACY, 0, 4); 836 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) || 837 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) || 838 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) || 839 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) || 840 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) { 841 cssr = 1 << 29; 842 es_wr(es, ES1370_REG_STATUS, cssr, 4); 843 DELAY(20000); 844 } 845 /* AC'97 warm reset to start the bitclk */ 846 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 847 es_wr(es, ES1371_REG_LEGACY, ES1371_SYNC_RES, 4); 848 DELAY(2000); 849 es_wr(es, ES1370_REG_CONTROL, es->sctrl, 4); 850 es1371_wait_src_ready(es); 851 /* Init the sample rate converter */ 852 es_wr(es, ES1371_REG_SMPRATE, ES1371_DIS_SRC, 4); 853 for (idx = 0; idx < 0x80; idx++) 854 es1371_src_write(es, idx, 0); 855 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 856 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 857 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 858 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 859 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 860 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 861 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 862 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 863 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 864 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 865 es1371_adc_rate(es, 22050, ES_ADC); 866 es1371_dac_rate(es, 22050, ES_DAC1); 867 es1371_dac_rate(es, 22050, ES_DAC2); 868 /* WARNING: 869 * enabling the sample rate converter without properly programming 870 * its parameters causes the chip to lock up (the SRC busy bit will 871 * be stuck high, and I've found no way to rectify this other than 872 * power cycle) 873 */ 874 es1371_wait_src_ready(es); 875 es_wr(es, ES1371_REG_SMPRATE, 0, 4); 876 /* try to reset codec directly */ 877 es_wr(es, ES1371_REG_CODEC, 0, 4); 878 es_wr(es, ES1370_REG_STATUS, cssr, 4); 879 ES_UNLOCK(es); 880 881 return (0); 882 } 883 884 /* -------------------------------------------------------------------- */ 885 886 static int 887 es1371_wrcd(kobj_t obj, void *s, int addr, u_int32_t data) 888 { 889 uint32_t t, x, orig; 890 struct es_info *es = (struct es_info*)s; 891 892 for (t = 0; t < 0x1000; t++) 893 if (!es_rd(es, ES1371_REG_CODEC & CODEC_WIP, 4)) 894 break; 895 /* save the current state for later */ 896 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4); 897 /* enable SRC state data in SRC mux */ 898 es_wr(es, ES1371_REG_SMPRATE, 899 (x & 900 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)) | 901 0x00010000, 4); 902 /* busy wait */ 903 for (t = 0; t < 0x1000; t++) 904 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 0x00000000) 905 break; 906 /* wait for a SAFE time to write addr/data and then do it, dammit */ 907 for (t = 0; t < 0x1000; t++) 908 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 0x00010000) 909 break; 910 911 es_wr(es, ES1371_REG_CODEC, 912 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 913 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK), 4); 914 /* restore SRC reg */ 915 es1371_wait_src_ready(s); 916 es_wr(es, ES1371_REG_SMPRATE, orig, 4); 917 918 return 0; 919 } 920 921 static int 922 es1371_rdcd(kobj_t obj, void *s, int addr) 923 { 924 uint32_t t, x, orig; 925 struct es_info *es = (struct es_info *)s; 926 927 for (t = 0; t < 0x1000; t++) 928 if (!(x = es_rd(es, ES1371_REG_CODEC, 4) & CODEC_WIP)) 929 break; 930 931 /* save the current state for later */ 932 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4); 933 /* enable SRC state data in SRC mux */ 934 es_wr(es, ES1371_REG_SMPRATE, 935 (x & 936 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)) | 937 0x00010000, 4); 938 /* busy wait */ 939 for (t = 0; t < 0x1000; t++) 940 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 0x00000000) 941 break; 942 /* wait for a SAFE time to write addr/data and then do it, dammit */ 943 for (t = 0; t < 0x1000; t++) 944 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 0x00010000) 945 break; 946 947 es_wr(es, ES1371_REG_CODEC, 948 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 949 CODEC_PORD, 4); 950 951 /* restore SRC reg */ 952 es1371_wait_src_ready(s); 953 es_wr(es, ES1371_REG_SMPRATE, orig, 4); 954 955 /* now wait for the stinkin' data (RDY) */ 956 for (t = 0; t < 0x1000; t++) 957 if ((x = es_rd(es, ES1371_REG_CODEC, 4)) & CODEC_RDY) 958 break; 959 960 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 961 } 962 963 static kobj_method_t es1371_ac97_methods[] = { 964 KOBJMETHOD(ac97_read, es1371_rdcd), 965 KOBJMETHOD(ac97_write, es1371_wrcd), 966 { 0, 0 } 967 }; 968 AC97_DECLARE(es1371_ac97); 969 970 /* -------------------------------------------------------------------- */ 971 972 static u_int 973 es1371_src_read(struct es_info *es, u_short reg) 974 { 975 uint32_t r; 976 977 r = es1371_wait_src_ready(es) & 978 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 979 r |= ES1371_SRC_RAM_ADDRO(reg); 980 es_wr(es, ES1371_REG_SMPRATE, r, 4); 981 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 982 } 983 984 static void 985 es1371_src_write(struct es_info *es, u_short reg, u_short data) 986 { 987 uint32_t r; 988 989 r = es1371_wait_src_ready(es) & 990 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 991 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 992 es_wr(es, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE, 4); 993 } 994 995 static u_int 996 es1371_adc_rate(struct es_info *es, u_int rate, int set) 997 { 998 u_int n, truncm, freq, result; 999 1000 ES_LOCK_ASSERT(es); 1001 1002 if (rate > 48000) rate = 48000; 1003 if (rate < 4000) rate = 4000; 1004 n = rate / 3000; 1005 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 1006 n--; 1007 truncm = (21 * n - 1) | 1; 1008 freq = ((48000UL << 15) / rate) * n; 1009 result = (48000UL << 15) / (freq / n); 1010 if (set) { 1011 if (rate >= 24000) { 1012 if (truncm > 239) truncm = 239; 1013 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 1014 (((239 - truncm) >> 1) << 9) | (n << 4)); 1015 } else { 1016 if (truncm > 119) truncm = 119; 1017 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 1018 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 1019 } 1020 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 1021 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 1022 0x00ff) | ((freq >> 5) & 0xfc00)); 1023 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 1024 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 1025 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 1026 } 1027 return result; 1028 } 1029 1030 static u_int 1031 es1371_dac_rate(struct es_info *es, u_int rate, int set) 1032 { 1033 u_int freq, r, result, dac, dis; 1034 1035 ES_LOCK_ASSERT(es); 1036 1037 if (rate > 48000) rate = 48000; 1038 if (rate < 4000) rate = 4000; 1039 freq = ((rate << 15) + 1500) / 3000; 1040 result = (freq * 3000) >> 15; 1041 1042 dac = (set == ES_DAC1) ? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 1043 dis = (set == ES_DAC1) ? ES1371_DIS_P2 : ES1371_DIS_P1; 1044 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 1045 es_wr(es, ES1371_REG_SMPRATE, r, 4); 1046 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 1047 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 1048 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 1049 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 1050 es_wr(es, ES1371_REG_SMPRATE, r, 4); 1051 return result; 1052 } 1053 1054 static uint32_t 1055 es1371_wait_src_ready(struct es_info *es) 1056 { 1057 uint32_t t, r; 1058 1059 for (t = 0; t < 0x1000; t++) { 1060 if (!((r = es_rd(es, ES1371_REG_SMPRATE, 4)) & ES1371_SRC_RAM_BUSY)) 1061 return r; 1062 DELAY(1); 1063 } 1064 device_printf(es->dev, "%s: timed out 0x%x [0x%x]\n", __func__, 1065 ES1371_REG_SMPRATE, r); 1066 return 0; 1067 } 1068 1069 /* -------------------------------------------------------------------- */ 1070 1071 /* 1072 * Probe and attach the card 1073 */ 1074 1075 static int 1076 es_pci_probe(device_t dev) 1077 { 1078 switch(pci_get_devid(dev)) { 1079 case ES1370_PCI_ID: 1080 device_set_desc(dev, "AudioPCI ES1370"); 1081 return BUS_PROBE_DEFAULT; 1082 1083 case ES1371_PCI_ID: 1084 switch(pci_get_revid(dev)) { 1085 case ES1371REV_ES1371_A: 1086 device_set_desc(dev, "AudioPCI ES1371-A"); 1087 return BUS_PROBE_DEFAULT; 1088 1089 case ES1371REV_ES1371_B: 1090 device_set_desc(dev, "AudioPCI ES1371-B"); 1091 return BUS_PROBE_DEFAULT; 1092 1093 case ES1371REV_ES1373_A: 1094 device_set_desc(dev, "AudioPCI ES1373-A"); 1095 return BUS_PROBE_DEFAULT; 1096 1097 case ES1371REV_ES1373_B: 1098 device_set_desc(dev, "AudioPCI ES1373-B"); 1099 return BUS_PROBE_DEFAULT; 1100 1101 case ES1371REV_ES1373_8: 1102 device_set_desc(dev, "AudioPCI ES1373-8"); 1103 return BUS_PROBE_DEFAULT; 1104 1105 case ES1371REV_CT5880_A: 1106 device_set_desc(dev, "Creative CT5880-A"); 1107 return BUS_PROBE_DEFAULT; 1108 1109 default: 1110 device_set_desc(dev, "AudioPCI ES1371-?"); 1111 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 1112 return BUS_PROBE_DEFAULT; 1113 } 1114 1115 case ES1371_PCI_ID2: 1116 device_set_desc(dev, "Strange AudioPCI ES1371-? (vid=3274)"); 1117 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 1118 return BUS_PROBE_DEFAULT; 1119 1120 case CT4730_PCI_ID: 1121 switch(pci_get_revid(dev)) { 1122 case CT4730REV_CT4730_A: 1123 device_set_desc(dev, "Creative SB AudioPCI CT4730/EV1938"); 1124 return BUS_PROBE_DEFAULT; 1125 default: 1126 device_set_desc(dev, "Creative SB AudioPCI CT4730-?"); 1127 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 1128 return BUS_PROBE_DEFAULT; 1129 } 1130 1131 case CT5880_PCI_ID: 1132 switch(pci_get_revid(dev)) { 1133 case CT5880REV_CT5880_C: 1134 device_set_desc(dev, "Creative CT5880-C"); 1135 return BUS_PROBE_DEFAULT; 1136 1137 case CT5880REV_CT5880_D: 1138 device_set_desc(dev, "Creative CT5880-D"); 1139 return BUS_PROBE_DEFAULT; 1140 1141 case CT5880REV_CT5880_E: 1142 device_set_desc(dev, "Creative CT5880-E"); 1143 return BUS_PROBE_DEFAULT; 1144 1145 default: 1146 device_set_desc(dev, "Creative CT5880-?"); 1147 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 1148 return BUS_PROBE_DEFAULT; 1149 } 1150 1151 default: 1152 return ENXIO; 1153 } 1154 } 1155 1156 #ifdef SND_DYNSYSCTL 1157 static int 1158 sysctl_es137x_spdif_enable(SYSCTL_HANDLER_ARGS) 1159 { 1160 struct es_info *es; 1161 device_t dev; 1162 uint32_t r; 1163 int err, new_en; 1164 1165 dev = oidp->oid_arg1; 1166 es = pcm_getdevinfo(dev); 1167 ES_LOCK(es); 1168 r = es_rd(es, ES1370_REG_STATUS, 4); 1169 ES_UNLOCK(es); 1170 new_en = (r & ENABLE_SPDIF) ? 1 : 0; 1171 err = sysctl_handle_int(oidp, &new_en, sizeof(new_en), req); 1172 1173 if (err || req->newptr == NULL) 1174 return (err); 1175 if (new_en < 0 || new_en > 1) 1176 return (EINVAL); 1177 1178 ES_LOCK(es); 1179 if (new_en) { 1180 r |= ENABLE_SPDIF; 1181 es->ctrl |= SPDIFEN_B; 1182 es->ctrl |= RECEN_B; 1183 } else { 1184 r &= ~ENABLE_SPDIF; 1185 es->ctrl &= ~SPDIFEN_B; 1186 es->ctrl &= ~RECEN_B; 1187 } 1188 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 1189 es_wr(es, ES1370_REG_STATUS, r, 4); 1190 ES_UNLOCK(es); 1191 1192 return (0); 1193 } 1194 1195 #if 0 1196 static int 1197 sysctl_es137x_latency_timer(SYSCTL_HANDLER_ARGS) 1198 { 1199 struct es_info *es; 1200 device_t dev; 1201 uint32_t val; 1202 int err; 1203 1204 dev = oidp->oid_arg1; 1205 es = pcm_getdevinfo(dev); 1206 ES_LOCK(es); 1207 val = pci_read_config(dev, PCIR_LATTIMER, 1); 1208 ES_UNLOCK(es); 1209 err = sysctl_handle_int(oidp, &val, sizeof(val), req); 1210 1211 if (err || req->newptr == NULL) 1212 return (err); 1213 if (val > 255) 1214 return (EINVAL); 1215 1216 ES_LOCK(es); 1217 pci_write_config(dev, PCIR_LATTIMER, val, 1); 1218 ES_UNLOCK(es); 1219 1220 return (0); 1221 } 1222 1223 static int 1224 sysctl_es137x_fixed_rate(SYSCTL_HANDLER_ARGS) 1225 { 1226 struct es_info *es; 1227 device_t dev; 1228 uint32_t val; 1229 int err; 1230 1231 dev = oidp->oid_arg1; 1232 es = pcm_getdevinfo(dev); 1233 ES_LOCK(es); 1234 val = ES_FIXED_RATE(es->escfg); 1235 if (val < es_caps.minspeed) 1236 val = 0; 1237 ES_UNLOCK(es); 1238 err = sysctl_handle_int(oidp, &val, sizeof(val), req); 1239 1240 if (err || req->newptr == NULL) 1241 return (err); 1242 if (val != 0 && (val < es_caps.minspeed || val > es_caps.maxspeed)) 1243 return (EINVAL); 1244 1245 ES_LOCK(es); 1246 if (es->ctrl & (CTRL_DAC2_EN|CTRL_ADC_EN)) { 1247 ES_UNLOCK(es); 1248 return (EBUSY); 1249 } 1250 if (val) { 1251 if (val != ES_FIXED_RATE(es->escfg)) { 1252 es->escfg = ES_SET_FIXED_RATE(es->escfg, val); 1253 es->ch[ES_DAC2].caps.maxspeed = val; 1254 es->ch[ES_DAC2].caps.minspeed = val; 1255 es->ch[ES_ADC].caps.maxspeed = val; 1256 es->ch[ES_ADC].caps.minspeed = val; 1257 es->ctrl &= ~CTRL_PCLKDIV; 1258 es->ctrl |= DAC2_SRTODIV(val) << CTRL_SH_PCLKDIV; 1259 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 1260 } 1261 } else { 1262 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0); 1263 es->ch[ES_DAC2].caps = es_caps; 1264 es->ch[ES_ADC].caps = es_caps; 1265 } 1266 ES_UNLOCK(es); 1267 1268 return (0); 1269 } 1270 1271 static int 1272 sysctl_es137x_single_pcm_mixer(SYSCTL_HANDLER_ARGS) 1273 { 1274 struct es_info *es; 1275 struct snddev_info *d; 1276 struct snd_mixer *m; 1277 struct cdev *i_dev; 1278 device_t dev; 1279 uint32_t val, set; 1280 int recsrc, level, err; 1281 1282 dev = oidp->oid_arg1; 1283 d = device_get_softc(dev); 1284 if (d == NULL || d->mixer_dev == NULL || d->mixer_dev->si_drv1 == NULL) 1285 return (EINVAL); 1286 es = d->devinfo; 1287 if (es == NULL) 1288 return (EINVAL); 1289 ES_LOCK(es); 1290 set = ES_SINGLE_PCM_MIX(es->escfg); 1291 val = set; 1292 ES_UNLOCK(es); 1293 err = sysctl_handle_int(oidp, &val, sizeof(val), req); 1294 1295 if (err || req->newptr == NULL) 1296 return (err); 1297 if (!(val == 0 || val == 1)) 1298 return (EINVAL); 1299 if (val == set) 1300 return (0); 1301 i_dev = d->mixer_dev; 1302 if (mixer_ioctl(i_dev, 0, (caddr_t)&recsrc, 0, NULL) != EBADF) 1303 return (EBUSY); 1304 err = mixer_ioctl(i_dev, MIXER_READ(SOUND_MIXER_PCM), 1305 (caddr_t)&level, -1, NULL); 1306 if (!err) 1307 err = mixer_ioctl(i_dev, MIXER_READ(SOUND_MIXER_RECSRC), 1308 (caddr_t)&recsrc, -1, NULL); 1309 if (err) 1310 return (err); 1311 if (level < 0) 1312 return (EINVAL); 1313 1314 ES_LOCK(es); 1315 if (es->ctrl & (CTRL_ADC_EN | CTRL_DAC1_EN | CTRL_DAC2_EN)) { 1316 ES_UNLOCK(es); 1317 return (EBUSY); 1318 } 1319 if (val) { 1320 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 1); 1321 } else { 1322 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 0); 1323 } 1324 ES_UNLOCK(es); 1325 m = i_dev->si_drv1; 1326 if (!val) { 1327 mix_setdevs(m, mix_getdevs(d->mixer_dev->si_drv1) | 1328 (1 << SOUND_MIXER_SYNTH)); 1329 mix_setrecdevs(m, mix_getrecdevs(d->mixer_dev->si_drv1) | 1330 (1 << SOUND_MIXER_SYNTH)); 1331 err = mixer_ioctl(i_dev, MIXER_WRITE(SOUND_MIXER_SYNTH), 1332 (caddr_t)&level, -1, NULL); 1333 } else { 1334 err = mixer_ioctl(i_dev, MIXER_WRITE(SOUND_MIXER_SYNTH), 1335 (caddr_t)&level, -1, NULL); 1336 mix_setdevs(m, mix_getdevs(d->mixer_dev->si_drv1) & 1337 ~(1 << SOUND_MIXER_SYNTH)); 1338 mix_setrecdevs(m, mix_getrecdevs(d->mixer_dev->si_drv1) & 1339 ~(1 << SOUND_MIXER_SYNTH)); 1340 } 1341 if (!err) { 1342 level = recsrc; 1343 if (recsrc & (1 << SOUND_MIXER_PCM)) 1344 recsrc |= 1 << SOUND_MIXER_SYNTH; 1345 else if (recsrc & (1 << SOUND_MIXER_SYNTH)) 1346 recsrc |= 1 << SOUND_MIXER_PCM; 1347 if (level != recsrc) 1348 err = mixer_ioctl(i_dev, MIXER_WRITE(SOUND_MIXER_RECSRC), 1349 (caddr_t)&recsrc, -1, NULL); 1350 } 1351 return (err); 1352 } 1353 #endif 1354 #endif /* SND_DYNSYSCTL */ 1355 1356 static void 1357 es_init_sysctls(device_t dev) 1358 { 1359 #ifdef SND_DYNSYSCTL 1360 struct es_info *es; 1361 int r, devid, revid; 1362 1363 devid = pci_get_devid(dev); 1364 revid = pci_get_revid(dev); 1365 es = pcm_getdevinfo(dev); 1366 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) || 1367 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) || 1368 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) || 1369 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) || 1370 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) { 1371 SYSCTL_ADD_PROC(snd_sysctl_tree(dev), 1372 SYSCTL_CHILDREN(snd_sysctl_tree_top(dev)), 1373 OID_AUTO, "spdif_enabled", 1374 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev), 1375 sysctl_es137x_spdif_enable, "I", 1376 "Enable S/PDIF output on primary playback channel"); 1377 #if 0 1378 } else if (devid == ES1370_PCI_ID) { 1379 /* 1380 * Enable fixed rate sysctl if both DAC2 / ADC enabled. 1381 */ 1382 if (es->ch[ES_DAC2].channel != NULL && es->ch[ES_ADC].channel != NULL) { 1383 SYSCTL_ADD_PROC(snd_sysctl_tree(dev), 1384 SYSCTL_CHILDREN(snd_sysctl_tree_top(dev)), 1385 OID_AUTO, "fixed_rate", 1386 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev), 1387 sysctl_es137x_fixed_rate, "I", 1388 "Enable fixed rate playback/recording"); 1389 } 1390 /* 1391 * Enable single pcm mixer sysctl if both DAC1/2 enabled. 1392 */ 1393 if (es->ch[ES_DAC1].channel != NULL && es->ch[ES_DAC2].channel != NULL) { 1394 SYSCTL_ADD_PROC(snd_sysctl_tree(dev), 1395 SYSCTL_CHILDREN(snd_sysctl_tree_top(dev)), 1396 OID_AUTO, "single_pcm_mixer", 1397 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev), 1398 sysctl_es137x_single_pcm_mixer, "I", 1399 "Single PCM mixer controller for both DAC1/DAC2"); 1400 } 1401 #endif 1402 } 1403 if (resource_int_value(device_get_name(dev), 1404 device_get_unit(dev), "latency_timer", &r) == 0 && 1405 !(r < 0 || r > 255)) 1406 pci_write_config(dev, PCIR_LATTIMER, r, 1); 1407 #if 0 1408 SYSCTL_ADD_PROC(snd_sysctl_tree(dev), 1409 SYSCTL_CHILDREN(snd_sysctl_tree_top(dev)), 1410 OID_AUTO, "latency_timer", 1411 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev), 1412 sysctl_es137x_latency_timer, "I", 1413 "PCI Latency Timer configuration"); 1414 #endif 1415 #endif /* SND_DYNSYSCTL */ 1416 } 1417 1418 static int 1419 es_pci_attach(device_t dev) 1420 { 1421 u_int32_t data; 1422 struct es_info *es = NULL; 1423 int mapped, i, numplay, dac_cfg; 1424 char status[SND_STATUSLEN]; 1425 struct ac97_info *codec = NULL; 1426 kobj_class_t ct = NULL; 1427 uint32_t devid; 1428 1429 es = kmalloc(sizeof *es, M_DEVBUF, M_WAITOK | M_ZERO); 1430 es->lock = snd_mtxcreate(device_get_nameunit(dev), "sound softc"); 1431 es->dev = dev; 1432 es->escfg = 0; 1433 mapped = 0; 1434 1435 pci_enable_busmaster(dev); 1436 data = pci_read_config(dev, PCIR_COMMAND, 2); 1437 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN); 1438 pci_write_config(dev, PCIR_COMMAND, data, 2); 1439 data = pci_read_config(dev, PCIR_COMMAND, 2); 1440 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 1441 es->regid = MEM_MAP_REG; 1442 es->regtype = SYS_RES_MEMORY; 1443 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid, 1444 RF_ACTIVE); 1445 if (es->reg) 1446 mapped++; 1447 } 1448 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 1449 es->regid = PCIR_BAR(0); 1450 es->regtype = SYS_RES_IOPORT; 1451 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid, 1452 RF_ACTIVE); 1453 if (es->reg) 1454 mapped++; 1455 } 1456 if (mapped == 0) { 1457 device_printf(dev, "unable to map register space\n"); 1458 goto bad; 1459 } 1460 1461 es->st = rman_get_bustag(es->reg); 1462 es->sh = rman_get_bushandle(es->reg); 1463 es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536); 1464 1465 if (resource_int_value(device_get_name(dev), 1466 device_get_unit(dev), "dac", &dac_cfg) == 0) { 1467 if (dac_cfg < 0 || dac_cfg > 3) 1468 dac_cfg = ES_DEFAULT_DAC_CFG; 1469 } else 1470 dac_cfg = ES_DEFAULT_DAC_CFG; 1471 1472 switch (dac_cfg) { 1473 case 0: /* Enable all DAC: DAC1, DAC2 */ 1474 numplay = 2; 1475 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC1); 1476 es->escfg = ES_SET_DAC_SECOND(es->escfg, ES_DAC2); 1477 break; 1478 case 1: /* Only DAC1 */ 1479 numplay = 1; 1480 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC1); 1481 break; 1482 case 3: /* Enable all DAC / swap position: DAC2, DAC1 */ 1483 numplay = 2; 1484 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC2); 1485 es->escfg = ES_SET_DAC_SECOND(es->escfg, ES_DAC1); 1486 break; 1487 case 2: /* Only DAC2 */ 1488 default: 1489 numplay = 1; 1490 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC2); 1491 break; 1492 } 1493 es->escfg = ES_SET_NUMPLAY(es->escfg, numplay); 1494 es->escfg = ES_SET_NUMREC(es->escfg, 1); 1495 1496 devid = pci_get_devid(dev); 1497 switch (devid) { 1498 case ES1371_PCI_ID: 1499 case ES1371_PCI_ID2: 1500 case CT5880_PCI_ID: 1501 case CT4730_PCI_ID: 1502 es1371_init(es); 1503 codec = AC97_CREATE(dev, es, es1371_ac97); 1504 if (codec == NULL) 1505 goto bad; 1506 /* our init routine does everything for us */ 1507 /* set to NULL; flag mixer_init not to run the ac97_init */ 1508 /* ac97_mixer.init = NULL; */ 1509 if (mixer_init(dev, ac97_getmixerclass(), codec)) 1510 goto bad; 1511 ct = &eschan1371_class; 1512 break; 1513 case ES1370_PCI_ID: 1514 es1370_init(es); 1515 /* 1516 * Disable fixed rate operation if DAC2 disabled. 1517 * This is a special case for es1370 only, where the 1518 * speed of both ADC and DAC2 locked together. 1519 */ 1520 if (!ES_DAC2_ENABLED(es->escfg)) { 1521 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0); 1522 } 1523 if (mixer_init(dev, &es1370_mixer_class, es)) 1524 goto bad; 1525 ct = &eschan1370_class; 1526 break; 1527 default: 1528 goto bad; 1529 /* NOTREACHED */ 1530 } 1531 1532 es->irqid = 0; 1533 es->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &es->irqid, 1534 RF_ACTIVE | RF_SHAREABLE); 1535 if (!es->irq || snd_setup_intr(dev, es->irq, INTR_MPSAFE, es_intr, es, &es->ih)) { 1536 device_printf(dev, "unable to map interrupt\n"); 1537 goto bad; 1538 } 1539 1540 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 1541 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 1542 /*highaddr*/BUS_SPACE_MAXADDR, 1543 /*filter*/NULL, /*filterarg*/NULL, 1544 /*maxsize*/es->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 1545 /*flags*/0, 1546 &es->parent_dmat) != 0) { 1547 device_printf(dev, "unable to create dma tag\n"); 1548 goto bad; 1549 } 1550 1551 ksnprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld %s", 1552 (es->regtype == SYS_RES_IOPORT)? "io" : "memory", 1553 rman_get_start(es->reg), rman_get_start(es->irq),PCM_KLDSTRING(snd_es137x)); 1554 1555 if (pcm_register(dev, es, numplay, 1)) 1556 goto bad; 1557 for (i = 0; i < numplay; i++) 1558 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 1559 pcm_addchan(dev, PCMDIR_REC, ct, es); 1560 es_init_sysctls(dev); 1561 pcm_setstatus(dev, status); 1562 es->escfg = ES_SET_GP(es->escfg, 0); 1563 if (numplay == 1) { 1564 device_printf(dev, "<Playback: DAC%d / Record: ADC>\n", 1565 ES_DAC_FIRST(es->escfg) + 1); 1566 } else if (numplay == 2) { 1567 device_printf(dev, "<Playback: DAC%d,DAC%d / Record: ADC>\n", 1568 ES_DAC_FIRST(es->escfg) + 1, 1569 ES_DAC_SECOND(es->escfg) + 1); 1570 } 1571 return 0; 1572 1573 bad: 1574 if (es->parent_dmat) bus_dma_tag_destroy(es->parent_dmat); 1575 if (es->ih) bus_teardown_intr(dev, es->irq, es->ih); 1576 if (es->irq) bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 1577 if (codec) ac97_destroy(codec); 1578 if (es->reg) bus_release_resource(dev, es->regtype, es->regid, es->reg); 1579 if (es->lock) snd_mtxfree(es->lock); 1580 if (es) kfree(es, M_DEVBUF); 1581 return ENXIO; 1582 } 1583 1584 static int 1585 es_pci_detach(device_t dev) 1586 { 1587 int r; 1588 struct es_info *es; 1589 1590 r = pcm_unregister(dev); 1591 if (r) return r; 1592 1593 es = pcm_getdevinfo(dev); 1594 bus_teardown_intr(dev, es->irq, es->ih); 1595 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 1596 bus_release_resource(dev, es->regtype, es->regid, es->reg); 1597 bus_dma_tag_destroy(es->parent_dmat); 1598 snd_mtxfree(es->lock); 1599 kfree(es, M_DEVBUF); 1600 1601 return 0; 1602 } 1603 1604 static device_method_t es_methods[] = { 1605 /* Device interface */ 1606 DEVMETHOD(device_probe, es_pci_probe), 1607 DEVMETHOD(device_attach, es_pci_attach), 1608 DEVMETHOD(device_detach, es_pci_detach), 1609 1610 { 0, 0 } 1611 }; 1612 1613 static driver_t es_driver = { 1614 "pcm", 1615 es_methods, 1616 PCM_SOFTC_SIZE, 1617 }; 1618 1619 DRIVER_MODULE(snd_es137x, pci, es_driver, pcm_devclass, 0, 0); 1620 MODULE_DEPEND(snd_es137x, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); 1621 MODULE_VERSION(snd_es137x, 1); 1622