1 /* 2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 3 * boards based on the ES1370, ES1371 and ES1373 chips. 4 * 5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 6 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in 18 * the documentation and/or other materials provided with the 19 * distribution. 20 * 21 * 3. All advertising materials mentioning features or use of this 22 * software must display the following acknowledgement: 23 * This product includes software developed by Joachim Kuebart. 24 * 25 * 4. The name of the author may not be used to endorse or promote 26 * products derived from this software without specific prior 27 * written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 39 * OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * $FreeBSD: src/sys/dev/sound/pci/es137x.c,v 1.13.2.10 2002/05/07 17:02:25 greid Exp $ 42 * $DragonFly: src/sys/dev/sound/pci/es137x.c,v 1.3 2003/08/07 21:17:13 dillon Exp $ 43 */ 44 45 /* 46 * Part of this code was heavily inspired by the linux driver from 47 * Thomas Sailer (sailer@ife.ee.ethz.ch) 48 * Just about everything has been touched and reworked in some way but 49 * the all the underlying sequences/timing/register values are from 50 * Thomas' code. 51 * 52 */ 53 54 #include <dev/sound/pcm/sound.h> 55 #include <dev/sound/pcm/ac97.h> 56 #include <dev/sound/pci/es137x.h> 57 58 #include <bus/pci/pcireg.h> 59 #include <bus/pci/pcivar.h> 60 61 #include <sys/sysctl.h> 62 63 #include "mixer_if.h" 64 65 SND_DECLARE_FILE("$DragonFly: src/sys/dev/sound/pci/es137x.c,v 1.3 2003/08/07 21:17:13 dillon Exp $"); 66 67 static int debug = 0; 68 SYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, ""); 69 70 #define MEM_MAP_REG 0x14 71 72 /* PCI IDs of supported chips */ 73 #define ES1370_PCI_ID 0x50001274 74 #define ES1371_PCI_ID 0x13711274 75 #define ES1371_PCI_ID2 0x13713274 76 #define CT5880_PCI_ID 0x58801274 77 78 #define ES1371REV_ES1371_A 0x02 79 #define ES1371REV_ES1371_B 0x09 80 81 #define ES1371REV_ES1373_8 0x08 82 #define ES1371REV_ES1373_A 0x04 83 #define ES1371REV_ES1373_B 0x06 84 85 #define ES1371REV_CT5880_A 0x07 86 87 #define CT5880REV_CT5880_C 0x02 88 #define CT5880REV_CT5880_D 0x03 89 #define CT5880REV_CT5880_E 0x04 90 91 #define ES_DEFAULT_BUFSZ 4096 92 93 /* device private data */ 94 struct es_info; 95 96 struct es_chinfo { 97 struct es_info *parent; 98 struct pcm_channel *channel; 99 struct snd_dbuf *buffer; 100 int dir, num; 101 u_int32_t fmt, blksz, bufsz; 102 }; 103 104 struct es_info { 105 bus_space_tag_t st; 106 bus_space_handle_t sh; 107 bus_dma_tag_t parent_dmat; 108 109 struct resource *reg, *irq; 110 int regtype, regid, irqid; 111 void *ih; 112 113 device_t dev; 114 int num; 115 unsigned int bufsz; 116 117 /* Contents of board's registers */ 118 u_long ctrl; 119 u_long sctrl; 120 struct es_chinfo pch, rch; 121 }; 122 123 /* -------------------------------------------------------------------- */ 124 125 /* prototypes */ 126 static void es_intr(void *); 127 128 static u_int es1371_wait_src_ready(struct es_info *); 129 static void es1371_src_write(struct es_info *, u_short, unsigned short); 130 static u_int es1371_adc_rate(struct es_info *, u_int, int); 131 static u_int es1371_dac_rate(struct es_info *, u_int, int); 132 static int es1371_init(struct es_info *, device_t); 133 static int es1370_init(struct es_info *); 134 static int es1370_wrcodec(struct es_info *, u_char, u_char); 135 136 static u_int32_t es_playfmt[] = { 137 AFMT_U8, 138 AFMT_STEREO | AFMT_U8, 139 AFMT_S16_LE, 140 AFMT_STEREO | AFMT_S16_LE, 141 0 142 }; 143 static struct pcmchan_caps es_playcaps = {4000, 48000, es_playfmt, 0}; 144 145 static u_int32_t es_recfmt[] = { 146 AFMT_U8, 147 AFMT_STEREO | AFMT_U8, 148 AFMT_S16_LE, 149 AFMT_STEREO | AFMT_S16_LE, 150 0 151 }; 152 static struct pcmchan_caps es_reccaps = {4000, 48000, es_recfmt, 0}; 153 154 static const struct { 155 unsigned volidx:4; 156 unsigned left:4; 157 unsigned right:4; 158 unsigned stereo:1; 159 unsigned recmask:13; 160 unsigned avail:1; 161 } mixtable[SOUND_MIXER_NRDEVICES] = { 162 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, 163 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 164 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 165 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 166 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 167 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 168 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 169 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 170 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 171 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 172 }; 173 174 /* -------------------------------------------------------------------- */ 175 /* The es1370 mixer interface */ 176 177 static int 178 es1370_mixinit(struct snd_mixer *m) 179 { 180 int i; 181 u_int32_t v; 182 183 v = 0; 184 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 185 if (mixtable[i].avail) v |= (1 << i); 186 mix_setdevs(m, v); 187 v = 0; 188 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 189 if (mixtable[i].recmask) v |= (1 << i); 190 mix_setrecdevs(m, v); 191 return 0; 192 } 193 194 static int 195 es1370_mixset(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) 196 { 197 int l, r, rl, rr; 198 199 if (!mixtable[dev].avail) return -1; 200 l = left; 201 r = mixtable[dev].stereo? right : l; 202 if (mixtable[dev].left == 0xf) { 203 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 204 } else { 205 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 206 } 207 if (mixtable[dev].stereo) { 208 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; 209 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr); 210 } 211 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl); 212 return l | (r << 8); 213 } 214 215 static int 216 es1370_mixsetrecsrc(struct snd_mixer *m, u_int32_t src) 217 { 218 int i, j = 0; 219 220 if (src == 0) src = 1 << SOUND_MIXER_MIC; 221 src &= mix_getrecdevs(m); 222 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 223 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 224 225 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55); 226 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa); 227 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17); 228 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f); 229 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f); 230 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f); 231 return src; 232 } 233 234 static kobj_method_t es1370_mixer_methods[] = { 235 KOBJMETHOD(mixer_init, es1370_mixinit), 236 KOBJMETHOD(mixer_set, es1370_mixset), 237 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc), 238 { 0, 0 } 239 }; 240 MIXER_DECLARE(es1370_mixer); 241 242 /* -------------------------------------------------------------------- */ 243 244 static int 245 es1370_wrcodec(struct es_info *es, u_char i, u_char data) 246 { 247 int wait = 100; /* 100 msec timeout */ 248 249 do { 250 if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) & 251 STAT_CSTAT) == 0) { 252 bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC, 253 ((u_short)i << CODEC_INDEX_SHIFT) | data); 254 return 0; 255 } 256 DELAY(1000); 257 } while (--wait); 258 printf("pcm: es1370_wrcodec timed out\n"); 259 return -1; 260 } 261 262 /* -------------------------------------------------------------------- */ 263 264 /* channel interface */ 265 static void * 266 eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 267 { 268 struct es_info *es = devinfo; 269 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 270 271 ch->parent = es; 272 ch->channel = c; 273 ch->buffer = b; 274 ch->bufsz = es->bufsz; 275 ch->blksz = ch->bufsz / 2; 276 ch->num = ch->parent->num++; 277 if (sndbuf_alloc(ch->buffer, es->parent_dmat, ch->bufsz) == -1) return NULL; 278 return ch; 279 } 280 281 static int 282 eschan_setdir(kobj_t obj, void *data, int dir) 283 { 284 struct es_chinfo *ch = data; 285 struct es_info *es = ch->parent; 286 287 if (dir == PCMDIR_PLAY) { 288 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMEADR >> 8); 289 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff, vtophys(sndbuf_getbuf(ch->buffer))); 290 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1); 291 } else { 292 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8); 293 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff, vtophys(sndbuf_getbuf(ch->buffer))); 294 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1); 295 } 296 ch->dir = dir; 297 return 0; 298 } 299 300 static int 301 eschan_setformat(kobj_t obj, void *data, u_int32_t format) 302 { 303 struct es_chinfo *ch = data; 304 struct es_info *es = ch->parent; 305 306 if (ch->dir == PCMDIR_PLAY) { 307 es->sctrl &= ~SCTRL_P2FMT; 308 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 309 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 310 } else { 311 es->sctrl &= ~SCTRL_R1FMT; 312 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 313 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 314 } 315 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 316 ch->fmt = format; 317 return 0; 318 } 319 320 static int 321 eschan1370_setspeed(kobj_t obj, void *data, u_int32_t speed) 322 { 323 struct es_chinfo *ch = data; 324 struct es_info *es = ch->parent; 325 326 es->ctrl &= ~CTRL_PCLKDIV; 327 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 328 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 329 /* rec/play speeds locked together - should indicate in flags */ 330 return speed; /* XXX calc real speed */ 331 } 332 333 static int 334 eschan1371_setspeed(kobj_t obj, void *data, u_int32_t speed) 335 { 336 struct es_chinfo *ch = data; 337 struct es_info *es = ch->parent; 338 339 if (ch->dir == PCMDIR_PLAY) { 340 return es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 341 } else { 342 return es1371_adc_rate(es, speed, 1); /* record */ 343 } 344 } 345 346 static int 347 eschan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 348 { 349 struct es_chinfo *ch = data; 350 351 ch->blksz = blocksize; 352 ch->bufsz = ch->blksz * 2; 353 sndbuf_resize(ch->buffer, 2, ch->blksz); 354 355 return ch->blksz; 356 } 357 358 static int 359 eschan_trigger(kobj_t obj, void *data, int go) 360 { 361 struct es_chinfo *ch = data; 362 struct es_info *es = ch->parent; 363 unsigned cnt; 364 365 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 366 return 0; 367 368 cnt = (ch->blksz / sndbuf_getbps(ch->buffer)) - 1; 369 370 if (ch->dir == PCMDIR_PLAY) { 371 if (go == PCMTRIG_START) { 372 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 373 es->ctrl |= CTRL_DAC2_EN; 374 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN); 375 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 376 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_SCOUNT, cnt); 377 /* start at beginning of buffer */ 378 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMECNT >> 8); 379 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1); 380 } else es->ctrl &= ~CTRL_DAC2_EN; 381 } else { 382 if (go == PCMTRIG_START) { 383 es->ctrl |= CTRL_ADC_EN; 384 es->sctrl &= ~SCTRL_R1LOOPSEL; 385 es->sctrl |= SCTRL_R1INTEN; 386 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_SCOUNT, cnt); 387 /* start at beginning of buffer */ 388 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMECNT >> 8); 389 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1); 390 } else es->ctrl &= ~CTRL_ADC_EN; 391 } 392 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 393 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 394 return 0; 395 } 396 397 static int 398 eschan_getptr(kobj_t obj, void *data) 399 { 400 struct es_chinfo *ch = data; 401 struct es_info *es = ch->parent; 402 u_int32_t reg, cnt; 403 404 if (ch->dir == PCMDIR_PLAY) 405 reg = ES1370_REG_DAC2_FRAMECNT; 406 else 407 reg = ES1370_REG_ADC_FRAMECNT; 408 409 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, reg >> 8); 410 cnt = bus_space_read_4(es->st, es->sh, reg & 0x000000ff) >> 16; 411 /* cnt is longwords */ 412 return cnt << 2; 413 } 414 415 static struct pcmchan_caps * 416 eschan_getcaps(kobj_t obj, void *data) 417 { 418 struct es_chinfo *ch = data; 419 return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps; 420 } 421 422 static kobj_method_t eschan1370_methods[] = { 423 KOBJMETHOD(channel_init, eschan_init), 424 KOBJMETHOD(channel_setdir, eschan_setdir), 425 KOBJMETHOD(channel_setformat, eschan_setformat), 426 KOBJMETHOD(channel_setspeed, eschan1370_setspeed), 427 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 428 KOBJMETHOD(channel_trigger, eschan_trigger), 429 KOBJMETHOD(channel_getptr, eschan_getptr), 430 KOBJMETHOD(channel_getcaps, eschan_getcaps), 431 { 0, 0 } 432 }; 433 CHANNEL_DECLARE(eschan1370); 434 435 static kobj_method_t eschan1371_methods[] = { 436 KOBJMETHOD(channel_init, eschan_init), 437 KOBJMETHOD(channel_setdir, eschan_setdir), 438 KOBJMETHOD(channel_setformat, eschan_setformat), 439 KOBJMETHOD(channel_setspeed, eschan1371_setspeed), 440 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 441 KOBJMETHOD(channel_trigger, eschan_trigger), 442 KOBJMETHOD(channel_getptr, eschan_getptr), 443 KOBJMETHOD(channel_getcaps, eschan_getcaps), 444 { 0, 0 } 445 }; 446 CHANNEL_DECLARE(eschan1371); 447 448 /* -------------------------------------------------------------------- */ 449 /* The interrupt handler */ 450 static void 451 es_intr(void *p) 452 { 453 struct es_info *es = p; 454 unsigned intsrc, sctrl; 455 456 intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS); 457 if ((intsrc & STAT_INTR) == 0) return; 458 459 sctrl = es->sctrl; 460 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 461 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 462 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 463 464 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl); 465 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 466 467 if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 468 if (intsrc & STAT_DAC1); 469 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 470 } 471 472 /* ES1370 specific */ 473 static int 474 es1370_init(struct es_info *es) 475 { 476 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS | 477 (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV); 478 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 479 480 es->sctrl = 0; 481 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 482 483 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 484 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 485 * {LR,B}CLK2 and run off the LRCLK2 486 * PLL; program DAC_SYNC=0! */ 487 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 488 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ 489 490 return 0; 491 } 492 493 /* ES1371 specific */ 494 int 495 es1371_init(struct es_info *es, device_t dev) 496 { 497 int idx; 498 int devid = pci_get_devid(dev); 499 int revid = pci_get_revid(dev); 500 501 if (debug > 0) printf("es_init\n"); 502 503 es->num = 0; 504 es->ctrl = 0; 505 es->sctrl = 0; 506 /* initialize the chips */ 507 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) || 508 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) || 509 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) || 510 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) || 511 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) { 512 bus_space_write_4(es->st, es->sh, ES1370_REG_STATUS, 0x20000000); 513 DELAY(20000); 514 if (debug > 0) device_printf(dev, "ac97 2.1 enabled\n"); 515 } else { /* pre ac97 2.1 card */ 516 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 517 if (debug > 0) device_printf(dev, "ac97 pre-2.1 enabled\n"); 518 } 519 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 520 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0); 521 /* AC'97 warm reset to start the bitclk */ 522 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES); 523 DELAY(2000); 524 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl); 525 /* Init the sample rate converter */ 526 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC); 527 for (idx = 0; idx < 0x80; idx++) 528 es1371_src_write(es, idx, 0); 529 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 530 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 531 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 532 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 533 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 534 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 535 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 536 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 537 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 538 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 539 es1371_adc_rate (es, 22050, 1); 540 es1371_dac_rate (es, 22050, 1); 541 es1371_dac_rate (es, 22050, 2); 542 /* WARNING: 543 * enabling the sample rate converter without properly programming 544 * its parameters causes the chip to lock up (the SRC busy bit will 545 * be stuck high, and I've found no way to rectify this other than 546 * power cycle) 547 */ 548 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0); 549 550 return (0); 551 } 552 553 /* -------------------------------------------------------------------- */ 554 555 static int 556 es1371_wrcd(kobj_t obj, void *s, int addr, u_int32_t data) 557 { 558 int sl; 559 unsigned t, x; 560 struct es_info *es = (struct es_info*)s; 561 562 if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data); 563 564 for (t = 0; t < 0x1000; t++) 565 if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP)))) 566 break; 567 sl = spltty(); 568 /* save the current state for later */ 569 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 570 /* enable SRC state data in SRC mux */ 571 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 572 (es1371_wait_src_ready(s) & 573 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 574 /* wait for a SAFE time to write addr/data and then do it, dammit */ 575 for (t = 0; t < 0x1000; t++) 576 if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 577 break; 578 579 if (debug > 2) 580 printf("one b_s_w: 0x%lx 0x%x 0x%x\n", 581 rman_get_start(es->reg), ES1371_REG_CODEC, 582 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 583 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 584 585 bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC, 586 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 587 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 588 /* restore SRC reg */ 589 es1371_wait_src_ready(s); 590 if (debug > 2) 591 printf("two b_s_w: 0x%lx 0x%x 0x%x\n", 592 rman_get_start(es->reg), ES1371_REG_SMPRATE, x); 593 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 594 splx(sl); 595 596 return 0; 597 } 598 599 static int 600 es1371_rdcd(kobj_t obj, void *s, int addr) 601 { 602 int sl; 603 unsigned t, x = 0; 604 struct es_info *es = (struct es_info *)s; 605 606 if (debug > 0) printf("rdcodec addr 0x%x ... ", addr); 607 608 for (t = 0; t < 0x1000; t++) 609 if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP)) 610 break; 611 if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x); 612 613 sl = spltty(); 614 615 /* save the current state for later */ 616 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 617 /* enable SRC state data in SRC mux */ 618 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 619 (es1371_wait_src_ready(s) & 620 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 621 /* wait for a SAFE time to write addr/data and then do it, dammit */ 622 for (t = 0; t < 0x5000; t++) 623 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 624 break; 625 if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x); 626 bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC, 627 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD); 628 629 /* restore SRC reg */ 630 es1371_wait_src_ready(s); 631 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 632 633 splx(sl); 634 635 /* now wait for the stinkin' data (RDY) */ 636 for (t = 0; t < 0x1000; t++) 637 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY) 638 break; 639 if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT)); 640 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 641 } 642 643 static kobj_method_t es1371_ac97_methods[] = { 644 KOBJMETHOD(ac97_read, es1371_rdcd), 645 KOBJMETHOD(ac97_write, es1371_wrcd), 646 { 0, 0 } 647 }; 648 AC97_DECLARE(es1371_ac97); 649 650 /* -------------------------------------------------------------------- */ 651 652 static u_int 653 es1371_src_read(struct es_info *es, u_short reg) 654 { 655 unsigned int r; 656 657 r = es1371_wait_src_ready(es) & 658 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 659 r |= ES1371_SRC_RAM_ADDRO(reg); 660 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r); 661 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 662 } 663 664 static void 665 es1371_src_write(struct es_info *es, u_short reg, u_short data){ 666 u_int r; 667 668 r = es1371_wait_src_ready(es) & 669 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 670 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 671 /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */ 672 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE); 673 } 674 675 static u_int 676 es1371_adc_rate(struct es_info *es, u_int rate, int set) 677 { 678 u_int n, truncm, freq, result; 679 680 if (rate > 48000) rate = 48000; 681 if (rate < 4000) rate = 4000; 682 n = rate / 3000; 683 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 684 n--; 685 truncm = (21 * n - 1) | 1; 686 freq = ((48000UL << 15) / rate) * n; 687 result = (48000UL << 15) / (freq / n); 688 if (set) { 689 if (rate >= 24000) { 690 if (truncm > 239) truncm = 239; 691 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 692 (((239 - truncm) >> 1) << 9) | (n << 4)); 693 } else { 694 if (truncm > 119) truncm = 119; 695 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 696 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 697 } 698 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 699 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 700 0x00ff) | ((freq >> 5) & 0xfc00)); 701 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 702 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 703 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 704 } 705 return result; 706 } 707 708 static u_int 709 es1371_dac_rate(struct es_info *es, u_int rate, int set) 710 { 711 u_int freq, r, result, dac, dis; 712 713 if (rate > 48000) rate = 48000; 714 if (rate < 4000) rate = 4000; 715 freq = (rate << 15) / 3000; 716 result = (freq * 3000) >> 15; 717 if (set) { 718 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 719 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 720 721 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 722 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 723 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 724 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 725 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 726 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 727 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 728 } 729 return result; 730 } 731 732 static u_int 733 es1371_wait_src_ready(struct es_info *es) 734 { 735 u_int t, r; 736 737 for (t = 0; t < 500; t++) { 738 if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY)) 739 return r; 740 DELAY(1000); 741 } 742 printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r); 743 return 0; 744 } 745 746 /* -------------------------------------------------------------------- */ 747 748 /* 749 * Probe and attach the card 750 */ 751 752 static int 753 es_pci_probe(device_t dev) 754 { 755 switch(pci_get_devid(dev)) { 756 case ES1370_PCI_ID: 757 device_set_desc(dev, "AudioPCI ES1370"); 758 return 0; 759 760 case ES1371_PCI_ID: 761 switch(pci_get_revid(dev)) { 762 case ES1371REV_ES1371_A: 763 device_set_desc(dev, "AudioPCI ES1371-A"); 764 return 0; 765 766 case ES1371REV_ES1371_B: 767 device_set_desc(dev, "AudioPCI ES1371-B"); 768 return 0; 769 770 case ES1371REV_ES1373_A: 771 device_set_desc(dev, "AudioPCI ES1373-A"); 772 return 0; 773 774 case ES1371REV_ES1373_B: 775 device_set_desc(dev, "AudioPCI ES1373-B"); 776 return 0; 777 778 case ES1371REV_ES1373_8: 779 device_set_desc(dev, "AudioPCI ES1373-8"); 780 return 0; 781 782 case ES1371REV_CT5880_A: 783 device_set_desc(dev, "Creative CT5880-A"); 784 return 0; 785 786 default: 787 device_set_desc(dev, "AudioPCI ES1371-?"); 788 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 789 return 0; 790 } 791 792 case ES1371_PCI_ID2: 793 device_set_desc(dev, "Strange AudioPCI ES1371-? (vid=3274)"); 794 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 795 return 0; 796 797 case CT5880_PCI_ID: 798 switch(pci_get_revid(dev)) { 799 case CT5880REV_CT5880_C: 800 device_set_desc(dev, "Creative CT5880-C"); 801 return 0; 802 803 case CT5880REV_CT5880_D: 804 device_set_desc(dev, "Creative CT5880-D"); 805 return 0; 806 807 case CT5880REV_CT5880_E: 808 device_set_desc(dev, "Creative CT5880-E"); 809 return 0; 810 811 default: 812 device_set_desc(dev, "Creative CT5880-?"); 813 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 814 return 0; 815 } 816 817 default: 818 return ENXIO; 819 } 820 } 821 822 static int 823 es_pci_attach(device_t dev) 824 { 825 u_int32_t data; 826 struct es_info *es = 0; 827 int mapped; 828 char status[SND_STATUSLEN]; 829 struct ac97_info *codec = 0; 830 kobj_class_t ct = NULL; 831 832 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) { 833 device_printf(dev, "cannot allocate softc\n"); 834 return ENXIO; 835 } 836 837 es->dev = dev; 838 mapped = 0; 839 data = pci_read_config(dev, PCIR_COMMAND, 2); 840 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 841 pci_write_config(dev, PCIR_COMMAND, data, 2); 842 data = pci_read_config(dev, PCIR_COMMAND, 2); 843 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 844 es->regid = MEM_MAP_REG; 845 es->regtype = SYS_RES_MEMORY; 846 es->reg = bus_alloc_resource(dev, es->regtype, &es->regid, 847 0, ~0, 1, RF_ACTIVE); 848 if (es->reg) { 849 es->st = rman_get_bustag(es->reg); 850 es->sh = rman_get_bushandle(es->reg); 851 mapped++; 852 } 853 } 854 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 855 es->regid = PCIR_MAPS; 856 es->regtype = SYS_RES_IOPORT; 857 es->reg = bus_alloc_resource(dev, es->regtype, &es->regid, 858 0, ~0, 1, RF_ACTIVE); 859 if (es->reg) { 860 es->st = rman_get_bustag(es->reg); 861 es->sh = rman_get_bushandle(es->reg); 862 mapped++; 863 } 864 } 865 if (mapped == 0) { 866 device_printf(dev, "unable to map register space\n"); 867 goto bad; 868 } 869 870 es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536); 871 872 if (pci_get_devid(dev) == ES1371_PCI_ID || 873 pci_get_devid(dev) == ES1371_PCI_ID2 || 874 pci_get_devid(dev) == CT5880_PCI_ID) { 875 if(-1 == es1371_init(es, dev)) { 876 device_printf(dev, "unable to initialize the card\n"); 877 goto bad; 878 } 879 codec = AC97_CREATE(dev, es, es1371_ac97); 880 if (codec == NULL) goto bad; 881 /* our init routine does everything for us */ 882 /* set to NULL; flag mixer_init not to run the ac97_init */ 883 /* ac97_mixer.init = NULL; */ 884 if (mixer_init(dev, ac97_getmixerclass(), codec)) goto bad; 885 ct = &eschan1371_class; 886 } else if (pci_get_devid(dev) == ES1370_PCI_ID) { 887 if (-1 == es1370_init(es)) { 888 device_printf(dev, "unable to initialize the card\n"); 889 goto bad; 890 } 891 if (mixer_init(dev, &es1370_mixer_class, es)) goto bad; 892 ct = &eschan1370_class; 893 } else goto bad; 894 895 es->irqid = 0; 896 es->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &es->irqid, 897 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 898 if (!es->irq || snd_setup_intr(dev, es->irq, 0, es_intr, es, &es->ih)) { 899 device_printf(dev, "unable to map interrupt\n"); 900 goto bad; 901 } 902 903 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 904 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 905 /*highaddr*/BUS_SPACE_MAXADDR, 906 /*filter*/NULL, /*filterarg*/NULL, 907 /*maxsize*/es->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 908 /*flags*/0, &es->parent_dmat) != 0) { 909 device_printf(dev, "unable to create dma tag\n"); 910 goto bad; 911 } 912 913 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld", 914 (es->regtype == SYS_RES_IOPORT)? "io" : "memory", 915 rman_get_start(es->reg), rman_get_start(es->irq)); 916 917 if (pcm_register(dev, es, 1, 1)) goto bad; 918 pcm_addchan(dev, PCMDIR_REC, ct, es); 919 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 920 pcm_setstatus(dev, status); 921 922 return 0; 923 924 bad: 925 if (codec) ac97_destroy(codec); 926 if (es->reg) bus_release_resource(dev, es->regtype, es->regid, es->reg); 927 if (es->ih) bus_teardown_intr(dev, es->irq, es->ih); 928 if (es->irq) bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 929 if (es->parent_dmat) bus_dma_tag_destroy(es->parent_dmat); 930 if (es) free(es, M_DEVBUF); 931 return ENXIO; 932 } 933 934 static int 935 es_pci_detach(device_t dev) 936 { 937 int r; 938 struct es_info *es; 939 940 r = pcm_unregister(dev); 941 if (r) 942 return r; 943 944 es = pcm_getdevinfo(dev); 945 bus_release_resource(dev, es->regtype, es->regid, es->reg); 946 bus_teardown_intr(dev, es->irq, es->ih); 947 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 948 bus_dma_tag_destroy(es->parent_dmat); 949 free(es, M_DEVBUF); 950 951 return 0; 952 } 953 954 static device_method_t es_methods[] = { 955 /* Device interface */ 956 DEVMETHOD(device_probe, es_pci_probe), 957 DEVMETHOD(device_attach, es_pci_attach), 958 DEVMETHOD(device_detach, es_pci_detach), 959 960 { 0, 0 } 961 }; 962 963 static driver_t es_driver = { 964 "pcm", 965 es_methods, 966 PCM_SOFTC_SIZE, 967 }; 968 969 DRIVER_MODULE(snd_es137x, pci, es_driver, pcm_devclass, 0, 0); 970 MODULE_DEPEND(snd_es137x, snd_pcm, PCM_MINVER, PCM_PREFVER, PCM_MAXVER); 971 MODULE_VERSION(snd_es137x, 1); 972