1 /*- 2 * Copyright (c) 2012 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 /* 28 * RME HDSPe driver for FreeBSD. 29 * Supported cards: AIO, RayDAT. 30 */ 31 32 #include <dev/sound/pcm/sound.h> 33 #include <dev/sound/pci/hdspe.h> 34 #include <dev/sound/chip.h> 35 36 #include <bus/pci/pcireg.h> 37 #include <bus/pci/pcivar.h> 38 39 #include <mixer_if.h> 40 41 SND_DECLARE_FILE("$FreeBSD: head/sys/dev/sound/pci/hdspe.c 267581 2014-06-17 16:07:57Z jhb $"); 42 43 static struct hdspe_channel chan_map_aio[] = { 44 { 0, 1, "line", 1, 1 }, 45 { 6, 7, "phone", 1, 0 }, 46 { 8, 9, "aes", 1, 1 }, 47 { 10, 11, "s/pdif", 1, 1 }, 48 { 12, 16, "adat", 1, 1 }, 49 50 /* Single or double speed. */ 51 { 14, 18, "adat", 1, 1 }, 52 53 /* Single speed only. */ 54 { 13, 15, "adat", 1, 1 }, 55 { 17, 19, "adat", 1, 1 }, 56 57 { 0, 0, NULL, 0, 0 }, 58 }; 59 60 static struct hdspe_channel chan_map_rd[] = { 61 { 0, 1, "aes", 1, 1 }, 62 { 2, 3, "s/pdif", 1, 1 }, 63 { 4, 5, "adat", 1, 1 }, 64 { 6, 7, "adat", 1, 1 }, 65 { 8, 9, "adat", 1, 1 }, 66 { 10, 11, "adat", 1, 1 }, 67 68 /* Single or double speed. */ 69 { 12, 13, "adat", 1, 1 }, 70 { 14, 15, "adat", 1, 1 }, 71 { 16, 17, "adat", 1, 1 }, 72 { 18, 19, "adat", 1, 1 }, 73 74 /* Single speed only. */ 75 { 20, 21, "adat", 1, 1 }, 76 { 22, 23, "adat", 1, 1 }, 77 { 24, 25, "adat", 1, 1 }, 78 { 26, 27, "adat", 1, 1 }, 79 { 28, 29, "adat", 1, 1 }, 80 { 30, 31, "adat", 1, 1 }, 81 { 32, 33, "adat", 1, 1 }, 82 { 34, 35, "adat", 1, 1 }, 83 84 { 0, 0, NULL, 0, 0 }, 85 }; 86 87 static void 88 hdspe_intr(void *p) 89 { 90 struct sc_info *sc = (struct sc_info *)p; 91 struct sc_pcminfo *scp; 92 device_t *devlist; 93 int devcount, status; 94 int i, err; 95 96 snd_mtxlock(sc->lock); 97 98 status = hdspe_read_1(sc, HDSPE_STATUS_REG); 99 if (status & HDSPE_AUDIO_IRQ_PENDING) { 100 if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0) 101 return; 102 103 for (i = 0; i < devcount; i++) { 104 scp = device_get_ivars(devlist[i]); 105 if (scp->ih != NULL) 106 scp->ih(scp); 107 } 108 109 hdspe_write_1(sc, HDSPE_INTERRUPT_ACK, 0); 110 kfree(devlist, M_TEMP); 111 } 112 113 snd_mtxunlock(sc->lock); 114 } 115 116 static void 117 hdspe_dmapsetmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) 118 { 119 #if 0 120 struct sc_info *sc = (struct sc_info *)arg; 121 device_printf(sc->dev, "hdspe_dmapsetmap()\n"); 122 #endif 123 } 124 125 static int 126 hdspe_alloc_resources(struct sc_info *sc) 127 { 128 129 /* Allocate resource. */ 130 sc->csid = PCIR_BAR(0); 131 sc->cs = bus_alloc_resource(sc->dev, SYS_RES_MEMORY, 132 &sc->csid, 0, ~0, 1, RF_ACTIVE); 133 134 if (!sc->cs) { 135 device_printf(sc->dev, "Unable to map SYS_RES_MEMORY.\n"); 136 return (ENXIO); 137 } 138 sc->cst = rman_get_bustag(sc->cs); 139 sc->csh = rman_get_bushandle(sc->cs); 140 141 142 /* Allocate interrupt resource. */ 143 sc->irqid = 0; 144 sc->irq = bus_alloc_resource(sc->dev, SYS_RES_IRQ, &sc->irqid, 145 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 146 147 if (!sc->irq || 148 bus_setup_intr(sc->dev, sc->irq, INTR_MPSAFE, 149 hdspe_intr, sc, &sc->ih, NULL)) { 150 device_printf(sc->dev, "Unable to alloc interrupt resource.\n"); 151 return (ENXIO); 152 } 153 154 /* Allocate DMA resources. */ 155 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(sc->dev), 156 /*alignment*/4, 157 /*boundary*/0, 158 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 159 /*highaddr*/BUS_SPACE_MAXADDR, 160 /*filter*/NULL, 161 /*filterarg*/NULL, 162 /*maxsize*/2 * HDSPE_DMASEGSIZE, 163 /*nsegments*/2, 164 /*maxsegsz*/HDSPE_DMASEGSIZE, 165 /*flags*/0, 166 /*dmatag*/&sc->dmat) != 0) { 167 device_printf(sc->dev, "Unable to create dma tag.\n"); 168 return (ENXIO); 169 } 170 171 sc->bufsize = HDSPE_DMASEGSIZE; 172 173 /* pbuf (play buffer). */ 174 if (bus_dmamem_alloc(sc->dmat, (void **)&sc->pbuf, 175 BUS_DMA_NOWAIT, &sc->pmap)) { 176 device_printf(sc->dev, "Can't alloc pbuf.\n"); 177 return (ENXIO); 178 } 179 180 if (bus_dmamap_load(sc->dmat, sc->pmap, sc->pbuf, sc->bufsize, 181 hdspe_dmapsetmap, sc, 0)) { 182 device_printf(sc->dev, "Can't load pbuf.\n"); 183 return (ENXIO); 184 } 185 186 /* rbuf (rec buffer). */ 187 if (bus_dmamem_alloc(sc->dmat, (void **)&sc->rbuf, 188 BUS_DMA_NOWAIT, &sc->rmap)) { 189 device_printf(sc->dev, "Can't alloc rbuf.\n"); 190 return (ENXIO); 191 } 192 193 if (bus_dmamap_load(sc->dmat, sc->rmap, sc->rbuf, sc->bufsize, 194 hdspe_dmapsetmap, sc, 0)) { 195 device_printf(sc->dev, "Can't load rbuf.\n"); 196 return (ENXIO); 197 } 198 199 bzero(sc->pbuf, sc->bufsize); 200 bzero(sc->rbuf, sc->bufsize); 201 202 return (0); 203 } 204 205 static void 206 hdspe_map_dmabuf(struct sc_info *sc) 207 { 208 uint32_t paddr,raddr; 209 int i; 210 211 paddr = vtophys(sc->pbuf); 212 raddr = vtophys(sc->rbuf); 213 214 for (i = 0; i < HDSPE_MAX_SLOTS * 16; i++) { 215 hdspe_write_4(sc, HDSPE_PAGE_ADDR_BUF_OUT + 4 * i, 216 paddr + i * 4096); 217 hdspe_write_4(sc, HDSPE_PAGE_ADDR_BUF_IN + 4 * i, 218 raddr + i * 4096); 219 } 220 } 221 222 static int 223 hdspe_probe(device_t dev) 224 { 225 uint32_t rev; 226 227 if (pci_get_vendor(dev) == PCI_VENDOR_XILINX && 228 pci_get_device(dev) == PCI_DEVICE_XILINX_HDSPE) { 229 rev = pci_get_revid(dev); 230 switch (rev) { 231 case PCI_REVISION_AIO: 232 device_set_desc(dev, "RME HDSPe AIO"); 233 return 0; 234 case PCI_REVISION_RAYDAT: 235 device_set_desc(dev, "RME HDSPe RayDAT"); 236 return 0; 237 } 238 } 239 240 return (ENXIO); 241 } 242 243 static int 244 hdspe_init(struct sc_info *sc) 245 { 246 long long period; 247 248 /* Set defaults. */ 249 sc->ctrl_register |= HDSPM_CLOCK_MODE_MASTER; 250 251 /* Set latency. */ 252 sc->period = 32; 253 sc->ctrl_register = hdspe_encode_latency(7); 254 255 /* Set rate. */ 256 sc->speed = HDSPE_SPEED_DEFAULT; 257 sc->ctrl_register &= ~HDSPE_FREQ_MASK; 258 sc->ctrl_register |= HDSPE_FREQ_MASK_DEFAULT; 259 hdspe_write_4(sc, HDSPE_CONTROL_REG, sc->ctrl_register); 260 261 switch (sc->type) { 262 case RAYDAT: 263 case AIO: 264 period = HDSPE_FREQ_AIO; 265 break; 266 default: 267 return (ENXIO); 268 } 269 270 /* Set DDS value. */ 271 period /= sc->speed; 272 hdspe_write_4(sc, HDSPE_FREQ_REG, period); 273 274 /* Other settings. */ 275 sc->settings_register = 0; 276 hdspe_write_4(sc, HDSPE_SETTINGS_REG, sc->settings_register); 277 278 return 0; 279 } 280 281 static int 282 hdspe_attach(device_t dev) 283 { 284 struct sc_info *sc; 285 struct sc_pcminfo *scp; 286 struct hdspe_channel *chan_map; 287 uint32_t rev; 288 int i, err; 289 290 #if 0 291 device_printf(dev, "hdspe_attach()\n"); 292 #endif 293 294 sc = device_get_softc(dev); 295 sc->lock = snd_mtxcreate(device_get_nameunit(dev), 296 "snd_hdspe softc"); 297 sc->dev = dev; 298 299 pci_enable_busmaster(dev); 300 rev = pci_get_revid(dev); 301 switch (rev) { 302 case PCI_REVISION_AIO: 303 sc->type = AIO; 304 chan_map = chan_map_aio; 305 break; 306 case PCI_REVISION_RAYDAT: 307 sc->type = RAYDAT; 308 chan_map = chan_map_rd; 309 break; 310 default: 311 return ENXIO; 312 } 313 314 /* Allocate resources. */ 315 err = hdspe_alloc_resources(sc); 316 if (err) { 317 device_printf(dev, "Unable to allocate system resources.\n"); 318 return ENXIO; 319 } 320 321 if (hdspe_init(sc) != 0) 322 return ENXIO; 323 324 for (i = 0; i < HDSPE_MAX_CHANS && chan_map[i].descr != NULL; i++) { 325 scp = kmalloc(sizeof(struct sc_pcminfo), M_DEVBUF, M_WAITOK | M_ZERO); 326 scp->hc = &chan_map[i]; 327 scp->sc = sc; 328 scp->dev = device_add_child(dev, "pcm", -1); 329 device_set_ivars(scp->dev, scp); 330 } 331 332 hdspe_map_dmabuf(sc); 333 334 return (bus_generic_attach(dev)); 335 } 336 337 static void 338 hdspe_dmafree(struct sc_info *sc) 339 { 340 341 bus_dmamap_unload(sc->dmat, sc->rmap); 342 bus_dmamap_unload(sc->dmat, sc->pmap); 343 bus_dmamem_free(sc->dmat, sc->rbuf, sc->rmap); 344 bus_dmamem_free(sc->dmat, sc->pbuf, sc->pmap); 345 sc->rbuf = sc->pbuf = NULL; 346 } 347 348 static int 349 hdspe_detach(device_t dev) 350 { 351 struct sc_info *sc; 352 int err; 353 354 sc = device_get_softc(dev); 355 if (sc == NULL) { 356 device_printf(dev,"Can't detach: softc is null.\n"); 357 return 0; 358 } 359 360 err = device_delete_children(dev); 361 if (err) 362 return (err); 363 364 hdspe_dmafree(sc); 365 366 if (sc->ih) 367 bus_teardown_intr(dev, sc->irq, sc->ih); 368 if (sc->dmat) 369 bus_dma_tag_destroy(sc->dmat); 370 if (sc->irq) 371 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 372 if (sc->cs) 373 bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(0), sc->cs); 374 if (sc->lock) 375 snd_mtxfree(sc->lock); 376 377 return 0; 378 } 379 380 static device_method_t hdspe_methods[] = { 381 DEVMETHOD(device_probe, hdspe_probe), 382 DEVMETHOD(device_attach, hdspe_attach), 383 DEVMETHOD(device_detach, hdspe_detach), 384 { 0, 0 } 385 }; 386 387 static driver_t hdspe_driver = { 388 "hdspe", 389 hdspe_methods, 390 PCM_SOFTC_SIZE, 391 }; 392 393 static devclass_t hdspe_devclass; 394 395 DRIVER_MODULE(snd_hdspe, pci, hdspe_driver, hdspe_devclass, NULL, NULL); 396