xref: /dragonfly/sys/kern/lwkt_ipiq.c (revision 16dd80e4)
1 /*
2  * Copyright (c) 2003-2016 The DragonFly Project.  All rights reserved.
3  *
4  * This code is derived from software contributed to The DragonFly Project
5  * by Matthew Dillon <dillon@backplane.com>
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  *
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in
15  *    the documentation and/or other materials provided with the
16  *    distribution.
17  * 3. Neither the name of The DragonFly Project nor the names of its
18  *    contributors may be used to endorse or promote products derived
19  *    from this software without specific, prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
25  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  */
34 
35 /*
36  * This module implements IPI message queueing and the MI portion of IPI
37  * message processing.
38  */
39 
40 #include "opt_ddb.h"
41 
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
45 #include <sys/proc.h>
46 #include <sys/rtprio.h>
47 #include <sys/queue.h>
48 #include <sys/thread2.h>
49 #include <sys/sysctl.h>
50 #include <sys/ktr.h>
51 #include <sys/kthread.h>
52 #include <machine/cpu.h>
53 #include <sys/lock.h>
54 
55 #include <vm/vm.h>
56 #include <vm/vm_param.h>
57 #include <vm/vm_kern.h>
58 #include <vm/vm_object.h>
59 #include <vm/vm_page.h>
60 #include <vm/vm_map.h>
61 #include <vm/vm_pager.h>
62 #include <vm/vm_extern.h>
63 #include <vm/vm_zone.h>
64 
65 #include <machine/stdarg.h>
66 #include <machine/smp.h>
67 #include <machine/clock.h>
68 #include <machine/atomic.h>
69 
70 #ifdef _KERNEL_VIRTUAL
71 #include <pthread.h>
72 #endif
73 
74 struct ipiq_stats {
75     int64_t ipiq_count;		/* total calls to lwkt_send_ipiq*() */
76     int64_t ipiq_fifofull;	/* number of fifo full conditions detected */
77     int64_t ipiq_avoided;	/* interlock with target avoids cpu ipi */
78     int64_t ipiq_passive;	/* passive IPI messages */
79     int64_t ipiq_cscount;	/* number of cpu synchronizations */
80 } __cachealign;
81 
82 static struct ipiq_stats ipiq_stats_percpu[MAXCPU];
83 #define ipiq_stat(gd)	ipiq_stats_percpu[(gd)->gd_cpuid]
84 
85 static int ipiq_debug;		/* set to 1 for debug */
86 #ifdef PANIC_DEBUG
87 static int	panic_ipiq_cpu = -1;
88 static int	panic_ipiq_count = 100;
89 #endif
90 
91 SYSCTL_INT(_lwkt, OID_AUTO, ipiq_debug, CTLFLAG_RW, &ipiq_debug, 0,
92     "");
93 #ifdef PANIC_DEBUG
94 SYSCTL_INT(_lwkt, OID_AUTO, panic_ipiq_cpu, CTLFLAG_RW, &panic_ipiq_cpu, 0, "");
95 SYSCTL_INT(_lwkt, OID_AUTO, panic_ipiq_count, CTLFLAG_RW, &panic_ipiq_count, 0, "");
96 #endif
97 
98 #define IPIQ_STRING	"func=%p arg1=%p arg2=%d scpu=%d dcpu=%d"
99 #define IPIQ_ARGS	void *func, void *arg1, int arg2, int scpu, int dcpu
100 
101 #if !defined(KTR_IPIQ)
102 #define KTR_IPIQ	KTR_ALL
103 #endif
104 KTR_INFO_MASTER(ipiq);
105 KTR_INFO(KTR_IPIQ, ipiq, send_norm, 0, IPIQ_STRING, IPIQ_ARGS);
106 KTR_INFO(KTR_IPIQ, ipiq, send_pasv, 1, IPIQ_STRING, IPIQ_ARGS);
107 KTR_INFO(KTR_IPIQ, ipiq, receive, 4, IPIQ_STRING, IPIQ_ARGS);
108 KTR_INFO(KTR_IPIQ, ipiq, sync_start, 5, "cpumask=%08lx", unsigned long mask);
109 KTR_INFO(KTR_IPIQ, ipiq, sync_end, 6, "cpumask=%08lx", unsigned long mask);
110 KTR_INFO(KTR_IPIQ, ipiq, cpu_send, 7, IPIQ_STRING, IPIQ_ARGS);
111 KTR_INFO(KTR_IPIQ, ipiq, send_end, 8, IPIQ_STRING, IPIQ_ARGS);
112 KTR_INFO(KTR_IPIQ, ipiq, sync_quick, 9, "cpumask=%08lx", unsigned long mask);
113 
114 #define logipiq(name, func, arg1, arg2, sgd, dgd)	\
115 	KTR_LOG(ipiq_ ## name, func, arg1, arg2, sgd->gd_cpuid, dgd->gd_cpuid)
116 #define logipiq2(name, arg)	\
117 	KTR_LOG(ipiq_ ## name, arg)
118 
119 static void lwkt_process_ipiq_nested(void);
120 static int lwkt_process_ipiq_core(globaldata_t sgd, lwkt_ipiq_t ip,
121 				  struct intrframe *frame, int limit);
122 static void lwkt_cpusync_remote1(lwkt_cpusync_t cs);
123 static void lwkt_cpusync_remote2(lwkt_cpusync_t cs);
124 
125 #define IPIQ_SYSCTL(name)				\
126 static int						\
127 sysctl_##name(SYSCTL_HANDLER_ARGS)			\
128 {							\
129     int64_t val = 0;					\
130     int cpu, error;					\
131 							\
132     for (cpu = 0; cpu < ncpus; ++cpu)			\
133 	val += ipiq_stats_percpu[cpu].name;		\
134 							\
135     error = sysctl_handle_quad(oidp, &val, 0, req);	\
136     if (error || req->newptr == NULL)			\
137 	return error;					\
138 							\
139     for (cpu = 0; cpu < ncpus; ++cpu)			\
140     	ipiq_stats_percpu[cpu].name = val;		\
141 							\
142     return 0;						\
143 }
144 
145 IPIQ_SYSCTL(ipiq_count);
146 IPIQ_SYSCTL(ipiq_fifofull);
147 IPIQ_SYSCTL(ipiq_avoided);
148 IPIQ_SYSCTL(ipiq_passive);
149 IPIQ_SYSCTL(ipiq_cscount);
150 
151 SYSCTL_PROC(_lwkt, OID_AUTO, ipiq_count, (CTLTYPE_QUAD | CTLFLAG_RW),
152     0, 0, sysctl_ipiq_count, "Q", "Number of IPI's sent");
153 SYSCTL_PROC(_lwkt, OID_AUTO, ipiq_fifofull, (CTLTYPE_QUAD | CTLFLAG_RW),
154     0, 0, sysctl_ipiq_fifofull, "Q",
155     "Number of fifo full conditions detected");
156 SYSCTL_PROC(_lwkt, OID_AUTO, ipiq_avoided, (CTLTYPE_QUAD | CTLFLAG_RW),
157     0, 0, sysctl_ipiq_avoided, "Q",
158     "Number of IPI's avoided by interlock with target cpu");
159 SYSCTL_PROC(_lwkt, OID_AUTO, ipiq_passive, (CTLTYPE_QUAD | CTLFLAG_RW),
160     0, 0, sysctl_ipiq_passive, "Q",
161     "Number of passive IPI messages sent");
162 SYSCTL_PROC(_lwkt, OID_AUTO, ipiq_cscount, (CTLTYPE_QUAD | CTLFLAG_RW),
163     0, 0, sysctl_ipiq_cscount, "Q",
164     "Number of cpu synchronizations");
165 
166 /*
167  * Send a function execution request to another cpu.  The request is queued
168  * on the cpu<->cpu ipiq matrix.  Each cpu owns a unique ipiq FIFO for every
169  * possible target cpu.  The FIFO can be written.
170  *
171  * If the FIFO fills up we have to enable interrupts to avoid an APIC
172  * deadlock and process pending IPIQs while waiting for it to empty.
173  * Otherwise we may soft-deadlock with another cpu whos FIFO is also full.
174  *
175  * We can safely bump gd_intr_nesting_level because our crit_exit() at the
176  * end will take care of any pending interrupts.
177  *
178  * The actual hardware IPI is avoided if the target cpu is already processing
179  * the queue from a prior IPI.  It is possible to pipeline IPI messages
180  * very quickly between cpus due to the FIFO hysteresis.
181  *
182  * Need not be called from a critical section.
183  */
184 int
185 lwkt_send_ipiq3(globaldata_t target, ipifunc3_t func, void *arg1, int arg2)
186 {
187     lwkt_ipiq_t ip;
188     int windex;
189     int level1;
190     int level2;
191     long rflags;
192     struct globaldata *gd = mycpu;
193 
194     logipiq(send_norm, func, arg1, arg2, gd, target);
195 
196     if (target == gd) {
197 	func(arg1, arg2, NULL);
198 	logipiq(send_end, func, arg1, arg2, gd, target);
199 	return(0);
200     }
201     crit_enter();
202     ++gd->gd_intr_nesting_level;
203 #ifdef INVARIANTS
204     if (gd->gd_intr_nesting_level > 20)
205 	panic("lwkt_send_ipiq: TOO HEAVILY NESTED!");
206 #endif
207     KKASSERT(curthread->td_critcount);
208     ++ipiq_stat(gd).ipiq_count;
209     ip = &gd->gd_ipiq[target->gd_cpuid];
210 
211     /*
212      * Do not allow the FIFO to become full.  Interrupts must be physically
213      * enabled while we liveloop to avoid deadlocking the APIC.
214      *
215      * When we are not nested inside a processing loop we allow the FIFO
216      * to get 1/2 full.  Once it exceeds 1/2 full we must wait for it to
217      * drain, executing any incoming IPIs while we wait.
218      *
219      * When we are nested we allow the FIFO to get almost completely full.
220      * This allows us to queue IPIs sent from IPI callbacks.  The processing
221      * code will only process incoming FIFOs that are trying to drain while
222      * we wait, and only to the only-slightly-less-full point, to avoid a
223      * deadlock.
224      *
225      * We are guaranteed
226      */
227 
228     if (gd->gd_processing_ipiq == 0) {
229 	level1 = MAXCPUFIFO / 2;
230 	level2 = MAXCPUFIFO / 4;
231     } else {
232 	level1 = MAXCPUFIFO - 3;
233 	level2 = MAXCPUFIFO - 5;
234     }
235 
236     if (ip->ip_windex - ip->ip_rindex > level1) {
237 #ifndef _KERNEL_VIRTUAL
238 	uint64_t tsc_base = rdtsc();
239 #endif
240 	int repeating = 0;
241 	int olimit;
242 
243 	rflags = read_rflags();
244 	cpu_enable_intr();
245 	++ipiq_stat(gd).ipiq_fifofull;
246 	DEBUG_PUSH_INFO("send_ipiq3");
247 	olimit = atomic_swap_int(&ip->ip_drain, level2);
248 	while (ip->ip_windex - ip->ip_rindex > level2) {
249 	    KKASSERT(ip->ip_windex - ip->ip_rindex != MAXCPUFIFO - 1);
250 	    lwkt_process_ipiq_nested();
251 	    cpu_pause();
252 
253 	    /*
254 	     * Check for target not draining issue.  This should be fixed but
255 	     * leave the code in-place anyway as it can recover an otherwise
256 	     * dead system.
257 	     */
258 #ifdef _KERNEL_VIRTUAL
259 	    if (repeating++ > 10)
260 		    pthread_yield();
261 #else
262 	    if (rdtsc() - tsc_base > tsc_frequency) {
263 		++repeating;
264 		if (repeating > 10) {
265 			kprintf("send_ipiq %d->%d tgt not draining (%d) sniff=%p,%p\n",
266 				gd->gd_cpuid, target->gd_cpuid, repeating,
267 				target->gd_sample_pc, target->gd_sample_sp);
268 			smp_sniff();
269 			cpu_disable_intr();
270 			ATOMIC_CPUMASK_ORBIT(target->gd_ipimask, gd->gd_cpuid);
271 			cpu_send_ipiq(target->gd_cpuid);
272 			cpu_enable_intr();
273 		} else {
274 			kprintf("send_ipiq %d->%d tgt not draining (%d)\n",
275 				gd->gd_cpuid, target->gd_cpuid, repeating);
276 			smp_sniff();
277 		}
278 		tsc_base = rdtsc();
279 	    }
280 #endif
281 	}
282 	atomic_swap_int(&ip->ip_drain, olimit);
283 	DEBUG_POP_INFO();
284 #if defined(__x86_64__)
285 	write_rflags(rflags);
286 #else
287 #error "no write_*flags"
288 #endif
289     }
290 
291     /*
292      * Queue the new message and signal the target cpu.  For now we need to
293      * physically disable interrupts because the target will not get signalled
294      * by other cpus once we set target->gd_npoll and we don't want to get
295      * interrupted.
296      *
297      * XXX not sure why this is a problem, the critical section should prevent
298      *     any stalls (incoming interrupts except Xinvltlb and Xsnoop will
299      *	   just be made pending).
300      */
301     rflags = read_rflags();
302 #ifndef _KERNEL_VIRTUAL
303     cpu_disable_intr();
304 #endif
305 
306     windex = ip->ip_windex & MAXCPUFIFO_MASK;
307     ip->ip_info[windex].func = func;
308     ip->ip_info[windex].arg1 = arg1;
309     ip->ip_info[windex].arg2 = arg2;
310     cpu_sfence();
311     ++ip->ip_windex;
312     ATOMIC_CPUMASK_ORBIT(target->gd_ipimask, gd->gd_cpuid);
313 
314     /*
315      * signal the target cpu that there is work pending.
316      */
317     if (atomic_swap_int(&target->gd_npoll, 1) == 0) {
318 	logipiq(cpu_send, func, arg1, arg2, gd, target);
319 	cpu_send_ipiq(target->gd_cpuid);
320     } else {
321 	++ipiq_stat(gd).ipiq_avoided;
322     }
323     write_rflags(rflags);
324 
325     --gd->gd_intr_nesting_level;
326     crit_exit();
327     logipiq(send_end, func, arg1, arg2, gd, target);
328 
329     return(ip->ip_windex);
330 }
331 
332 /*
333  * Similar to lwkt_send_ipiq() but this function does not actually initiate
334  * the IPI to the target cpu unless the FIFO is greater than 1/4 full.
335  * This function is usually very fast.
336  *
337  * This function is used for non-critical IPI messages, such as memory
338  * deallocations.  The queue will typically be flushed by the target cpu at
339  * the next clock interrupt.
340  *
341  * Need not be called from a critical section.
342  */
343 int
344 lwkt_send_ipiq3_passive(globaldata_t target, ipifunc3_t func,
345 			void *arg1, int arg2)
346 {
347     lwkt_ipiq_t ip;
348     int windex;
349     struct globaldata *gd = mycpu;
350 
351     KKASSERT(target != gd);
352     crit_enter_gd(gd);
353     ++gd->gd_intr_nesting_level;
354     ip = &gd->gd_ipiq[target->gd_cpuid];
355 
356     /*
357      * If the FIFO is too full send the IPI actively.
358      *
359      * WARNING! This level must be low enough not to trigger a wait loop
360      *		in the active sending code since we are not signalling the
361      *		target cpu.
362      */
363     if (ip->ip_windex - ip->ip_rindex >= MAXCPUFIFO / 4) {
364 	--gd->gd_intr_nesting_level;
365 	crit_exit_gd(gd);
366 	return lwkt_send_ipiq3(target, func, arg1, arg2);
367     }
368 
369     /*
370      * Else we can do it passively.
371      */
372     logipiq(send_pasv, func, arg1, arg2, gd, target);
373     ++ipiq_stat(gd).ipiq_count;
374     ++ipiq_stat(gd).ipiq_passive;
375 
376     /*
377      * Queue the new message
378      */
379     windex = ip->ip_windex & MAXCPUFIFO_MASK;
380     ip->ip_info[windex].func = func;
381     ip->ip_info[windex].arg1 = arg1;
382     ip->ip_info[windex].arg2 = arg2;
383     cpu_sfence();
384     ++ip->ip_windex;
385     ATOMIC_CPUMASK_ORBIT(target->gd_ipimask, gd->gd_cpuid);
386     --gd->gd_intr_nesting_level;
387 
388     /*
389      * Do not signal the target cpu, it will pick up the IPI when it next
390      * polls (typically on the next tick).
391      */
392     crit_exit();
393     logipiq(send_end, func, arg1, arg2, gd, target);
394 
395     return(ip->ip_windex);
396 }
397 
398 /*
399  * deprecated, used only by fast int forwarding.
400  */
401 int
402 lwkt_send_ipiq3_bycpu(int dcpu, ipifunc3_t func, void *arg1, int arg2)
403 {
404     return(lwkt_send_ipiq3(globaldata_find(dcpu), func, arg1, arg2));
405 }
406 
407 /*
408  * Send a message to several target cpus.  Typically used for scheduling.
409  * The message will not be sent to stopped cpus.
410  *
411  * To prevent treating low-numbered cpus as favored sons, the IPIs are
412  * issued in order starting at mycpu upward, then from 0 through mycpu.
413  * This is particularly important to prevent random scheduler pickups
414  * from favoring cpu 0.
415  */
416 int
417 lwkt_send_ipiq3_mask(cpumask_t mask, ipifunc3_t func, void *arg1, int arg2)
418 {
419     int cpuid;
420     int count = 0;
421     cpumask_t amask;
422 
423     CPUMASK_NANDMASK(mask, stopped_cpus);
424 
425     /*
426      * All cpus in mask which are >= mycpu
427      */
428     CPUMASK_ASSBMASK(amask, mycpu->gd_cpuid);
429     CPUMASK_INVMASK(amask);
430     CPUMASK_ANDMASK(amask, mask);
431     while (CPUMASK_TESTNZERO(amask)) {
432 	cpuid = BSFCPUMASK(amask);
433 	lwkt_send_ipiq3(globaldata_find(cpuid), func, arg1, arg2);
434 	CPUMASK_NANDBIT(amask, cpuid);
435 	++count;
436     }
437 
438     /*
439      * All cpus in mask which are < mycpu
440      */
441     CPUMASK_ASSBMASK(amask, mycpu->gd_cpuid);
442     CPUMASK_ANDMASK(amask, mask);
443     while (CPUMASK_TESTNZERO(amask)) {
444 	cpuid = BSFCPUMASK(amask);
445 	lwkt_send_ipiq3(globaldata_find(cpuid), func, arg1, arg2);
446 	CPUMASK_NANDBIT(amask, cpuid);
447 	++count;
448     }
449     return(count);
450 }
451 
452 /*
453  * Wait for the remote cpu to finish processing a function.
454  *
455  * YYY we have to enable interrupts and process the IPIQ while waiting
456  * for it to empty or we may deadlock with another cpu.  Create a CPU_*()
457  * function to do this!  YYY we really should 'block' here.
458  *
459  * MUST be called from a critical section.  This routine may be called
460  * from an interrupt (for example, if an interrupt wakes a foreign thread
461  * up).
462  */
463 void
464 lwkt_wait_ipiq(globaldata_t target, int seq)
465 {
466     lwkt_ipiq_t ip;
467 
468     if (target != mycpu) {
469 	ip = &mycpu->gd_ipiq[target->gd_cpuid];
470 	if ((int)(ip->ip_xindex - seq) < 0) {
471 #if defined(__x86_64__)
472 	    unsigned long rflags = read_rflags();
473 #else
474 #error "no read_*flags"
475 #endif
476 	    int64_t time_tgt = tsc_get_target(1000000000LL);
477 	    int time_loops = 10;
478 	    int benice = 0;
479 #ifdef _KERNEL_VIRTUAL
480 	    int repeating = 0;
481 #endif
482 
483 	    cpu_enable_intr();
484 	    DEBUG_PUSH_INFO("wait_ipiq");
485 	    while ((int)(ip->ip_xindex - seq) < 0) {
486 		crit_enter();
487 		lwkt_process_ipiq();
488 		crit_exit();
489 #ifdef _KERNEL_VIRTUAL
490 		if (repeating++ > 10)
491 			pthread_yield();
492 #endif
493 
494 		/*
495 		 * IPIQs must be handled within 10 seconds and this code
496 		 * will warn after one second.
497 		 */
498 		if ((benice & 255) == 0 && tsc_test_target(time_tgt) > 0) {
499 			kprintf("LWKT_WAIT_IPIQ WARNING! %d wait %d (%d)\n",
500 				mycpu->gd_cpuid, target->gd_cpuid,
501 				ip->ip_xindex - seq);
502 			if (--time_loops == 0)
503 				panic("LWKT_WAIT_IPIQ");
504 			time_tgt = tsc_get_target(1000000000LL);
505 		}
506 		++benice;
507 
508 		/*
509 		 * xindex may be modified by another cpu, use a load fence
510 		 * to ensure that the loop does not use a speculative value
511 		 * (which may improve performance).
512 		 */
513 		cpu_pause();
514 		cpu_lfence();
515 	    }
516 	    DEBUG_POP_INFO();
517 #if defined(__x86_64__)
518 	    write_rflags(rflags);
519 #else
520 #error "no write_*flags"
521 #endif
522 	}
523     }
524 }
525 
526 /*
527  * Called from IPI interrupt (like a fast interrupt), and numerous
528  * other locations, and might also be called recursively.  Caller must
529  * hold a critical section across this call.
530  *
531  * When called from doreti, splz, or an IPI interrupt, npoll is cleared
532  * by the caller using an atomic xchgl, thus synchronizing the incoming
533  * ipimask against npoll.  A new IPI will be received if new traffic
534  * occurs verses the windex we read.
535  *
536  * However, ipimask might not be synchronized when called from other
537  * locations.  Our processing will be more heuristic.
538  *
539  * There are two versions, one where no interrupt frame is available (when
540  * called from the send code and from splz, and one where an interrupt
541  * frame is available.
542  *
543  * When the current cpu is mastering a cpusync we do NOT internally loop
544  * on the cpusyncq poll.  We also do not re-flag a pending ipi due to
545  * the cpusyncq poll because this can cause doreti/splz to loop internally.
546  * The cpusync master's own loop must be allowed to run to avoid a deadlock.
547  */
548 void
549 lwkt_process_ipiq(void)
550 {
551     globaldata_t gd = mycpu;
552     globaldata_t sgd;
553     lwkt_ipiq_t ip;
554     cpumask_t mask;
555     int n;
556 
557     ++gd->gd_processing_ipiq;
558 again:
559     mask = gd->gd_ipimask;
560     cpu_ccfence();
561     while (CPUMASK_TESTNZERO(mask)) {
562 	n = BSFCPUMASK(mask);
563 	if (n != gd->gd_cpuid) {
564 	    sgd = globaldata_find(n);
565 	    ip = sgd->gd_ipiq;
566 	    if (ip != NULL) {
567 		ip += gd->gd_cpuid;
568 		while (lwkt_process_ipiq_core(sgd, ip, NULL, 0))
569 		    ;
570 		/*
571 		 * Can't NAND before-hand as it will prevent recursive
572 		 * processing.  Sender will adjust windex before adjusting
573 		 * ipimask.
574 		 */
575 		ATOMIC_CPUMASK_NANDBIT(gd->gd_ipimask, n);
576 		if (ip->ip_rindex != ip->ip_windex)
577 			ATOMIC_CPUMASK_ORBIT(gd->gd_ipimask, n);
578 	    }
579 	}
580 	CPUMASK_NANDBIT(mask, n);
581     }
582 
583     /*
584      * Process pending cpusyncs.  If the current thread has a cpusync
585      * active cpusync we only run the list once and do not re-flag
586      * as the thread itself is processing its interlock.
587      */
588     if (lwkt_process_ipiq_core(gd, &gd->gd_cpusyncq, NULL, 0)) {
589 	if (gd->gd_curthread->td_cscount == 0)
590 	    goto again;
591 	/* need_ipiq(); do not reflag */
592     }
593 
594     /*
595      * Interlock to allow more IPI interrupts.
596      */
597     --gd->gd_processing_ipiq;
598 }
599 
600 void
601 lwkt_process_ipiq_frame(struct intrframe *frame)
602 {
603     globaldata_t gd = mycpu;
604     globaldata_t sgd;
605     lwkt_ipiq_t ip;
606     cpumask_t mask;
607     int n;
608 
609     ++gd->gd_processing_ipiq;
610 again:
611     mask = gd->gd_ipimask;
612     cpu_ccfence();
613     while (CPUMASK_TESTNZERO(mask)) {
614 	n = BSFCPUMASK(mask);
615 	if (n != gd->gd_cpuid) {
616 	    sgd = globaldata_find(n);
617 	    ip = sgd->gd_ipiq;
618 	    if (ip != NULL) {
619 		ip += gd->gd_cpuid;
620 		while (lwkt_process_ipiq_core(sgd, ip, frame, 0))
621 		    ;
622 		/*
623 		 * Can't NAND before-hand as it will prevent recursive
624 		 * processing.  Sender will adjust windex before adjusting
625 		 * ipimask.
626 		 */
627 		ATOMIC_CPUMASK_NANDBIT(gd->gd_ipimask, n);
628 		if (ip->ip_rindex != ip->ip_windex)
629 			ATOMIC_CPUMASK_ORBIT(gd->gd_ipimask, n);
630 	    }
631 	}
632 	CPUMASK_NANDBIT(mask, n);
633     }
634     if (gd->gd_cpusyncq.ip_rindex != gd->gd_cpusyncq.ip_windex) {
635 	if (lwkt_process_ipiq_core(gd, &gd->gd_cpusyncq, frame, 0)) {
636 	    if (gd->gd_curthread->td_cscount == 0)
637 		goto again;
638 	    /* need_ipiq(); do not reflag */
639 	}
640     }
641     --gd->gd_processing_ipiq;
642 }
643 
644 /*
645  * Only process incoming IPIQs from draining senders and only process them
646  * to the point where the draining sender is able to continue.  This is
647  * necessary to avoid deadlocking the IPI subsystem because we are acting on
648  * incoming messages and the callback may queue additional messages.
649  *
650  * We only want to have to act on senders that are blocked to limit the
651  * number of additional messages sent.  At the same time, recipients are
652  * trying to drain our own queue.  Theoretically this create a pipeline that
653  * cannot deadlock.
654  */
655 static void
656 lwkt_process_ipiq_nested(void)
657 {
658     globaldata_t gd = mycpu;
659     globaldata_t sgd;
660     lwkt_ipiq_t ip;
661     cpumask_t mask;
662     int n;
663     int limit;
664 
665     ++gd->gd_processing_ipiq;
666 again:
667     mask = gd->gd_ipimask;
668     cpu_ccfence();
669     while (CPUMASK_TESTNZERO(mask)) {
670 	n = BSFCPUMASK(mask);
671 	if (n != gd->gd_cpuid) {
672 	    sgd = globaldata_find(n);
673 	    ip = sgd->gd_ipiq;
674 
675 	    /*
676 	     * NOTE: We do not mess with the cpumask at all, instead we allow
677 	     *	     the top-level ipiq processor deal with it.
678 	     */
679 	    if (ip != NULL) {
680 		ip += gd->gd_cpuid;
681 		if ((limit = ip->ip_drain) != 0) {
682 		    lwkt_process_ipiq_core(sgd, ip, NULL, limit);
683 		    /* no gd_ipimask when doing limited processing */
684 		}
685 	    }
686 	}
687 	CPUMASK_NANDBIT(mask, n);
688     }
689 
690     /*
691      * Process pending cpusyncs.  If the current thread has a cpusync
692      * active cpusync we only run the list once and do not re-flag
693      * as the thread itself is processing its interlock.
694      */
695     if (lwkt_process_ipiq_core(gd, &gd->gd_cpusyncq, NULL, 0)) {
696 	if (gd->gd_curthread->td_cscount == 0)
697 	    goto again;
698 	/* need_ipiq(); do not reflag */
699     }
700     --gd->gd_processing_ipiq;
701 }
702 
703 /*
704  * Process incoming IPI requests until only <limit> are left (0 to exhaust
705  * all incoming IPI requests).
706  */
707 static int
708 lwkt_process_ipiq_core(globaldata_t sgd, lwkt_ipiq_t ip,
709 		       struct intrframe *frame, int limit)
710 {
711     globaldata_t mygd = mycpu;
712     int ri;
713     int wi;
714     ipifunc3_t copy_func;
715     void *copy_arg1;
716     int copy_arg2;
717 
718     /*
719      * Clear the originating core from our ipimask, we will process all
720      * incoming messages.
721      *
722      * Obtain the current write index, which is modified by a remote cpu.
723      * Issue a load fence to prevent speculative reads of e.g. data written
724      * by the other cpu prior to them updating the windex.
725      */
726     KKASSERT(curthread->td_critcount);
727     wi = ip->ip_windex;
728     cpu_lfence();
729     ++mygd->gd_intr_nesting_level;
730 
731     /*
732      * NOTE: xindex is only updated after we are sure the function has
733      *	     finished execution.  Beware lwkt_process_ipiq() reentrancy!
734      *	     The function may send an IPI which may block/drain.
735      *
736      * NOTE: Due to additional IPI operations that the callback function
737      *	     may make, it is possible for both rindex and windex to advance and
738      *	     thus for rindex to advance passed our cached windex.
739      *
740      *	     We must process only through our cached (wi) to ensure that
741      *	     speculative reads of ip_info[] content do not occur without
742      *	     a memory barrier.
743      *
744      * NOTE: Single pass only.  Returns non-zero if the queue is not empty
745      *	     on return.
746      *
747      * NOTE: Our 'wi' guarantees that memory loads will not be out of order.
748      *	     Do NOT reload wi with windex in the below loop unless you also
749      *	     issue another lfence after reloading it.
750      */
751     while (wi - (ri = ip->ip_rindex) > limit) {
752 	ri &= MAXCPUFIFO_MASK;
753 	copy_func = ip->ip_info[ri].func;
754 	copy_arg1 = ip->ip_info[ri].arg1;
755 	copy_arg2 = ip->ip_info[ri].arg2;
756 	cpu_ccfence();
757 	++ip->ip_rindex;
758 	logipiq(receive, copy_func, copy_arg1, copy_arg2, sgd, mycpu);
759 #ifdef INVARIANTS
760 	if (ipiq_debug && (ip->ip_rindex & 0xFFFFFF) == 0) {
761 		kprintf("cpu %d ipifunc %p %p %d (frame %p)\n",
762 			mycpu->gd_cpuid,
763 			copy_func, copy_arg1, copy_arg2,
764 #if defined(__x86_64__)
765 			(frame ? (void *)frame->if_rip : NULL));
766 #else
767 			NULL);
768 #endif
769 	}
770 #endif
771 	copy_func(copy_arg1, copy_arg2, frame);
772 	cpu_sfence();
773 	ip->ip_xindex = ip->ip_rindex;
774 
775 #ifdef PANIC_DEBUG
776 	/*
777 	 * Simulate panics during the processing of an IPI
778 	 */
779 	if (mycpu->gd_cpuid == panic_ipiq_cpu && panic_ipiq_count) {
780 		if (--panic_ipiq_count == 0) {
781 #ifdef DDB
782 			Debugger("PANIC_DEBUG");
783 #else
784 			panic("PANIC_DEBUG");
785 #endif
786 		}
787 	}
788 #endif
789     }
790     --mygd->gd_intr_nesting_level;
791 
792     /*
793      * Return non-zero if there is still more in the queue.  Don't worry
794      * about fencing, we will get another interrupt if necessary.
795      */
796     return (ip->ip_rindex != ip->ip_windex);
797 }
798 
799 static void
800 lwkt_sync_ipiq(void *arg)
801 {
802     volatile cpumask_t *cpumask = arg;
803 
804     ATOMIC_CPUMASK_NANDBIT(*cpumask, mycpu->gd_cpuid);
805     if (CPUMASK_TESTZERO(*cpumask))
806 	wakeup(cpumask);
807 }
808 
809 void
810 lwkt_synchronize_ipiqs(const char *wmesg)
811 {
812     volatile cpumask_t other_cpumask;
813 
814     other_cpumask = smp_active_mask;
815     CPUMASK_ANDMASK(other_cpumask, mycpu->gd_other_cpus);
816     lwkt_send_ipiq_mask(other_cpumask, lwkt_sync_ipiq,
817 			__DEVOLATILE(void *, &other_cpumask));
818 
819     while (CPUMASK_TESTNZERO(other_cpumask)) {
820 	tsleep_interlock(&other_cpumask, 0);
821 	if (CPUMASK_TESTNZERO(other_cpumask))
822 	    tsleep(&other_cpumask, PINTERLOCKED, wmesg, 0);
823     }
824 }
825 
826 /*
827  * CPU Synchronization Support
828  *
829  * lwkt_cpusync_interlock()	- Place specified cpus in a quiescent state.
830  *				  The current cpu is placed in a hard critical
831  *				  section.
832  *
833  * lwkt_cpusync_deinterlock()	- Execute cs_func on specified cpus, including
834  *				  current cpu if specified, then return.
835  */
836 void
837 lwkt_cpusync_simple(cpumask_t mask, cpusync_func_t func, void *arg)
838 {
839     struct lwkt_cpusync cs;
840 
841     lwkt_cpusync_init(&cs, mask, func, arg);
842     lwkt_cpusync_interlock(&cs);
843     lwkt_cpusync_deinterlock(&cs);
844 }
845 
846 
847 void
848 lwkt_cpusync_interlock(lwkt_cpusync_t cs)
849 {
850     globaldata_t gd = mycpu;
851     cpumask_t mask;
852 
853     /*
854      * mask acknowledge (cs_mack):  0->mask for stage 1
855      *
856      * mack does not include the current cpu.
857      */
858     mask = cs->cs_mask;
859     CPUMASK_ANDMASK(mask, gd->gd_other_cpus);
860     CPUMASK_ANDMASK(mask, smp_active_mask);
861     CPUMASK_ASSZERO(cs->cs_mack);
862 
863     crit_enter_id("cpusync");
864     if (CPUMASK_TESTNZERO(mask)) {
865 	DEBUG_PUSH_INFO("cpusync_interlock");
866 	++ipiq_stat(gd).ipiq_cscount;
867 	++gd->gd_curthread->td_cscount;
868 	lwkt_send_ipiq_mask(mask, (ipifunc1_t)lwkt_cpusync_remote1, cs);
869 	logipiq2(sync_start, (long)CPUMASK_LOWMASK(mask));
870 	while (CPUMASK_CMPMASKNEQ(cs->cs_mack, mask)) {
871 	    lwkt_process_ipiq();
872 	    cpu_pause();
873 #ifdef _KERNEL_VIRTUAL
874 	    pthread_yield();
875 #endif
876 	}
877 	DEBUG_POP_INFO();
878     }
879 }
880 
881 /*
882  * Interlocked cpus have executed remote1 and are polling in remote2.
883  * To deinterlock we clear cs_mack and wait for the cpus to execute
884  * the func and set their bit in cs_mack again.
885  *
886  */
887 void
888 lwkt_cpusync_deinterlock(lwkt_cpusync_t cs)
889 {
890     globaldata_t gd = mycpu;
891     cpumask_t mask;
892 
893     /*
894      * mask acknowledge (cs_mack):  mack->0->mack for stage 2
895      *
896      * Clearing cpu bits for polling cpus in cs_mack will cause them to
897      * execute stage 2, which executes the cs_func(cs_data) and then sets
898      * their bit in cs_mack again.
899      *
900      * mack does not include the current cpu.
901      */
902     mask = cs->cs_mack;
903     cpu_ccfence();
904     CPUMASK_ASSZERO(cs->cs_mack);
905     cpu_ccfence();
906     if (cs->cs_func && CPUMASK_TESTBIT(cs->cs_mask, gd->gd_cpuid))
907 	    cs->cs_func(cs->cs_data);
908     if (CPUMASK_TESTNZERO(mask)) {
909 	DEBUG_PUSH_INFO("cpusync_deinterlock");
910 	while (CPUMASK_CMPMASKNEQ(cs->cs_mack, mask)) {
911 	    lwkt_process_ipiq();
912 	    cpu_pause();
913 #ifdef _KERNEL_VIRTUAL
914 	    pthread_yield();
915 #endif
916 	}
917 	DEBUG_POP_INFO();
918 	/*
919 	 * cpusyncq ipis may be left queued without the RQF flag set due to
920 	 * a non-zero td_cscount, so be sure to process any laggards after
921 	 * decrementing td_cscount.
922 	 */
923 	--gd->gd_curthread->td_cscount;
924 	lwkt_process_ipiq();
925 	logipiq2(sync_end, (long)CPUMASK_LOWMASK(mask));
926     }
927     crit_exit_id("cpusync");
928 }
929 
930 /*
931  * The quick version does not quiesce the target cpu(s) but instead executes
932  * the function on the target cpu(s) and waits for all to acknowledge.  This
933  * avoids spinning on the target cpus.
934  *
935  * This function is typically only used for kernel_pmap updates.  User pmaps
936  * have to be quiesced.
937  */
938 void
939 lwkt_cpusync_quick(lwkt_cpusync_t cs)
940 {
941     globaldata_t gd = mycpu;
942     cpumask_t mask;
943 
944     /*
945      * stage-2 cs_mack only.
946      */
947     mask = cs->cs_mask;
948     CPUMASK_ANDMASK(mask, gd->gd_other_cpus);
949     CPUMASK_ANDMASK(mask, smp_active_mask);
950     CPUMASK_ASSZERO(cs->cs_mack);
951 
952     crit_enter_id("cpusync");
953     if (CPUMASK_TESTNZERO(mask)) {
954 	DEBUG_PUSH_INFO("cpusync_interlock");
955 	++ipiq_stat(gd).ipiq_cscount;
956 	++gd->gd_curthread->td_cscount;
957 	lwkt_send_ipiq_mask(mask, (ipifunc1_t)lwkt_cpusync_remote2, cs);
958 	logipiq2(sync_quick, (long)CPUMASK_LOWMASK(mask));
959 	while (CPUMASK_CMPMASKNEQ(cs->cs_mack, mask)) {
960 	    lwkt_process_ipiq();
961 	    cpu_pause();
962 #ifdef _KERNEL_VIRTUAL
963 	    pthread_yield();
964 #endif
965 	}
966 
967 	/*
968 	 * cpusyncq ipis may be left queued without the RQF flag set due to
969 	 * a non-zero td_cscount, so be sure to process any laggards after
970 	 * decrementing td_cscount.
971 	 */
972 	DEBUG_POP_INFO();
973 	--gd->gd_curthread->td_cscount;
974 	lwkt_process_ipiq();
975     }
976     if (cs->cs_func && CPUMASK_TESTBIT(cs->cs_mask, gd->gd_cpuid))
977 	    cs->cs_func(cs->cs_data);
978     crit_exit_id("cpusync");
979 }
980 
981 /*
982  * helper IPI remote messaging function.
983  *
984  * Called on remote cpu when a new cpu synchronization request has been
985  * sent to us.  Execute the run function and adjust cs_count, then requeue
986  * the request so we spin on it.
987  */
988 static void
989 lwkt_cpusync_remote1(lwkt_cpusync_t cs)
990 {
991     globaldata_t gd = mycpu;
992 
993     ATOMIC_CPUMASK_ORBIT(cs->cs_mack, gd->gd_cpuid);
994     lwkt_cpusync_remote2(cs);
995 }
996 
997 /*
998  * helper IPI remote messaging function.
999  *
1000  * Poll for the originator telling us to finish.  If it hasn't, requeue
1001  * our request so we spin on it.
1002  */
1003 static void
1004 lwkt_cpusync_remote2(lwkt_cpusync_t cs)
1005 {
1006     globaldata_t gd = mycpu;
1007 
1008     if (CPUMASK_TESTMASK(cs->cs_mack, gd->gd_cpumask) == 0) {
1009 	if (cs->cs_func)
1010 		cs->cs_func(cs->cs_data);
1011 	ATOMIC_CPUMASK_ORBIT(cs->cs_mack, gd->gd_cpuid);
1012 	/* cs can be ripped out at this point */
1013     } else {
1014 	lwkt_ipiq_t ip;
1015 	int wi;
1016 
1017 	cpu_pause();
1018 #ifdef _KERNEL_VIRTUAL
1019 	pthread_yield();
1020 #endif
1021 	cpu_lfence();
1022 
1023 	/*
1024 	 * Requeue our IPI to avoid a deep stack recursion.  If no other
1025 	 * IPIs are pending we can just loop up, which should help VMs
1026 	 * better-detect spin loops.
1027 	 */
1028 	ip = &gd->gd_cpusyncq;
1029 
1030 	wi = ip->ip_windex & MAXCPUFIFO_MASK;
1031 	ip->ip_info[wi].func = (ipifunc3_t)(ipifunc1_t)lwkt_cpusync_remote2;
1032 	ip->ip_info[wi].arg1 = cs;
1033 	ip->ip_info[wi].arg2 = 0;
1034 	cpu_sfence();
1035 	KKASSERT(ip->ip_windex - ip->ip_rindex < MAXCPUFIFO);
1036 	++ip->ip_windex;
1037 	if (ipiq_debug && (ip->ip_windex & 0xFFFFFF) == 0) {
1038 		kprintf("cpu %d cm=%016jx %016jx f=%p\n",
1039 			gd->gd_cpuid,
1040 			(intmax_t)CPUMASK_LOWMASK(cs->cs_mask),
1041 			(intmax_t)CPUMASK_LOWMASK(cs->cs_mack),
1042 			cs->cs_func);
1043 	}
1044     }
1045 }
1046 
1047 #define LWKT_IPIQ_NLATENCY	8
1048 #define LWKT_IPIQ_NLATENCY_MASK	(LWKT_IPIQ_NLATENCY - 1)
1049 
1050 struct lwkt_ipiq_latency_log {
1051 	int		idx;	/* unmasked index */
1052 	int		pad;
1053 	uint64_t	latency[LWKT_IPIQ_NLATENCY];
1054 };
1055 
1056 static struct lwkt_ipiq_latency_log	lwkt_ipiq_latency_logs[MAXCPU];
1057 static uint64_t save_tsc;
1058 
1059 /*
1060  * IPI callback (already in a critical section)
1061  */
1062 static void
1063 lwkt_ipiq_latency_testfunc(void *arg __unused)
1064 {
1065 	uint64_t delta_tsc;
1066 	struct globaldata *gd;
1067 	struct lwkt_ipiq_latency_log *lat;
1068 
1069 	/*
1070 	 * Get delta TSC (assume TSCs are synchronized) as quickly as
1071 	 * possible and then convert to nanoseconds.
1072 	 */
1073 	delta_tsc = rdtsc_ordered() - save_tsc;
1074 	delta_tsc = delta_tsc * 1000000000LU / tsc_frequency;
1075 
1076 	/*
1077 	 * Record in our save array.
1078 	 */
1079 	gd = mycpu;
1080 	lat = &lwkt_ipiq_latency_logs[gd->gd_cpuid];
1081 	lat->latency[lat->idx & LWKT_IPIQ_NLATENCY_MASK] = delta_tsc;
1082 	++lat->idx;
1083 }
1084 
1085 /*
1086  * Send IPI from cpu0 to other cpus
1087  *
1088  * NOTE: Machine must be idle for test to run dependably, and also probably
1089  *	 a good idea not to be running powerd.
1090  *
1091  * NOTE: Caller should use 'usched :1 <command>' to lock itself to cpu 0.
1092  *	 See 'ipitest' script in /usr/src/test/sysperf/ipitest
1093  */
1094 static int
1095 lwkt_ipiq_latency_test(SYSCTL_HANDLER_ARGS)
1096 {
1097 	struct globaldata *gd;
1098 	int cpu = 0, orig_cpu, error;
1099 
1100 	error = sysctl_handle_int(oidp, &cpu, arg2, req);
1101 	if (error || req->newptr == NULL)
1102 		return error;
1103 
1104 	if (cpu == 0)
1105 		return 0;
1106 	else if (cpu >= ncpus || cpu < 0)
1107 		return EINVAL;
1108 
1109 	orig_cpu = mycpuid;
1110 	lwkt_migratecpu(0);
1111 
1112 	gd = globaldata_find(cpu);
1113 
1114 	save_tsc = rdtsc_ordered();
1115 	lwkt_send_ipiq(gd, lwkt_ipiq_latency_testfunc, NULL);
1116 
1117 	lwkt_migratecpu(orig_cpu);
1118 	return 0;
1119 }
1120 
1121 SYSCTL_NODE(_debug, OID_AUTO, ipiq, CTLFLAG_RW, 0, "");
1122 SYSCTL_PROC(_debug_ipiq, OID_AUTO, latency_test, CTLTYPE_INT | CTLFLAG_RW,
1123     NULL, 0, lwkt_ipiq_latency_test, "I",
1124     "ipi latency test, arg: remote cpuid");
1125 
1126 static int
1127 lwkt_ipiq_latency(SYSCTL_HANDLER_ARGS)
1128 {
1129 	struct lwkt_ipiq_latency_log *latency = arg1;
1130 	uint64_t lat[LWKT_IPIQ_NLATENCY];
1131 	int i;
1132 
1133 	for (i = 0; i < LWKT_IPIQ_NLATENCY; ++i)
1134 		lat[i] = latency->latency[i];
1135 
1136 	return sysctl_handle_opaque(oidp, lat, sizeof(lat), req);
1137 }
1138 
1139 static void
1140 lwkt_ipiq_latency_init(void *dummy __unused)
1141 {
1142 	int cpu;
1143 
1144 	for (cpu = 0; cpu < ncpus; ++cpu) {
1145 		char name[32];
1146 
1147 		ksnprintf(name, sizeof(name), "latency%d", cpu);
1148 		SYSCTL_ADD_PROC(NULL, SYSCTL_STATIC_CHILDREN(_debug_ipiq),
1149 		    OID_AUTO, name, CTLTYPE_OPAQUE | CTLFLAG_RD,
1150 		    &lwkt_ipiq_latency_logs[cpu], 0, lwkt_ipiq_latency,
1151 		    "LU", "7 latest ipi latency measurement results");
1152 	}
1153 }
1154 SYSINIT(lwkt_ipiq_latency, SI_SUB_CONFIGURE, SI_ORDER_ANY,
1155     lwkt_ipiq_latency_init, NULL);
1156