1/* 2 * from: vector.s, 386BSD 0.1 unknown origin 3 * $FreeBSD: src/sys/i386/isa/apic_vector.s,v 1.47.2.5 2001/09/01 22:33:38 tegge Exp $ 4 */ 5 6#if 0 7#include "opt_auto_eoi.h" 8#endif 9 10#include <machine/asmacros.h> 11#include <machine/lock.h> 12#include <machine/psl.h> 13#include <machine/trap.h> 14#include <machine/segments.h> 15 16#include <machine_base/icu/icu.h> 17#include <bus/isa/isa.h> 18 19#include "assym.s" 20 21#include "apicreg.h" 22#include <machine_base/apic/ioapic_ipl.h> 23#include <machine/intr_machdep.h> 24 25#ifdef foo 26/* convert an absolute IRQ# into bitmask */ 27#define IRQ_LBIT(irq_num) (1UL << (irq_num & 0x3f)) 28#endif 29 30#define IRQ_SBITS(irq_num) ((irq_num) & 0x3f) 31 32/* convert an absolute IRQ# into gd_ipending index */ 33#define IRQ_LIDX(irq_num) ((irq_num) >> 6) 34 35#define MPLOCKED lock ; 36 37#define APIC_PUSH_FRAME_TFRIP \ 38 PUSH_FRAME_TFRIP ; /* 15 regs + space for 5 extras */ \ 39 movq $0,TF_XFLAGS(%rsp) ; \ 40 movq $0,TF_TRAPNO(%rsp) ; \ 41 movq $0,TF_ADDR(%rsp) ; \ 42 movq $0,TF_FLAGS(%rsp) ; \ 43 movq $0,TF_ERR(%rsp) ; \ 44 cld ; \ 45 46/* 47 * JG stale? Warning: POP_FRAME can only be used if there is no chance of a 48 * segment register being changed (e.g. by procfs), which is why syscalls 49 * have to use doreti. 50 */ 51#define APIC_POP_FRAME(lastinsn) \ 52 POP_FRAME(lastinsn) \ 53 54#define IOAPICADDR(irq_num) \ 55 CNAME(ioapic_irqs) + IOAPIC_IRQI_SIZE * (irq_num) + IOAPIC_IRQI_ADDR 56#define REDIRIDX(irq_num) \ 57 CNAME(ioapic_irqs) + IOAPIC_IRQI_SIZE * (irq_num) + IOAPIC_IRQI_IDX 58#define IOAPICFLAGS(irq_num) \ 59 CNAME(ioapic_irqs) + IOAPIC_IRQI_SIZE * (irq_num) + IOAPIC_IRQI_FLAGS 60 61#define MASK_IRQ(irq_num) \ 62 testl $IOAPIC_IRQI_FLAG_MASKED, IOAPICFLAGS(irq_num) ; \ 63 jne 7f ; /* masked, don't mask */ \ 64 orl $IOAPIC_IRQI_FLAG_MASKED, IOAPICFLAGS(irq_num) ; \ 65 /* set the mask bit */ \ 66 movq IOAPICADDR(irq_num), %rcx ; /* ioapic addr */ \ 67 movl REDIRIDX(irq_num), %eax ; /* get the index */ \ 68 movl %eax, (%rcx) ; /* write the index */ \ 69 orl $IOART_INTMASK,IOAPIC_WINDOW(%rcx) ;/* set the mask */ \ 707: ; /* already masked */ \ 71 72/* 73 * Test to see whether we are handling an edge or level triggered INT. 74 * Level-triggered INTs must still be masked as we don't clear the source, 75 * and the EOI cycle would cause redundant INTs to occur. 76 */ 77#define MASK_LEVEL_IRQ(irq_num) \ 78 testl $IOAPIC_IRQI_FLAG_LEVEL, IOAPICFLAGS(irq_num) ; \ 79 jz 9f ; /* edge, don't mask */ \ 80 MASK_IRQ(irq_num) ; \ 819: ; \ 82 83/* 84 * Test to see if the source is currntly masked, clear if so. 85 */ 86#define UNMASK_IRQ(irq_num) \ 87 cmpl $0,%eax ; \ 88 jnz 8f ; \ 89 IOAPIC_IMASK_LOCK ; \ 90 testl $IOAPIC_IRQI_FLAG_MASKED, IOAPICFLAGS(irq_num) ; \ 91 je 7f ; /* bit clear, not masked */ \ 92 andl $~IOAPIC_IRQI_FLAG_MASKED, IOAPICFLAGS(irq_num) ; \ 93 /* clear mask bit */ \ 94 movq IOAPICADDR(irq_num),%rcx ; /* ioapic addr */ \ 95 movl REDIRIDX(irq_num), %eax ; /* get the index */ \ 96 movl %eax,(%rcx) ; /* write the index */ \ 97 andl $~IOART_INTMASK,IOAPIC_WINDOW(%rcx) ;/* clear the mask */ \ 987: ; \ 99 IOAPIC_IMASK_UNLOCK ; \ 1008: ; \ 101 102/* 103 * Interrupt call handlers run in the following sequence: 104 * 105 * - Push the trap frame required by doreti 106 * - Mask the interrupt and reenable its source 107 * - If we cannot take the interrupt set its ipending bit and 108 * doreti. 109 * - If we can take the interrupt clear its ipending bit, 110 * call the handler, then unmask and doreti. 111 * 112 * YYY can cache gd base opitner instead of using hidden %fs prefixes. 113 */ 114 115#define INTR_HANDLER(irq_num) \ 116 .text ; \ 117 SUPERALIGN_TEXT ; \ 118IDTVEC(ioapic_intr##irq_num) ; \ 119 APIC_PUSH_FRAME_TFRIP ; \ 120 FAKE_MCOUNT(TF_RIP(%rsp)) ; \ 121 IOAPIC_IMASK_LOCK ; \ 122 MASK_LEVEL_IRQ(irq_num) ; \ 123 movq lapic_eoi, %rax ; \ 124 IOAPIC_IMASK_UNLOCK ; \ 125 callq *%rax ; \ 126 movq PCPU(curthread),%rbx ; \ 127 testl $-1,TD_NEST_COUNT(%rbx) ; \ 128 jne 1f ; \ 129 testl $-1,TD_CRITCOUNT(%rbx) ; \ 130 je 2f ; \ 1311: ; \ 132 /* in critical section, make interrupt pending */ \ 133 /* set the pending bit and return, leave interrupt masked */ \ 134 movq $1,%rcx ; \ 135 shlq $IRQ_SBITS(irq_num),%rcx ; \ 136 movq $IRQ_LIDX(irq_num),%rdx ; \ 137 orq %rcx,PCPU_E8(ipending,%rdx) ; \ 138 orl $RQF_INTPEND,PCPU(reqflags) ; \ 139 jmp 5f ; \ 1402: ; \ 141 /* clear pending bit, run handler */ \ 142 movq $1,%rcx ; \ 143 shlq $IRQ_SBITS(irq_num),%rcx ; \ 144 notq %rcx ; \ 145 movq $IRQ_LIDX(irq_num),%rdx ; \ 146 andq %rcx,PCPU_E8(ipending,%rdx) ; \ 147 pushq $irq_num ; /* trapframe -> intrframe */ \ 148 movq %rsp, %rdi ; /* pass frame by reference */ \ 149 incl TD_CRITCOUNT(%rbx) ; \ 150 sti ; \ 151 call ithread_fast_handler ; /* returns 0 to unmask */ \ 152 cli ; /* interlock avoid stacking */ \ 153 decl TD_CRITCOUNT(%rbx) ; \ 154 addq $8, %rsp ; /* intrframe -> trapframe */ \ 155 UNMASK_IRQ(irq_num) ; \ 1565: ; \ 157 MEXITCOUNT ; \ 158 jmp doreti ; \ 159 160/* 161 * Handle "spurious INTerrupts". 162 * 163 * NOTE: This is different than the "spurious INTerrupt" generated by an 164 * 8259 PIC for missing INTs. See the APIC documentation for details. 165 * This routine should NOT do an 'EOI' cycle. 166 * 167 * NOTE: Even though we don't do anything here we must still swapgs if 168 * coming from a user frame in case the iretq faults... just use 169 * the nominal APIC_PUSH_FRAME sequence to get it done. 170 */ 171 .text 172 SUPERALIGN_TEXT 173 .globl Xspuriousint 174Xspuriousint: 175 APIC_PUSH_FRAME_TFRIP 176 /* No EOI cycle used here */ 177 FAKE_MCOUNT(TF_RIP(%rsp)) 178 MEXITCOUNT 179 APIC_POP_FRAME(jmp doreti_iret) 180 181/* 182 * Handle TLB shootdowns. 183 * 184 * NOTE: interrupts are left disabled. 185 */ 186 .text 187 SUPERALIGN_TEXT 188 .globl Xinvltlb 189Xinvltlb: 190 APIC_PUSH_FRAME_TFRIP 191 movq lapic_eoi, %rax 192 callq *%rax /* End Of Interrupt to APIC */ 193 FAKE_MCOUNT(TF_RIP(%rsp)) 194 incl PCPU(cnt) + V_IPI 195 movq PCPU(curthread),%rbx 196 incl PCPU(intr_nesting_level) 197 incl TD_CRITCOUNT(%rbx) 198 subq $8,%rsp /* make same as interrupt frame */ 199 movq %rsp,%rdi /* pass frame by reference */ 200 call smp_inval_intr /* called w/interrupts disabled */ 201 addq $8,%rsp /* turn into trapframe */ 202 decl TD_CRITCOUNT(%rbx) 203 decl PCPU(intr_nesting_level) 204 MEXITCOUNT 205 /*APIC_POP_FRAME*/ 206 jmp doreti /* doreti b/c intrs enabled */ 207 208/* 209 * Handle sniffs - sniff %rip and %rsp. 210 */ 211 .text 212 SUPERALIGN_TEXT 213 .globl Xsniff 214Xsniff: 215 APIC_PUSH_FRAME_TFRIP 216 movq lapic_eoi, %rax 217 callq *%rax /* End Of Interrupt to APIC */ 218 FAKE_MCOUNT(TF_RIP(%rsp)) 219 incl PCPU(cnt) + V_IPI 220 movq %rsp,%rdi 221 call CNAME(hard_sniff) /* systat -pv and flame sniff */ 222 MEXITCOUNT 223 APIC_POP_FRAME(jmp doreti_iret) 224 225/* 226 * Executed by a CPU when it receives an Xcpustop IPI from another CPU, 227 * 228 * - We cannot call doreti 229 * - Signals its receipt. 230 * - Waits for permission to restart. 231 * - Processing pending IPIQ events while waiting. 232 * - Signals its restart. 233 */ 234 235 .text 236 SUPERALIGN_TEXT 237 .globl Xcpustop 238Xcpustop: 239 APIC_PUSH_FRAME_TFRIP 240 movq lapic_eoi, %rax 241 callq *%rax /* End Of Interrupt to APIC */ 242 243 movl PCPU(cpuid), %eax 244 imull $PCB_SIZE, %eax 245 leaq CNAME(stoppcbs), %rdi 246 addq %rax, %rdi 247 call CNAME(savectx) /* Save process context */ 248 249 /* 250 * Indicate that we have stopped and loop waiting for permission 251 * to start again. We must still process IPI events while in a 252 * stopped state. 253 * 254 * Interrupts must remain enabled for non-IPI'd per-cpu interrupts 255 * (e.g. Xtimer, Xinvltlb). 256 */ 257#if CPUMASK_ELEMENTS != 4 258#error "assembly incompatible with cpumask_t" 259#endif 260 movq PCPU(cpumask)+0,%rax /* stopped_cpus |= 1 << cpuid */ 261 MPLOCKED orq %rax, stopped_cpus+0 262 movq PCPU(cpumask)+8,%rax 263 MPLOCKED orq %rax, stopped_cpus+8 264 movq PCPU(cpumask)+16,%rax 265 MPLOCKED orq %rax, stopped_cpus+16 266 movq PCPU(cpumask)+24,%rax 267 MPLOCKED orq %rax, stopped_cpus+24 268 269 movq PCPU(curthread),%rbx 270 incl PCPU(intr_nesting_level) 271 incl TD_CRITCOUNT(%rbx) 272 sti 2731: 274 andl $~RQF_IPIQ,PCPU(reqflags) 275 call lwkt_smp_stopped 276 pause 277 278 subq %rdi,%rdi 279 movq started_cpus+0,%rax /* while (!(started_cpus & (1<<id))) */ 280 andq PCPU(cpumask)+0,%rax 281 orq %rax,%rdi 282 movq started_cpus+8,%rax 283 andq PCPU(cpumask)+8,%rax 284 orq %rax,%rdi 285 movq started_cpus+16,%rax 286 andq PCPU(cpumask)+16,%rax 287 orq %rax,%rdi 288 movq started_cpus+24,%rax 289 andq PCPU(cpumask)+24,%rax 290 orq %rax,%rdi 291 testq %rdi,%rdi 292 jz 1b 293 294 movq PCPU(other_cpus)+0,%rax /* started_cpus &= ~(1 << cpuid) */ 295 MPLOCKED andq %rax, started_cpus+0 296 movq PCPU(other_cpus)+8,%rax 297 MPLOCKED andq %rax, started_cpus+8 298 movq PCPU(other_cpus)+16,%rax 299 MPLOCKED andq %rax, started_cpus+16 300 movq PCPU(other_cpus)+24,%rax 301 MPLOCKED andq %rax, started_cpus+24 302 303 movq PCPU(other_cpus)+0,%rax /* stopped_cpus &= ~(1 << cpuid) */ 304 MPLOCKED andq %rax, stopped_cpus+0 305 movq PCPU(other_cpus)+8,%rax 306 MPLOCKED andq %rax, stopped_cpus+8 307 movq PCPU(other_cpus)+16,%rax 308 MPLOCKED andq %rax, stopped_cpus+16 309 movq PCPU(other_cpus)+24,%rax 310 MPLOCKED andq %rax, stopped_cpus+24 311 312 cmpl $0,PCPU(cpuid) 313 jnz 2f 314 315 movq CNAME(cpustop_restartfunc), %rax 316 testq %rax, %rax 317 jz 2f 318 movq $0, CNAME(cpustop_restartfunc) /* One-shot */ 319 320 call *%rax 3212: 322 decl TD_CRITCOUNT(%rbx) 323 decl PCPU(intr_nesting_level) 324 MEXITCOUNT 325 /*APIC_POP_FRAME*/ 326 jmp doreti 327 328 /* 329 * For now just have one ipiq IPI, but what we really want is 330 * to have one for each source cpu to the APICs don't get stalled 331 * backlogging the requests. 332 */ 333 .text 334 SUPERALIGN_TEXT 335 .globl Xipiq 336Xipiq: 337 APIC_PUSH_FRAME_TFRIP 338 movq lapic_eoi, %rax 339 callq *%rax /* End Of Interrupt to APIC */ 340 FAKE_MCOUNT(TF_RIP(%rsp)) 341 342 incl PCPU(cnt) + V_IPI 343 movq PCPU(curthread),%rbx 344 testl $-1,TD_CRITCOUNT(%rbx) 345 jne 1f 346 subq $8,%rsp /* make same as interrupt frame */ 347 movq %rsp,%rdi /* pass frame by reference */ 348 incl PCPU(intr_nesting_level) 349 incl TD_CRITCOUNT(%rbx) 350 subq %rax,%rax 351 sti 352 xchgl %eax,PCPU(npoll) /* (atomic op) allow another Xipi */ 353 call lwkt_process_ipiq_frame 354 cli /* interlock avoid stacking */ 355 decl TD_CRITCOUNT(%rbx) 356 decl PCPU(intr_nesting_level) 357 addq $8,%rsp /* turn into trapframe */ 358 MEXITCOUNT 359 jmp doreti 3601: 361 orl $RQF_IPIQ,PCPU(reqflags) 362 MEXITCOUNT 363 APIC_POP_FRAME(jmp doreti_iret) 364 365 .text 366 SUPERALIGN_TEXT 367 .globl Xtimer 368Xtimer: 369 APIC_PUSH_FRAME_TFRIP 370 movq lapic_eoi, %rax 371 callq *%rax /* End Of Interrupt to APIC */ 372 FAKE_MCOUNT(TF_RIP(%rsp)) 373 374 subq $8,%rsp /* make same as interrupt frame */ 375 movq %rsp,%rdi /* pass frame by reference */ 376 call pcpu_timer_always 377 addq $8,%rsp /* turn into trapframe */ 378 379 incl PCPU(cnt) + V_TIMER 380 movq TF_RIP(%rsp),%rbx /* sample addr before checking crit */ 381 movq %rbx,PCPU(sample_pc) 382 movq PCPU(curthread),%rbx 383 testl $-1,TD_CRITCOUNT(%rbx) 384 jne 1f 385 testl $-1,TD_NEST_COUNT(%rbx) 386 jne 1f 387 subq $8,%rsp /* make same as interrupt frame */ 388 movq %rsp,%rdi /* pass frame by reference */ 389 incl PCPU(intr_nesting_level) 390 incl TD_CRITCOUNT(%rbx) 391 sti 392 call pcpu_timer_process_frame 393 cli /* interlock avoid stacking */ 394 decl TD_CRITCOUNT(%rbx) 395 decl PCPU(intr_nesting_level) 396 addq $8,%rsp /* turn into trapframe */ 397 MEXITCOUNT 398 jmp doreti 3991: 400 orl $RQF_TIMER,PCPU(reqflags) 401 MEXITCOUNT 402 APIC_POP_FRAME(jmp doreti_iret) 403 404MCOUNT_LABEL(bintr) 405 INTR_HANDLER(0) 406 INTR_HANDLER(1) 407 INTR_HANDLER(2) 408 INTR_HANDLER(3) 409 INTR_HANDLER(4) 410 INTR_HANDLER(5) 411 INTR_HANDLER(6) 412 INTR_HANDLER(7) 413 INTR_HANDLER(8) 414 INTR_HANDLER(9) 415 INTR_HANDLER(10) 416 INTR_HANDLER(11) 417 INTR_HANDLER(12) 418 INTR_HANDLER(13) 419 INTR_HANDLER(14) 420 INTR_HANDLER(15) 421 INTR_HANDLER(16) 422 INTR_HANDLER(17) 423 INTR_HANDLER(18) 424 INTR_HANDLER(19) 425 INTR_HANDLER(20) 426 INTR_HANDLER(21) 427 INTR_HANDLER(22) 428 INTR_HANDLER(23) 429 INTR_HANDLER(24) 430 INTR_HANDLER(25) 431 INTR_HANDLER(26) 432 INTR_HANDLER(27) 433 INTR_HANDLER(28) 434 INTR_HANDLER(29) 435 INTR_HANDLER(30) 436 INTR_HANDLER(31) 437 INTR_HANDLER(32) 438 INTR_HANDLER(33) 439 INTR_HANDLER(34) 440 INTR_HANDLER(35) 441 INTR_HANDLER(36) 442 INTR_HANDLER(37) 443 INTR_HANDLER(38) 444 INTR_HANDLER(39) 445 INTR_HANDLER(40) 446 INTR_HANDLER(41) 447 INTR_HANDLER(42) 448 INTR_HANDLER(43) 449 INTR_HANDLER(44) 450 INTR_HANDLER(45) 451 INTR_HANDLER(46) 452 INTR_HANDLER(47) 453 INTR_HANDLER(48) 454 INTR_HANDLER(49) 455 INTR_HANDLER(50) 456 INTR_HANDLER(51) 457 INTR_HANDLER(52) 458 INTR_HANDLER(53) 459 INTR_HANDLER(54) 460 INTR_HANDLER(55) 461 INTR_HANDLER(56) 462 INTR_HANDLER(57) 463 INTR_HANDLER(58) 464 INTR_HANDLER(59) 465 INTR_HANDLER(60) 466 INTR_HANDLER(61) 467 INTR_HANDLER(62) 468 INTR_HANDLER(63) 469 INTR_HANDLER(64) 470 INTR_HANDLER(65) 471 INTR_HANDLER(66) 472 INTR_HANDLER(67) 473 INTR_HANDLER(68) 474 INTR_HANDLER(69) 475 INTR_HANDLER(70) 476 INTR_HANDLER(71) 477 INTR_HANDLER(72) 478 INTR_HANDLER(73) 479 INTR_HANDLER(74) 480 INTR_HANDLER(75) 481 INTR_HANDLER(76) 482 INTR_HANDLER(77) 483 INTR_HANDLER(78) 484 INTR_HANDLER(79) 485 INTR_HANDLER(80) 486 INTR_HANDLER(81) 487 INTR_HANDLER(82) 488 INTR_HANDLER(83) 489 INTR_HANDLER(84) 490 INTR_HANDLER(85) 491 INTR_HANDLER(86) 492 INTR_HANDLER(87) 493 INTR_HANDLER(88) 494 INTR_HANDLER(89) 495 INTR_HANDLER(90) 496 INTR_HANDLER(91) 497 INTR_HANDLER(92) 498 INTR_HANDLER(93) 499 INTR_HANDLER(94) 500 INTR_HANDLER(95) 501 INTR_HANDLER(96) 502 INTR_HANDLER(97) 503 INTR_HANDLER(98) 504 INTR_HANDLER(99) 505 INTR_HANDLER(100) 506 INTR_HANDLER(101) 507 INTR_HANDLER(102) 508 INTR_HANDLER(103) 509 INTR_HANDLER(104) 510 INTR_HANDLER(105) 511 INTR_HANDLER(106) 512 INTR_HANDLER(107) 513 INTR_HANDLER(108) 514 INTR_HANDLER(109) 515 INTR_HANDLER(110) 516 INTR_HANDLER(111) 517 INTR_HANDLER(112) 518 INTR_HANDLER(113) 519 INTR_HANDLER(114) 520 INTR_HANDLER(115) 521 INTR_HANDLER(116) 522 INTR_HANDLER(117) 523 INTR_HANDLER(118) 524 INTR_HANDLER(119) 525 INTR_HANDLER(120) 526 INTR_HANDLER(121) 527 INTR_HANDLER(122) 528 INTR_HANDLER(123) 529 INTR_HANDLER(124) 530 INTR_HANDLER(125) 531 INTR_HANDLER(126) 532 INTR_HANDLER(127) 533 INTR_HANDLER(128) 534 INTR_HANDLER(129) 535 INTR_HANDLER(130) 536 INTR_HANDLER(131) 537 INTR_HANDLER(132) 538 INTR_HANDLER(133) 539 INTR_HANDLER(134) 540 INTR_HANDLER(135) 541 INTR_HANDLER(136) 542 INTR_HANDLER(137) 543 INTR_HANDLER(138) 544 INTR_HANDLER(139) 545 INTR_HANDLER(140) 546 INTR_HANDLER(141) 547 INTR_HANDLER(142) 548 INTR_HANDLER(143) 549 INTR_HANDLER(144) 550 INTR_HANDLER(145) 551 INTR_HANDLER(146) 552 INTR_HANDLER(147) 553 INTR_HANDLER(148) 554 INTR_HANDLER(149) 555 INTR_HANDLER(150) 556 INTR_HANDLER(151) 557 INTR_HANDLER(152) 558 INTR_HANDLER(153) 559 INTR_HANDLER(154) 560 INTR_HANDLER(155) 561 INTR_HANDLER(156) 562 INTR_HANDLER(157) 563 INTR_HANDLER(158) 564 INTR_HANDLER(159) 565 INTR_HANDLER(160) 566 INTR_HANDLER(161) 567 INTR_HANDLER(162) 568 INTR_HANDLER(163) 569 INTR_HANDLER(164) 570 INTR_HANDLER(165) 571 INTR_HANDLER(166) 572 INTR_HANDLER(167) 573 INTR_HANDLER(168) 574 INTR_HANDLER(169) 575 INTR_HANDLER(170) 576 INTR_HANDLER(171) 577 INTR_HANDLER(172) 578 INTR_HANDLER(173) 579 INTR_HANDLER(174) 580 INTR_HANDLER(175) 581 INTR_HANDLER(176) 582 INTR_HANDLER(177) 583 INTR_HANDLER(178) 584 INTR_HANDLER(179) 585 INTR_HANDLER(180) 586 INTR_HANDLER(181) 587 INTR_HANDLER(182) 588 INTR_HANDLER(183) 589 INTR_HANDLER(184) 590 INTR_HANDLER(185) 591 INTR_HANDLER(186) 592 INTR_HANDLER(187) 593 INTR_HANDLER(188) 594 INTR_HANDLER(189) 595 INTR_HANDLER(190) 596 INTR_HANDLER(191) 597MCOUNT_LABEL(eintr) 598 599 .data 600 601#if CPUMASK_ELEMENTS != 4 602#error "assembly incompatible with cpumask_t" 603#endif 604/* variables used by stop_cpus()/restart_cpus()/Xcpustop */ 605 .globl stopped_cpus, started_cpus 606stopped_cpus: 607 .quad 0 608 .quad 0 609 .quad 0 610 .quad 0 611started_cpus: 612 .quad 0 613 .quad 0 614 .quad 0 615 .quad 0 616 617 .globl CNAME(cpustop_restartfunc) 618CNAME(cpustop_restartfunc): 619 .quad 0 620 621 .text 622 623