1 /*- 2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org> 3 * Copyright (c) 2008 The DragonFly Project. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. Neither the name of the author nor the names of any co-contributors 15 * may be used to endorse or promote products derived from this software 16 * without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $FreeBSD: src/sys/i386/include/apicvar.h,v 1.5 2003/11/14 22:21:30 peter Exp $ 31 * $DragonFly: src/sys/platform/pc64/apic/apicvar.h,v 1.1 2008/08/29 17:07:12 dillon Exp $ 32 */ 33 34 #ifndef _MACHINE_APICVAR_H_ 35 #define _MACHINE_APICVAR_H_ 36 37 /* 38 * Local && I/O APIC variable definitions. 39 */ 40 41 /* 42 * Layout of local APIC interrupt vectors: 43 * 44 * 0xff (255) +-------------+ 45 * | | 15 (Spurious / IPIs / Local Interrupts) 46 * 0xf0 (240) +-------------+ 47 * | | 14 (I/O Interrupts) 48 * 0xe0 (224) +-------------+ 49 * | | 13 (I/O Interrupts) 50 * 0xd0 (208) +-------------+ 51 * | | 12 (I/O Interrupts) 52 * 0xc0 (192) +-------------+ 53 * | | 11 (I/O Interrupts) 54 * 0xb0 (176) +-------------+ 55 * | | 10 (I/O Interrupts) 56 * 0xa0 (160) +-------------+ 57 * | | 9 (I/O Interrupts) 58 * 0x90 (144) +-------------+ 59 * | | 8 (I/O Interrupts / System Calls) 60 * 0x80 (128) +-------------+ 61 * | | 7 (I/O Interrupts) 62 * 0x70 (112) +-------------+ 63 * | | 6 (I/O Interrupts) 64 * 0x60 (96) +-------------+ 65 * | | 5 (I/O Interrupts) 66 * 0x50 (80) +-------------+ 67 * | | 4 (I/O Interrupts) 68 * 0x40 (64) +-------------+ 69 * | | 3 (I/O Interrupts) 70 * 0x30 (48) +-------------+ 71 * | | 2 (ATPIC Interrupts) 72 * 0x20 (32) +-------------+ 73 * | | 1 (Exceptions, traps, faults, etc.) 74 * 0x10 (16) +-------------+ 75 * | | 0 (Exceptions, traps, faults, etc.) 76 * 0x00 (0) +-------------+ 77 * 78 * Note: 0x80 needs to be handled specially and not allocated to an 79 * I/O device! 80 */ 81 82 #define APIC_ID_ALL 0xff 83 #define APIC_IO_INTS (IDT_IO_INTS + 16) 84 #define APIC_NUM_IOINTS 192 85 86 #define APIC_LOCAL_INTS 240 87 88 /* XXX put APIC interrupt and IPI assignments here */ 89 90 #define APIC_SPURIOUS_INT 255 91 92 #define LVT_LINT0 0 93 #define LVT_LINT1 1 94 #define LVT_TIMER 2 95 #define LVT_ERROR 3 96 #define LVT_PMC 4 97 #define LVT_THERMAL 5 98 #define LVT_MAX LVT_THERMAL 99 100 #ifndef LOCORE 101 102 #define APIC_IPI_DEST_SELF -1 103 #define APIC_IPI_DEST_ALL -2 104 #define APIC_IPI_DEST_OTHERS -3 105 106 /* 107 * An APIC enumerator is a psuedo bus driver that enumerates APIC's including 108 * CPU's and I/O APIC's. 109 */ 110 struct apic_enumerator { 111 const char *apic_name; 112 int (*apic_probe)(void); 113 int (*apic_probe_cpus)(void); 114 int (*apic_setup_local)(void); 115 int (*apic_setup_io)(void); 116 SLIST_ENTRY(apic_enumerator) apic_next; 117 }; 118 119 u_int apic_irq_to_idt(u_int irq); 120 u_int apic_idt_to_irq(u_int vector); 121 void apic_register_enumerator(struct apic_enumerator *enumerator); 122 void *ioapic_create(uintptr_t addr, int32_t id, int intbase); 123 int ioapic_disable_pin(void *cookie, u_int pin); 124 void ioapic_enable_mixed_mode(void); 125 int ioapic_get_vector(void *cookie, u_int pin); 126 int ioapic_next_logical_cluster(void); 127 void ioapic_register(void *cookie); 128 int ioapic_remap_vector(void *cookie, u_int pin, int vector); 129 int ioapic_set_extint(void *cookie, u_int pin); 130 int ioapic_set_nmi(void *cookie, u_int pin); 131 int ioapic_set_polarity(void *cookie, u_int pin, char activehi); 132 int ioapic_set_triggermode(void *cookie, u_int pin, char edgetrigger); 133 int ioapic_set_smi(void *cookie, u_int pin); 134 void lapic_create(u_int apic_id, int boot_cpu); 135 void lapic_disable(void); 136 void lapic_dump(const char *str); 137 void lapic_enable_intr(u_int vector); 138 void lapic_eoi(void); 139 int lapic_id(void); 140 void lapic_init(uintptr_t addr); 141 int lapic_intr_pending(u_int vector); 142 void lapic_ipi_raw(register_t icrlo, u_int dest); 143 void lapic_ipi_vectored(u_int vector, int dest); 144 int lapic_ipi_wait(int delay); 145 void lapic_handle_intr(struct intrframe *frame); 146 void lapic_set_logical_id(u_int apic_id, u_int cluster, u_int cluster_id); 147 int lapic_set_lvt_mask(u_int apic_id, u_int lvt, u_char masked); 148 int lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode); 149 int lapic_set_lvt_polarity(u_int apic_id, u_int lvt, u_char activehi); 150 int lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, u_char edgetrigger); 151 void lapic_setup(void); 152 153 #endif /* !LOCORE */ 154 #endif /* _MACHINE_APICVAR_H_ */ 155