xref: /dragonfly/sys/platform/pc64/apic/lapic.h (revision 650094e1)
1 /*
2  * Copyright (c) 1996, by Steve Passe
3  * Copyright (c) 2008 The DragonFly Project.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. The name of the developer may NOT be used to endorse or promote products
12  *    derived from this software without specific prior written permission.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD: src/sys/i386/include/mpapic.h,v 1.14.2.2 2000/09/30 02:49:34 ps Exp $
27  * $DragonFly: src/sys/platform/pc64/apic/mpapic.h,v 1.1 2008/08/29 17:07:12 dillon Exp $
28  */
29 
30 #ifndef _ARCH_APIC_LAPIC_H_
31 #define _ARCH_APIC_LAPIC_H_
32 
33 #include <machine_base/apic/apicreg.h>
34 
35 /*
36  * APIC ID <-> CPU ID mapping macros
37  */
38 #define CPUID_TO_APICID(cpu_id)		(cpu_id_to_apic_id[(cpu_id)])
39 #define APICID_TO_CPUID(apic_id)	(apic_id_to_cpu_id[(apic_id)])
40 
41 #ifndef _SYS_QUEUE_H_
42 #include <sys/queue.h>
43 #endif
44 
45 struct lapic_enumerator {
46 	int	lapic_prio;
47 	TAILQ_ENTRY(lapic_enumerator) lapic_link;
48 	int	(*lapic_probe)(struct lapic_enumerator *);
49 	void	(*lapic_enumerate)(struct lapic_enumerator *);
50 };
51 
52 #define LAPIC_ENUM_PRIO_MPTABLE		20
53 #define LAPIC_ENUM_PRIO_MADT		40
54 
55 extern volatile lapic_t		*lapic;
56 extern int			cpu_id_to_apic_id[];
57 extern int			apic_id_to_cpu_id[];
58 extern int			lapic_enable;
59 
60 void	apic_dump(char*);
61 void	lapic_init(boolean_t);
62 void	lapic_set_cpuid(int, int);
63 int	lapic_config(void);
64 void	lapic_enumerator_register(struct lapic_enumerator *);
65 void	set_apic_timer(int);
66 int	get_apic_timer_frequency(void);
67 int	read_apic_timer(void);
68 void	u_sleep(int);
69 
70 void	lapic_map(vm_paddr_t);
71 int	lapic_unused_apic_id(int);
72 void	lapic_fixup_noioapic(void);
73 
74 #ifdef SMP
75 
76 #ifndef _MACHINE_SMP_H_
77 #include <machine/smp.h>
78 #endif
79 
80 int	apic_ipi(int, int, int);
81 void	selected_apic_ipi(cpumask_t, int, int);
82 void	single_apic_ipi(int, int, int);
83 int	single_apic_ipi_passive(int, int, int);
84 
85 /*
86  * Send an IPI INTerrupt containing 'vector' to all CPUs EXCEPT myself
87  */
88 static __inline int
89 all_but_self_ipi(int vector)
90 {
91 	if (smp_active_mask == 1)
92 		return 0;
93 	return apic_ipi(APIC_DEST_ALLESELF, vector, APIC_DELMODE_FIXED);
94 }
95 
96 #endif	/* SMP */
97 
98 #endif /* _ARCH_APIC_LAPIC_H_ */
99