1 /*- 2 * Copyright (c) 2004 John Baldwin <jhb@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. Neither the name of the author nor the names of any co-contributors 14 * may be used to endorse or promote products derived from this software 15 * without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 /* 31 * The ELCR is a register that controls the trigger mode and polarity of 32 * EISA and ISA interrupts. In FreeBSD 3.x and 4.x, the ELCR was only 33 * consulted for determining the appropriate trigger mode of EISA 34 * interrupts when using an APIC. However, it seems that almost all 35 * systems that include PCI also include an ELCR that manages the ISA 36 * IRQs 0 through 15. Thus, we check for the presence of an ELCR on 37 * every machine by checking to see if the values found at bootup are 38 * sane. Note that the polarity of ISA and EISA IRQs are linked to the 39 * trigger mode. All edge triggered IRQs use active-hi polarity, and 40 * all level triggered interrupts use active-lo polarity. 41 * 42 * The format of the ELCR is simple: it is a 16-bit bitmap where bit 0 43 * controls IRQ 0, bit 1 controls IRQ 1, etc. If the bit is zero, the 44 * associated IRQ is edge triggered. If the bit is one, the IRQ is 45 * level triggered. 46 */ 47 48 #include <sys/param.h> 49 #include <sys/bus.h> 50 #include <sys/systm.h> 51 #include <sys/kernel.h> 52 53 #include <machine_base/icu/elcr_var.h> 54 #include <machine_base/isa/isa_intr.h> 55 56 #define ELCR_PORT 0x4d0 57 #define ELCR_MASK(irq) (1 << (irq)) 58 59 int elcr_found; 60 static int elcr_status; 61 62 /* 63 * Check to see if we have what looks like a valid ELCR. We do this by 64 * verifying that IRQs 0, 1, 2, and 13 are all edge triggered. 65 */ 66 void 67 elcr_probe(void) 68 { 69 int disable = 0; 70 71 TUNABLE_INT_FETCH("hw.elcr_disable", &disable); 72 if (disable) 73 return; 74 75 elcr_status = inb(ELCR_PORT) | inb(ELCR_PORT + 1) << 8; 76 if ((elcr_status & (ELCR_MASK(0) | ELCR_MASK(1) | ELCR_MASK(2) | 77 ELCR_MASK(8) | ELCR_MASK(13))) != 0) 78 return; 79 elcr_found = 1; 80 } 81 82 /* 83 * Returns 1 for level trigger, 0 for edge. 84 */ 85 enum intr_trigger 86 elcr_read_trigger(int irq) 87 { 88 KASSERT(elcr_found, ("%s: no ELCR was found!", __func__)); 89 KASSERT(irq < ISA_IRQ_CNT, ("%s: invalid IRQ %u", __func__, irq)); 90 if (elcr_status & ELCR_MASK(irq)) 91 return (INTR_TRIGGER_LEVEL); 92 else 93 return (INTR_TRIGGER_EDGE); 94 } 95 96 /* 97 * Set the trigger mode for a specified IRQ. Mode of 0 means edge triggered, 98 * and a mode of 1 means level triggered. 99 */ 100 void 101 elcr_write_trigger(int irq, enum intr_trigger trigger) 102 { 103 int new_status; 104 105 KASSERT(elcr_found, ("%s: no ELCR was found!", __func__)); 106 KASSERT(irq < ISA_IRQ_CNT, ("%s: invalid IRQ %u", __func__, irq)); 107 if (trigger == INTR_TRIGGER_LEVEL) 108 new_status = elcr_status | ELCR_MASK(irq); 109 else 110 new_status = elcr_status & ~ELCR_MASK(irq); 111 if (new_status == elcr_status) 112 return; 113 elcr_status = new_status; 114 if (irq >= 8) 115 outb(ELCR_PORT + 1, elcr_status >> 8); 116 else 117 outb(ELCR_PORT, elcr_status & 0xff); 118 } 119 120 void 121 elcr_resume(void) 122 { 123 KASSERT(elcr_found, ("%s: no ELCR was found!", __func__)); 124 outb(ELCR_PORT, elcr_status & 0xff); 125 outb(ELCR_PORT + 1, elcr_status >> 8); 126 } 127 128 void 129 elcr_dump(void) 130 { 131 if (!elcr_found) 132 return; 133 134 if (bootverbose) { 135 int i; 136 137 kprintf("ELCR Found. ISA IRQs programmed as:\n"); 138 for (i = 0; i < ISA_IRQ_CNT; i++) 139 kprintf(" %2d", i); 140 kprintf("\n"); 141 for (i = 0; i < ISA_IRQ_CNT; i++) 142 if (elcr_status & ELCR_MASK(i)) 143 kprintf(" L"); 144 else 145 kprintf(" E"); 146 kprintf("\n"); 147 } 148 } 149