1 /* 2 * Copyright (c) 1991 Regents of the University of California. 3 * Copyright (c) 2003 Peter Wemm. 4 * Copyright (c) 2008 The DragonFly Project. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * the Systems Programming Group of the University of Utah Computer 9 * Science Department and William Jolitz of UUNET Technologies Inc. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * Derived from hp300 version by Mike Hibler, this version by William 36 * Jolitz uses a recursive map [a pde points to the page directory] to 37 * map the page tables using the pagetables themselves. This is done to 38 * reduce the impact on kernel virtual memory for lots of sparse address 39 * space, and to reduce the cost of memory to each process. 40 * 41 * from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90 42 * from: @(#)pmap.h 7.4 (Berkeley) 5/12/91 43 * $FreeBSD: src/sys/i386/include/pmap.h,v 1.65.2.3 2001/10/03 07:15:37 peter Exp $ 44 */ 45 46 #ifndef _MACHINE_PMAP_H_ 47 #define _MACHINE_PMAP_H_ 48 49 #include <cpu/pmap.h> 50 51 /* 52 * Size of Kernel address space. This is the number of page table pages 53 * (2GB each) to use for the kernel. 256 pages == 512 Gigabytes. 54 * This **MUST** be a multiple of 4 (eg: 252, 256, 260, etc). 55 */ 56 #ifndef KVA_PAGES 57 #define KVA_PAGES 256 58 #endif 59 60 /* 61 * Pte related macros. This is complicated by having to deal with 62 * the sign extension of the 48th bit. 63 */ 64 #define KVADDR(l4, l3, l2, l1) ( \ 65 ((unsigned long)-1 << 47) | \ 66 ((unsigned long)(l4) << PML4SHIFT) | \ 67 ((unsigned long)(l3) << PDPSHIFT) | \ 68 ((unsigned long)(l2) << PDRSHIFT) | \ 69 ((unsigned long)(l1) << PAGE_SHIFT)) 70 71 #define UVADDR(l4, l3, l2, l1) ( \ 72 ((unsigned long)(l4) << PML4SHIFT) | \ 73 ((unsigned long)(l3) << PDPSHIFT) | \ 74 ((unsigned long)(l2) << PDRSHIFT) | \ 75 ((unsigned long)(l1) << PAGE_SHIFT)) 76 77 /* 78 * NKPML4E is the number of PML4E slots used for KVM. Each slot represents 79 * 512GB of KVM. A number between 1 and 128 may be specified. To support 80 * the maximum machine configuration of 64TB we recommend around 81 * 16 slots (8TB of KVM). 82 * 83 * NOTE: We no longer hardwire NKPT, it is calculated in create_pagetables() 84 */ 85 #define NKPML4E 16 86 /* NKPDPE defined in vmparam.h */ 87 88 /* 89 * NUPDPs 512 (256 user) number of PDPs in user page table 90 * NUPDs 512 * 512 number of PDs in user page table 91 * NUPTs 512 * 512 * 512 number of PTs in user page table 92 * NUPTEs 512 * 512 * 512 * 512 number of PTEs in user page table 93 * 94 * NUPDP_USER number of PDPs reserved for userland 95 * NUPTE_USER number of PTEs reserved for userland (big number) 96 */ 97 #define NUPDP_USER (NPML4EPG/2) 98 #define NUPDP_TOTAL (NPML4EPG) 99 #define NUPD_TOTAL (NPDPEPG * NUPDP_TOTAL) 100 #define NUPT_TOTAL (NPDEPG * NUPD_TOTAL) 101 #define NUPTE_TOTAL ((vm_pindex_t)NPTEPG * NUPT_TOTAL) 102 #define NUPTE_USER ((vm_pindex_t)NPTEPG * NPDEPG * NPDPEPG * NUPDP_USER) 103 104 /* 105 * Number of 512G dmap PML4 slots. There are 512 slots of which 256 are 106 * used by the kernel. Of those 256 we allow up to 128 to be used by the 107 * DMAP (for 64TB of ram), leaving 128 for the kernel and other incidentals. 108 */ 109 #define NDMPML4E 128 110 111 /* 112 * The *PML4I values control the layout of virtual memory. Each PML4 113 * entry represents 512G. 114 */ 115 #define PML4PML4I (NPML4EPG/2) /* Index of recursive pml4 mapping */ 116 117 #define KPML4I (NPML4EPG-NKPML4E) /* Start of KVM */ 118 #define DMPML4I (KPML4I-NDMPML4E) /* Next 512GBxN down for dmap */ 119 120 /* 121 * Make sure the kernel map and DMAP don't overflow the 256 PDP entries 122 * we have available. Minus one for the PML4PML4I. 123 */ 124 #if NKPML4E + NDMPML4E >= 255 125 #error "NKPML4E or NDMPML4E is too large" 126 #endif 127 128 /* 129 * The location of KERNBASE in the last PD of the kernel's KVM (KPML4I) 130 * space. Each PD represents 1GB. The kernel must be placed here 131 * for the compile/link options to work properly so absolute 32-bit 132 * addressing can be used to access stuff. 133 */ 134 #define KPDPI (NPDPEPG-2) /* kernbase at -2GB */ 135 136 /* 137 * per-CPU data assume ~64K x SMP_MAXCPU, say up to 256 cpus 138 * in the future or 16MB of space. Each PD represents 2MB so 139 * use NPDEPG-8 to place the per-CPU data. 140 */ 141 #define MPPML4I (KPML4I + NKPML4E - 1) 142 #define MPPDPI KPDPI 143 #define MPPTDI (NPDEPG-8) 144 145 /* 146 * XXX doesn't really belong here I guess... 147 */ 148 #define ISA_HOLE_START 0xa0000 149 #define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START) 150 151 #ifndef LOCORE 152 153 #ifndef _SYS_TYPES_H_ 154 #include <sys/types.h> 155 #endif 156 #ifndef _SYS_QUEUE_H_ 157 #include <sys/queue.h> 158 #endif 159 #ifndef _SYS_TREE_H_ 160 #include <sys/tree.h> 161 #endif 162 #ifndef _SYS_SPINLOCK_H_ 163 #include <sys/spinlock.h> 164 #endif 165 #ifndef _SYS_THREAD_H_ 166 #include <sys/thread.h> 167 #endif 168 #ifndef _MACHINE_TYPES_H_ 169 #include <machine/types.h> 170 #endif 171 #ifndef _MACHINE_PARAM_H_ 172 #include <machine/param.h> 173 #endif 174 175 /* 176 * Address of current and alternate address space page table maps 177 * and directories. 178 */ 179 #ifdef _KERNEL 180 #define addr_PTmap (KVADDR(PML4PML4I, 0, 0, 0)) 181 #define addr_PDmap (KVADDR(PML4PML4I, PML4PML4I, 0, 0)) 182 #define addr_PDPmap (KVADDR(PML4PML4I, PML4PML4I, PML4PML4I, 0)) 183 #define addr_PML4map (KVADDR(PML4PML4I, PML4PML4I, PML4PML4I, PML4PML4I)) 184 #define addr_PML4pml4e (addr_PML4map + (PML4PML4I * sizeof(pml4_entry_t))) 185 #define PTmap ((pt_entry_t *)(addr_PTmap)) 186 #define PDmap ((pd_entry_t *)(addr_PDmap)) 187 #define PDPmap ((pd_entry_t *)(addr_PDPmap)) 188 #define PML4map ((pd_entry_t *)(addr_PML4map)) 189 #define PML4pml4e ((pd_entry_t *)(addr_PML4pml4e)) 190 191 extern u_int64_t KPML4phys; /* physical address of kernel level 4 */ 192 extern int pmap_fast_kernel_cpusync; 193 #endif 194 195 #ifdef _KERNEL 196 197 /* 198 * XXX 199 */ 200 #define vtophys(va) pmap_kextract(((vm_offset_t)(va))) 201 #define vtophys_pte(va) ((pt_entry_t)pmap_kextract(((vm_offset_t)(va)))) 202 203 #endif 204 205 #define pte_load_clear(pte) atomic_readandclear_long(pte) 206 207 /* 208 * Pmap stuff 209 */ 210 struct pmap; 211 struct pv_entry; 212 struct vm_page; 213 struct vm_object; 214 struct vmspace; 215 216 /* 217 * vm_page structure extension for pmap. Track the number of pmap mappings 218 * for a managed page. Unmanaged pages do not use this field. 219 */ 220 struct md_page { 221 long pmap_count; 222 long writeable_count; 223 }; 224 225 /* 226 * vm_object's representing large mappings can contain embedded pmaps 227 * to organize sharing at higher page table levels for PROT_READ and 228 * PROT_READ|PROT_WRITE maps. 229 */ 230 struct md_object { 231 void *dummy_unused; 232 }; 233 234 /* 235 * Each machine dependent implementation is expected to 236 * keep certain statistics. They may do this anyway they 237 * so choose, but are expected to return the statistics 238 * in the following structure. 239 * 240 * NOTE: We try to match the size of the pc32 pmap with the vkernel pmap 241 * so the same utilities (like 'ps') can be used on both. 242 */ 243 struct pmap_statistics { 244 long resident_count; /* # of pages mapped (total) */ 245 long wired_count; /* # of pages wired */ 246 }; 247 typedef struct pmap_statistics *pmap_statistics_t; 248 249 struct pv_entry_rb_tree; 250 RB_PROTOTYPE2(pv_entry_rb_tree, pv_entry, pv_entry, 251 pv_entry_compare, vm_pindex_t); 252 253 /* Types of PMAP (regular, EPT Intel, NPT Amd) */ 254 #define REGULAR_PMAP 0 255 #define EPT_PMAP 1 256 257 /* Bits indexes in pmap_bits */ 258 #define TYPE_IDX 0 259 #define PG_V_IDX 1 260 #define PG_RW_IDX 2 261 #define PG_U_IDX 3 262 #define PG_A_IDX 4 263 #define PG_M_IDX 5 264 #define PG_PS_IDX 6 265 #define PG_G_IDX 7 266 #define PG_W_IDX 8 267 #define PG_MANAGED_IDX 9 268 #define PG_UNUSED10_IDX 10 269 #define PG_N_IDX 11 270 #define PG_NX_IDX 12 271 #define PG_BITS_SIZE 13 272 273 #define PROTECTION_CODES_SIZE 8 274 #define PAT_INDEX_SIZE 8 275 276 #define PM_PLACEMARKS 64 /* 16 @ 4 zones */ 277 #define PM_NOPLACEMARK ((vm_pindex_t)-1) 278 #define PM_PLACEMARK_WAKEUP ((vm_pindex_t)0x8000000000000000LLU) 279 280 struct pmap { 281 pml4_entry_t *pm_pml4; /* KVA of level 4 page table */ 282 pml4_entry_t *pm_pml4_iso; /* (isolated version) */ 283 struct pv_entry *pm_pmlpv; /* PV entry for pml4 */ 284 struct pv_entry *pm_pmlpv_iso; /* (isolated version) */ 285 TAILQ_ENTRY(pmap) pm_pmnode; /* list of pmaps */ 286 RB_HEAD(pv_entry_rb_tree, pv_entry) pm_pvroot; 287 int pm_count; /* reference count */ 288 cpulock_t pm_active_lock; /* interlock */ 289 cpumask_t pm_active; /* active on cpus */ 290 int pm_flags; 291 uint32_t pm_softhold; 292 struct pmap_statistics pm_stats; /* pmap statistics */ 293 struct spinlock pm_spin; 294 struct pv_entry *pm_pvhint_pt; /* pv_entry lookup hint */ 295 struct pv_entry *pm_pvhint_unused; 296 vm_pindex_t pm_placemarks[PM_PLACEMARKS]; 297 long pm_invgen; 298 uint64_t pmap_bits[PG_BITS_SIZE]; 299 uint64_t protection_codes[PROTECTION_CODES_SIZE]; 300 pt_entry_t pmap_cache_bits[PAT_INDEX_SIZE]; 301 pt_entry_t pmap_cache_mask; 302 int (*copyinstr)(const void *, void *, size_t, size_t *); 303 int (*copyin)(const void *, void *, size_t); 304 int (*copyout)(const void *, void *, size_t); 305 int (*fubyte)(const uint8_t *); /* returns int for -1 err */ 306 int (*subyte)(uint8_t *, uint8_t); 307 int32_t (*fuword32)(const uint32_t *); 308 int64_t (*fuword64)(const uint64_t *); 309 int (*suword64)(uint64_t *, uint64_t); 310 int (*suword32)(uint32_t *, int); 311 uint32_t (*swapu32)(volatile uint32_t *, uint32_t v); 312 uint64_t (*swapu64)(volatile uint64_t *, uint64_t v); 313 uint32_t (*fuwordadd32)(volatile uint32_t *, uint32_t v); 314 uint64_t (*fuwordadd64)(volatile uint64_t *, uint64_t v); 315 }; 316 317 #define PMAP_FLAG_SIMPLE 0x00000001 318 #define PMAP_EMULATE_AD_BITS 0x00000002 319 #define PMAP_HVM 0x00000004 320 #define PMAP_SEGSHARED 0x00000008 /* segment shared opt */ 321 #define PMAP_MULTI 0x00000010 /* multi-threaded use */ 322 323 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) 324 #define pmap_resident_tlnw_count(pmap) ((pmap)->pm_stats.resident_count - \ 325 (pmap)->pm_stats.wired_count) 326 327 typedef struct pmap *pmap_t; 328 329 #ifdef _KERNEL 330 extern struct pmap kernel_pmap; 331 #endif 332 333 /* 334 * The pv_entry structure is used to track higher levels of the page table. 335 * The leaf PTE is no longer tracked with this structure. 336 */ 337 typedef struct pv_entry { 338 pmap_t pv_pmap; /* pmap where mapping lies */ 339 vm_pindex_t pv_pindex; /* PTE, PT, PD, PDP, or PML4 */ 340 RB_ENTRY(pv_entry) pv_entry; 341 struct vm_page *pv_m; /* page being mapped */ 342 u_int pv_hold; /* interlock action */ 343 u_int pv_flags; 344 #ifdef PMAP_DEBUG 345 const char *pv_func; 346 int pv_line; 347 const char *pv_func_lastfree; 348 int pv_line_lastfree; 349 #endif 350 } *pv_entry_t; 351 352 #define PV_HOLD_LOCKED 0x80000000U 353 #define PV_HOLD_WAITING 0x40000000U 354 #define PV_HOLD_UNUSED2000 0x20000000U 355 #define PV_HOLD_MASK 0x1FFFFFFFU 356 357 #define PV_FLAG_UNUSED01 0x00000001U 358 #define PV_FLAG_UNUSED02 0x00000002U 359 360 #ifdef _KERNEL 361 362 extern caddr_t CADDR1; 363 extern pt_entry_t *CMAP1; 364 extern vm_paddr_t avail_end; 365 extern vm_paddr_t avail_start; 366 extern vm_offset_t clean_eva; 367 extern vm_offset_t clean_sva; 368 extern char *ptvmmap; /* poor name! */ 369 370 #ifndef __VM_PAGE_T_DEFINED__ 371 #define __VM_PAGE_T_DEFINED__ 372 typedef struct vm_page *vm_page_t; 373 #endif 374 #ifndef __VM_MEMATTR_T_DEFINED__ 375 #define __VM_MEMATTR_T_DEFINED__ 376 typedef char vm_memattr_t; 377 #endif 378 379 void pmap_release(struct pmap *pmap); 380 void pmap_interlock_wait (struct vmspace *); 381 void pmap_bootstrap (vm_paddr_t *); 382 void *pmap_mapbios(vm_paddr_t, vm_size_t); 383 void *pmap_mapdev (vm_paddr_t, vm_size_t); 384 void *pmap_mapdev_attr(vm_paddr_t, vm_size_t, int); 385 void *pmap_mapdev_uncacheable(vm_paddr_t, vm_size_t); 386 void pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma); 387 void pmap_unmapdev (vm_offset_t, vm_size_t); 388 struct vm_page *pmap_use_pt (pmap_t, vm_offset_t); 389 void pmap_set_opt (void); 390 void pmap_init_pat(void); 391 void pmap_invalidate_cache_pages(vm_page_t *pages, int count); 392 void pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva); 393 394 static __inline int 395 pmap_emulate_ad_bits(pmap_t pmap) { 396 return pmap->pm_flags & PMAP_EMULATE_AD_BITS; 397 } 398 399 /* Return various clipped indexes for a given VA */ 400 401 /* 402 * Returns the index of a PTE in a PT, representing a terminal 403 * page. 404 */ 405 static __inline vm_pindex_t 406 pmap_pte_index(vm_offset_t va) 407 { 408 return ((va >> PAGE_SHIFT) & ((1ul << NPTEPGSHIFT) - 1)); 409 } 410 411 /* 412 * Returns the index of a PT in a PD 413 */ 414 static __inline vm_pindex_t 415 pmap_pde_index(vm_offset_t va) 416 { 417 return ((va >> PDRSHIFT) & ((1ul << NPDEPGSHIFT) - 1)); 418 } 419 420 /* 421 * Returns the index of a PD in a PDP 422 */ 423 static __inline vm_pindex_t 424 pmap_pdpe_index(vm_offset_t va) 425 { 426 return ((va >> PDPSHIFT) & ((1ul << NPDPEPGSHIFT) - 1)); 427 } 428 429 /* 430 * Returns the index of a PDP in the PML4 431 */ 432 static __inline vm_pindex_t 433 pmap_pml4e_index(vm_offset_t va) 434 { 435 return ((va >> PML4SHIFT) & ((1ul << NPML4EPGSHIFT) - 1)); 436 } 437 438 #endif /* _KERNEL */ 439 440 #endif /* !LOCORE */ 441 442 #endif /* !_MACHINE_PMAP_H_ */ 443