1 /*- 2 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 3 * Copyright (c) 1992 Terrence R. Lambert. 4 * Copyright (c) 2003 Peter Wemm. 5 * Copyright (c) 2008 The DragonFly Project. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 40 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $ 41 */ 42 43 //#include "use_npx.h" 44 #include "use_isa.h" 45 #include "opt_compat.h" 46 #include "opt_cpu.h" 47 #include "opt_ddb.h" 48 #include "opt_directio.h" 49 #include "opt_inet.h" 50 #include "opt_msgbuf.h" 51 #include "opt_swap.h" 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/sysproto.h> 56 #include <sys/signalvar.h> 57 #include <sys/kernel.h> 58 #include <sys/linker.h> 59 #include <sys/malloc.h> 60 #include <sys/proc.h> 61 #include <sys/priv.h> 62 #include <sys/buf.h> 63 #include <sys/reboot.h> 64 #include <sys/mbuf.h> 65 #include <sys/msgbuf.h> 66 #include <sys/sysent.h> 67 #include <sys/sysctl.h> 68 #include <sys/vmmeter.h> 69 #include <sys/bus.h> 70 #include <sys/usched.h> 71 #include <sys/reg.h> 72 #include <sys/sbuf.h> 73 #include <sys/ctype.h> 74 #include <sys/serialize.h> 75 #include <sys/systimer.h> 76 77 #include <vm/vm.h> 78 #include <vm/vm_param.h> 79 #include <sys/lock.h> 80 #include <vm/vm_kern.h> 81 #include <vm/vm_object.h> 82 #include <vm/vm_page.h> 83 #include <vm/vm_map.h> 84 #include <vm/vm_pager.h> 85 #include <vm/vm_extern.h> 86 87 #include <sys/thread2.h> 88 #include <sys/mplock2.h> 89 #include <sys/mutex2.h> 90 91 #include <sys/user.h> 92 #include <sys/exec.h> 93 #include <sys/cons.h> 94 95 #include <sys/efi.h> 96 97 #include <ddb/ddb.h> 98 99 #include <machine/cpu.h> 100 #include <machine/clock.h> 101 #include <machine/specialreg.h> 102 #if 0 /* JG */ 103 #include <machine/bootinfo.h> 104 #endif 105 #include <machine/md_var.h> 106 #include <machine/metadata.h> 107 #include <machine/pc/bios.h> 108 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */ 109 #include <machine/globaldata.h> /* CPU_prvspace */ 110 #include <machine/smp.h> 111 #ifdef PERFMON 112 #include <machine/perfmon.h> 113 #endif 114 #include <machine/cputypes.h> 115 #include <machine/intr_machdep.h> 116 #include <machine/framebuffer.h> 117 118 #ifdef OLD_BUS_ARCH 119 #include <bus/isa/isa_device.h> 120 #endif 121 #include <machine_base/isa/isa_intr.h> 122 #include <bus/isa/rtc.h> 123 #include <sys/random.h> 124 #include <sys/ptrace.h> 125 #include <machine/sigframe.h> 126 127 #include <sys/machintr.h> 128 #include <machine_base/icu/icu_abi.h> 129 #include <machine_base/icu/elcr_var.h> 130 #include <machine_base/apic/lapic.h> 131 #include <machine_base/apic/ioapic.h> 132 #include <machine_base/apic/ioapic_abi.h> 133 #include <machine/mptable.h> 134 135 #define PHYSMAP_ENTRIES 10 136 137 extern u_int64_t hammer_time(u_int64_t, u_int64_t); 138 139 extern void printcpuinfo(void); /* XXX header file */ 140 extern void identify_cpu(void); 141 #if 0 /* JG */ 142 extern void finishidentcpu(void); 143 #endif 144 extern void panicifcpuunsupported(void); 145 146 static void cpu_startup(void *); 147 static void pic_finish(void *); 148 static void cpu_finish(void *); 149 150 static void set_fpregs_xmm(struct save87 *, struct savexmm *); 151 static void fill_fpregs_xmm(struct savexmm *, struct save87 *); 152 #ifdef DIRECTIO 153 extern void ffs_rawread_setup(void); 154 #endif /* DIRECTIO */ 155 static void init_locks(void); 156 157 extern void pcpu_timer_always(struct intrframe *); 158 159 SYSINIT(cpu, SI_BOOT2_START_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 160 SYSINIT(pic_finish, SI_BOOT2_FINISH_PIC, SI_ORDER_FIRST, pic_finish, NULL); 161 SYSINIT(cpu_finish, SI_BOOT2_FINISH_CPU, SI_ORDER_FIRST, cpu_finish, NULL); 162 163 #ifdef DDB 164 extern vm_offset_t ksym_start, ksym_end; 165 #endif 166 167 struct privatespace CPU_prvspace_bsp __aligned(4096); 168 struct privatespace *CPU_prvspace[MAXCPU] = { &CPU_prvspace_bsp }; 169 170 int _udatasel, _ucodesel, _ucode32sel; 171 u_long atdevbase; 172 int64_t tsc_offsets[MAXCPU]; 173 174 static int cpu_mwait_halt_global; /* MWAIT hint (EAX) or CPU_MWAIT_HINT_ */ 175 176 #if defined(SWTCH_OPTIM_STATS) 177 extern int swtch_optim_stats; 178 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats, 179 CTLFLAG_RD, &swtch_optim_stats, 0, ""); 180 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count, 181 CTLFLAG_RD, &tlb_flush_count, 0, ""); 182 #endif 183 SYSCTL_INT(_hw, OID_AUTO, cpu_mwait_halt, 184 CTLFLAG_RD, &cpu_mwait_halt_global, 0, ""); 185 SYSCTL_INT(_hw, OID_AUTO, cpu_mwait_spin, CTLFLAG_RD, &cpu_mwait_spin, 0, 186 "monitor/mwait target state"); 187 188 #define CPU_MWAIT_HAS_CX \ 189 ((cpu_feature2 & CPUID2_MON) && \ 190 (cpu_mwait_feature & CPUID_MWAIT_EXT)) 191 192 #define CPU_MWAIT_CX_NAMELEN 16 193 194 #define CPU_MWAIT_C1 1 195 #define CPU_MWAIT_C2 2 196 #define CPU_MWAIT_C3 3 197 #define CPU_MWAIT_CX_MAX 8 198 199 #define CPU_MWAIT_HINT_AUTO -1 /* C1 and C2 */ 200 #define CPU_MWAIT_HINT_AUTODEEP -2 /* C3+ */ 201 202 SYSCTL_NODE(_machdep, OID_AUTO, mwait, CTLFLAG_RW, 0, "MWAIT features"); 203 SYSCTL_NODE(_machdep_mwait, OID_AUTO, CX, CTLFLAG_RW, 0, "MWAIT Cx settings"); 204 205 struct cpu_mwait_cx { 206 int subcnt; 207 char name[4]; 208 struct sysctl_ctx_list sysctl_ctx; 209 struct sysctl_oid *sysctl_tree; 210 }; 211 static struct cpu_mwait_cx cpu_mwait_cx_info[CPU_MWAIT_CX_MAX]; 212 static char cpu_mwait_cx_supported[256]; 213 214 static int cpu_mwait_c1_hints_cnt; 215 static int cpu_mwait_hints_cnt; 216 static int *cpu_mwait_hints; 217 218 static int cpu_mwait_deep_hints_cnt; 219 static int *cpu_mwait_deep_hints; 220 221 #define CPU_IDLE_REPEAT_DEFAULT 750 222 223 static u_int cpu_idle_repeat = CPU_IDLE_REPEAT_DEFAULT; 224 static u_long cpu_idle_repeat_max = CPU_IDLE_REPEAT_DEFAULT; 225 static u_int cpu_mwait_repeat_shift = 1; 226 227 #define CPU_MWAIT_C3_PREAMBLE_BM_ARB 0x1 228 #define CPU_MWAIT_C3_PREAMBLE_BM_STS 0x2 229 230 static int cpu_mwait_c3_preamble = 231 CPU_MWAIT_C3_PREAMBLE_BM_ARB | 232 CPU_MWAIT_C3_PREAMBLE_BM_STS; 233 234 SYSCTL_STRING(_machdep_mwait_CX, OID_AUTO, supported, CTLFLAG_RD, 235 cpu_mwait_cx_supported, 0, "MWAIT supported C states"); 236 SYSCTL_INT(_machdep_mwait_CX, OID_AUTO, c3_preamble, CTLFLAG_RD, 237 &cpu_mwait_c3_preamble, 0, "C3+ preamble mask"); 238 239 static int cpu_mwait_cx_select_sysctl(SYSCTL_HANDLER_ARGS, 240 int *, boolean_t); 241 static int cpu_mwait_cx_idle_sysctl(SYSCTL_HANDLER_ARGS); 242 static int cpu_mwait_cx_pcpu_idle_sysctl(SYSCTL_HANDLER_ARGS); 243 static int cpu_mwait_cx_spin_sysctl(SYSCTL_HANDLER_ARGS); 244 245 SYSCTL_PROC(_machdep_mwait_CX, OID_AUTO, idle, CTLTYPE_STRING|CTLFLAG_RW, 246 NULL, 0, cpu_mwait_cx_idle_sysctl, "A", ""); 247 SYSCTL_PROC(_machdep_mwait_CX, OID_AUTO, spin, CTLTYPE_STRING|CTLFLAG_RW, 248 NULL, 0, cpu_mwait_cx_spin_sysctl, "A", ""); 249 SYSCTL_UINT(_machdep_mwait_CX, OID_AUTO, repeat_shift, CTLFLAG_RW, 250 &cpu_mwait_repeat_shift, 0, ""); 251 252 long physmem = 0; 253 254 u_long ebda_addr = 0; 255 256 int imcr_present = 0; 257 258 int naps = 0; /* # of Applications processors */ 259 260 u_int base_memory; 261 struct mtx dt_lock; /* lock for GDT and LDT */ 262 263 static int 264 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS) 265 { 266 u_long pmem = ctob(physmem); 267 268 int error = sysctl_handle_long(oidp, &pmem, 0, req); 269 return (error); 270 } 271 272 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD, 273 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)"); 274 275 static int 276 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS) 277 { 278 int error = sysctl_handle_int(oidp, 0, 279 ctob(physmem - vmstats.v_wire_count), req); 280 return (error); 281 } 282 283 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD, 284 0, 0, sysctl_hw_usermem, "IU", ""); 285 286 static int 287 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS) 288 { 289 int error = sysctl_handle_int(oidp, 0, 290 x86_64_btop(avail_end - avail_start), req); 291 return (error); 292 } 293 294 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD, 295 0, 0, sysctl_hw_availpages, "I", ""); 296 297 vm_paddr_t Maxmem; 298 vm_paddr_t Realmem; 299 300 /* 301 * The number of PHYSMAP entries must be one less than the number of 302 * PHYSSEG entries because the PHYSMAP entry that spans the largest 303 * physical address that is accessible by ISA DMA is split into two 304 * PHYSSEG entries. 305 */ 306 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1)) 307 308 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 309 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 310 311 /* must be 2 less so 0 0 can signal end of chunks */ 312 #define PHYS_AVAIL_ARRAY_END (NELEM(phys_avail) - 2) 313 #define DUMP_AVAIL_ARRAY_END (NELEM(dump_avail) - 2) 314 315 static vm_offset_t buffer_sva, buffer_eva; 316 vm_offset_t clean_sva, clean_eva; 317 static vm_offset_t pager_sva, pager_eva; 318 static struct trapframe proc0_tf; 319 320 static void 321 cpu_startup(void *dummy) 322 { 323 caddr_t v; 324 vm_size_t size = 0; 325 vm_offset_t firstaddr; 326 327 /* 328 * Good {morning,afternoon,evening,night}. 329 */ 330 kprintf("%s", version); 331 startrtclock(); 332 printcpuinfo(); 333 panicifcpuunsupported(); 334 #ifdef PERFMON 335 perfmon_init(); 336 #endif 337 kprintf("real memory = %ju (%ju MB)\n", 338 (intmax_t)Realmem, 339 (intmax_t)Realmem / 1024 / 1024); 340 /* 341 * Display any holes after the first chunk of extended memory. 342 */ 343 if (bootverbose) { 344 int indx; 345 346 kprintf("Physical memory chunk(s):\n"); 347 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 348 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx]; 349 350 kprintf("0x%08jx - 0x%08jx, %ju bytes (%ju pages)\n", 351 (intmax_t)phys_avail[indx], 352 (intmax_t)phys_avail[indx + 1] - 1, 353 (intmax_t)size1, 354 (intmax_t)(size1 / PAGE_SIZE)); 355 } 356 } 357 358 /* 359 * Allocate space for system data structures. 360 * The first available kernel virtual address is in "v". 361 * As pages of kernel virtual memory are allocated, "v" is incremented. 362 * As pages of memory are allocated and cleared, 363 * "firstaddr" is incremented. 364 * An index into the kernel page table corresponding to the 365 * virtual memory address maintained in "v" is kept in "mapaddr". 366 */ 367 368 /* 369 * Make two passes. The first pass calculates how much memory is 370 * needed and allocates it. The second pass assigns virtual 371 * addresses to the various data structures. 372 */ 373 firstaddr = 0; 374 again: 375 v = (caddr_t)firstaddr; 376 377 #define valloc(name, type, num) \ 378 (name) = (type *)v; v = (caddr_t)((name)+(num)) 379 #define valloclim(name, type, num, lim) \ 380 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num))) 381 382 /* 383 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE. 384 * For the first 64MB of ram nominally allocate sufficient buffers to 385 * cover 1/4 of our ram. Beyond the first 64MB allocate additional 386 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing 387 * the buffer cache we limit the eventual kva reservation to 388 * maxbcache bytes. 389 * 390 * factor represents the 1/4 x ram conversion. 391 */ 392 if (nbuf == 0) { 393 long factor = 4 * BKVASIZE / 1024; 394 long kbytes = physmem * (PAGE_SIZE / 1024); 395 396 nbuf = 50; 397 if (kbytes > 4096) 398 nbuf += min((kbytes - 4096) / factor, 65536 / factor); 399 if (kbytes > 65536) 400 nbuf += (kbytes - 65536) * 2 / (factor * 5); 401 if (maxbcache && nbuf > maxbcache / BKVASIZE) 402 nbuf = maxbcache / BKVASIZE; 403 } 404 405 /* 406 * Do not allow the buffer_map to be more then 1/2 the size of the 407 * kernel_map. 408 */ 409 if (nbuf > (virtual_end - virtual_start + 410 virtual2_end - virtual2_start) / (BKVASIZE * 2)) { 411 nbuf = (virtual_end - virtual_start + 412 virtual2_end - virtual2_start) / (BKVASIZE * 2); 413 kprintf("Warning: nbufs capped at %ld due to kvm\n", nbuf); 414 } 415 416 /* 417 * Do not allow the buffer_map to use more than 50% of available 418 * physical-equivalent memory. Since the VM pages which back 419 * individual buffers are typically wired, having too many bufs 420 * can prevent the system from paging properly. 421 */ 422 if (nbuf > physmem * PAGE_SIZE / (BKVASIZE * 2)) { 423 nbuf = physmem * PAGE_SIZE / (BKVASIZE * 2); 424 kprintf("Warning: nbufs capped at %ld due to physmem\n", nbuf); 425 } 426 427 /* 428 * Do not allow the sizeof(struct buf) * nbuf to exceed half of 429 * the valloc space which is just the virtual_end - virtual_start 430 * section. We use valloc() to allocate the buf header array. 431 */ 432 if (nbuf > (virtual_end - virtual_start) / sizeof(struct buf) / 2) { 433 nbuf = (virtual_end - virtual_start) / 434 sizeof(struct buf) / 2; 435 kprintf("Warning: nbufs capped at %ld due to valloc " 436 "considerations", nbuf); 437 } 438 439 nswbuf = lmax(lmin(nbuf / 4, 256), 16); 440 #ifdef NSWBUF_MIN 441 if (nswbuf < NSWBUF_MIN) 442 nswbuf = NSWBUF_MIN; 443 #endif 444 #ifdef DIRECTIO 445 ffs_rawread_setup(); 446 #endif 447 448 valloc(swbuf, struct buf, nswbuf); 449 valloc(buf, struct buf, nbuf); 450 451 /* 452 * End of first pass, size has been calculated so allocate memory 453 */ 454 if (firstaddr == 0) { 455 size = (vm_size_t)(v - firstaddr); 456 firstaddr = kmem_alloc(&kernel_map, round_page(size)); 457 if (firstaddr == 0) 458 panic("startup: no room for tables"); 459 goto again; 460 } 461 462 /* 463 * End of second pass, addresses have been assigned 464 * 465 * nbuf is an int, make sure we don't overflow the field. 466 * 467 * On 64-bit systems we always reserve maximal allocations for 468 * buffer cache buffers and there are no fragmentation issues, 469 * so the KVA segment does not have to be excessively oversized. 470 */ 471 if ((vm_size_t)(v - firstaddr) != size) 472 panic("startup: table size inconsistency"); 473 474 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva, 475 ((vm_offset_t)(nbuf + 16) * BKVASIZE) + 476 (nswbuf * MAXPHYS) + pager_map_size); 477 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva, 478 ((vm_offset_t)(nbuf + 16) * BKVASIZE)); 479 buffer_map.system_map = 1; 480 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva, 481 ((vm_offset_t)nswbuf * MAXPHYS) + pager_map_size); 482 pager_map.system_map = 1; 483 kprintf("avail memory = %ju (%ju MB)\n", 484 (uintmax_t)ptoa(vmstats.v_free_count + vmstats.v_dma_pages), 485 (uintmax_t)ptoa(vmstats.v_free_count + vmstats.v_dma_pages) / 486 1024 / 1024); 487 } 488 489 struct cpu_idle_stat { 490 int hint; 491 int reserved; 492 u_long halt; 493 u_long spin; 494 u_long repeat; 495 u_long repeat_last; 496 u_long repeat_delta; 497 u_long mwait_cx[CPU_MWAIT_CX_MAX]; 498 } __cachealign; 499 500 #define CPU_IDLE_STAT_HALT -1 501 #define CPU_IDLE_STAT_SPIN -2 502 503 static struct cpu_idle_stat cpu_idle_stats[MAXCPU]; 504 505 static int 506 sysctl_cpu_idle_cnt(SYSCTL_HANDLER_ARGS) 507 { 508 int idx = arg2, cpu, error; 509 u_long val = 0; 510 511 if (idx == CPU_IDLE_STAT_HALT) { 512 for (cpu = 0; cpu < ncpus; ++cpu) 513 val += cpu_idle_stats[cpu].halt; 514 } else if (idx == CPU_IDLE_STAT_SPIN) { 515 for (cpu = 0; cpu < ncpus; ++cpu) 516 val += cpu_idle_stats[cpu].spin; 517 } else { 518 KASSERT(idx >= 0 && idx < CPU_MWAIT_CX_MAX, 519 ("invalid index %d", idx)); 520 for (cpu = 0; cpu < ncpus; ++cpu) 521 val += cpu_idle_stats[cpu].mwait_cx[idx]; 522 } 523 524 error = sysctl_handle_quad(oidp, &val, 0, req); 525 if (error || req->newptr == NULL) 526 return error; 527 528 if (idx == CPU_IDLE_STAT_HALT) { 529 for (cpu = 0; cpu < ncpus; ++cpu) 530 cpu_idle_stats[cpu].halt = 0; 531 cpu_idle_stats[0].halt = val; 532 } else if (idx == CPU_IDLE_STAT_SPIN) { 533 for (cpu = 0; cpu < ncpus; ++cpu) 534 cpu_idle_stats[cpu].spin = 0; 535 cpu_idle_stats[0].spin = val; 536 } else { 537 KASSERT(idx >= 0 && idx < CPU_MWAIT_CX_MAX, 538 ("invalid index %d", idx)); 539 for (cpu = 0; cpu < ncpus; ++cpu) 540 cpu_idle_stats[cpu].mwait_cx[idx] = 0; 541 cpu_idle_stats[0].mwait_cx[idx] = val; 542 } 543 return 0; 544 } 545 546 static void 547 cpu_mwait_attach(void) 548 { 549 struct sbuf sb; 550 int hint_idx, i; 551 552 if (!CPU_MWAIT_HAS_CX) 553 return; 554 555 if (cpu_vendor_id == CPU_VENDOR_INTEL && 556 (CPUID_TO_FAMILY(cpu_id) > 0xf || 557 (CPUID_TO_FAMILY(cpu_id) == 0x6 && 558 CPUID_TO_MODEL(cpu_id) >= 0xf))) { 559 int bm_sts = 1; 560 561 /* 562 * Pentium dual-core, Core 2 and beyond do not need any 563 * additional activities to enter deep C-state, i.e. C3(+). 564 */ 565 cpu_mwait_cx_no_bmarb(); 566 567 TUNABLE_INT_FETCH("machdep.cpu.mwait.bm_sts", &bm_sts); 568 if (!bm_sts) 569 cpu_mwait_cx_no_bmsts(); 570 } 571 572 sbuf_new(&sb, cpu_mwait_cx_supported, 573 sizeof(cpu_mwait_cx_supported), SBUF_FIXEDLEN); 574 575 for (i = 0; i < CPU_MWAIT_CX_MAX; ++i) { 576 struct cpu_mwait_cx *cx = &cpu_mwait_cx_info[i]; 577 int sub; 578 579 ksnprintf(cx->name, sizeof(cx->name), "C%d", i); 580 581 sysctl_ctx_init(&cx->sysctl_ctx); 582 cx->sysctl_tree = SYSCTL_ADD_NODE(&cx->sysctl_ctx, 583 SYSCTL_STATIC_CHILDREN(_machdep_mwait), OID_AUTO, 584 cx->name, CTLFLAG_RW, NULL, "Cx control/info"); 585 if (cx->sysctl_tree == NULL) 586 continue; 587 588 cx->subcnt = CPUID_MWAIT_CX_SUBCNT(cpu_mwait_extemu, i); 589 SYSCTL_ADD_INT(&cx->sysctl_ctx, 590 SYSCTL_CHILDREN(cx->sysctl_tree), OID_AUTO, 591 "subcnt", CTLFLAG_RD, &cx->subcnt, 0, 592 "sub-state count"); 593 SYSCTL_ADD_PROC(&cx->sysctl_ctx, 594 SYSCTL_CHILDREN(cx->sysctl_tree), OID_AUTO, 595 "entered", (CTLTYPE_QUAD | CTLFLAG_RW), 0, 596 i, sysctl_cpu_idle_cnt, "Q", "# of times entered"); 597 598 for (sub = 0; sub < cx->subcnt; ++sub) 599 sbuf_printf(&sb, "C%d/%d ", i, sub); 600 } 601 sbuf_trim(&sb); 602 sbuf_finish(&sb); 603 604 /* 605 * Non-deep C-states 606 */ 607 cpu_mwait_c1_hints_cnt = cpu_mwait_cx_info[CPU_MWAIT_C1].subcnt; 608 for (i = CPU_MWAIT_C1; i < CPU_MWAIT_C3; ++i) 609 cpu_mwait_hints_cnt += cpu_mwait_cx_info[i].subcnt; 610 cpu_mwait_hints = kmalloc(sizeof(int) * cpu_mwait_hints_cnt, 611 M_DEVBUF, M_WAITOK); 612 613 hint_idx = 0; 614 for (i = CPU_MWAIT_C1; i < CPU_MWAIT_C3; ++i) { 615 int j, subcnt; 616 617 subcnt = cpu_mwait_cx_info[i].subcnt; 618 for (j = 0; j < subcnt; ++j) { 619 KASSERT(hint_idx < cpu_mwait_hints_cnt, 620 ("invalid mwait hint index %d", hint_idx)); 621 cpu_mwait_hints[hint_idx] = MWAIT_EAX_HINT(i, j); 622 ++hint_idx; 623 } 624 } 625 KASSERT(hint_idx == cpu_mwait_hints_cnt, 626 ("mwait hint count %d != index %d", 627 cpu_mwait_hints_cnt, hint_idx)); 628 629 if (bootverbose) { 630 kprintf("MWAIT hints (%d C1 hints):\n", cpu_mwait_c1_hints_cnt); 631 for (i = 0; i < cpu_mwait_hints_cnt; ++i) { 632 int hint = cpu_mwait_hints[i]; 633 634 kprintf(" C%d/%d hint 0x%04x\n", 635 MWAIT_EAX_TO_CX(hint), MWAIT_EAX_TO_CX_SUB(hint), 636 hint); 637 } 638 } 639 640 /* 641 * Deep C-states 642 */ 643 for (i = CPU_MWAIT_C1; i < CPU_MWAIT_CX_MAX; ++i) 644 cpu_mwait_deep_hints_cnt += cpu_mwait_cx_info[i].subcnt; 645 cpu_mwait_deep_hints = kmalloc(sizeof(int) * cpu_mwait_deep_hints_cnt, 646 M_DEVBUF, M_WAITOK); 647 648 hint_idx = 0; 649 for (i = CPU_MWAIT_C1; i < CPU_MWAIT_CX_MAX; ++i) { 650 int j, subcnt; 651 652 subcnt = cpu_mwait_cx_info[i].subcnt; 653 for (j = 0; j < subcnt; ++j) { 654 KASSERT(hint_idx < cpu_mwait_deep_hints_cnt, 655 ("invalid mwait deep hint index %d", hint_idx)); 656 cpu_mwait_deep_hints[hint_idx] = MWAIT_EAX_HINT(i, j); 657 ++hint_idx; 658 } 659 } 660 KASSERT(hint_idx == cpu_mwait_deep_hints_cnt, 661 ("mwait deep hint count %d != index %d", 662 cpu_mwait_deep_hints_cnt, hint_idx)); 663 664 if (bootverbose) { 665 kprintf("MWAIT deep hints:\n"); 666 for (i = 0; i < cpu_mwait_deep_hints_cnt; ++i) { 667 int hint = cpu_mwait_deep_hints[i]; 668 669 kprintf(" C%d/%d hint 0x%04x\n", 670 MWAIT_EAX_TO_CX(hint), MWAIT_EAX_TO_CX_SUB(hint), 671 hint); 672 } 673 } 674 cpu_idle_repeat_max = 256 * cpu_mwait_deep_hints_cnt; 675 676 for (i = 0; i < ncpus; ++i) { 677 char name[16]; 678 679 ksnprintf(name, sizeof(name), "idle%d", i); 680 SYSCTL_ADD_PROC(NULL, 681 SYSCTL_STATIC_CHILDREN(_machdep_mwait_CX), OID_AUTO, 682 name, (CTLTYPE_STRING | CTLFLAG_RW), &cpu_idle_stats[i], 683 0, cpu_mwait_cx_pcpu_idle_sysctl, "A", ""); 684 } 685 } 686 687 static void 688 cpu_finish(void *dummy __unused) 689 { 690 cpu_setregs(); 691 cpu_mwait_attach(); 692 } 693 694 static void 695 pic_finish(void *dummy __unused) 696 { 697 /* Log ELCR information */ 698 elcr_dump(); 699 700 /* Log MPTABLE information */ 701 mptable_pci_int_dump(); 702 703 /* Finalize PCI */ 704 MachIntrABI.finalize(); 705 } 706 707 /* 708 * Send an interrupt to process. 709 * 710 * Stack is set up to allow sigcode stored 711 * at top to call routine, followed by kcall 712 * to sigreturn routine below. After sigreturn 713 * resets the signal mask, the stack, and the 714 * frame pointer, it returns to the user 715 * specified pc, psl. 716 */ 717 void 718 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code) 719 { 720 struct lwp *lp = curthread->td_lwp; 721 struct proc *p = lp->lwp_proc; 722 struct trapframe *regs; 723 struct sigacts *psp = p->p_sigacts; 724 struct sigframe sf, *sfp; 725 int oonstack; 726 char *sp; 727 728 regs = lp->lwp_md.md_regs; 729 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0; 730 731 /* Save user context */ 732 bzero(&sf, sizeof(struct sigframe)); 733 sf.sf_uc.uc_sigmask = *mask; 734 sf.sf_uc.uc_stack = lp->lwp_sigstk; 735 sf.sf_uc.uc_mcontext.mc_onstack = oonstack; 736 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0); 737 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe)); 738 739 /* Make the size of the saved context visible to userland */ 740 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); 741 742 /* Allocate and validate space for the signal handler context. */ 743 if ((lp->lwp_flags & LWP_ALTSTACK) != 0 && !oonstack && 744 SIGISMEMBER(psp->ps_sigonstack, sig)) { 745 sp = (char *)(lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size - 746 sizeof(struct sigframe)); 747 lp->lwp_sigstk.ss_flags |= SS_ONSTACK; 748 } else { 749 /* We take red zone into account */ 750 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128; 751 } 752 753 /* 754 * XXX AVX needs 64-byte alignment but sigframe has other fields and 755 * the embedded ucontext is not at the front, so aligning this won't 756 * help us. Fortunately we bcopy in/out of the sigframe, so the 757 * kernel is ok. 758 * 759 * The problem though is if userland winds up trying to use the 760 * context directly. 761 */ 762 sfp = (struct sigframe *)((intptr_t)sp & ~(intptr_t)0xF); 763 764 /* Translate the signal is appropriate */ 765 if (p->p_sysent->sv_sigtbl) { 766 if (sig <= p->p_sysent->sv_sigsize) 767 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 768 } 769 770 /* 771 * Build the argument list for the signal handler. 772 * 773 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx) 774 */ 775 regs->tf_rdi = sig; /* argument 1 */ 776 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */ 777 778 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 779 /* 780 * Signal handler installed with SA_SIGINFO. 781 * 782 * action(signo, siginfo, ucontext) 783 */ 784 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */ 785 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */ 786 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 787 788 /* fill siginfo structure */ 789 sf.sf_si.si_signo = sig; 790 sf.sf_si.si_code = code; 791 sf.sf_si.si_addr = (void *)regs->tf_addr; 792 } else { 793 /* 794 * Old FreeBSD-style arguments. 795 * 796 * handler (signo, code, [uc], addr) 797 */ 798 regs->tf_rsi = (register_t)code; /* argument 2 */ 799 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */ 800 sf.sf_ahu.sf_handler = catcher; 801 } 802 803 /* 804 * If we're a vm86 process, we want to save the segment registers. 805 * We also change eflags to be our emulated eflags, not the actual 806 * eflags. 807 */ 808 #if 0 /* JG */ 809 if (regs->tf_eflags & PSL_VM) { 810 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 811 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86; 812 813 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 814 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 815 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 816 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 817 818 if (vm86->vm86_has_vme == 0) 819 sf.sf_uc.uc_mcontext.mc_eflags = 820 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 821 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 822 823 /* 824 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 825 * syscalls made by the signal handler. This just avoids 826 * wasting time for our lazy fixup of such faults. PSL_NT 827 * does nothing in vm86 mode, but vm86 programs can set it 828 * almost legitimately in probes for old cpu types. 829 */ 830 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 831 } 832 #endif 833 834 /* 835 * Save the FPU state and reinit the FP unit 836 */ 837 npxpush(&sf.sf_uc.uc_mcontext); 838 839 /* 840 * Copy the sigframe out to the user's stack. 841 */ 842 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) { 843 /* 844 * Something is wrong with the stack pointer. 845 * ...Kill the process. 846 */ 847 sigexit(lp, SIGILL); 848 } 849 850 regs->tf_rsp = (register_t)sfp; 851 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 852 853 /* 854 * i386 abi specifies that the direction flag must be cleared 855 * on function entry 856 */ 857 regs->tf_rflags &= ~(PSL_T|PSL_D); 858 859 /* 860 * 64 bit mode has a code and stack selector but 861 * no data or extra selector. %fs and %gs are not 862 * stored in-context. 863 */ 864 regs->tf_cs = _ucodesel; 865 regs->tf_ss = _udatasel; 866 clear_quickret(); 867 } 868 869 /* 870 * Sanitize the trapframe for a virtual kernel passing control to a custom 871 * VM context. Remove any items that would otherwise create a privilage 872 * issue. 873 * 874 * XXX at the moment we allow userland to set the resume flag. Is this a 875 * bad idea? 876 */ 877 int 878 cpu_sanitize_frame(struct trapframe *frame) 879 { 880 frame->tf_cs = _ucodesel; 881 frame->tf_ss = _udatasel; 882 /* XXX VM (8086) mode not supported? */ 883 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP); 884 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I; 885 886 return(0); 887 } 888 889 /* 890 * Sanitize the tls so loading the descriptor does not blow up 891 * on us. For x86_64 we don't have to do anything. 892 */ 893 int 894 cpu_sanitize_tls(struct savetls *tls) 895 { 896 return(0); 897 } 898 899 /* 900 * sigreturn(ucontext_t *sigcntxp) 901 * 902 * System call to cleanup state after a signal 903 * has been taken. Reset signal mask and 904 * stack state from context left by sendsig (above). 905 * Return to previous pc and psl as specified by 906 * context left by sendsig. Check carefully to 907 * make sure that the user has not modified the 908 * state to gain improper privileges. 909 * 910 * MPSAFE 911 */ 912 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 913 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 914 915 int 916 sys_sigreturn(struct sigreturn_args *uap) 917 { 918 struct lwp *lp = curthread->td_lwp; 919 struct trapframe *regs; 920 ucontext_t uc; 921 ucontext_t *ucp; 922 register_t rflags; 923 int cs; 924 int error; 925 926 /* 927 * We have to copy the information into kernel space so userland 928 * can't modify it while we are sniffing it. 929 */ 930 regs = lp->lwp_md.md_regs; 931 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 932 if (error) 933 return (error); 934 ucp = &uc; 935 rflags = ucp->uc_mcontext.mc_rflags; 936 937 /* VM (8086) mode not supported */ 938 rflags &= ~PSL_VM_UNSUPP; 939 940 #if 0 /* JG */ 941 if (eflags & PSL_VM) { 942 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 943 struct vm86_kernel *vm86; 944 945 /* 946 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 947 * set up the vm86 area, and we can't enter vm86 mode. 948 */ 949 if (lp->lwp_thread->td_pcb->pcb_ext == 0) 950 return (EINVAL); 951 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86; 952 if (vm86->vm86_inited == 0) 953 return (EINVAL); 954 955 /* go back to user mode if both flags are set */ 956 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 957 trapsignal(lp, SIGBUS, 0); 958 959 if (vm86->vm86_has_vme) { 960 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 961 (eflags & VME_USERCHANGE) | PSL_VM; 962 } else { 963 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 964 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 965 (eflags & VM_USERCHANGE) | PSL_VM; 966 } 967 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe)); 968 tf->tf_eflags = eflags; 969 tf->tf_vm86_ds = tf->tf_ds; 970 tf->tf_vm86_es = tf->tf_es; 971 tf->tf_vm86_fs = tf->tf_fs; 972 tf->tf_vm86_gs = tf->tf_gs; 973 tf->tf_ds = _udatasel; 974 tf->tf_es = _udatasel; 975 tf->tf_fs = _udatasel; 976 tf->tf_gs = _udatasel; 977 } else 978 #endif 979 { 980 /* 981 * Don't allow users to change privileged or reserved flags. 982 */ 983 /* 984 * XXX do allow users to change the privileged flag PSL_RF. 985 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 986 * should sometimes set it there too. tf_eflags is kept in 987 * the signal context during signal handling and there is no 988 * other place to remember it, so the PSL_RF bit may be 989 * corrupted by the signal handler without us knowing. 990 * Corruption of the PSL_RF bit at worst causes one more or 991 * one less debugger trap, so allowing it is fairly harmless. 992 */ 993 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { 994 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags); 995 return(EINVAL); 996 } 997 998 /* 999 * Don't allow users to load a valid privileged %cs. Let the 1000 * hardware check for invalid selectors, excess privilege in 1001 * other selectors, invalid %eip's and invalid %esp's. 1002 */ 1003 cs = ucp->uc_mcontext.mc_cs; 1004 if (!CS_SECURE(cs)) { 1005 kprintf("sigreturn: cs = 0x%x\n", cs); 1006 trapsignal(lp, SIGBUS, T_PROTFLT); 1007 return(EINVAL); 1008 } 1009 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe)); 1010 } 1011 1012 /* 1013 * Restore the FPU state from the frame 1014 */ 1015 crit_enter(); 1016 npxpop(&ucp->uc_mcontext); 1017 1018 if (ucp->uc_mcontext.mc_onstack & 1) 1019 lp->lwp_sigstk.ss_flags |= SS_ONSTACK; 1020 else 1021 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK; 1022 1023 lp->lwp_sigmask = ucp->uc_sigmask; 1024 SIG_CANTMASK(lp->lwp_sigmask); 1025 clear_quickret(); 1026 crit_exit(); 1027 return(EJUSTRETURN); 1028 } 1029 1030 /* 1031 * Machine dependent boot() routine 1032 * 1033 * I haven't seen anything to put here yet 1034 * Possibly some stuff might be grafted back here from boot() 1035 */ 1036 void 1037 cpu_boot(int howto) 1038 { 1039 } 1040 1041 /* 1042 * Shutdown the CPU as much as possible 1043 */ 1044 void 1045 cpu_halt(void) 1046 { 1047 for (;;) 1048 __asm__ __volatile("hlt"); 1049 } 1050 1051 /* 1052 * cpu_idle() represents the idle LWKT. You cannot return from this function 1053 * (unless you want to blow things up!). Instead we look for runnable threads 1054 * and loop or halt as appropriate. Giant is not held on entry to the thread. 1055 * 1056 * The main loop is entered with a critical section held, we must release 1057 * the critical section before doing anything else. lwkt_switch() will 1058 * check for pending interrupts due to entering and exiting its own 1059 * critical section. 1060 * 1061 * NOTE: On an SMP system we rely on a scheduler IPI to wake a HLTed cpu up. 1062 * However, there are cases where the idlethread will be entered with 1063 * the possibility that no IPI will occur and in such cases 1064 * lwkt_switch() sets TDF_IDLE_NOHLT. 1065 * 1066 * NOTE: cpu_idle_repeat determines how many entries into the idle thread 1067 * must occur before it starts using ACPI halt. 1068 * 1069 * NOTE: Value overridden in hammer_time(). 1070 */ 1071 static int cpu_idle_hlt = 2; 1072 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 1073 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 1074 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_repeat, CTLFLAG_RW, 1075 &cpu_idle_repeat, 0, "Idle entries before acpi hlt"); 1076 1077 SYSCTL_PROC(_machdep, OID_AUTO, cpu_idle_hltcnt, (CTLTYPE_QUAD | CTLFLAG_RW), 1078 0, CPU_IDLE_STAT_HALT, sysctl_cpu_idle_cnt, "Q", "Idle loop entry halts"); 1079 SYSCTL_PROC(_machdep, OID_AUTO, cpu_idle_spincnt, (CTLTYPE_QUAD | CTLFLAG_RW), 1080 0, CPU_IDLE_STAT_SPIN, sysctl_cpu_idle_cnt, "Q", "Idle loop entry spins"); 1081 1082 static void 1083 cpu_idle_default_hook(void) 1084 { 1085 /* 1086 * We must guarentee that hlt is exactly the instruction 1087 * following the sti. 1088 */ 1089 __asm __volatile("sti; hlt"); 1090 } 1091 1092 /* Other subsystems (e.g., ACPI) can hook this later. */ 1093 void (*cpu_idle_hook)(void) = cpu_idle_default_hook; 1094 1095 static __inline int 1096 cpu_mwait_cx_hint(struct cpu_idle_stat *stat) 1097 { 1098 int hint, cx_idx; 1099 u_int idx; 1100 1101 hint = stat->hint; 1102 if (hint >= 0) 1103 goto done; 1104 1105 idx = (stat->repeat + stat->repeat_last + stat->repeat_delta) >> 1106 cpu_mwait_repeat_shift; 1107 if (idx >= cpu_mwait_c1_hints_cnt) { 1108 /* Step up faster, once we walked through all C1 states */ 1109 stat->repeat_delta += 1 << (cpu_mwait_repeat_shift + 1); 1110 } 1111 if (hint == CPU_MWAIT_HINT_AUTODEEP) { 1112 if (idx >= cpu_mwait_deep_hints_cnt) 1113 idx = cpu_mwait_deep_hints_cnt - 1; 1114 hint = cpu_mwait_deep_hints[idx]; 1115 } else { 1116 if (idx >= cpu_mwait_hints_cnt) 1117 idx = cpu_mwait_hints_cnt - 1; 1118 hint = cpu_mwait_hints[idx]; 1119 } 1120 done: 1121 cx_idx = MWAIT_EAX_TO_CX(hint); 1122 if (cx_idx >= 0 && cx_idx < CPU_MWAIT_CX_MAX) 1123 stat->mwait_cx[cx_idx]++; 1124 return hint; 1125 } 1126 1127 void 1128 cpu_idle(void) 1129 { 1130 globaldata_t gd = mycpu; 1131 struct cpu_idle_stat *stat = &cpu_idle_stats[gd->gd_cpuid]; 1132 struct thread *td __debugvar = gd->gd_curthread; 1133 int reqflags; 1134 int quick; 1135 1136 stat->repeat = stat->repeat_last = cpu_idle_repeat_max; 1137 1138 crit_exit(); 1139 KKASSERT(td->td_critcount == 0); 1140 1141 for (;;) { 1142 /* 1143 * See if there are any LWKTs ready to go. 1144 */ 1145 lwkt_switch(); 1146 1147 /* 1148 * When halting inside a cli we must check for reqflags 1149 * races, particularly [re]schedule requests. Running 1150 * splz() does the job. 1151 * 1152 * cpu_idle_hlt: 1153 * 0 Never halt, just spin 1154 * 1155 * 1 Always use HLT (or MONITOR/MWAIT if avail). 1156 * 1157 * Better default for modern (Haswell+) Intel 1158 * cpus. 1159 * 1160 * 2 Use HLT/MONITOR/MWAIT up to a point and then 1161 * use the ACPI halt (default). This is a hybrid 1162 * approach. See machdep.cpu_idle_repeat. 1163 * 1164 * Better default for modern AMD cpus and older 1165 * Intel cpus. 1166 * 1167 * 3 Always use the ACPI halt. This typically 1168 * eats the least amount of power but the cpu 1169 * will be slow waking up. Slows down e.g. 1170 * compiles and other pipe/event oriented stuff. 1171 * 1172 * 4 Always use HLT. 1173 * 1174 * NOTE: Interrupts are enabled and we are not in a critical 1175 * section. 1176 * 1177 * NOTE: Preemptions do not reset gd_idle_repeat. Also we 1178 * don't bother capping gd_idle_repeat, it is ok if 1179 * it overflows. 1180 */ 1181 if (gd->gd_idle_repeat == 0) { 1182 stat->repeat = (stat->repeat + stat->repeat_last) >> 1; 1183 if (stat->repeat > cpu_idle_repeat_max) 1184 stat->repeat = cpu_idle_repeat_max; 1185 stat->repeat_last = 0; 1186 stat->repeat_delta = 0; 1187 } 1188 ++stat->repeat_last; 1189 1190 ++gd->gd_idle_repeat; 1191 reqflags = gd->gd_reqflags; 1192 quick = (cpu_idle_hlt == 1) || 1193 (cpu_idle_hlt < 3 && 1194 gd->gd_idle_repeat < cpu_idle_repeat); 1195 1196 if (quick && (cpu_mi_feature & CPU_MI_MONITOR) && 1197 (reqflags & RQF_IDLECHECK_WK_MASK) == 0) { 1198 splz(); /* XXX */ 1199 cpu_mmw_pause_int(&gd->gd_reqflags, reqflags, 1200 cpu_mwait_cx_hint(stat), 0); 1201 stat->halt++; 1202 } else if (cpu_idle_hlt) { 1203 __asm __volatile("cli"); 1204 splz(); 1205 if ((gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) { 1206 if (quick) 1207 cpu_idle_default_hook(); 1208 else 1209 cpu_idle_hook(); 1210 } 1211 __asm __volatile("sti"); 1212 stat->halt++; 1213 } else { 1214 splz(); 1215 __asm __volatile("sti"); 1216 stat->spin++; 1217 } 1218 } 1219 } 1220 1221 /* 1222 * This routine is called if a spinlock has been held through the 1223 * exponential backoff period and is seriously contested. On a real cpu 1224 * we let it spin. 1225 */ 1226 void 1227 cpu_spinlock_contested(void) 1228 { 1229 cpu_pause(); 1230 } 1231 1232 /* 1233 * Clear registers on exec 1234 */ 1235 void 1236 exec_setregs(u_long entry, u_long stack, u_long ps_strings) 1237 { 1238 struct thread *td = curthread; 1239 struct lwp *lp = td->td_lwp; 1240 struct pcb *pcb = td->td_pcb; 1241 struct trapframe *regs = lp->lwp_md.md_regs; 1242 1243 /* was i386_user_cleanup() in NetBSD */ 1244 user_ldt_free(pcb); 1245 1246 clear_quickret(); 1247 bzero((char *)regs, sizeof(struct trapframe)); 1248 regs->tf_rip = entry; 1249 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */ 1250 regs->tf_rdi = stack; /* argv */ 1251 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 1252 regs->tf_ss = _udatasel; 1253 regs->tf_cs = _ucodesel; 1254 regs->tf_rbx = ps_strings; 1255 1256 /* 1257 * Reset the hardware debug registers if they were in use. 1258 * They won't have any meaning for the newly exec'd process. 1259 */ 1260 if (pcb->pcb_flags & PCB_DBREGS) { 1261 pcb->pcb_dr0 = 0; 1262 pcb->pcb_dr1 = 0; 1263 pcb->pcb_dr2 = 0; 1264 pcb->pcb_dr3 = 0; 1265 pcb->pcb_dr6 = 0; 1266 pcb->pcb_dr7 = 0; /* JG set bit 10? */ 1267 if (pcb == td->td_pcb) { 1268 /* 1269 * Clear the debug registers on the running 1270 * CPU, otherwise they will end up affecting 1271 * the next process we switch to. 1272 */ 1273 reset_dbregs(); 1274 } 1275 pcb->pcb_flags &= ~PCB_DBREGS; 1276 } 1277 1278 /* 1279 * Initialize the math emulator (if any) for the current process. 1280 * Actually, just clear the bit that says that the emulator has 1281 * been initialized. Initialization is delayed until the process 1282 * traps to the emulator (if it is done at all) mainly because 1283 * emulators don't provide an entry point for initialization. 1284 */ 1285 pcb->pcb_flags &= ~FP_SOFTFP; 1286 1287 /* 1288 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing 1289 * gd_npxthread. Otherwise a preemptive interrupt thread 1290 * may panic in npxdna(). 1291 */ 1292 crit_enter(); 1293 load_cr0(rcr0() | CR0_MP); 1294 1295 /* 1296 * NOTE: The MSR values must be correct so we can return to 1297 * userland. gd_user_fs/gs must be correct so the switch 1298 * code knows what the current MSR values are. 1299 */ 1300 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */ 1301 pcb->pcb_gsbase = 0; 1302 mdcpu->gd_user_fs = 0; /* Cache of current MSR values */ 1303 mdcpu->gd_user_gs = 0; 1304 wrmsr(MSR_FSBASE, 0); /* Set MSR values for return to userland */ 1305 wrmsr(MSR_KGSBASE, 0); 1306 1307 /* Initialize the npx (if any) for the current process. */ 1308 npxinit(); 1309 crit_exit(); 1310 1311 pcb->pcb_ds = _udatasel; 1312 pcb->pcb_es = _udatasel; 1313 pcb->pcb_fs = _udatasel; 1314 pcb->pcb_gs = _udatasel; 1315 } 1316 1317 void 1318 cpu_setregs(void) 1319 { 1320 register_t cr0; 1321 1322 cr0 = rcr0(); 1323 cr0 |= CR0_NE; /* Done by npxinit() */ 1324 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ 1325 cr0 |= CR0_WP | CR0_AM; 1326 load_cr0(cr0); 1327 load_gs(_udatasel); 1328 } 1329 1330 static int 1331 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 1332 { 1333 int error; 1334 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 1335 req); 1336 if (!error && req->newptr) 1337 resettodr(); 1338 return (error); 1339 } 1340 1341 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 1342 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 1343 1344 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 1345 CTLFLAG_RW, &disable_rtc_set, 0, ""); 1346 1347 #if 0 /* JG */ 1348 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 1349 CTLFLAG_RD, &bootinfo, bootinfo, ""); 1350 #endif 1351 1352 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 1353 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 1354 1355 extern u_long bootdev; /* not a cdev_t - encoding is different */ 1356 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev, 1357 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)"); 1358 1359 /* 1360 * Initialize 386 and configure to run kernel 1361 */ 1362 1363 /* 1364 * Initialize segments & interrupt table 1365 */ 1366 1367 int _default_ldt; 1368 struct user_segment_descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */ 1369 struct gate_descriptor idt_arr[MAXCPU][NIDT]; 1370 #if 0 /* JG */ 1371 union descriptor ldt[NLDT]; /* local descriptor table */ 1372 #endif 1373 1374 /* table descriptors - used to load tables by cpu */ 1375 struct region_descriptor r_gdt; 1376 struct region_descriptor r_idt_arr[MAXCPU]; 1377 1378 /* JG proc0paddr is a virtual address */ 1379 void *proc0paddr; 1380 /* JG alignment? */ 1381 char proc0paddr_buff[LWKT_THREAD_STACK]; 1382 1383 1384 /* software prototypes -- in more palatable form */ 1385 struct soft_segment_descriptor gdt_segs[] = { 1386 /* GNULL_SEL 0 Null Descriptor */ 1387 { 0x0, /* segment base address */ 1388 0x0, /* length */ 1389 0, /* segment type */ 1390 0, /* segment descriptor priority level */ 1391 0, /* segment descriptor present */ 1392 0, /* long */ 1393 0, /* default 32 vs 16 bit size */ 1394 0 /* limit granularity (byte/page units)*/ }, 1395 /* GCODE_SEL 1 Code Descriptor for kernel */ 1396 { 0x0, /* segment base address */ 1397 0xfffff, /* length - all address space */ 1398 SDT_MEMERA, /* segment type */ 1399 SEL_KPL, /* segment descriptor priority level */ 1400 1, /* segment descriptor present */ 1401 1, /* long */ 1402 0, /* default 32 vs 16 bit size */ 1403 1 /* limit granularity (byte/page units)*/ }, 1404 /* GDATA_SEL 2 Data Descriptor for kernel */ 1405 { 0x0, /* segment base address */ 1406 0xfffff, /* length - all address space */ 1407 SDT_MEMRWA, /* segment type */ 1408 SEL_KPL, /* segment descriptor priority level */ 1409 1, /* segment descriptor present */ 1410 1, /* long */ 1411 0, /* default 32 vs 16 bit size */ 1412 1 /* limit granularity (byte/page units)*/ }, 1413 /* GUCODE32_SEL 3 32 bit Code Descriptor for user */ 1414 { 0x0, /* segment base address */ 1415 0xfffff, /* length - all address space */ 1416 SDT_MEMERA, /* segment type */ 1417 SEL_UPL, /* segment descriptor priority level */ 1418 1, /* segment descriptor present */ 1419 0, /* long */ 1420 1, /* default 32 vs 16 bit size */ 1421 1 /* limit granularity (byte/page units)*/ }, 1422 /* GUDATA_SEL 4 32/64 bit Data Descriptor for user */ 1423 { 0x0, /* segment base address */ 1424 0xfffff, /* length - all address space */ 1425 SDT_MEMRWA, /* segment type */ 1426 SEL_UPL, /* segment descriptor priority level */ 1427 1, /* segment descriptor present */ 1428 0, /* long */ 1429 1, /* default 32 vs 16 bit size */ 1430 1 /* limit granularity (byte/page units)*/ }, 1431 /* GUCODE_SEL 5 64 bit Code Descriptor for user */ 1432 { 0x0, /* segment base address */ 1433 0xfffff, /* length - all address space */ 1434 SDT_MEMERA, /* segment type */ 1435 SEL_UPL, /* segment descriptor priority level */ 1436 1, /* segment descriptor present */ 1437 1, /* long */ 1438 0, /* default 32 vs 16 bit size */ 1439 1 /* limit granularity (byte/page units)*/ }, 1440 /* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 1441 { 1442 0x0, /* segment base address */ 1443 sizeof(struct x86_64tss)-1,/* length - all address space */ 1444 SDT_SYSTSS, /* segment type */ 1445 SEL_KPL, /* segment descriptor priority level */ 1446 1, /* segment descriptor present */ 1447 0, /* long */ 1448 0, /* unused - default 32 vs 16 bit size */ 1449 0 /* limit granularity (byte/page units)*/ }, 1450 /* Actually, the TSS is a system descriptor which is double size */ 1451 { 0x0, /* segment base address */ 1452 0x0, /* length */ 1453 0, /* segment type */ 1454 0, /* segment descriptor priority level */ 1455 0, /* segment descriptor present */ 1456 0, /* long */ 1457 0, /* default 32 vs 16 bit size */ 1458 0 /* limit granularity (byte/page units)*/ }, 1459 /* GUGS32_SEL 8 32 bit GS Descriptor for user */ 1460 { 0x0, /* segment base address */ 1461 0xfffff, /* length - all address space */ 1462 SDT_MEMRWA, /* segment type */ 1463 SEL_UPL, /* segment descriptor priority level */ 1464 1, /* segment descriptor present */ 1465 0, /* long */ 1466 1, /* default 32 vs 16 bit size */ 1467 1 /* limit granularity (byte/page units)*/ }, 1468 }; 1469 1470 void 1471 setidt_global(int idx, inthand_t *func, int typ, int dpl, int ist) 1472 { 1473 int cpu; 1474 1475 for (cpu = 0; cpu < MAXCPU; ++cpu) { 1476 struct gate_descriptor *ip = &idt_arr[cpu][idx]; 1477 1478 ip->gd_looffset = (uintptr_t)func; 1479 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL); 1480 ip->gd_ist = ist; 1481 ip->gd_xx = 0; 1482 ip->gd_type = typ; 1483 ip->gd_dpl = dpl; 1484 ip->gd_p = 1; 1485 ip->gd_hioffset = ((uintptr_t)func)>>16 ; 1486 } 1487 } 1488 1489 void 1490 setidt(int idx, inthand_t *func, int typ, int dpl, int ist, int cpu) 1491 { 1492 struct gate_descriptor *ip; 1493 1494 KASSERT(cpu >= 0 && cpu < ncpus, ("invalid cpu %d", cpu)); 1495 1496 ip = &idt_arr[cpu][idx]; 1497 ip->gd_looffset = (uintptr_t)func; 1498 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL); 1499 ip->gd_ist = ist; 1500 ip->gd_xx = 0; 1501 ip->gd_type = typ; 1502 ip->gd_dpl = dpl; 1503 ip->gd_p = 1; 1504 ip->gd_hioffset = ((uintptr_t)func)>>16 ; 1505 } 1506 1507 #define IDTVEC(name) __CONCAT(X,name) 1508 1509 extern inthand_t 1510 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1511 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1512 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1513 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1514 IDTVEC(xmm), IDTVEC(dblfault), 1515 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 1516 1517 void 1518 sdtossd(struct user_segment_descriptor *sd, struct soft_segment_descriptor *ssd) 1519 { 1520 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1521 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1522 ssd->ssd_type = sd->sd_type; 1523 ssd->ssd_dpl = sd->sd_dpl; 1524 ssd->ssd_p = sd->sd_p; 1525 ssd->ssd_def32 = sd->sd_def32; 1526 ssd->ssd_gran = sd->sd_gran; 1527 } 1528 1529 void 1530 ssdtosd(struct soft_segment_descriptor *ssd, struct user_segment_descriptor *sd) 1531 { 1532 1533 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 1534 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff; 1535 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 1536 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 1537 sd->sd_type = ssd->ssd_type; 1538 sd->sd_dpl = ssd->ssd_dpl; 1539 sd->sd_p = ssd->ssd_p; 1540 sd->sd_long = ssd->ssd_long; 1541 sd->sd_def32 = ssd->ssd_def32; 1542 sd->sd_gran = ssd->ssd_gran; 1543 } 1544 1545 void 1546 ssdtosyssd(struct soft_segment_descriptor *ssd, 1547 struct system_segment_descriptor *sd) 1548 { 1549 1550 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 1551 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful; 1552 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 1553 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 1554 sd->sd_type = ssd->ssd_type; 1555 sd->sd_dpl = ssd->ssd_dpl; 1556 sd->sd_p = ssd->ssd_p; 1557 sd->sd_gran = ssd->ssd_gran; 1558 } 1559 1560 /* 1561 * Populate the (physmap) array with base/bound pairs describing the 1562 * available physical memory in the system, then test this memory and 1563 * build the phys_avail array describing the actually-available memory. 1564 * 1565 * If we cannot accurately determine the physical memory map, then use 1566 * value from the 0xE801 call, and failing that, the RTC. 1567 * 1568 * Total memory size may be set by the kernel environment variable 1569 * hw.physmem or the compile-time define MAXMEM. 1570 * 1571 * Memory is aligned to PHYSMAP_ALIGN which must be a multiple 1572 * of PAGE_SIZE. This also greatly reduces the memory test time 1573 * which would otherwise be excessive on machines with > 8G of ram. 1574 * 1575 * XXX first should be vm_paddr_t. 1576 */ 1577 1578 #define PHYSMAP_ALIGN (vm_paddr_t)(128 * 1024) 1579 #define PHYSMAP_ALIGN_MASK (vm_paddr_t)(PHYSMAP_ALIGN - 1) 1580 vm_paddr_t physmap[PHYSMAP_SIZE]; 1581 struct bios_smap *smapbase, *smap, *smapend; 1582 struct efi_map_header *efihdrbase; 1583 u_int32_t smapsize; 1584 1585 static void 1586 add_smap_entries(int *physmap_idx) 1587 { 1588 int i; 1589 1590 smapsize = *((u_int32_t *)smapbase - 1); 1591 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 1592 1593 for (smap = smapbase; smap < smapend; smap++) { 1594 if (boothowto & RB_VERBOSE) 1595 kprintf("SMAP type=%02x base=%016lx len=%016lx\n", 1596 smap->type, smap->base, smap->length); 1597 1598 if (smap->type != SMAP_TYPE_MEMORY) 1599 continue; 1600 1601 if (smap->length == 0) 1602 continue; 1603 1604 for (i = 0; i <= *physmap_idx; i += 2) { 1605 if (smap->base < physmap[i + 1]) { 1606 if (boothowto & RB_VERBOSE) { 1607 kprintf("Overlapping or non-monotonic " 1608 "memory region, ignoring " 1609 "second region\n"); 1610 } 1611 break; 1612 } 1613 } 1614 if (i <= *physmap_idx) 1615 continue; 1616 1617 Realmem += smap->length; 1618 1619 if (smap->base == physmap[*physmap_idx + 1]) { 1620 physmap[*physmap_idx + 1] += smap->length; 1621 continue; 1622 } 1623 1624 *physmap_idx += 2; 1625 if (*physmap_idx == PHYSMAP_SIZE) { 1626 kprintf("Too many segments in the physical " 1627 "address map, giving up\n"); 1628 break; 1629 } 1630 physmap[*physmap_idx] = smap->base; 1631 physmap[*physmap_idx + 1] = smap->base + smap->length; 1632 } 1633 } 1634 1635 #define efi_next_descriptor(ptr, size) \ 1636 ((struct efi_md *)(((uint8_t *) ptr) + size)) 1637 1638 static void 1639 add_efi_map_entries(int *physmap_idx) 1640 { 1641 struct efi_md *map, *p; 1642 const char *type; 1643 size_t efisz; 1644 int i, ndesc; 1645 1646 static const char *types[] = { 1647 "Reserved", 1648 "LoaderCode", 1649 "LoaderData", 1650 "BootServicesCode", 1651 "BootServicesData", 1652 "RuntimeServicesCode", 1653 "RuntimeServicesData", 1654 "ConventionalMemory", 1655 "UnusableMemory", 1656 "ACPIReclaimMemory", 1657 "ACPIMemoryNVS", 1658 "MemoryMappedIO", 1659 "MemoryMappedIOPortSpace", 1660 "PalCode" 1661 }; 1662 1663 /* 1664 * Memory map data provided by UEFI via the GetMemoryMap 1665 * Boot Services API. 1666 */ 1667 efisz = (sizeof(struct efi_map_header) + 0xf) & ~0xf; 1668 map = (struct efi_md *)((uint8_t *)efihdrbase + efisz); 1669 1670 if (efihdrbase->descriptor_size == 0) 1671 return; 1672 ndesc = efihdrbase->memory_size / efihdrbase->descriptor_size; 1673 1674 if (boothowto & RB_VERBOSE) 1675 kprintf("%23s %12s %12s %8s %4s\n", 1676 "Type", "Physical", "Virtual", "#Pages", "Attr"); 1677 1678 for (i = 0, p = map; i < ndesc; i++, 1679 p = efi_next_descriptor(p, efihdrbase->descriptor_size)) { 1680 if (boothowto & RB_VERBOSE) { 1681 if (p->md_type <= EFI_MD_TYPE_PALCODE) 1682 type = types[p->md_type]; 1683 else 1684 type = "<INVALID>"; 1685 kprintf("%23s %012lx %12p %08lx ", type, p->md_phys, 1686 p->md_virt, p->md_pages); 1687 if (p->md_attr & EFI_MD_ATTR_UC) 1688 kprintf("UC "); 1689 if (p->md_attr & EFI_MD_ATTR_WC) 1690 kprintf("WC "); 1691 if (p->md_attr & EFI_MD_ATTR_WT) 1692 kprintf("WT "); 1693 if (p->md_attr & EFI_MD_ATTR_WB) 1694 kprintf("WB "); 1695 if (p->md_attr & EFI_MD_ATTR_UCE) 1696 kprintf("UCE "); 1697 if (p->md_attr & EFI_MD_ATTR_WP) 1698 kprintf("WP "); 1699 if (p->md_attr & EFI_MD_ATTR_RP) 1700 kprintf("RP "); 1701 if (p->md_attr & EFI_MD_ATTR_XP) 1702 kprintf("XP "); 1703 if (p->md_attr & EFI_MD_ATTR_RT) 1704 kprintf("RUNTIME"); 1705 kprintf("\n"); 1706 } 1707 1708 switch (p->md_type) { 1709 case EFI_MD_TYPE_CODE: 1710 case EFI_MD_TYPE_DATA: 1711 case EFI_MD_TYPE_BS_CODE: 1712 case EFI_MD_TYPE_BS_DATA: 1713 case EFI_MD_TYPE_FREE: 1714 /* 1715 * We're allowed to use any entry with these types. 1716 */ 1717 break; 1718 default: 1719 continue; 1720 } 1721 1722 Realmem += p->md_pages * PAGE_SIZE; 1723 1724 if (p->md_phys == physmap[*physmap_idx + 1]) { 1725 physmap[*physmap_idx + 1] += p->md_pages * PAGE_SIZE; 1726 continue; 1727 } 1728 1729 *physmap_idx += 2; 1730 if (*physmap_idx == PHYSMAP_SIZE) { 1731 kprintf("Too many segments in the physical " 1732 "address map, giving up\n"); 1733 break; 1734 } 1735 physmap[*physmap_idx] = p->md_phys; 1736 physmap[*physmap_idx + 1] = p->md_phys + p->md_pages * PAGE_SIZE; 1737 } 1738 } 1739 1740 struct fb_info efi_fb_info; 1741 static int have_efi_framebuffer = 0; 1742 1743 static void 1744 efi_fb_init_vaddr(int direct_map) 1745 { 1746 uint64_t sz; 1747 vm_offset_t addr, v; 1748 1749 v = efi_fb_info.vaddr; 1750 sz = efi_fb_info.stride * efi_fb_info.height; 1751 1752 if (direct_map) { 1753 addr = PHYS_TO_DMAP(efi_fb_info.paddr); 1754 if (addr >= DMAP_MIN_ADDRESS && addr + sz < DMAP_MAX_ADDRESS) 1755 efi_fb_info.vaddr = addr; 1756 } else { 1757 efi_fb_info.vaddr = (vm_offset_t)pmap_mapdev_attr( 1758 efi_fb_info.paddr, sz, PAT_WRITE_COMBINING); 1759 } 1760 1761 if (v == 0 && efi_fb_info.vaddr != 0) 1762 memset((void *)efi_fb_info.vaddr, 0x77, sz); 1763 } 1764 1765 int 1766 probe_efi_fb(int early) 1767 { 1768 struct efi_fb *efifb; 1769 caddr_t kmdp; 1770 1771 if (have_efi_framebuffer) { 1772 if (!early && 1773 (efi_fb_info.vaddr == 0 || 1774 efi_fb_info.vaddr == PHYS_TO_DMAP(efi_fb_info.paddr))) 1775 efi_fb_init_vaddr(0); 1776 return 0; 1777 } 1778 1779 kmdp = preload_search_by_type("elf kernel"); 1780 if (kmdp == NULL) 1781 kmdp = preload_search_by_type("elf64 kernel"); 1782 efifb = (struct efi_fb *)preload_search_info(kmdp, 1783 MODINFO_METADATA | MODINFOMD_EFI_FB); 1784 if (efifb == NULL) 1785 return 1; 1786 1787 have_efi_framebuffer = 1; 1788 1789 efi_fb_info.is_vga_boot_display = 1; 1790 efi_fb_info.width = efifb->fb_width; 1791 efi_fb_info.height = efifb->fb_height; 1792 efi_fb_info.stride = efifb->fb_stride * 4; 1793 efi_fb_info.depth = 32; 1794 efi_fb_info.paddr = efifb->fb_addr; 1795 if (early) { 1796 efi_fb_info.vaddr = 0; 1797 } else { 1798 efi_fb_init_vaddr(0); 1799 } 1800 efi_fb_info.restore = NULL; 1801 efi_fb_info.device = NULL; 1802 1803 return 0; 1804 } 1805 1806 static void 1807 efifb_startup(void *arg) 1808 { 1809 probe_efi_fb(0); 1810 } 1811 1812 SYSINIT(efi_fb_info, SI_BOOT1_POST, SI_ORDER_FIRST, efifb_startup, NULL); 1813 1814 static void 1815 getmemsize(caddr_t kmdp, u_int64_t first) 1816 { 1817 int off, physmap_idx, pa_indx, da_indx; 1818 int i, j; 1819 vm_paddr_t pa; 1820 vm_paddr_t msgbuf_size; 1821 u_long physmem_tunable; 1822 pt_entry_t *pte; 1823 quad_t dcons_addr, dcons_size; 1824 1825 bzero(physmap, sizeof(physmap)); 1826 physmap_idx = 0; 1827 1828 /* 1829 * get memory map from INT 15:E820, kindly supplied by the loader. 1830 * 1831 * subr_module.c says: 1832 * "Consumer may safely assume that size value precedes data." 1833 * ie: an int32_t immediately precedes smap. 1834 */ 1835 efihdrbase = (struct efi_map_header *)preload_search_info(kmdp, 1836 MODINFO_METADATA | MODINFOMD_EFI_MAP); 1837 smapbase = (struct bios_smap *)preload_search_info(kmdp, 1838 MODINFO_METADATA | MODINFOMD_SMAP); 1839 if (smapbase == NULL && efihdrbase == NULL) 1840 panic("No BIOS smap or EFI map info from loader!"); 1841 1842 if (efihdrbase == NULL) 1843 add_smap_entries(&physmap_idx); 1844 else 1845 add_efi_map_entries(&physmap_idx); 1846 1847 base_memory = physmap[1] / 1024; 1848 /* make hole for AP bootstrap code */ 1849 physmap[1] = mp_bootaddress(base_memory); 1850 1851 /* Save EBDA address, if any */ 1852 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e)); 1853 ebda_addr <<= 4; 1854 1855 /* 1856 * Maxmem isn't the "maximum memory", it's one larger than the 1857 * highest page of the physical address space. It should be 1858 * called something like "Maxphyspage". We may adjust this 1859 * based on ``hw.physmem'' and the results of the memory test. 1860 */ 1861 Maxmem = atop(physmap[physmap_idx + 1]); 1862 1863 #ifdef MAXMEM 1864 Maxmem = MAXMEM / 4; 1865 #endif 1866 1867 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 1868 Maxmem = atop(physmem_tunable); 1869 1870 /* 1871 * Don't allow MAXMEM or hw.physmem to extend the amount of memory 1872 * in the system. 1873 */ 1874 if (Maxmem > atop(physmap[physmap_idx + 1])) 1875 Maxmem = atop(physmap[physmap_idx + 1]); 1876 1877 /* 1878 * Blowing out the DMAP will blow up the system. 1879 */ 1880 if (Maxmem > atop(DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS)) { 1881 kprintf("Limiting Maxmem due to DMAP size\n"); 1882 Maxmem = atop(DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS); 1883 } 1884 1885 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1886 (boothowto & RB_VERBOSE)) { 1887 kprintf("Physical memory use set to %ldK\n", Maxmem * 4); 1888 } 1889 1890 /* 1891 * Call pmap initialization to make new kernel address space 1892 * 1893 * Mask off page 0. 1894 */ 1895 pmap_bootstrap(&first); 1896 physmap[0] = PAGE_SIZE; 1897 1898 /* 1899 * Align the physmap to PHYSMAP_ALIGN and cut out anything 1900 * exceeding Maxmem. 1901 */ 1902 for (i = j = 0; i <= physmap_idx; i += 2) { 1903 if (physmap[i+1] > ptoa(Maxmem)) 1904 physmap[i+1] = ptoa(Maxmem); 1905 physmap[i] = (physmap[i] + PHYSMAP_ALIGN_MASK) & 1906 ~PHYSMAP_ALIGN_MASK; 1907 physmap[i+1] = physmap[i+1] & ~PHYSMAP_ALIGN_MASK; 1908 1909 physmap[j] = physmap[i]; 1910 physmap[j+1] = physmap[i+1]; 1911 1912 if (physmap[i] < physmap[i+1]) 1913 j += 2; 1914 } 1915 physmap_idx = j - 2; 1916 1917 /* 1918 * Align anything else used in the validation loop. 1919 */ 1920 first = (first + PHYSMAP_ALIGN_MASK) & ~PHYSMAP_ALIGN_MASK; 1921 1922 /* 1923 * Size up each available chunk of physical memory. 1924 */ 1925 pa_indx = 0; 1926 da_indx = 1; 1927 phys_avail[pa_indx++] = physmap[0]; 1928 phys_avail[pa_indx] = physmap[0]; 1929 dump_avail[da_indx] = physmap[0]; 1930 pte = CMAP1; 1931 1932 /* 1933 * Get dcons buffer address 1934 */ 1935 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 || 1936 kgetenv_quad("dcons.size", &dcons_size) == 0) 1937 dcons_addr = 0; 1938 1939 /* 1940 * Validate the physical memory. The physical memory segments 1941 * have already been aligned to PHYSMAP_ALIGN which is a multiple 1942 * of PAGE_SIZE. 1943 */ 1944 for (i = 0; i <= physmap_idx; i += 2) { 1945 vm_paddr_t end; 1946 1947 end = physmap[i + 1]; 1948 1949 for (pa = physmap[i]; pa < end; pa += PHYSMAP_ALIGN) { 1950 int tmp, page_bad, full; 1951 int *ptr = (int *)CADDR1; 1952 1953 full = FALSE; 1954 /* 1955 * block out kernel memory as not available. 1956 */ 1957 if (pa >= 0x200000 && pa < first) 1958 goto do_dump_avail; 1959 1960 /* 1961 * block out dcons buffer 1962 */ 1963 if (dcons_addr > 0 1964 && pa >= trunc_page(dcons_addr) 1965 && pa < dcons_addr + dcons_size) { 1966 goto do_dump_avail; 1967 } 1968 1969 page_bad = FALSE; 1970 1971 /* 1972 * map page into kernel: valid, read/write,non-cacheable 1973 */ 1974 *pte = pa | 1975 kernel_pmap.pmap_bits[PG_V_IDX] | 1976 kernel_pmap.pmap_bits[PG_RW_IDX] | 1977 kernel_pmap.pmap_bits[PG_N_IDX]; 1978 cpu_invltlb(); 1979 1980 tmp = *ptr; 1981 /* 1982 * Test for alternating 1's and 0's 1983 */ 1984 *(volatile int *)ptr = 0xaaaaaaaa; 1985 cpu_mfence(); 1986 if (*(volatile int *)ptr != 0xaaaaaaaa) 1987 page_bad = TRUE; 1988 /* 1989 * Test for alternating 0's and 1's 1990 */ 1991 *(volatile int *)ptr = 0x55555555; 1992 cpu_mfence(); 1993 if (*(volatile int *)ptr != 0x55555555) 1994 page_bad = TRUE; 1995 /* 1996 * Test for all 1's 1997 */ 1998 *(volatile int *)ptr = 0xffffffff; 1999 cpu_mfence(); 2000 if (*(volatile int *)ptr != 0xffffffff) 2001 page_bad = TRUE; 2002 /* 2003 * Test for all 0's 2004 */ 2005 *(volatile int *)ptr = 0x0; 2006 cpu_mfence(); 2007 if (*(volatile int *)ptr != 0x0) 2008 page_bad = TRUE; 2009 /* 2010 * Restore original value. 2011 */ 2012 *ptr = tmp; 2013 2014 /* 2015 * Adjust array of valid/good pages. 2016 */ 2017 if (page_bad == TRUE) 2018 continue; 2019 /* 2020 * If this good page is a continuation of the 2021 * previous set of good pages, then just increase 2022 * the end pointer. Otherwise start a new chunk. 2023 * Note that "end" points one higher than end, 2024 * making the range >= start and < end. 2025 * If we're also doing a speculative memory 2026 * test and we at or past the end, bump up Maxmem 2027 * so that we keep going. The first bad page 2028 * will terminate the loop. 2029 */ 2030 if (phys_avail[pa_indx] == pa) { 2031 phys_avail[pa_indx] += PHYSMAP_ALIGN; 2032 } else { 2033 pa_indx++; 2034 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 2035 kprintf( 2036 "Too many holes in the physical address space, giving up\n"); 2037 pa_indx--; 2038 full = TRUE; 2039 goto do_dump_avail; 2040 } 2041 phys_avail[pa_indx++] = pa; 2042 phys_avail[pa_indx] = pa + PHYSMAP_ALIGN; 2043 } 2044 physmem += PHYSMAP_ALIGN / PAGE_SIZE; 2045 do_dump_avail: 2046 if (dump_avail[da_indx] == pa) { 2047 dump_avail[da_indx] += PHYSMAP_ALIGN; 2048 } else { 2049 da_indx++; 2050 if (da_indx == DUMP_AVAIL_ARRAY_END) { 2051 da_indx--; 2052 goto do_next; 2053 } 2054 dump_avail[da_indx++] = pa; 2055 dump_avail[da_indx] = pa + PHYSMAP_ALIGN; 2056 } 2057 do_next: 2058 if (full) 2059 break; 2060 } 2061 } 2062 *pte = 0; 2063 cpu_invltlb(); 2064 2065 /* 2066 * The last chunk must contain at least one page plus the message 2067 * buffer to avoid complicating other code (message buffer address 2068 * calculation, etc.). 2069 */ 2070 msgbuf_size = (MSGBUF_SIZE + PHYSMAP_ALIGN_MASK) & ~PHYSMAP_ALIGN_MASK; 2071 2072 while (phys_avail[pa_indx - 1] + PHYSMAP_ALIGN + 2073 msgbuf_size >= phys_avail[pa_indx]) { 2074 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 2075 phys_avail[pa_indx--] = 0; 2076 phys_avail[pa_indx--] = 0; 2077 } 2078 2079 Maxmem = atop(phys_avail[pa_indx]); 2080 2081 /* Trim off space for the message buffer. */ 2082 phys_avail[pa_indx] -= msgbuf_size; 2083 2084 avail_end = phys_avail[pa_indx]; 2085 2086 /* Map the message buffer. */ 2087 for (off = 0; off < msgbuf_size; off += PAGE_SIZE) { 2088 pmap_kenter((vm_offset_t)msgbufp + off, 2089 phys_avail[pa_indx] + off); 2090 } 2091 /* Try to get EFI framebuffer working as early as possible */ 2092 if (have_efi_framebuffer) 2093 efi_fb_init_vaddr(1); 2094 } 2095 2096 struct machintr_abi MachIntrABI; 2097 2098 /* 2099 * IDT VECTORS: 2100 * 0 Divide by zero 2101 * 1 Debug 2102 * 2 NMI 2103 * 3 BreakPoint 2104 * 4 OverFlow 2105 * 5 Bound-Range 2106 * 6 Invalid OpCode 2107 * 7 Device Not Available (x87) 2108 * 8 Double-Fault 2109 * 9 Coprocessor Segment overrun (unsupported, reserved) 2110 * 10 Invalid-TSS 2111 * 11 Segment not present 2112 * 12 Stack 2113 * 13 General Protection 2114 * 14 Page Fault 2115 * 15 Reserved 2116 * 16 x87 FP Exception pending 2117 * 17 Alignment Check 2118 * 18 Machine Check 2119 * 19 SIMD floating point 2120 * 20-31 reserved 2121 * 32-255 INTn/external sources 2122 */ 2123 u_int64_t 2124 hammer_time(u_int64_t modulep, u_int64_t physfree) 2125 { 2126 caddr_t kmdp; 2127 int gsel_tss, x, cpu; 2128 #if 0 /* JG */ 2129 int metadata_missing, off; 2130 #endif 2131 struct mdglobaldata *gd; 2132 u_int64_t msr; 2133 2134 /* 2135 * Prevent lowering of the ipl if we call tsleep() early. 2136 */ 2137 gd = &CPU_prvspace[0]->mdglobaldata; 2138 bzero(gd, sizeof(*gd)); 2139 2140 /* 2141 * Note: on both UP and SMP curthread must be set non-NULL 2142 * early in the boot sequence because the system assumes 2143 * that 'curthread' is never NULL. 2144 */ 2145 2146 gd->mi.gd_curthread = &thread0; 2147 thread0.td_gd = &gd->mi; 2148 2149 atdevbase = ISA_HOLE_START + PTOV_OFFSET; 2150 2151 #if 0 /* JG */ 2152 metadata_missing = 0; 2153 if (bootinfo.bi_modulep) { 2154 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 2155 preload_bootstrap_relocate(KERNBASE); 2156 } else { 2157 metadata_missing = 1; 2158 } 2159 if (bootinfo.bi_envp) 2160 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 2161 #endif 2162 2163 preload_metadata = (caddr_t)(uintptr_t)(modulep + PTOV_OFFSET); 2164 preload_bootstrap_relocate(PTOV_OFFSET); 2165 kmdp = preload_search_by_type("elf kernel"); 2166 if (kmdp == NULL) 2167 kmdp = preload_search_by_type("elf64 kernel"); 2168 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 2169 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + PTOV_OFFSET; 2170 #ifdef DDB 2171 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 2172 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 2173 #endif 2174 2175 if (boothowto & RB_VERBOSE) 2176 bootverbose++; 2177 2178 /* 2179 * Default MachIntrABI to ICU 2180 */ 2181 MachIntrABI = MachIntrABI_ICU; 2182 2183 /* 2184 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask, 2185 * and ncpus_fit_mask remain 0. 2186 */ 2187 ncpus = 1; 2188 ncpus2 = 1; 2189 ncpus_fit = 1; 2190 /* Init basic tunables, hz etc */ 2191 init_param1(); 2192 2193 /* 2194 * make gdt memory segments 2195 */ 2196 gdt_segs[GPROC0_SEL].ssd_base = 2197 (uintptr_t) &CPU_prvspace[0]->mdglobaldata.gd_common_tss; 2198 2199 gd->mi.gd_prvspace = CPU_prvspace[0]; 2200 2201 for (x = 0; x < NGDT; x++) { 2202 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1)) 2203 ssdtosd(&gdt_segs[x], &gdt[x]); 2204 } 2205 ssdtosyssd(&gdt_segs[GPROC0_SEL], 2206 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 2207 2208 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 2209 r_gdt.rd_base = (long) gdt; 2210 lgdt(&r_gdt); 2211 2212 wrmsr(MSR_FSBASE, 0); /* User value */ 2213 wrmsr(MSR_GSBASE, (u_int64_t)&gd->mi); 2214 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */ 2215 2216 mi_gdinit(&gd->mi, 0); 2217 cpu_gdinit(gd, 0); 2218 proc0paddr = proc0paddr_buff; 2219 mi_proc0init(&gd->mi, proc0paddr); 2220 safepri = TDPRI_MAX; 2221 2222 /* spinlocks and the BGL */ 2223 init_locks(); 2224 2225 /* exceptions */ 2226 for (x = 0; x < NIDT; x++) 2227 setidt_global(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); 2228 setidt_global(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0); 2229 setidt_global(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0); 2230 setidt_global(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1); 2231 setidt_global(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0); 2232 setidt_global(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0); 2233 setidt_global(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0); 2234 setidt_global(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0); 2235 setidt_global(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0); 2236 setidt_global(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1); 2237 setidt_global(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0); 2238 setidt_global(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0); 2239 setidt_global(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0); 2240 setidt_global(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0); 2241 setidt_global(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0); 2242 setidt_global(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0); 2243 setidt_global(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0); 2244 setidt_global(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0); 2245 setidt_global(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0); 2246 setidt_global(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0); 2247 2248 for (cpu = 0; cpu < MAXCPU; ++cpu) { 2249 r_idt_arr[cpu].rd_limit = sizeof(idt_arr[cpu]) - 1; 2250 r_idt_arr[cpu].rd_base = (long) &idt_arr[cpu][0]; 2251 } 2252 2253 lidt(&r_idt_arr[0]); 2254 2255 /* 2256 * Initialize the console before we print anything out. 2257 */ 2258 cninit(); 2259 2260 #if 0 /* JG */ 2261 if (metadata_missing) 2262 kprintf("WARNING: loader(8) metadata is missing!\n"); 2263 #endif 2264 2265 #if NISA >0 2266 elcr_probe(); 2267 isa_defaultirq(); 2268 #endif 2269 rand_initialize(); 2270 2271 /* 2272 * Initialize IRQ mapping 2273 * 2274 * NOTE: 2275 * SHOULD be after elcr_probe() 2276 */ 2277 MachIntrABI_ICU.initmap(); 2278 MachIntrABI_IOAPIC.initmap(); 2279 2280 #ifdef DDB 2281 kdb_init(); 2282 if (boothowto & RB_KDB) 2283 Debugger("Boot flags requested debugger"); 2284 #endif 2285 2286 #if 0 /* JG */ 2287 finishidentcpu(); /* Final stage of CPU initialization */ 2288 setidt(6, &IDTVEC(ill), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 2289 setidt(13, &IDTVEC(prot), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 2290 #endif 2291 identify_cpu(); /* Final stage of CPU initialization */ 2292 initializecpu(0); /* Initialize CPU registers */ 2293 2294 /* 2295 * On modern intel cpus, haswell or later, cpu_idle_hlt=1 is better 2296 * becaue the cpu does significant power management in HLT 2297 * (also suggested is to set sysctl machdep.mwait.CX.idle=AUTODEEP). 2298 * 2299 * On modern amd cpus or on any older amd or intel cpu, 2300 * cpu_idle_hlt=2 is better because ACPI is needed to reduce power 2301 * consumption. 2302 */ 2303 if (cpu_vendor_id == CPU_VENDOR_INTEL && 2304 CPUID_TO_MODEL(cpu_id) >= 0x3C) { /* Haswell or later */ 2305 cpu_idle_hlt = 1; 2306 } 2307 2308 TUNABLE_INT_FETCH("hw.apic_io_enable", &ioapic_enable); /* for compat */ 2309 TUNABLE_INT_FETCH("hw.ioapic_enable", &ioapic_enable); 2310 TUNABLE_INT_FETCH("hw.lapic_enable", &lapic_enable); 2311 TUNABLE_INT_FETCH("machdep.cpu_idle_hlt", &cpu_idle_hlt); 2312 2313 /* 2314 * Some of the virtual machines do not work w/ I/O APIC 2315 * enabled. If the user does not explicitly enable or 2316 * disable the I/O APIC (ioapic_enable < 0), then we 2317 * disable I/O APIC on all virtual machines. 2318 * 2319 * NOTE: 2320 * This must be done after identify_cpu(), which sets 2321 * 'cpu_feature2' 2322 */ 2323 if (ioapic_enable < 0) { 2324 if (cpu_feature2 & CPUID2_VMM) 2325 ioapic_enable = 0; 2326 else 2327 ioapic_enable = 1; 2328 } 2329 2330 /* make an initial tss so cpu can get interrupt stack on syscall! */ 2331 gd->gd_common_tss.tss_rsp0 = 2332 (register_t)(thread0.td_kstack + 2333 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb)); 2334 /* Ensure the stack is aligned to 16 bytes */ 2335 gd->gd_common_tss.tss_rsp0 &= ~(register_t)0xF; 2336 2337 /* double fault stack */ 2338 gd->gd_common_tss.tss_ist1 = 2339 (long)&gd->mi.gd_prvspace->idlestack[ 2340 sizeof(gd->mi.gd_prvspace->idlestack)]; 2341 2342 /* Set the IO permission bitmap (empty due to tss seg limit) */ 2343 gd->gd_common_tss.tss_iobase = sizeof(struct x86_64tss); 2344 2345 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 2346 gd->gd_tss_gdt = &gdt[GPROC0_SEL]; 2347 gd->gd_common_tssd = *gd->gd_tss_gdt; 2348 ltr(gsel_tss); 2349 2350 /* Set up the fast syscall stuff */ 2351 msr = rdmsr(MSR_EFER) | EFER_SCE; 2352 wrmsr(MSR_EFER, msr); 2353 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall)); 2354 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); 2355 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) | 2356 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48); 2357 wrmsr(MSR_STAR, msr); 2358 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D|PSL_IOPL); 2359 2360 getmemsize(kmdp, physfree); 2361 init_param2(physmem); 2362 2363 /* now running on new page tables, configured,and u/iom is accessible */ 2364 2365 /* Map the message buffer. */ 2366 #if 0 /* JG */ 2367 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 2368 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off); 2369 #endif 2370 2371 msgbufinit(msgbufp, MSGBUF_SIZE); 2372 2373 2374 /* transfer to user mode */ 2375 2376 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 2377 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 2378 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL); 2379 2380 load_ds(_udatasel); 2381 load_es(_udatasel); 2382 load_fs(_udatasel); 2383 2384 /* setup proc 0's pcb */ 2385 thread0.td_pcb->pcb_flags = 0; 2386 thread0.td_pcb->pcb_cr3 = KPML4phys; 2387 thread0.td_pcb->pcb_ext = NULL; 2388 lwp0.lwp_md.md_regs = &proc0_tf; /* XXX needed? */ 2389 2390 /* Location of kernel stack for locore */ 2391 return ((u_int64_t)thread0.td_pcb); 2392 } 2393 2394 /* 2395 * Initialize machine-dependant portions of the global data structure. 2396 * Note that the global data area and cpu0's idlestack in the private 2397 * data space were allocated in locore. 2398 * 2399 * Note: the idlethread's cpl is 0 2400 * 2401 * WARNING! Called from early boot, 'mycpu' may not work yet. 2402 */ 2403 void 2404 cpu_gdinit(struct mdglobaldata *gd, int cpu) 2405 { 2406 if (cpu) 2407 gd->mi.gd_curthread = &gd->mi.gd_idlethread; 2408 2409 lwkt_init_thread(&gd->mi.gd_idlethread, 2410 gd->mi.gd_prvspace->idlestack, 2411 sizeof(gd->mi.gd_prvspace->idlestack), 2412 0, &gd->mi); 2413 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu); 2414 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch; 2415 gd->mi.gd_idlethread.td_sp -= sizeof(void *); 2416 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore; 2417 } 2418 2419 /* 2420 * We only have to check for DMAP bounds, the globaldata space is 2421 * actually part of the kernel_map so we don't have to waste time 2422 * checking CPU_prvspace[*]. 2423 */ 2424 int 2425 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr) 2426 { 2427 #if 0 2428 if (saddr >= (vm_offset_t)&CPU_prvspace[0] && 2429 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) { 2430 return (TRUE); 2431 } 2432 #endif 2433 if (saddr >= DMAP_MIN_ADDRESS && eaddr <= DMAP_MAX_ADDRESS) 2434 return (TRUE); 2435 return (FALSE); 2436 } 2437 2438 struct globaldata * 2439 globaldata_find(int cpu) 2440 { 2441 KKASSERT(cpu >= 0 && cpu < ncpus); 2442 return(&CPU_prvspace[cpu]->mdglobaldata.mi); 2443 } 2444 2445 /* 2446 * This path should be safe from the SYSRET issue because only stopped threads 2447 * can have their %rip adjusted this way (and all heavy weight thread switches 2448 * clear QUICKREF and thus do not use SYSRET). However, the code path is 2449 * convoluted so add a safety by forcing %rip to be cannonical. 2450 */ 2451 int 2452 ptrace_set_pc(struct lwp *lp, unsigned long addr) 2453 { 2454 if (addr & 0x0000800000000000LLU) 2455 lp->lwp_md.md_regs->tf_rip = addr | 0xFFFF000000000000LLU; 2456 else 2457 lp->lwp_md.md_regs->tf_rip = addr & 0x0000FFFFFFFFFFFFLLU; 2458 return (0); 2459 } 2460 2461 int 2462 ptrace_single_step(struct lwp *lp) 2463 { 2464 lp->lwp_md.md_regs->tf_rflags |= PSL_T; 2465 return (0); 2466 } 2467 2468 int 2469 fill_regs(struct lwp *lp, struct reg *regs) 2470 { 2471 struct trapframe *tp; 2472 2473 if ((tp = lp->lwp_md.md_regs) == NULL) 2474 return EINVAL; 2475 bcopy(&tp->tf_rdi, ®s->r_rdi, sizeof(*regs)); 2476 return (0); 2477 } 2478 2479 int 2480 set_regs(struct lwp *lp, struct reg *regs) 2481 { 2482 struct trapframe *tp; 2483 2484 tp = lp->lwp_md.md_regs; 2485 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) || 2486 !CS_SECURE(regs->r_cs)) 2487 return (EINVAL); 2488 bcopy(®s->r_rdi, &tp->tf_rdi, sizeof(*regs)); 2489 clear_quickret(); 2490 return (0); 2491 } 2492 2493 static void 2494 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87) 2495 { 2496 struct env87 *penv_87 = &sv_87->sv_env; 2497 struct envxmm *penv_xmm = &sv_xmm->sv_env; 2498 int i; 2499 2500 /* FPU control/status */ 2501 penv_87->en_cw = penv_xmm->en_cw; 2502 penv_87->en_sw = penv_xmm->en_sw; 2503 penv_87->en_tw = penv_xmm->en_tw; 2504 penv_87->en_fip = penv_xmm->en_fip; 2505 penv_87->en_fcs = penv_xmm->en_fcs; 2506 penv_87->en_opcode = penv_xmm->en_opcode; 2507 penv_87->en_foo = penv_xmm->en_foo; 2508 penv_87->en_fos = penv_xmm->en_fos; 2509 2510 /* FPU registers */ 2511 for (i = 0; i < 8; ++i) 2512 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 2513 } 2514 2515 static void 2516 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm) 2517 { 2518 struct env87 *penv_87 = &sv_87->sv_env; 2519 struct envxmm *penv_xmm = &sv_xmm->sv_env; 2520 int i; 2521 2522 /* FPU control/status */ 2523 penv_xmm->en_cw = penv_87->en_cw; 2524 penv_xmm->en_sw = penv_87->en_sw; 2525 penv_xmm->en_tw = penv_87->en_tw; 2526 penv_xmm->en_fip = penv_87->en_fip; 2527 penv_xmm->en_fcs = penv_87->en_fcs; 2528 penv_xmm->en_opcode = penv_87->en_opcode; 2529 penv_xmm->en_foo = penv_87->en_foo; 2530 penv_xmm->en_fos = penv_87->en_fos; 2531 2532 /* FPU registers */ 2533 for (i = 0; i < 8; ++i) 2534 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 2535 } 2536 2537 int 2538 fill_fpregs(struct lwp *lp, struct fpreg *fpregs) 2539 { 2540 if (lp->lwp_thread == NULL || lp->lwp_thread->td_pcb == NULL) 2541 return EINVAL; 2542 if (cpu_fxsr) { 2543 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm, 2544 (struct save87 *)fpregs); 2545 return (0); 2546 } 2547 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs); 2548 return (0); 2549 } 2550 2551 int 2552 set_fpregs(struct lwp *lp, struct fpreg *fpregs) 2553 { 2554 if (cpu_fxsr) { 2555 set_fpregs_xmm((struct save87 *)fpregs, 2556 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm); 2557 return (0); 2558 } 2559 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs); 2560 return (0); 2561 } 2562 2563 int 2564 fill_dbregs(struct lwp *lp, struct dbreg *dbregs) 2565 { 2566 struct pcb *pcb; 2567 2568 if (lp == NULL) { 2569 dbregs->dr[0] = rdr0(); 2570 dbregs->dr[1] = rdr1(); 2571 dbregs->dr[2] = rdr2(); 2572 dbregs->dr[3] = rdr3(); 2573 dbregs->dr[4] = rdr4(); 2574 dbregs->dr[5] = rdr5(); 2575 dbregs->dr[6] = rdr6(); 2576 dbregs->dr[7] = rdr7(); 2577 return (0); 2578 } 2579 if (lp->lwp_thread == NULL || (pcb = lp->lwp_thread->td_pcb) == NULL) 2580 return EINVAL; 2581 dbregs->dr[0] = pcb->pcb_dr0; 2582 dbregs->dr[1] = pcb->pcb_dr1; 2583 dbregs->dr[2] = pcb->pcb_dr2; 2584 dbregs->dr[3] = pcb->pcb_dr3; 2585 dbregs->dr[4] = 0; 2586 dbregs->dr[5] = 0; 2587 dbregs->dr[6] = pcb->pcb_dr6; 2588 dbregs->dr[7] = pcb->pcb_dr7; 2589 return (0); 2590 } 2591 2592 int 2593 set_dbregs(struct lwp *lp, struct dbreg *dbregs) 2594 { 2595 if (lp == NULL) { 2596 load_dr0(dbregs->dr[0]); 2597 load_dr1(dbregs->dr[1]); 2598 load_dr2(dbregs->dr[2]); 2599 load_dr3(dbregs->dr[3]); 2600 load_dr4(dbregs->dr[4]); 2601 load_dr5(dbregs->dr[5]); 2602 load_dr6(dbregs->dr[6]); 2603 load_dr7(dbregs->dr[7]); 2604 } else { 2605 struct pcb *pcb; 2606 struct ucred *ucred; 2607 int i; 2608 uint64_t mask1, mask2; 2609 2610 /* 2611 * Don't let an illegal value for dr7 get set. Specifically, 2612 * check for undefined settings. Setting these bit patterns 2613 * result in undefined behaviour and can lead to an unexpected 2614 * TRCTRAP. 2615 */ 2616 /* JG this loop looks unreadable */ 2617 /* Check 4 2-bit fields for invalid patterns. 2618 * These fields are R/Wi, for i = 0..3 2619 */ 2620 /* Is 10 in LENi allowed when running in compatibility mode? */ 2621 /* Pattern 10 in R/Wi might be used to indicate 2622 * breakpoint on I/O. Further analysis should be 2623 * carried to decide if it is safe and useful to 2624 * provide access to that capability 2625 */ 2626 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 4; 2627 i++, mask1 <<= 4, mask2 <<= 4) 2628 if ((dbregs->dr[7] & mask1) == mask2) 2629 return (EINVAL); 2630 2631 pcb = lp->lwp_thread->td_pcb; 2632 ucred = lp->lwp_proc->p_ucred; 2633 2634 /* 2635 * Don't let a process set a breakpoint that is not within the 2636 * process's address space. If a process could do this, it 2637 * could halt the system by setting a breakpoint in the kernel 2638 * (if ddb was enabled). Thus, we need to check to make sure 2639 * that no breakpoints are being enabled for addresses outside 2640 * process's address space, unless, perhaps, we were called by 2641 * uid 0. 2642 * 2643 * XXX - what about when the watched area of the user's 2644 * address space is written into from within the kernel 2645 * ... wouldn't that still cause a breakpoint to be generated 2646 * from within kernel mode? 2647 */ 2648 2649 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) { 2650 if (dbregs->dr[7] & 0x3) { 2651 /* dr0 is enabled */ 2652 if (dbregs->dr[0] >= VM_MAX_USER_ADDRESS) 2653 return (EINVAL); 2654 } 2655 2656 if (dbregs->dr[7] & (0x3<<2)) { 2657 /* dr1 is enabled */ 2658 if (dbregs->dr[1] >= VM_MAX_USER_ADDRESS) 2659 return (EINVAL); 2660 } 2661 2662 if (dbregs->dr[7] & (0x3<<4)) { 2663 /* dr2 is enabled */ 2664 if (dbregs->dr[2] >= VM_MAX_USER_ADDRESS) 2665 return (EINVAL); 2666 } 2667 2668 if (dbregs->dr[7] & (0x3<<6)) { 2669 /* dr3 is enabled */ 2670 if (dbregs->dr[3] >= VM_MAX_USER_ADDRESS) 2671 return (EINVAL); 2672 } 2673 } 2674 2675 pcb->pcb_dr0 = dbregs->dr[0]; 2676 pcb->pcb_dr1 = dbregs->dr[1]; 2677 pcb->pcb_dr2 = dbregs->dr[2]; 2678 pcb->pcb_dr3 = dbregs->dr[3]; 2679 pcb->pcb_dr6 = dbregs->dr[6]; 2680 pcb->pcb_dr7 = dbregs->dr[7]; 2681 2682 pcb->pcb_flags |= PCB_DBREGS; 2683 } 2684 2685 return (0); 2686 } 2687 2688 /* 2689 * Return > 0 if a hardware breakpoint has been hit, and the 2690 * breakpoint was in user space. Return 0, otherwise. 2691 */ 2692 int 2693 user_dbreg_trap(void) 2694 { 2695 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */ 2696 u_int64_t bp; /* breakpoint bits extracted from dr6 */ 2697 int nbp; /* number of breakpoints that triggered */ 2698 caddr_t addr[4]; /* breakpoint addresses */ 2699 int i; 2700 2701 dr7 = rdr7(); 2702 if ((dr7 & 0xff) == 0) { 2703 /* 2704 * all GE and LE bits in the dr7 register are zero, 2705 * thus the trap couldn't have been caused by the 2706 * hardware debug registers 2707 */ 2708 return 0; 2709 } 2710 2711 nbp = 0; 2712 dr6 = rdr6(); 2713 bp = dr6 & 0xf; 2714 2715 if (bp == 0) { 2716 /* 2717 * None of the breakpoint bits are set meaning this 2718 * trap was not caused by any of the debug registers 2719 */ 2720 return 0; 2721 } 2722 2723 /* 2724 * at least one of the breakpoints were hit, check to see 2725 * which ones and if any of them are user space addresses 2726 */ 2727 2728 if (bp & 0x01) { 2729 addr[nbp++] = (caddr_t)rdr0(); 2730 } 2731 if (bp & 0x02) { 2732 addr[nbp++] = (caddr_t)rdr1(); 2733 } 2734 if (bp & 0x04) { 2735 addr[nbp++] = (caddr_t)rdr2(); 2736 } 2737 if (bp & 0x08) { 2738 addr[nbp++] = (caddr_t)rdr3(); 2739 } 2740 2741 for (i=0; i<nbp; i++) { 2742 if (addr[i] < 2743 (caddr_t)VM_MAX_USER_ADDRESS) { 2744 /* 2745 * addr[i] is in user space 2746 */ 2747 return nbp; 2748 } 2749 } 2750 2751 /* 2752 * None of the breakpoints are in user space. 2753 */ 2754 return 0; 2755 } 2756 2757 2758 #ifndef DDB 2759 void 2760 Debugger(const char *msg) 2761 { 2762 kprintf("Debugger(\"%s\") called.\n", msg); 2763 } 2764 #endif /* no DDB */ 2765 2766 #ifdef DDB 2767 2768 /* 2769 * Provide inb() and outb() as functions. They are normally only 2770 * available as macros calling inlined functions, thus cannot be 2771 * called inside DDB. 2772 * 2773 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 2774 */ 2775 2776 #undef inb 2777 #undef outb 2778 2779 /* silence compiler warnings */ 2780 u_char inb(u_int); 2781 void outb(u_int, u_char); 2782 2783 u_char 2784 inb(u_int port) 2785 { 2786 u_char data; 2787 /* 2788 * We use %%dx and not %1 here because i/o is done at %dx and not at 2789 * %edx, while gcc generates inferior code (movw instead of movl) 2790 * if we tell it to load (u_short) port. 2791 */ 2792 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 2793 return (data); 2794 } 2795 2796 void 2797 outb(u_int port, u_char data) 2798 { 2799 u_char al; 2800 /* 2801 * Use an unnecessary assignment to help gcc's register allocator. 2802 * This make a large difference for gcc-1.40 and a tiny difference 2803 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 2804 * best results. gcc-2.6.0 can't handle this. 2805 */ 2806 al = data; 2807 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 2808 } 2809 2810 #endif /* DDB */ 2811 2812 2813 2814 /* 2815 * initialize all the SMP locks 2816 */ 2817 2818 /* critical region when masking or unmasking interupts */ 2819 struct spinlock_deprecated imen_spinlock; 2820 2821 /* lock region used by kernel profiling */ 2822 struct spinlock_deprecated mcount_spinlock; 2823 2824 /* locks com (tty) data/hardware accesses: a FASTINTR() */ 2825 struct spinlock_deprecated com_spinlock; 2826 2827 /* lock regions around the clock hardware */ 2828 struct spinlock_deprecated clock_spinlock; 2829 2830 static void 2831 init_locks(void) 2832 { 2833 /* 2834 * Get the initial mplock with a count of 1 for the BSP. 2835 * This uses a LOGICAL cpu ID, ie BSP == 0. 2836 */ 2837 cpu_get_initial_mplock(); 2838 /* DEPRECATED */ 2839 spin_init_deprecated(&mcount_spinlock); 2840 spin_init_deprecated(&imen_spinlock); 2841 spin_init_deprecated(&com_spinlock); 2842 spin_init_deprecated(&clock_spinlock); 2843 2844 /* our token pool needs to work early */ 2845 lwkt_token_pool_init(); 2846 } 2847 2848 boolean_t 2849 cpu_mwait_hint_valid(uint32_t hint) 2850 { 2851 int cx_idx, sub; 2852 2853 cx_idx = MWAIT_EAX_TO_CX(hint); 2854 if (cx_idx >= CPU_MWAIT_CX_MAX) 2855 return FALSE; 2856 2857 sub = MWAIT_EAX_TO_CX_SUB(hint); 2858 if (sub >= cpu_mwait_cx_info[cx_idx].subcnt) 2859 return FALSE; 2860 2861 return TRUE; 2862 } 2863 2864 void 2865 cpu_mwait_cx_no_bmsts(void) 2866 { 2867 atomic_clear_int(&cpu_mwait_c3_preamble, CPU_MWAIT_C3_PREAMBLE_BM_STS); 2868 } 2869 2870 void 2871 cpu_mwait_cx_no_bmarb(void) 2872 { 2873 atomic_clear_int(&cpu_mwait_c3_preamble, CPU_MWAIT_C3_PREAMBLE_BM_ARB); 2874 } 2875 2876 static int 2877 cpu_mwait_cx_hint2name(int hint, char *name, int namelen, boolean_t allow_auto) 2878 { 2879 int old_cx_idx, sub = 0; 2880 2881 if (hint >= 0) { 2882 old_cx_idx = MWAIT_EAX_TO_CX(hint); 2883 sub = MWAIT_EAX_TO_CX_SUB(hint); 2884 } else if (hint == CPU_MWAIT_HINT_AUTO) { 2885 old_cx_idx = allow_auto ? CPU_MWAIT_C2 : CPU_MWAIT_CX_MAX; 2886 } else if (hint == CPU_MWAIT_HINT_AUTODEEP) { 2887 old_cx_idx = allow_auto ? CPU_MWAIT_C3 : CPU_MWAIT_CX_MAX; 2888 } else { 2889 old_cx_idx = CPU_MWAIT_CX_MAX; 2890 } 2891 2892 if (!CPU_MWAIT_HAS_CX) 2893 strlcpy(name, "NONE", namelen); 2894 else if (allow_auto && hint == CPU_MWAIT_HINT_AUTO) 2895 strlcpy(name, "AUTO", namelen); 2896 else if (allow_auto && hint == CPU_MWAIT_HINT_AUTODEEP) 2897 strlcpy(name, "AUTODEEP", namelen); 2898 else if (old_cx_idx >= CPU_MWAIT_CX_MAX || 2899 sub >= cpu_mwait_cx_info[old_cx_idx].subcnt) 2900 strlcpy(name, "INVALID", namelen); 2901 else 2902 ksnprintf(name, namelen, "C%d/%d", old_cx_idx, sub); 2903 2904 return old_cx_idx; 2905 } 2906 2907 static int 2908 cpu_mwait_cx_name2hint(char *name, int *hint0, boolean_t allow_auto) 2909 { 2910 int cx_idx, sub, hint; 2911 char *ptr, *start; 2912 2913 if (allow_auto && strcmp(name, "AUTO") == 0) { 2914 hint = CPU_MWAIT_HINT_AUTO; 2915 cx_idx = CPU_MWAIT_C2; 2916 goto done; 2917 } 2918 if (allow_auto && strcmp(name, "AUTODEEP") == 0) { 2919 hint = CPU_MWAIT_HINT_AUTODEEP; 2920 cx_idx = CPU_MWAIT_C3; 2921 goto done; 2922 } 2923 2924 if (strlen(name) < 4 || toupper(name[0]) != 'C') 2925 return -1; 2926 start = &name[1]; 2927 ptr = NULL; 2928 2929 cx_idx = strtol(start, &ptr, 10); 2930 if (ptr == start || *ptr != '/') 2931 return -1; 2932 if (cx_idx < 0 || cx_idx >= CPU_MWAIT_CX_MAX) 2933 return -1; 2934 2935 start = ptr + 1; 2936 ptr = NULL; 2937 2938 sub = strtol(start, &ptr, 10); 2939 if (*ptr != '\0') 2940 return -1; 2941 if (sub < 0 || sub >= cpu_mwait_cx_info[cx_idx].subcnt) 2942 return -1; 2943 2944 hint = MWAIT_EAX_HINT(cx_idx, sub); 2945 done: 2946 *hint0 = hint; 2947 return cx_idx; 2948 } 2949 2950 static int 2951 cpu_mwait_cx_transit(int old_cx_idx, int cx_idx) 2952 { 2953 if (cx_idx >= CPU_MWAIT_C3 && cpu_mwait_c3_preamble) 2954 return EOPNOTSUPP; 2955 if (old_cx_idx < CPU_MWAIT_C3 && cx_idx >= CPU_MWAIT_C3) { 2956 int error; 2957 2958 error = cputimer_intr_powersave_addreq(); 2959 if (error) 2960 return error; 2961 } else if (old_cx_idx >= CPU_MWAIT_C3 && cx_idx < CPU_MWAIT_C3) { 2962 cputimer_intr_powersave_remreq(); 2963 } 2964 return 0; 2965 } 2966 2967 static int 2968 cpu_mwait_cx_select_sysctl(SYSCTL_HANDLER_ARGS, int *hint0, 2969 boolean_t allow_auto) 2970 { 2971 int error, cx_idx, old_cx_idx, hint; 2972 char name[CPU_MWAIT_CX_NAMELEN]; 2973 2974 hint = *hint0; 2975 old_cx_idx = cpu_mwait_cx_hint2name(hint, name, sizeof(name), 2976 allow_auto); 2977 2978 error = sysctl_handle_string(oidp, name, sizeof(name), req); 2979 if (error != 0 || req->newptr == NULL) 2980 return error; 2981 2982 if (!CPU_MWAIT_HAS_CX) 2983 return EOPNOTSUPP; 2984 2985 cx_idx = cpu_mwait_cx_name2hint(name, &hint, allow_auto); 2986 if (cx_idx < 0) 2987 return EINVAL; 2988 2989 error = cpu_mwait_cx_transit(old_cx_idx, cx_idx); 2990 if (error) 2991 return error; 2992 2993 *hint0 = hint; 2994 return 0; 2995 } 2996 2997 static int 2998 cpu_mwait_cx_setname(struct cpu_idle_stat *stat, const char *cx_name) 2999 { 3000 int error, cx_idx, old_cx_idx, hint; 3001 char name[CPU_MWAIT_CX_NAMELEN]; 3002 3003 KASSERT(CPU_MWAIT_HAS_CX, ("cpu does not support mwait CX extension")); 3004 3005 hint = stat->hint; 3006 old_cx_idx = cpu_mwait_cx_hint2name(hint, name, sizeof(name), TRUE); 3007 3008 strlcpy(name, cx_name, sizeof(name)); 3009 cx_idx = cpu_mwait_cx_name2hint(name, &hint, TRUE); 3010 if (cx_idx < 0) 3011 return EINVAL; 3012 3013 error = cpu_mwait_cx_transit(old_cx_idx, cx_idx); 3014 if (error) 3015 return error; 3016 3017 stat->hint = hint; 3018 return 0; 3019 } 3020 3021 static int 3022 cpu_mwait_cx_idle_sysctl(SYSCTL_HANDLER_ARGS) 3023 { 3024 int hint = cpu_mwait_halt_global; 3025 int error, cx_idx, cpu; 3026 char name[CPU_MWAIT_CX_NAMELEN], cx_name[CPU_MWAIT_CX_NAMELEN]; 3027 3028 cpu_mwait_cx_hint2name(hint, name, sizeof(name), TRUE); 3029 3030 error = sysctl_handle_string(oidp, name, sizeof(name), req); 3031 if (error != 0 || req->newptr == NULL) 3032 return error; 3033 3034 if (!CPU_MWAIT_HAS_CX) 3035 return EOPNOTSUPP; 3036 3037 /* Save name for later per-cpu CX configuration */ 3038 strlcpy(cx_name, name, sizeof(cx_name)); 3039 3040 cx_idx = cpu_mwait_cx_name2hint(name, &hint, TRUE); 3041 if (cx_idx < 0) 3042 return EINVAL; 3043 3044 /* Change per-cpu CX configuration */ 3045 for (cpu = 0; cpu < ncpus; ++cpu) { 3046 error = cpu_mwait_cx_setname(&cpu_idle_stats[cpu], cx_name); 3047 if (error) 3048 return error; 3049 } 3050 3051 cpu_mwait_halt_global = hint; 3052 return 0; 3053 } 3054 3055 static int 3056 cpu_mwait_cx_pcpu_idle_sysctl(SYSCTL_HANDLER_ARGS) 3057 { 3058 struct cpu_idle_stat *stat = arg1; 3059 int error; 3060 3061 error = cpu_mwait_cx_select_sysctl(oidp, arg1, arg2, req, 3062 &stat->hint, TRUE); 3063 return error; 3064 } 3065 3066 static int 3067 cpu_mwait_cx_spin_sysctl(SYSCTL_HANDLER_ARGS) 3068 { 3069 int error; 3070 3071 error = cpu_mwait_cx_select_sysctl(oidp, arg1, arg2, req, 3072 &cpu_mwait_spin, FALSE); 3073 return error; 3074 } 3075 3076 /* 3077 * This manual debugging code is called unconditionally from Xtimer 3078 * (the per-cpu timer interrupt) whether the current thread is in a 3079 * critical section or not) and can be useful in tracking down lockups. 3080 * 3081 * NOTE: MANUAL DEBUG CODE 3082 */ 3083 #if 0 3084 static int saveticks[SMP_MAXCPU]; 3085 static int savecounts[SMP_MAXCPU]; 3086 #endif 3087 3088 void 3089 pcpu_timer_always(struct intrframe *frame) 3090 { 3091 #if 0 3092 globaldata_t gd = mycpu; 3093 int cpu = gd->gd_cpuid; 3094 char buf[64]; 3095 short *gptr; 3096 int i; 3097 3098 if (cpu <= 20) { 3099 gptr = (short *)0xFFFFFFFF800b8000 + 80 * cpu; 3100 *gptr = ((*gptr + 1) & 0x00FF) | 0x0700; 3101 ++gptr; 3102 3103 ksnprintf(buf, sizeof(buf), " %p %16s %d %16s ", 3104 (void *)frame->if_rip, gd->gd_curthread->td_comm, ticks, 3105 gd->gd_infomsg); 3106 for (i = 0; buf[i]; ++i) { 3107 gptr[i] = 0x0700 | (unsigned char)buf[i]; 3108 } 3109 } 3110 #if 0 3111 if (saveticks[gd->gd_cpuid] != ticks) { 3112 saveticks[gd->gd_cpuid] = ticks; 3113 savecounts[gd->gd_cpuid] = 0; 3114 } 3115 ++savecounts[gd->gd_cpuid]; 3116 if (savecounts[gd->gd_cpuid] > 2000 && panicstr == NULL) { 3117 panic("cpud %d panicing on ticks failure", 3118 gd->gd_cpuid); 3119 } 3120 for (i = 0; i < ncpus; ++i) { 3121 int delta; 3122 if (saveticks[i] && panicstr == NULL) { 3123 delta = saveticks[i] - ticks; 3124 if (delta < -10 || delta > 10) { 3125 panic("cpu %d panicing on cpu %d watchdog", 3126 gd->gd_cpuid, i); 3127 } 3128 } 3129 } 3130 #endif 3131 #endif 3132 } 3133