xref: /dragonfly/sys/platform/pc64/x86_64/tls.c (revision 0720b42f)
1 /*
2  * Copyright (c) 2003,2004,2008 The DragonFly Project.  All rights reserved.
3  *
4  * This code is derived from software contributed to The DragonFly Project
5  * by David Xu <davidxu@t2t2.com> and Matthew Dillon <dillon@backplane.com>
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  *
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in
15  *    the documentation and/or other materials provided with the
16  *    distribution.
17  * 3. Neither the name of The DragonFly Project nor the names of its
18  *    contributors may be used to endorse or promote products derived
19  *    from this software without specific, prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
25  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  */
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/sysproto.h>
38 #include <sys/kernel.h>
39 #include <sys/proc.h>
40 #include <sys/sysent.h>
41 #include <sys/sysctl.h>
42 #include <sys/tls.h>
43 #include <sys/reg.h>
44 #include <sys/globaldata.h>
45 
46 #include <sys/thread2.h>
47 
48 #include <machine/cpu.h>
49 #include <machine/clock.h>
50 #include <machine/specialreg.h>
51 #include <machine/segments.h>
52 #include <machine/md_var.h>
53 #include <machine/pcb_ext.h>		/* pcb.h included via sys/user.h */
54 #include <machine/globaldata.h>		/* CPU_prvspace */
55 #include <machine/smp.h>
56 #include <machine/pcb.h>
57 #include <machine/thread.h>
58 #include <machine/vmm.h>
59 
60 /*
61  * set a TLS descriptor.  For x86_64 descriptor 0 identifies %fs and
62  * descriptor 1 identifies %gs, and 0 is returned in sysmsg_result.
63  *
64  * Returns the value userland needs to load into %gs representing the
65  * TLS descriptor or -1 on error.
66  *
67  * (int which, struct tls_info *info, size_t infosize)
68  *
69  * MPSAFE
70  */
71 int
72 sys_set_tls_area(struct set_tls_area_args *uap)
73 {
74 	struct tls_info info;
75 	int error;
76 	int i;
77 
78 	/*
79 	 * Sanity checks
80 	 *
81 	 * which 0 == %fs, which 1 == %gs
82 	 */
83 	i = uap->which;
84 	if (i < 0 || i > 1)
85 		return (ERANGE);
86 	if (uap->infosize < 0)
87 		return (EINVAL);
88 
89 	/*
90 	 * Maintain forwards compatibility with future extensions.
91 	 */
92 	if (uap->infosize != sizeof(info)) {
93 		bzero(&info, sizeof(info));
94 		error = copyin(uap->info, &info,
95 				min(sizeof(info), uap->infosize));
96 	} else {
97 		error = copyin(uap->info, &info, sizeof(info));
98 	}
99 	if (error)
100 		return (error);
101 	if (info.size < -1)
102 		return (EINVAL);
103 
104 	/*
105 	 * For x86_64 we can only adjust FSBASE and GSBASE
106 	 */
107 	curthread->td_tls.info[i] = info;
108 	set_user_TLS();
109 	uap->sysmsg_result = 0;	/* segment descriptor $0 */
110 	return(0);
111 }
112 
113 /*
114  * Return the specified TLS descriptor to userland.
115  *
116  * Returns the value userland needs to load into %gs representing the
117  * TLS descriptor or -1 on error.
118  *
119  * (int which, struct tls_info *info, size_t infosize)
120  *
121  * MPSAFE
122  */
123 int
124 sys_get_tls_area(struct get_tls_area_args *uap)
125 {
126 	struct tls_info info;
127 	int error;
128 	int i;
129 
130 	/*
131 	 * Sanity checks
132 	 */
133 	i = uap->which;
134 	if (i < 0 || i > 1)
135 		return (ERANGE);
136 	if (uap->infosize < 0)
137 		return (EINVAL);
138 
139 	info = curthread->td_tls.info[i];
140 
141 	error = copyout(&info, uap->info, min(sizeof(info), uap->infosize));
142 	return(error);
143 }
144 
145 /*
146  * Install the TLS.
147  *
148  * It shouldn't be possible for a preemptive thread switch to do anything
149  * more than set gd_user_fs and wrmsr for us.  Even though there is a window
150  * where gd_user_fs/gd_user_gs do not match the MSRs no preemptive thread
151  * switch should ever switch to any heavy weight thread other than our own.
152  *
153  * Still, use a critical section to be safe.
154  *
155  * MPSAFE
156  */
157 void
158 set_user_TLS(void)
159 {
160 	struct mdglobaldata *gd = mdcpu;
161 	thread_t td = gd->mi.gd_curthread;
162 
163 	crit_enter_quick(td);
164 	td->td_pcb->pcb_fsbase = (register_t)td->td_tls.info[0].base;
165 	td->td_pcb->pcb_gsbase = (register_t)td->td_tls.info[1].base;
166 	if (gd->gd_user_fs != td->td_pcb->pcb_fsbase) {
167 		gd->gd_user_fs = td->td_pcb->pcb_fsbase;
168 		wrmsr(MSR_FSBASE, gd->gd_user_fs);
169 	}
170 	if (gd->gd_user_gs != td->td_pcb->pcb_gsbase) {
171 		gd->gd_user_gs = td->td_pcb->pcb_gsbase;
172 		wrmsr(MSR_KGSBASE, gd->gd_user_gs);
173 	}
174 
175 	if (td->td_vmm) {
176 		vmm_vm_set_tls_area();
177 	}
178 
179 	clear_quickret();
180 	crit_exit_quick(td);
181 }
182 
183