xref: /dragonfly/sys/platform/pc64/x86_64/tls.c (revision 7d3e9a5b)
1 /*
2  * Copyright (c) 2003,2004,2008 The DragonFly Project.  All rights reserved.
3  *
4  * This code is derived from software contributed to The DragonFly Project
5  * by David Xu <davidxu@t2t2.com> and Matthew Dillon <dillon@backplane.com>
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  *
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in
15  *    the documentation and/or other materials provided with the
16  *    distribution.
17  * 3. Neither the name of The DragonFly Project nor the names of its
18  *    contributors may be used to endorse or promote products derived
19  *    from this software without specific, prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
25  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  */
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/sysmsg.h>
38 #include <sys/kernel.h>
39 #include <sys/proc.h>
40 #include <sys/sysent.h>
41 #include <sys/sysctl.h>
42 #include <sys/tls.h>
43 #include <sys/reg.h>
44 #include <sys/globaldata.h>
45 
46 #include <sys/thread2.h>
47 
48 #include <machine/cpu.h>
49 #include <machine/clock.h>
50 #include <machine/specialreg.h>
51 #include <machine/segments.h>
52 #include <machine/md_var.h>
53 #include <machine/pcb_ext.h>
54 #include <machine/globaldata.h>		/* CPU_prvspace */
55 #include <machine/smp.h>
56 #include <machine/pcb.h>
57 #include <machine/thread.h>
58 
59 /*
60  * set a TLS descriptor.  For x86_64 descriptor 0 identifies %fs and
61  * descriptor 1 identifies %gs, and 0 is returned in sysmsg_result.
62  *
63  * Returns the value userland needs to load into %gs representing the
64  * TLS descriptor or -1 on error.
65  *
66  * (int which, struct tls_info *info, size_t infosize)
67  *
68  * MPSAFE
69  */
70 int
71 sys_set_tls_area(struct sysmsg *sysmsg, const struct set_tls_area_args *uap)
72 {
73 	struct tls_info info;
74 	int error;
75 	int i;
76 
77 	/*
78 	 * Sanity checks
79 	 *
80 	 * which 0 == %fs, which 1 == %gs
81 	 */
82 	i = uap->which;
83 	if (i < 0 || i > 1)
84 		return (ERANGE);
85 	if (uap->infosize < 0)
86 		return (EINVAL);
87 
88 	/*
89 	 * Maintain forwards compatibility with future extensions.
90 	 */
91 	if (uap->infosize != sizeof(info)) {
92 		bzero(&info, sizeof(info));
93 		error = copyin(uap->info, &info,
94 				min(sizeof(info), uap->infosize));
95 	} else {
96 		error = copyin(uap->info, &info, sizeof(info));
97 	}
98 	if (error)
99 		return (error);
100 	if (info.size < -1)
101 		return (EINVAL);
102 
103 	/*
104 	 * For x86_64 we can only adjust FSBASE and GSBASE
105 	 */
106 	curthread->td_tls.info[i] = info;
107 	set_user_TLS();
108 	sysmsg->sysmsg_result = 0;	/* segment descriptor $0 */
109 	return(0);
110 }
111 
112 /*
113  * Return the specified TLS descriptor to userland.
114  *
115  * Returns the value userland needs to load into %gs representing the
116  * TLS descriptor or -1 on error.
117  *
118  * (int which, struct tls_info *info, size_t infosize)
119  *
120  * MPSAFE
121  */
122 int
123 sys_get_tls_area(struct sysmsg *sysmsg, const struct get_tls_area_args *uap)
124 {
125 	struct tls_info info;
126 	int error;
127 	int i;
128 
129 	/*
130 	 * Sanity checks
131 	 */
132 	i = uap->which;
133 	if (i < 0 || i > 1)
134 		return (ERANGE);
135 	if (uap->infosize < 0)
136 		return (EINVAL);
137 
138 	info = curthread->td_tls.info[i];
139 
140 	error = copyout(&info, uap->info, min(sizeof(info), uap->infosize));
141 	return(error);
142 }
143 
144 /*
145  * Install the TLS.
146  *
147  * It shouldn't be possible for a preemptive thread switch to do anything
148  * more than set gd_user_fs and wrmsr for us.  Even though there is a window
149  * where gd_user_fs/gd_user_gs do not match the MSRs no preemptive thread
150  * switch should ever switch to any heavy weight thread other than our own.
151  *
152  * Still, use a critical section to be safe.
153  *
154  * MPSAFE
155  */
156 void
157 set_user_TLS(void)
158 {
159 	struct mdglobaldata *gd = mdcpu;
160 	thread_t td = gd->mi.gd_curthread;
161 
162 	crit_enter_quick(td);
163 	td->td_pcb->pcb_fsbase = (register_t)td->td_tls.info[0].base;
164 	td->td_pcb->pcb_gsbase = (register_t)td->td_tls.info[1].base;
165 	if (gd->gd_user_fs != td->td_pcb->pcb_fsbase) {
166 		gd->gd_user_fs = td->td_pcb->pcb_fsbase;
167 		wrmsr(MSR_FSBASE, gd->gd_user_fs);
168 	}
169 	if (gd->gd_user_gs != td->td_pcb->pcb_gsbase) {
170 		gd->gd_user_gs = td->td_pcb->pcb_gsbase;
171 		wrmsr(MSR_KGSBASE, gd->gd_user_gs);
172 	}
173 
174 	clear_quickret();
175 	crit_exit_quick(td);
176 }
177 
178