1 /*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (C) 1994, David Greenman 4 * Copyright (c) 1982, 1987, 1990, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 39 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $ 40 */ 41 42 #include "opt_compat.h" 43 #include "opt_ddb.h" 44 #include "opt_directio.h" 45 #include "opt_inet.h" 46 #include "opt_msgbuf.h" 47 #include "opt_swap.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/sysproto.h> 52 #include <sys/signalvar.h> 53 #include <sys/kernel.h> 54 #include <sys/linker.h> 55 #include <sys/malloc.h> 56 #include <sys/proc.h> 57 #include <sys/buf.h> 58 #include <sys/reboot.h> 59 #include <sys/mbuf.h> 60 #include <sys/msgbuf.h> 61 #include <sys/sysent.h> 62 #include <sys/sysctl.h> 63 #include <sys/vmmeter.h> 64 #include <sys/bus.h> 65 #include <sys/usched.h> 66 #include <sys/reg.h> 67 68 #include <vm/vm.h> 69 #include <vm/vm_param.h> 70 #include <sys/lock.h> 71 #include <vm/vm_kern.h> 72 #include <vm/vm_object.h> 73 #include <vm/vm_page.h> 74 #include <vm/vm_map.h> 75 #include <vm/vm_pager.h> 76 #include <vm/vm_extern.h> 77 78 #include <sys/thread2.h> 79 #include <sys/mplock2.h> 80 81 #include <sys/user.h> 82 #include <sys/exec.h> 83 #include <sys/cons.h> 84 85 #include <ddb/ddb.h> 86 87 #include <machine/cpu.h> 88 #include <machine/clock.h> 89 #include <machine/specialreg.h> 90 #include <machine/md_var.h> 91 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */ 92 #include <machine/globaldata.h> /* CPU_prvspace */ 93 #include <machine/smp.h> 94 #ifdef PERFMON 95 #include <machine/perfmon.h> 96 #endif 97 #include <machine/cputypes.h> 98 99 #include <bus/isa/rtc.h> 100 #include <sys/random.h> 101 #include <sys/ptrace.h> 102 #include <machine/sigframe.h> 103 #include <unistd.h> /* umtx_* functions */ 104 #include <pthread.h> /* pthread_yield() */ 105 106 extern void dblfault_handler (void); 107 108 #ifndef CPU_DISABLE_SSE 109 static void set_fpregs_xmm (struct save87 *, struct savexmm *); 110 static void fill_fpregs_xmm (struct savexmm *, struct save87 *); 111 #endif /* CPU_DISABLE_SSE */ 112 #ifdef DIRECTIO 113 extern void ffs_rawread_setup(void); 114 #endif /* DIRECTIO */ 115 116 int64_t tsc_offsets[MAXCPU]; 117 118 #if defined(SWTCH_OPTIM_STATS) 119 extern int swtch_optim_stats; 120 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats, 121 CTLFLAG_RD, &swtch_optim_stats, 0, ""); 122 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count, 123 CTLFLAG_RD, &tlb_flush_count, 0, ""); 124 #endif 125 126 static int 127 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS) 128 { 129 u_long pmem = ctob(physmem); 130 131 int error = sysctl_handle_long(oidp, &pmem, 0, req); 132 return (error); 133 } 134 135 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD, 136 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)"); 137 138 static int 139 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS) 140 { 141 /* JG */ 142 int error = sysctl_handle_int(oidp, 0, 143 ctob((int)Maxmem - vmstats.v_wire_count), req); 144 return (error); 145 } 146 147 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD, 148 0, 0, sysctl_hw_usermem, "IU", ""); 149 150 SYSCTL_ULONG(_hw, OID_AUTO, availpages, CTLFLAG_RD, &Maxmem, 0, ""); 151 152 #if 0 153 154 static int 155 sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS) 156 { 157 int error; 158 159 /* Unwind the buffer, so that it's linear (possibly starting with 160 * some initial nulls). 161 */ 162 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr, 163 msgbufp->msg_size-msgbufp->msg_bufr,req); 164 if(error) return(error); 165 if(msgbufp->msg_bufr>0) { 166 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr, 167 msgbufp->msg_bufr,req); 168 } 169 return(error); 170 } 171 172 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD, 173 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer"); 174 175 static int msgbuf_clear; 176 177 static int 178 sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS) 179 { 180 int error; 181 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 182 req); 183 if (!error && req->newptr) { 184 /* Clear the buffer and reset write pointer */ 185 bzero(msgbufp->msg_ptr,msgbufp->msg_size); 186 msgbufp->msg_bufr=msgbufp->msg_bufx=0; 187 msgbuf_clear=0; 188 } 189 return (error); 190 } 191 192 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW, 193 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I", 194 "Clear kernel message buffer"); 195 196 #endif 197 198 /* 199 * Send an interrupt to process. 200 * 201 * Stack is set up to allow sigcode stored 202 * at top to call routine, followed by kcall 203 * to sigreturn routine below. After sigreturn 204 * resets the signal mask, the stack, and the 205 * frame pointer, it returns to the user 206 * specified pc, psl. 207 */ 208 void 209 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code) 210 { 211 struct lwp *lp = curthread->td_lwp; 212 struct proc *p = lp->lwp_proc; 213 struct trapframe *regs; 214 struct sigacts *psp = p->p_sigacts; 215 struct sigframe sf, *sfp; 216 int oonstack; 217 char *sp; 218 219 regs = lp->lwp_md.md_regs; 220 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0; 221 222 /* Save user context */ 223 bzero(&sf, sizeof(struct sigframe)); 224 sf.sf_uc.uc_sigmask = *mask; 225 sf.sf_uc.uc_stack = lp->lwp_sigstk; 226 sf.sf_uc.uc_mcontext.mc_onstack = oonstack; 227 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0); 228 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe)); 229 230 /* Make the size of the saved context visible to userland */ 231 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); 232 233 /* Allocate and validate space for the signal handler context. */ 234 if ((lp->lwp_flags & LWP_ALTSTACK) != 0 && !oonstack && 235 SIGISMEMBER(psp->ps_sigonstack, sig)) { 236 sp = (char *)(lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size - 237 sizeof(struct sigframe)); 238 lp->lwp_sigstk.ss_flags |= SS_ONSTACK; 239 } else { 240 /* We take red zone into account */ 241 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128; 242 } 243 244 /* Align to 16 bytes */ 245 sfp = (struct sigframe *)((intptr_t)sp & ~0xFUL); 246 247 /* Translate the signal is appropriate */ 248 if (p->p_sysent->sv_sigtbl) { 249 if (sig <= p->p_sysent->sv_sigsize) 250 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 251 } 252 253 /* 254 * Build the argument list for the signal handler. 255 * 256 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx) 257 */ 258 regs->tf_rdi = sig; /* argument 1 */ 259 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */ 260 261 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 262 /* 263 * Signal handler installed with SA_SIGINFO. 264 * 265 * action(signo, siginfo, ucontext) 266 */ 267 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */ 268 regs->tf_rcx = (register_t)regs->tf_err; /* argument 4 */ 269 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 270 271 /* fill siginfo structure */ 272 sf.sf_si.si_signo = sig; 273 sf.sf_si.si_code = code; 274 sf.sf_si.si_addr = (void *)regs->tf_addr; 275 } else { 276 /* 277 * Old FreeBSD-style arguments. 278 * 279 * handler (signo, code, [uc], addr) 280 */ 281 regs->tf_rsi = (register_t)code; /* argument 2 */ 282 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */ 283 sf.sf_ahu.sf_handler = catcher; 284 } 285 286 #if 0 287 /* 288 * If we're a vm86 process, we want to save the segment registers. 289 * We also change eflags to be our emulated eflags, not the actual 290 * eflags. 291 */ 292 if (regs->tf_eflags & PSL_VM) { 293 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 294 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86; 295 296 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 297 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 298 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 299 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 300 301 if (vm86->vm86_has_vme == 0) 302 sf.sf_uc.uc_mcontext.mc_eflags = 303 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 304 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 305 306 /* 307 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 308 * syscalls made by the signal handler. This just avoids 309 * wasting time for our lazy fixup of such faults. PSL_NT 310 * does nothing in vm86 mode, but vm86 programs can set it 311 * almost legitimately in probes for old cpu types. 312 */ 313 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 314 } 315 #endif 316 317 /* 318 * Save the FPU state and reinit the FP unit 319 */ 320 npxpush(&sf.sf_uc.uc_mcontext); 321 322 /* 323 * Copy the sigframe out to the user's stack. 324 */ 325 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) { 326 /* 327 * Something is wrong with the stack pointer. 328 * ...Kill the process. 329 */ 330 sigexit(lp, SIGILL); 331 } 332 333 regs->tf_rsp = (register_t)sfp; 334 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 335 336 /* 337 * i386 abi specifies that the direction flag must be cleared 338 * on function entry 339 */ 340 regs->tf_rflags &= ~(PSL_T|PSL_D); 341 342 /* 343 * 64 bit mode has a code and stack selector but 344 * no data or extra selector. %fs and %gs are not 345 * stored in-context. 346 */ 347 regs->tf_cs = _ucodesel; 348 regs->tf_ss = _udatasel; 349 } 350 351 /* 352 * Sanitize the trapframe for a virtual kernel passing control to a custom 353 * VM context. Remove any items that would otherwise create a privilage 354 * issue. 355 * 356 * XXX at the moment we allow userland to set the resume flag. Is this a 357 * bad idea? 358 */ 359 int 360 cpu_sanitize_frame(struct trapframe *frame) 361 { 362 frame->tf_cs = _ucodesel; 363 frame->tf_ss = _udatasel; 364 /* XXX VM (8086) mode not supported? */ 365 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP); 366 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I; 367 368 return(0); 369 } 370 371 /* 372 * Sanitize the tls so loading the descriptor does not blow up 373 * on us. For x86_64 we don't have to do anything. 374 */ 375 int 376 cpu_sanitize_tls(struct savetls *tls) 377 { 378 return(0); 379 } 380 381 /* 382 * sigreturn(ucontext_t *sigcntxp) 383 * 384 * System call to cleanup state after a signal 385 * has been taken. Reset signal mask and 386 * stack state from context left by sendsig (above). 387 * Return to previous pc and psl as specified by 388 * context left by sendsig. Check carefully to 389 * make sure that the user has not modified the 390 * state to gain improper privileges. 391 */ 392 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 393 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 394 395 int 396 sys_sigreturn(struct sigreturn_args *uap) 397 { 398 struct lwp *lp = curthread->td_lwp; 399 struct trapframe *regs; 400 ucontext_t uc; 401 ucontext_t *ucp; 402 register_t rflags; 403 int cs; 404 int error; 405 406 /* 407 * We have to copy the information into kernel space so userland 408 * can't modify it while we are sniffing it. 409 */ 410 regs = lp->lwp_md.md_regs; 411 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 412 if (error) 413 return (error); 414 ucp = &uc; 415 rflags = ucp->uc_mcontext.mc_rflags; 416 417 /* VM (8086) mode not supported */ 418 rflags &= ~PSL_VM_UNSUPP; 419 420 #if 0 421 if (eflags & PSL_VM) { 422 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 423 struct vm86_kernel *vm86; 424 425 /* 426 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 427 * set up the vm86 area, and we can't enter vm86 mode. 428 */ 429 if (lp->lwp_thread->td_pcb->pcb_ext == 0) 430 return (EINVAL); 431 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86; 432 if (vm86->vm86_inited == 0) 433 return (EINVAL); 434 435 /* go back to user mode if both flags are set */ 436 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 437 trapsignal(lp->lwp_proc, SIGBUS, 0); 438 439 if (vm86->vm86_has_vme) { 440 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 441 (eflags & VME_USERCHANGE) | PSL_VM; 442 } else { 443 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 444 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM; 445 } 446 bcopy(&ucp.uc_mcontext.mc_gs, tf, sizeof(struct trapframe)); 447 tf->tf_eflags = eflags; 448 tf->tf_vm86_ds = tf->tf_ds; 449 tf->tf_vm86_es = tf->tf_es; 450 tf->tf_vm86_fs = tf->tf_fs; 451 tf->tf_vm86_gs = tf->tf_gs; 452 tf->tf_ds = _udatasel; 453 tf->tf_es = _udatasel; 454 #if 0 455 tf->tf_fs = _udatasel; 456 tf->tf_gs = _udatasel; 457 #endif 458 } else 459 #endif 460 { 461 /* 462 * Don't allow users to change privileged or reserved flags. 463 */ 464 /* 465 * XXX do allow users to change the privileged flag PSL_RF. 466 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 467 * should sometimes set it there too. tf_eflags is kept in 468 * the signal context during signal handling and there is no 469 * other place to remember it, so the PSL_RF bit may be 470 * corrupted by the signal handler without us knowing. 471 * Corruption of the PSL_RF bit at worst causes one more or 472 * one less debugger trap, so allowing it is fairly harmless. 473 */ 474 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { 475 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags); 476 return(EINVAL); 477 } 478 479 /* 480 * Don't allow users to load a valid privileged %cs. Let the 481 * hardware check for invalid selectors, excess privilege in 482 * other selectors, invalid %eip's and invalid %esp's. 483 */ 484 cs = ucp->uc_mcontext.mc_cs; 485 if (!CS_SECURE(cs)) { 486 kprintf("sigreturn: cs = 0x%x\n", cs); 487 trapsignal(lp, SIGBUS, T_PROTFLT); 488 return(EINVAL); 489 } 490 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe)); 491 } 492 493 /* 494 * Restore the FPU state from the frame 495 */ 496 npxpop(&ucp->uc_mcontext); 497 498 if (ucp->uc_mcontext.mc_onstack & 1) 499 lp->lwp_sigstk.ss_flags |= SS_ONSTACK; 500 else 501 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK; 502 503 lp->lwp_sigmask = ucp->uc_sigmask; 504 SIG_CANTMASK(lp->lwp_sigmask); 505 return(EJUSTRETURN); 506 } 507 508 /* 509 * cpu_idle() represents the idle LWKT. You cannot return from this function 510 * (unless you want to blow things up!). Instead we look for runnable threads 511 * and loop or halt as appropriate. Giant is not held on entry to the thread. 512 * 513 * The main loop is entered with a critical section held, we must release 514 * the critical section before doing anything else. lwkt_switch() will 515 * check for pending interrupts due to entering and exiting its own 516 * critical section. 517 * 518 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI 519 * to wake a HLTed cpu up. 520 */ 521 static int cpu_idle_hlt = 1; 522 static int cpu_idle_hltcnt; 523 static int cpu_idle_spincnt; 524 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 525 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 526 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW, 527 &cpu_idle_hltcnt, 0, "Idle loop entry halts"); 528 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW, 529 &cpu_idle_spincnt, 0, "Idle loop entry spins"); 530 531 void 532 cpu_idle(void) 533 { 534 struct thread *td = curthread; 535 struct mdglobaldata *gd = mdcpu; 536 int reqflags; 537 538 crit_exit(); 539 KKASSERT(td->td_critcount == 0); 540 cpu_enable_intr(); 541 542 for (;;) { 543 /* 544 * See if there are any LWKTs ready to go. 545 */ 546 lwkt_switch(); 547 548 /* 549 * The idle loop halts only if no threads are scheduleable 550 * and no signals have occured. 551 */ 552 if (cpu_idle_hlt && 553 (td->td_gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) { 554 splz(); 555 if ((td->td_gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) { 556 #ifdef DEBUGIDLE 557 struct timeval tv1, tv2; 558 gettimeofday(&tv1, NULL); 559 #endif 560 reqflags = gd->mi.gd_reqflags & 561 ~RQF_IDLECHECK_WK_MASK; 562 KKASSERT(gd->mi.gd_processing_ipiq == 0); 563 umtx_sleep(&gd->mi.gd_reqflags, reqflags, 564 1000000); 565 #ifdef DEBUGIDLE 566 gettimeofday(&tv2, NULL); 567 if (tv2.tv_usec - tv1.tv_usec + 568 (tv2.tv_sec - tv1.tv_sec) * 1000000 569 > 500000) { 570 kprintf("cpu %d idlelock %08x %08x\n", 571 gd->mi.gd_cpuid, 572 gd->mi.gd_reqflags, 573 gd->gd_fpending); 574 } 575 #endif 576 } 577 ++cpu_idle_hltcnt; 578 } else { 579 splz(); 580 __asm __volatile("pause"); 581 ++cpu_idle_spincnt; 582 } 583 } 584 } 585 586 /* 587 * Called by the spinlock code with or without a critical section held 588 * when a spinlock is found to be seriously constested. 589 * 590 * We need to enter a critical section to prevent signals from recursing 591 * into pthreads. 592 */ 593 void 594 cpu_spinlock_contested(void) 595 { 596 cpu_pause(); 597 } 598 599 /* 600 * Clear registers on exec 601 */ 602 void 603 exec_setregs(u_long entry, u_long stack, u_long ps_strings) 604 { 605 struct thread *td = curthread; 606 struct lwp *lp = td->td_lwp; 607 struct pcb *pcb = td->td_pcb; 608 struct trapframe *regs = lp->lwp_md.md_regs; 609 610 /* was i386_user_cleanup() in NetBSD */ 611 user_ldt_free(pcb); 612 613 bzero((char *)regs, sizeof(struct trapframe)); 614 regs->tf_rip = entry; 615 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */ 616 regs->tf_rdi = stack; /* argv */ 617 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 618 regs->tf_ss = _udatasel; 619 regs->tf_cs = _ucodesel; 620 regs->tf_rbx = ps_strings; 621 622 /* 623 * Reset the hardware debug registers if they were in use. 624 * They won't have any meaning for the newly exec'd process. 625 */ 626 if (pcb->pcb_flags & PCB_DBREGS) { 627 pcb->pcb_dr0 = 0; 628 pcb->pcb_dr1 = 0; 629 pcb->pcb_dr2 = 0; 630 pcb->pcb_dr3 = 0; 631 pcb->pcb_dr6 = 0; 632 pcb->pcb_dr7 = 0; /* JG set bit 10? */ 633 if (pcb == td->td_pcb) { 634 /* 635 * Clear the debug registers on the running 636 * CPU, otherwise they will end up affecting 637 * the next process we switch to. 638 */ 639 reset_dbregs(); 640 } 641 pcb->pcb_flags &= ~PCB_DBREGS; 642 } 643 644 /* 645 * Initialize the math emulator (if any) for the current process. 646 * Actually, just clear the bit that says that the emulator has 647 * been initialized. Initialization is delayed until the process 648 * traps to the emulator (if it is done at all) mainly because 649 * emulators don't provide an entry point for initialization. 650 */ 651 pcb->pcb_flags &= ~FP_SOFTFP; 652 653 /* 654 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing 655 * gd_npxthread. Otherwise a preemptive interrupt thread 656 * may panic in npxdna(). 657 */ 658 crit_enter(); 659 #if 0 660 load_cr0(rcr0() | CR0_MP); 661 #endif 662 663 /* 664 * NOTE: The MSR values must be correct so we can return to 665 * userland. gd_user_fs/gs must be correct so the switch 666 * code knows what the current MSR values are. 667 */ 668 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */ 669 pcb->pcb_gsbase = 0; 670 /* Initialize the npx (if any) for the current process. */ 671 npxinit(__INITIAL_FPUCW__); 672 crit_exit(); 673 674 /* 675 * note: linux emulator needs edx to be 0x0 on entry, which is 676 * handled in execve simply by setting the 64 bit syscall 677 * return value to 0. 678 */ 679 } 680 681 void 682 cpu_setregs(void) 683 { 684 #if 0 685 unsigned int cr0; 686 687 cr0 = rcr0(); 688 cr0 |= CR0_NE; /* Done by npxinit() */ 689 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ 690 cr0 |= CR0_WP | CR0_AM; 691 load_cr0(cr0); 692 load_gs(_udatasel); 693 #endif 694 } 695 696 static int 697 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 698 { 699 int error; 700 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 701 req); 702 if (!error && req->newptr) 703 resettodr(); 704 return (error); 705 } 706 707 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 708 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 709 710 extern u_long bootdev; /* not a cdev_t - encoding is different */ 711 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev, 712 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)"); 713 714 /* 715 * Initialize 386 and configure to run kernel 716 */ 717 718 /* 719 * Initialize segments & interrupt table 720 */ 721 722 extern struct user *proc0paddr; 723 724 #if 0 725 726 extern inthand_t 727 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 728 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 729 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 730 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 731 IDTVEC(xmm), IDTVEC(dblfault), 732 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 733 #endif 734 735 #ifdef DEBUG_INTERRUPTS 736 extern inthand_t *Xrsvdary[256]; 737 #endif 738 739 int 740 ptrace_set_pc(struct lwp *lp, unsigned long addr) 741 { 742 lp->lwp_md.md_regs->tf_rip = addr; 743 return (0); 744 } 745 746 int 747 ptrace_single_step(struct lwp *lp) 748 { 749 lp->lwp_md.md_regs->tf_rflags |= PSL_T; 750 return (0); 751 } 752 753 int 754 fill_regs(struct lwp *lp, struct reg *regs) 755 { 756 struct trapframe *tp; 757 758 if ((tp = lp->lwp_md.md_regs) == NULL) 759 return EINVAL; 760 bcopy(&tp->tf_rdi, ®s->r_rdi, sizeof(*regs)); 761 return (0); 762 } 763 764 int 765 set_regs(struct lwp *lp, struct reg *regs) 766 { 767 struct trapframe *tp; 768 769 tp = lp->lwp_md.md_regs; 770 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) || 771 !CS_SECURE(regs->r_cs)) 772 return (EINVAL); 773 bcopy(®s->r_rdi, &tp->tf_rdi, sizeof(*regs)); 774 return (0); 775 } 776 777 #ifndef CPU_DISABLE_SSE 778 static void 779 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87) 780 { 781 struct env87 *penv_87 = &sv_87->sv_env; 782 struct envxmm *penv_xmm = &sv_xmm->sv_env; 783 int i; 784 785 /* FPU control/status */ 786 penv_87->en_cw = penv_xmm->en_cw; 787 penv_87->en_sw = penv_xmm->en_sw; 788 penv_87->en_tw = penv_xmm->en_tw; 789 penv_87->en_fip = penv_xmm->en_fip; 790 penv_87->en_fcs = penv_xmm->en_fcs; 791 penv_87->en_opcode = penv_xmm->en_opcode; 792 penv_87->en_foo = penv_xmm->en_foo; 793 penv_87->en_fos = penv_xmm->en_fos; 794 795 /* FPU registers */ 796 for (i = 0; i < 8; ++i) 797 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 798 } 799 800 static void 801 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm) 802 { 803 struct env87 *penv_87 = &sv_87->sv_env; 804 struct envxmm *penv_xmm = &sv_xmm->sv_env; 805 int i; 806 807 /* FPU control/status */ 808 penv_xmm->en_cw = penv_87->en_cw; 809 penv_xmm->en_sw = penv_87->en_sw; 810 penv_xmm->en_tw = penv_87->en_tw; 811 penv_xmm->en_fip = penv_87->en_fip; 812 penv_xmm->en_fcs = penv_87->en_fcs; 813 penv_xmm->en_opcode = penv_87->en_opcode; 814 penv_xmm->en_foo = penv_87->en_foo; 815 penv_xmm->en_fos = penv_87->en_fos; 816 817 /* FPU registers */ 818 for (i = 0; i < 8; ++i) 819 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 820 } 821 #endif /* CPU_DISABLE_SSE */ 822 823 int 824 fill_fpregs(struct lwp *lp, struct fpreg *fpregs) 825 { 826 if (lp->lwp_thread == NULL || lp->lwp_thread->td_pcb == NULL) 827 return EINVAL; 828 #ifndef CPU_DISABLE_SSE 829 if (cpu_fxsr) { 830 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm, 831 (struct save87 *)fpregs); 832 return (0); 833 } 834 #endif /* CPU_DISABLE_SSE */ 835 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs); 836 return (0); 837 } 838 839 int 840 set_fpregs(struct lwp *lp, struct fpreg *fpregs) 841 { 842 #ifndef CPU_DISABLE_SSE 843 if (cpu_fxsr) { 844 set_fpregs_xmm((struct save87 *)fpregs, 845 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm); 846 return (0); 847 } 848 #endif /* CPU_DISABLE_SSE */ 849 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs); 850 return (0); 851 } 852 853 int 854 fill_dbregs(struct lwp *lp, struct dbreg *dbregs) 855 { 856 return (ENOSYS); 857 } 858 859 int 860 set_dbregs(struct lwp *lp, struct dbreg *dbregs) 861 { 862 return (ENOSYS); 863 } 864 865 #if 0 866 /* 867 * Return > 0 if a hardware breakpoint has been hit, and the 868 * breakpoint was in user space. Return 0, otherwise. 869 */ 870 int 871 user_dbreg_trap(void) 872 { 873 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */ 874 u_int32_t bp; /* breakpoint bits extracted from dr6 */ 875 int nbp; /* number of breakpoints that triggered */ 876 caddr_t addr[4]; /* breakpoint addresses */ 877 int i; 878 879 dr7 = rdr7(); 880 if ((dr7 & 0x000000ff) == 0) { 881 /* 882 * all GE and LE bits in the dr7 register are zero, 883 * thus the trap couldn't have been caused by the 884 * hardware debug registers 885 */ 886 return 0; 887 } 888 889 nbp = 0; 890 dr6 = rdr6(); 891 bp = dr6 & 0x0000000f; 892 893 if (!bp) { 894 /* 895 * None of the breakpoint bits are set meaning this 896 * trap was not caused by any of the debug registers 897 */ 898 return 0; 899 } 900 901 /* 902 * at least one of the breakpoints were hit, check to see 903 * which ones and if any of them are user space addresses 904 */ 905 906 if (bp & 0x01) { 907 addr[nbp++] = (caddr_t)rdr0(); 908 } 909 if (bp & 0x02) { 910 addr[nbp++] = (caddr_t)rdr1(); 911 } 912 if (bp & 0x04) { 913 addr[nbp++] = (caddr_t)rdr2(); 914 } 915 if (bp & 0x08) { 916 addr[nbp++] = (caddr_t)rdr3(); 917 } 918 919 for (i=0; i<nbp; i++) { 920 if (addr[i] < 921 (caddr_t)VM_MAX_USER_ADDRESS) { 922 /* 923 * addr[i] is in user space 924 */ 925 return nbp; 926 } 927 } 928 929 /* 930 * None of the breakpoints are in user space. 931 */ 932 return 0; 933 } 934 935 #endif 936 937 void 938 identcpu(void) 939 { 940 int regs[4]; 941 942 do_cpuid(1, regs); 943 cpu_feature = regs[3]; 944 } 945 946 947 #ifndef DDB 948 void 949 Debugger(const char *msg) 950 { 951 kprintf("Debugger(\"%s\") called.\n", msg); 952 } 953 #endif /* no DDB */ 954