1 /*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (C) 1994, David Greenman 4 * Copyright (c) 1982, 1987, 1990, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 39 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $ 40 */ 41 42 #include "opt_ddb.h" 43 #include "opt_inet.h" 44 #include "opt_msgbuf.h" 45 #include "opt_swap.h" 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/sysproto.h> 50 #include <sys/signalvar.h> 51 #include <sys/kernel.h> 52 #include <sys/linker.h> 53 #include <sys/malloc.h> 54 #include <sys/proc.h> 55 #include <sys/buf.h> 56 #include <sys/reboot.h> 57 #include <sys/mbuf.h> 58 #include <sys/msgbuf.h> 59 #include <sys/sysent.h> 60 #include <sys/sysctl.h> 61 #include <sys/vmmeter.h> 62 #include <sys/bus.h> 63 #include <sys/usched.h> 64 #include <sys/reg.h> 65 66 #include <vm/vm.h> 67 #include <vm/vm_param.h> 68 #include <sys/lock.h> 69 #include <vm/vm_kern.h> 70 #include <vm/vm_object.h> 71 #include <vm/vm_page.h> 72 #include <vm/vm_map.h> 73 #include <vm/vm_pager.h> 74 #include <vm/vm_extern.h> 75 76 #include <sys/thread2.h> 77 #include <sys/mplock2.h> 78 79 #include <sys/exec.h> 80 #include <sys/cons.h> 81 82 #include <ddb/ddb.h> 83 84 #include <machine/cpu.h> 85 #include <machine/clock.h> 86 #include <machine/specialreg.h> 87 #include <machine/md_var.h> 88 #include <machine/pcb.h> 89 #include <machine/pcb_ext.h> 90 #include <machine/globaldata.h> /* CPU_prvspace */ 91 #include <machine/smp.h> 92 #include <machine/cputypes.h> 93 94 #include <bus/isa/rtc.h> 95 #include <sys/random.h> 96 #include <sys/ptrace.h> 97 #include <machine/sigframe.h> 98 #include <unistd.h> /* umtx_* functions */ 99 100 extern void dblfault_handler (void); 101 102 static void set_fpregs_xmm (struct save87 *, struct savexmm *); 103 static void fill_fpregs_xmm (struct savexmm *, struct save87 *); 104 105 int64_t tsc_offsets[MAXCPU]; 106 107 #if defined(SWTCH_OPTIM_STATS) 108 extern int swtch_optim_stats; 109 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats, 110 CTLFLAG_RD, &swtch_optim_stats, 0, ""); 111 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count, 112 CTLFLAG_RD, &tlb_flush_count, 0, ""); 113 #endif 114 115 static int 116 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS) 117 { 118 u_long pmem = ctob(physmem); 119 int error; 120 121 error = sysctl_handle_long(oidp, &pmem, 0, req); 122 123 return (error); 124 } 125 126 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD, 127 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)"); 128 129 static int 130 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS) 131 { 132 u_long usermem = ctob(Maxmem - vmstats.v_wire_count); 133 int error; 134 135 error = sysctl_handle_long(oidp, &usermem, 0, req); 136 137 return (error); 138 } 139 140 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_ULONG|CTLFLAG_RD, 141 0, 0, sysctl_hw_usermem, "LU", ""); 142 143 SYSCTL_ULONG(_hw, OID_AUTO, availpages, CTLFLAG_RD, &Maxmem, 0, ""); 144 145 /* 146 * Send an interrupt to process. 147 * 148 * Stack is set up to allow sigcode stored 149 * at top to call routine, followed by kcall 150 * to sigreturn routine below. After sigreturn 151 * resets the signal mask, the stack, and the 152 * frame pointer, it returns to the user 153 * specified pc, psl. 154 */ 155 void 156 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code) 157 { 158 struct lwp *lp = curthread->td_lwp; 159 struct proc *p = lp->lwp_proc; 160 struct trapframe *regs; 161 struct sigacts *psp = p->p_sigacts; 162 struct sigframe sf, *sfp; 163 int oonstack; 164 char *sp; 165 166 regs = lp->lwp_md.md_regs; 167 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0; 168 169 /* Save user context */ 170 bzero(&sf, sizeof(struct sigframe)); 171 sf.sf_uc.uc_sigmask = *mask; 172 sf.sf_uc.uc_stack = lp->lwp_sigstk; 173 sf.sf_uc.uc_mcontext.mc_onstack = oonstack; 174 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0); 175 /* gcc8 craps out on -Warray-bounds w/ optimized bcopy */ 176 _bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe)); 177 178 /* Make the size of the saved context visible to userland */ 179 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); 180 181 /* Allocate and validate space for the signal handler context. */ 182 if ((lp->lwp_flags & LWP_ALTSTACK) != 0 && !oonstack && 183 SIGISMEMBER(psp->ps_sigonstack, sig)) { 184 sp = (char *)lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size - 185 sizeof(struct sigframe); 186 lp->lwp_sigstk.ss_flags |= SS_ONSTACK; 187 } else { 188 /* We take red zone into account */ 189 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128; 190 } 191 192 /* Align to 16 bytes */ 193 sfp = (struct sigframe *)((intptr_t)sp & ~0xFUL); 194 195 /* Translate the signal is appropriate */ 196 if (p->p_sysent->sv_sigtbl) { 197 if (sig <= p->p_sysent->sv_sigsize) 198 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 199 } 200 201 /* 202 * Build the argument list for the signal handler. 203 * 204 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx) 205 */ 206 regs->tf_rdi = sig; /* argument 1 */ 207 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */ 208 209 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 210 /* 211 * Signal handler installed with SA_SIGINFO. 212 * 213 * action(signo, siginfo, ucontext) 214 */ 215 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */ 216 regs->tf_rcx = (register_t)regs->tf_err; /* argument 4 */ 217 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 218 219 /* fill siginfo structure */ 220 sf.sf_si.si_signo = sig; 221 sf.sf_si.si_pid = psp->ps_frominfo[sig].pid; 222 sf.sf_si.si_uid = psp->ps_frominfo[sig].uid; 223 sf.sf_si.si_code = code; 224 sf.sf_si.si_addr = (void *)regs->tf_addr; 225 } else { 226 /* 227 * Old FreeBSD-style arguments. 228 * 229 * handler (signo, code, [uc], addr) 230 */ 231 regs->tf_rsi = (register_t)code; /* argument 2 */ 232 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */ 233 sf.sf_ahu.sf_handler = catcher; 234 } 235 236 #if 0 237 /* 238 * If we're a vm86 process, we want to save the segment registers. 239 * We also change eflags to be our emulated eflags, not the actual 240 * eflags. 241 */ 242 if (regs->tf_eflags & PSL_VM) { 243 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 244 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86; 245 246 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 247 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 248 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 249 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 250 251 if (vm86->vm86_has_vme == 0) 252 sf.sf_uc.uc_mcontext.mc_eflags = 253 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 254 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 255 256 /* 257 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 258 * syscalls made by the signal handler. This just avoids 259 * wasting time for our lazy fixup of such faults. PSL_NT 260 * does nothing in vm86 mode, but vm86 programs can set it 261 * almost legitimately in probes for old cpu types. 262 */ 263 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 264 } 265 #endif 266 267 /* 268 * Save the FPU state and reinit the FP unit 269 */ 270 npxpush(&sf.sf_uc.uc_mcontext); 271 272 /* 273 * Copy the sigframe out to the user's stack. 274 */ 275 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) { 276 /* 277 * Something is wrong with the stack pointer. 278 * ...Kill the process. 279 */ 280 sigexit(lp, SIGILL); 281 } 282 283 regs->tf_rsp = (register_t)sfp; 284 regs->tf_rip = trunc_page64(PS_STRINGS - *(p->p_sysent->sv_szsigcode)); 285 regs->tf_rip -= SZSIGCODE_EXTRA_BYTES; 286 287 /* 288 * x86 abi specifies that the direction flag must be cleared 289 * on function entry 290 */ 291 regs->tf_rflags &= ~(PSL_T|PSL_D); 292 293 /* 294 * 64 bit mode has a code and stack selector but 295 * no data or extra selector. %fs and %gs are not 296 * stored in-context. 297 */ 298 regs->tf_cs = _ucodesel; 299 regs->tf_ss = _udatasel; 300 } 301 302 /* 303 * Sanitize the trapframe for a virtual kernel passing control to a custom 304 * VM context. Remove any items that would otherwise create a privilage 305 * issue. 306 * 307 * XXX at the moment we allow userland to set the resume flag. Is this a 308 * bad idea? 309 */ 310 int 311 cpu_sanitize_frame(struct trapframe *frame) 312 { 313 frame->tf_cs = _ucodesel; 314 frame->tf_ss = _udatasel; 315 /* XXX VM (8086) mode not supported? */ 316 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP); 317 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I; 318 319 return(0); 320 } 321 322 /* 323 * Sanitize the tls so loading the descriptor does not blow up 324 * on us. For x86_64 we don't have to do anything. 325 */ 326 int 327 cpu_sanitize_tls(struct savetls *tls) 328 { 329 return(0); 330 } 331 332 /* 333 * sigreturn(ucontext_t *sigcntxp) 334 * 335 * System call to cleanup state after a signal 336 * has been taken. Reset signal mask and 337 * stack state from context left by sendsig (above). 338 * Return to previous pc and psl as specified by 339 * context left by sendsig. Check carefully to 340 * make sure that the user has not modified the 341 * state to gain improper privileges. 342 */ 343 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 344 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 345 346 int 347 sys_sigreturn(struct sigreturn_args *uap) 348 { 349 struct lwp *lp = curthread->td_lwp; 350 struct trapframe *regs; 351 ucontext_t uc; 352 ucontext_t *ucp; 353 register_t rflags; 354 int cs; 355 int error; 356 357 /* 358 * We have to copy the information into kernel space so userland 359 * can't modify it while we are sniffing it. 360 */ 361 regs = lp->lwp_md.md_regs; 362 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 363 if (error) 364 return (error); 365 ucp = &uc; 366 rflags = ucp->uc_mcontext.mc_rflags; 367 368 /* VM (8086) mode not supported */ 369 rflags &= ~PSL_VM_UNSUPP; 370 371 #if 0 372 if (eflags & PSL_VM) { 373 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 374 struct vm86_kernel *vm86; 375 376 /* 377 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 378 * set up the vm86 area, and we can't enter vm86 mode. 379 */ 380 if (lp->lwp_thread->td_pcb->pcb_ext == 0) 381 return (EINVAL); 382 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86; 383 if (vm86->vm86_inited == 0) 384 return (EINVAL); 385 386 /* go back to user mode if both flags are set */ 387 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 388 trapsignal(lp->lwp_proc, SIGBUS, 0); 389 390 if (vm86->vm86_has_vme) { 391 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 392 (eflags & VME_USERCHANGE) | PSL_VM; 393 } else { 394 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 395 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM; 396 } 397 bcopy(&ucp.uc_mcontext.mc_gs, tf, sizeof(struct trapframe)); 398 tf->tf_eflags = eflags; 399 tf->tf_vm86_ds = tf->tf_ds; 400 tf->tf_vm86_es = tf->tf_es; 401 tf->tf_vm86_fs = tf->tf_fs; 402 tf->tf_vm86_gs = tf->tf_gs; 403 tf->tf_ds = _udatasel; 404 tf->tf_es = _udatasel; 405 #if 0 406 tf->tf_fs = _udatasel; 407 tf->tf_gs = _udatasel; 408 #endif 409 } else 410 #endif 411 { 412 /* 413 * Don't allow users to change privileged or reserved flags. 414 */ 415 /* 416 * XXX do allow users to change the privileged flag PSL_RF. 417 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 418 * should sometimes set it there too. tf_eflags is kept in 419 * the signal context during signal handling and there is no 420 * other place to remember it, so the PSL_RF bit may be 421 * corrupted by the signal handler without us knowing. 422 * Corruption of the PSL_RF bit at worst causes one more or 423 * one less debugger trap, so allowing it is fairly harmless. 424 */ 425 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { 426 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags); 427 return(EINVAL); 428 } 429 430 /* 431 * Don't allow users to load a valid privileged %cs. Let the 432 * hardware check for invalid selectors, excess privilege in 433 * other selectors, invalid %eip's and invalid %esp's. 434 */ 435 cs = ucp->uc_mcontext.mc_cs; 436 if (!CS_SECURE(cs)) { 437 kprintf("sigreturn: cs = 0x%x\n", cs); 438 trapsignal(lp, SIGBUS, T_PROTFLT); 439 return(EINVAL); 440 } 441 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe)); 442 } 443 444 /* 445 * Restore the FPU state from the frame 446 */ 447 npxpop(&ucp->uc_mcontext); 448 449 if (ucp->uc_mcontext.mc_onstack & 1) 450 lp->lwp_sigstk.ss_flags |= SS_ONSTACK; 451 else 452 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK; 453 454 lp->lwp_sigmask = ucp->uc_sigmask; 455 SIG_CANTMASK(lp->lwp_sigmask); 456 return(EJUSTRETURN); 457 } 458 459 /* 460 * cpu_idle() represents the idle LWKT. You cannot return from this function 461 * (unless you want to blow things up!). Instead we look for runnable threads 462 * and loop or halt as appropriate. Giant is not held on entry to the thread. 463 * 464 * The main loop is entered with a critical section held, we must release 465 * the critical section before doing anything else. lwkt_switch() will 466 * check for pending interrupts due to entering and exiting its own 467 * critical section. 468 * 469 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI 470 * to wake a HLTed cpu up. 471 */ 472 __read_mostly static int cpu_idle_hlt = 1; 473 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 474 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 475 476 void 477 cpu_idle(void) 478 { 479 struct thread *td = curthread; 480 struct mdglobaldata *gd = mdcpu; 481 int reqflags; 482 483 crit_exit(); 484 KKASSERT(td->td_critcount == 0); 485 cpu_enable_intr(); 486 487 for (;;) { 488 /* 489 * See if there are any LWKTs ready to go. 490 */ 491 lwkt_switch(); 492 493 /* 494 * The idle loop halts only if no threads are scheduleable 495 * and no signals have occured. 496 */ 497 if (cpu_idle_hlt && 498 (td->td_gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) { 499 splz(); 500 if ((td->td_gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) { 501 #ifdef DEBUGIDLE 502 struct timeval tv1, tv2; 503 gettimeofday(&tv1, NULL); 504 #endif 505 reqflags = gd->mi.gd_reqflags & 506 ~RQF_IDLECHECK_WK_MASK; 507 KKASSERT(gd->mi.gd_processing_ipiq == 0); 508 umtx_sleep(&gd->mi.gd_reqflags, reqflags, 509 1000000); 510 #ifdef DEBUGIDLE 511 gettimeofday(&tv2, NULL); 512 if (tv2.tv_usec - tv1.tv_usec + 513 (tv2.tv_sec - tv1.tv_sec) * 1000000 514 > 500000) { 515 kprintf("cpu %d idlelock %08x %08x\n", 516 gd->mi.gd_cpuid, 517 gd->mi.gd_reqflags, 518 gd->gd_fpending); 519 } 520 #endif 521 } 522 } else { 523 splz(); 524 __asm __volatile("pause"); 525 } 526 } 527 } 528 529 /* 530 * Called by the spinlock code with or without a critical section held 531 * when a spinlock is found to be seriously constested. 532 * 533 * We need to enter a critical section to prevent signals from recursing 534 * into pthreads. 535 */ 536 void 537 cpu_spinlock_contested(void) 538 { 539 cpu_pause(); 540 } 541 542 /* 543 * Clear registers on exec 544 */ 545 void 546 exec_setregs(u_long entry, u_long stack, u_long ps_strings) 547 { 548 struct thread *td = curthread; 549 struct lwp *lp = td->td_lwp; 550 struct pcb *pcb = td->td_pcb; 551 struct trapframe *regs = lp->lwp_md.md_regs; 552 553 user_ldt_free(pcb); 554 555 bzero((char *)regs, sizeof(struct trapframe)); 556 regs->tf_rip = entry; 557 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */ 558 regs->tf_rdi = stack; /* argv */ 559 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 560 regs->tf_ss = _udatasel; 561 regs->tf_cs = _ucodesel; 562 regs->tf_rbx = ps_strings; 563 564 /* 565 * Reset the hardware debug registers if they were in use. 566 * They won't have any meaning for the newly exec'd process. 567 */ 568 if (pcb->pcb_flags & PCB_DBREGS) { 569 pcb->pcb_dr0 = 0; 570 pcb->pcb_dr1 = 0; 571 pcb->pcb_dr2 = 0; 572 pcb->pcb_dr3 = 0; 573 pcb->pcb_dr6 = 0; 574 pcb->pcb_dr7 = 0; /* JG set bit 10? */ 575 if (pcb == td->td_pcb) { 576 /* 577 * Clear the debug registers on the running 578 * CPU, otherwise they will end up affecting 579 * the next process we switch to. 580 */ 581 reset_dbregs(); 582 } 583 pcb->pcb_flags &= ~PCB_DBREGS; 584 } 585 586 /* 587 * Initialize the math emulator (if any) for the current process. 588 * Actually, just clear the bit that says that the emulator has 589 * been initialized. Initialization is delayed until the process 590 * traps to the emulator (if it is done at all) mainly because 591 * emulators don't provide an entry point for initialization. 592 */ 593 pcb->pcb_flags &= ~FP_SOFTFP; 594 595 /* 596 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing 597 * gd_npxthread. Otherwise a preemptive interrupt thread 598 * may panic in npxdna(). 599 */ 600 crit_enter(); 601 #if 0 602 load_cr0(rcr0() | CR0_MP); 603 #endif 604 605 /* 606 * NOTE: The MSR values must be correct so we can return to 607 * userland. gd_user_fs/gs must be correct so the switch 608 * code knows what the current MSR values are. 609 */ 610 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */ 611 pcb->pcb_gsbase = 0; 612 /* Initialize the npx (if any) for the current process. */ 613 npxinit(); 614 crit_exit(); 615 616 /* 617 * note: linux emulator needs edx to be 0x0 on entry, which is 618 * handled in execve simply by setting the 64 bit syscall 619 * return value to 0. 620 */ 621 } 622 623 void 624 cpu_setregs(void) 625 { 626 #if 0 627 unsigned int cr0; 628 629 cr0 = rcr0(); 630 cr0 |= CR0_NE; /* Done by npxinit() */ 631 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ 632 cr0 |= CR0_WP | CR0_AM; 633 load_cr0(cr0); 634 load_gs(_udatasel); 635 #endif 636 } 637 638 static int 639 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 640 { 641 int error; 642 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 643 req); 644 if (!error && req->newptr) 645 resettodr(); 646 return (error); 647 } 648 649 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 650 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 651 652 /* 653 * Initialize x86 and configure to run kernel 654 */ 655 656 /* 657 * Initialize segments & interrupt table 658 */ 659 660 extern struct user *proc0paddr; 661 662 #if 0 663 664 extern inthand_t 665 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 666 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 667 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 668 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 669 IDTVEC(xmm), IDTVEC(dblfault), 670 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 671 #endif 672 673 int 674 ptrace_set_pc(struct lwp *lp, unsigned long addr) 675 { 676 lp->lwp_md.md_regs->tf_rip = addr; 677 return (0); 678 } 679 680 int 681 ptrace_single_step(struct lwp *lp) 682 { 683 lp->lwp_md.md_regs->tf_rflags |= PSL_T; 684 return (0); 685 } 686 687 int 688 fill_regs(struct lwp *lp, struct reg *regs) 689 { 690 struct trapframe *tp; 691 692 if ((tp = lp->lwp_md.md_regs) == NULL) 693 return EINVAL; 694 bcopy(&tp->tf_rdi, ®s->r_rdi, sizeof(*regs)); 695 return (0); 696 } 697 698 int 699 set_regs(struct lwp *lp, struct reg *regs) 700 { 701 struct trapframe *tp; 702 703 tp = lp->lwp_md.md_regs; 704 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) || 705 !CS_SECURE(regs->r_cs)) 706 return (EINVAL); 707 bcopy(®s->r_rdi, &tp->tf_rdi, sizeof(*regs)); 708 return (0); 709 } 710 711 static void 712 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87) 713 { 714 struct env87 *penv_87 = &sv_87->sv_env; 715 struct envxmm *penv_xmm = &sv_xmm->sv_env; 716 int i; 717 718 /* FPU control/status */ 719 penv_87->en_cw = penv_xmm->en_cw; 720 penv_87->en_sw = penv_xmm->en_sw; 721 penv_87->en_tw = penv_xmm->en_tw; 722 penv_87->en_fip = penv_xmm->en_fip; 723 penv_87->en_fcs = penv_xmm->en_fcs; 724 penv_87->en_opcode = penv_xmm->en_opcode; 725 penv_87->en_foo = penv_xmm->en_foo; 726 penv_87->en_fos = penv_xmm->en_fos; 727 728 /* FPU registers */ 729 for (i = 0; i < 8; ++i) 730 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 731 } 732 733 static void 734 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm) 735 { 736 struct env87 *penv_87 = &sv_87->sv_env; 737 struct envxmm *penv_xmm = &sv_xmm->sv_env; 738 int i; 739 740 /* FPU control/status */ 741 penv_xmm->en_cw = penv_87->en_cw; 742 penv_xmm->en_sw = penv_87->en_sw; 743 penv_xmm->en_tw = penv_87->en_tw; 744 penv_xmm->en_fip = penv_87->en_fip; 745 penv_xmm->en_fcs = penv_87->en_fcs; 746 penv_xmm->en_opcode = penv_87->en_opcode; 747 penv_xmm->en_foo = penv_87->en_foo; 748 penv_xmm->en_fos = penv_87->en_fos; 749 750 /* FPU registers */ 751 for (i = 0; i < 8; ++i) 752 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 753 } 754 755 int 756 fill_fpregs(struct lwp *lp, struct fpreg *fpregs) 757 { 758 if (lp->lwp_thread == NULL || lp->lwp_thread->td_pcb == NULL) 759 return EINVAL; 760 if (cpu_fxsr) { 761 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm, 762 (struct save87 *)fpregs); 763 return (0); 764 } 765 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs); 766 return (0); 767 } 768 769 int 770 set_fpregs(struct lwp *lp, struct fpreg *fpregs) 771 { 772 if (cpu_fxsr) { 773 set_fpregs_xmm((struct save87 *)fpregs, 774 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm); 775 return (0); 776 } 777 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs); 778 return (0); 779 } 780 781 int 782 fill_dbregs(struct lwp *lp, struct dbreg *dbregs) 783 { 784 return (ENOSYS); 785 } 786 787 int 788 set_dbregs(struct lwp *lp, struct dbreg *dbregs) 789 { 790 return (ENOSYS); 791 } 792 793 #if 0 794 /* 795 * Return > 0 if a hardware breakpoint has been hit, and the 796 * breakpoint was in user space. Return 0, otherwise. 797 */ 798 int 799 user_dbreg_trap(void) 800 { 801 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */ 802 u_int32_t bp; /* breakpoint bits extracted from dr6 */ 803 int nbp; /* number of breakpoints that triggered */ 804 caddr_t addr[4]; /* breakpoint addresses */ 805 int i; 806 807 dr7 = rdr7(); 808 if ((dr7 & 0x000000ff) == 0) { 809 /* 810 * all GE and LE bits in the dr7 register are zero, 811 * thus the trap couldn't have been caused by the 812 * hardware debug registers 813 */ 814 return 0; 815 } 816 817 nbp = 0; 818 dr6 = rdr6(); 819 bp = dr6 & 0x0000000f; 820 821 if (!bp) { 822 /* 823 * None of the breakpoint bits are set meaning this 824 * trap was not caused by any of the debug registers 825 */ 826 return 0; 827 } 828 829 /* 830 * at least one of the breakpoints were hit, check to see 831 * which ones and if any of them are user space addresses 832 */ 833 834 if (bp & 0x01) { 835 addr[nbp++] = (caddr_t)rdr0(); 836 } 837 if (bp & 0x02) { 838 addr[nbp++] = (caddr_t)rdr1(); 839 } 840 if (bp & 0x04) { 841 addr[nbp++] = (caddr_t)rdr2(); 842 } 843 if (bp & 0x08) { 844 addr[nbp++] = (caddr_t)rdr3(); 845 } 846 847 for (i=0; i<nbp; i++) { 848 if (addr[i] < 849 (caddr_t)VM_MAX_USER_ADDRESS) { 850 /* 851 * addr[i] is in user space 852 */ 853 return nbp; 854 } 855 } 856 857 /* 858 * None of the breakpoints are in user space. 859 */ 860 return 0; 861 } 862 863 #endif 864 865 void 866 identcpu(void) 867 { 868 int regs[4]; 869 870 do_cpuid(1, regs); 871 cpu_feature = regs[3]; 872 } 873 874 875 #ifndef DDB 876 void 877 Debugger(const char *msg) 878 { 879 kprintf("Debugger(\"%s\") called.\n", msg); 880 } 881 #endif /* no DDB */ 882