1 /*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (C) 1994, David Greenman 4 * Copyright (c) 1982, 1987, 1990, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 39 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $ 40 */ 41 42 #include "opt_ddb.h" 43 #include "opt_inet.h" 44 #include "opt_msgbuf.h" 45 #include "opt_swap.h" 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/sysproto.h> 50 #include <sys/signalvar.h> 51 #include <sys/kernel.h> 52 #include <sys/linker.h> 53 #include <sys/malloc.h> 54 #include <sys/proc.h> 55 #include <sys/buf.h> 56 #include <sys/reboot.h> 57 #include <sys/mbuf.h> 58 #include <sys/msgbuf.h> 59 #include <sys/sysent.h> 60 #include <sys/sysctl.h> 61 #include <sys/vmmeter.h> 62 #include <sys/bus.h> 63 #include <sys/usched.h> 64 #include <sys/reg.h> 65 66 #include <vm/vm.h> 67 #include <vm/vm_param.h> 68 #include <sys/lock.h> 69 #include <vm/vm_kern.h> 70 #include <vm/vm_object.h> 71 #include <vm/vm_page.h> 72 #include <vm/vm_map.h> 73 #include <vm/vm_pager.h> 74 #include <vm/vm_extern.h> 75 76 #include <sys/thread2.h> 77 #include <sys/mplock2.h> 78 79 #include <sys/user.h> 80 #include <sys/exec.h> 81 #include <sys/cons.h> 82 83 #include <ddb/ddb.h> 84 85 #include <machine/cpu.h> 86 #include <machine/clock.h> 87 #include <machine/specialreg.h> 88 #include <machine/md_var.h> 89 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */ 90 #include <machine/globaldata.h> /* CPU_prvspace */ 91 #include <machine/smp.h> 92 #include <machine/cputypes.h> 93 94 #include <bus/isa/rtc.h> 95 #include <sys/random.h> 96 #include <sys/ptrace.h> 97 #include <machine/sigframe.h> 98 #include <unistd.h> /* umtx_* functions */ 99 #include <pthread.h> /* pthread_yield() */ 100 101 extern void dblfault_handler (void); 102 103 static void set_fpregs_xmm (struct save87 *, struct savexmm *); 104 static void fill_fpregs_xmm (struct savexmm *, struct save87 *); 105 106 int64_t tsc_offsets[MAXCPU]; 107 108 #if defined(SWTCH_OPTIM_STATS) 109 extern int swtch_optim_stats; 110 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats, 111 CTLFLAG_RD, &swtch_optim_stats, 0, ""); 112 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count, 113 CTLFLAG_RD, &tlb_flush_count, 0, ""); 114 #endif 115 116 static int 117 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS) 118 { 119 u_long pmem = ctob(physmem); 120 121 int error = sysctl_handle_long(oidp, &pmem, 0, req); 122 return (error); 123 } 124 125 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD, 126 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)"); 127 128 static int 129 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS) 130 { 131 /* JG */ 132 int error = sysctl_handle_int(oidp, 0, 133 ctob((int)Maxmem - vmstats.v_wire_count), req); 134 return (error); 135 } 136 137 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD, 138 0, 0, sysctl_hw_usermem, "IU", ""); 139 140 SYSCTL_ULONG(_hw, OID_AUTO, availpages, CTLFLAG_RD, &Maxmem, 0, ""); 141 142 /* 143 * Send an interrupt to process. 144 * 145 * Stack is set up to allow sigcode stored 146 * at top to call routine, followed by kcall 147 * to sigreturn routine below. After sigreturn 148 * resets the signal mask, the stack, and the 149 * frame pointer, it returns to the user 150 * specified pc, psl. 151 */ 152 void 153 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code) 154 { 155 struct lwp *lp = curthread->td_lwp; 156 struct proc *p = lp->lwp_proc; 157 struct trapframe *regs; 158 struct sigacts *psp = p->p_sigacts; 159 struct sigframe sf, *sfp; 160 int oonstack; 161 char *sp; 162 163 regs = lp->lwp_md.md_regs; 164 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0; 165 166 /* Save user context */ 167 bzero(&sf, sizeof(struct sigframe)); 168 sf.sf_uc.uc_sigmask = *mask; 169 sf.sf_uc.uc_stack = lp->lwp_sigstk; 170 sf.sf_uc.uc_mcontext.mc_onstack = oonstack; 171 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0); 172 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe)); 173 174 /* Make the size of the saved context visible to userland */ 175 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); 176 177 /* Allocate and validate space for the signal handler context. */ 178 if ((lp->lwp_flags & LWP_ALTSTACK) != 0 && !oonstack && 179 SIGISMEMBER(psp->ps_sigonstack, sig)) { 180 sp = (char *)(lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size - 181 sizeof(struct sigframe)); 182 lp->lwp_sigstk.ss_flags |= SS_ONSTACK; 183 } else { 184 /* We take red zone into account */ 185 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128; 186 } 187 188 /* Align to 16 bytes */ 189 sfp = (struct sigframe *)((intptr_t)sp & ~0xFUL); 190 191 /* Translate the signal is appropriate */ 192 if (p->p_sysent->sv_sigtbl) { 193 if (sig <= p->p_sysent->sv_sigsize) 194 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 195 } 196 197 /* 198 * Build the argument list for the signal handler. 199 * 200 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx) 201 */ 202 regs->tf_rdi = sig; /* argument 1 */ 203 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */ 204 205 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 206 /* 207 * Signal handler installed with SA_SIGINFO. 208 * 209 * action(signo, siginfo, ucontext) 210 */ 211 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */ 212 regs->tf_rcx = (register_t)regs->tf_err; /* argument 4 */ 213 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 214 215 /* fill siginfo structure */ 216 sf.sf_si.si_signo = sig; 217 sf.sf_si.si_code = code; 218 sf.sf_si.si_addr = (void *)regs->tf_addr; 219 } else { 220 /* 221 * Old FreeBSD-style arguments. 222 * 223 * handler (signo, code, [uc], addr) 224 */ 225 regs->tf_rsi = (register_t)code; /* argument 2 */ 226 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */ 227 sf.sf_ahu.sf_handler = catcher; 228 } 229 230 #if 0 231 /* 232 * If we're a vm86 process, we want to save the segment registers. 233 * We also change eflags to be our emulated eflags, not the actual 234 * eflags. 235 */ 236 if (regs->tf_eflags & PSL_VM) { 237 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 238 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86; 239 240 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 241 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 242 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 243 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 244 245 if (vm86->vm86_has_vme == 0) 246 sf.sf_uc.uc_mcontext.mc_eflags = 247 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 248 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 249 250 /* 251 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 252 * syscalls made by the signal handler. This just avoids 253 * wasting time for our lazy fixup of such faults. PSL_NT 254 * does nothing in vm86 mode, but vm86 programs can set it 255 * almost legitimately in probes for old cpu types. 256 */ 257 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 258 } 259 #endif 260 261 /* 262 * Save the FPU state and reinit the FP unit 263 */ 264 npxpush(&sf.sf_uc.uc_mcontext); 265 266 /* 267 * Copy the sigframe out to the user's stack. 268 */ 269 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) { 270 /* 271 * Something is wrong with the stack pointer. 272 * ...Kill the process. 273 */ 274 sigexit(lp, SIGILL); 275 } 276 277 regs->tf_rsp = (register_t)sfp; 278 regs->tf_rip = trunc_page64(PS_STRINGS - *(p->p_sysent->sv_szsigcode)); 279 regs->tf_rip -= SZSIGCODE_EXTRA_BYTES; 280 281 /* 282 * i386 abi specifies that the direction flag must be cleared 283 * on function entry 284 */ 285 regs->tf_rflags &= ~(PSL_T|PSL_D); 286 287 /* 288 * 64 bit mode has a code and stack selector but 289 * no data or extra selector. %fs and %gs are not 290 * stored in-context. 291 */ 292 regs->tf_cs = _ucodesel; 293 regs->tf_ss = _udatasel; 294 } 295 296 /* 297 * Sanitize the trapframe for a virtual kernel passing control to a custom 298 * VM context. Remove any items that would otherwise create a privilage 299 * issue. 300 * 301 * XXX at the moment we allow userland to set the resume flag. Is this a 302 * bad idea? 303 */ 304 int 305 cpu_sanitize_frame(struct trapframe *frame) 306 { 307 frame->tf_cs = _ucodesel; 308 frame->tf_ss = _udatasel; 309 /* XXX VM (8086) mode not supported? */ 310 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP); 311 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I; 312 313 return(0); 314 } 315 316 /* 317 * Sanitize the tls so loading the descriptor does not blow up 318 * on us. For x86_64 we don't have to do anything. 319 */ 320 int 321 cpu_sanitize_tls(struct savetls *tls) 322 { 323 return(0); 324 } 325 326 /* 327 * sigreturn(ucontext_t *sigcntxp) 328 * 329 * System call to cleanup state after a signal 330 * has been taken. Reset signal mask and 331 * stack state from context left by sendsig (above). 332 * Return to previous pc and psl as specified by 333 * context left by sendsig. Check carefully to 334 * make sure that the user has not modified the 335 * state to gain improper privileges. 336 */ 337 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 338 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 339 340 int 341 sys_sigreturn(struct sigreturn_args *uap) 342 { 343 struct lwp *lp = curthread->td_lwp; 344 struct trapframe *regs; 345 ucontext_t uc; 346 ucontext_t *ucp; 347 register_t rflags; 348 int cs; 349 int error; 350 351 /* 352 * We have to copy the information into kernel space so userland 353 * can't modify it while we are sniffing it. 354 */ 355 regs = lp->lwp_md.md_regs; 356 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 357 if (error) 358 return (error); 359 ucp = &uc; 360 rflags = ucp->uc_mcontext.mc_rflags; 361 362 /* VM (8086) mode not supported */ 363 rflags &= ~PSL_VM_UNSUPP; 364 365 #if 0 366 if (eflags & PSL_VM) { 367 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 368 struct vm86_kernel *vm86; 369 370 /* 371 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 372 * set up the vm86 area, and we can't enter vm86 mode. 373 */ 374 if (lp->lwp_thread->td_pcb->pcb_ext == 0) 375 return (EINVAL); 376 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86; 377 if (vm86->vm86_inited == 0) 378 return (EINVAL); 379 380 /* go back to user mode if both flags are set */ 381 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 382 trapsignal(lp->lwp_proc, SIGBUS, 0); 383 384 if (vm86->vm86_has_vme) { 385 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 386 (eflags & VME_USERCHANGE) | PSL_VM; 387 } else { 388 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 389 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM; 390 } 391 bcopy(&ucp.uc_mcontext.mc_gs, tf, sizeof(struct trapframe)); 392 tf->tf_eflags = eflags; 393 tf->tf_vm86_ds = tf->tf_ds; 394 tf->tf_vm86_es = tf->tf_es; 395 tf->tf_vm86_fs = tf->tf_fs; 396 tf->tf_vm86_gs = tf->tf_gs; 397 tf->tf_ds = _udatasel; 398 tf->tf_es = _udatasel; 399 #if 0 400 tf->tf_fs = _udatasel; 401 tf->tf_gs = _udatasel; 402 #endif 403 } else 404 #endif 405 { 406 /* 407 * Don't allow users to change privileged or reserved flags. 408 */ 409 /* 410 * XXX do allow users to change the privileged flag PSL_RF. 411 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 412 * should sometimes set it there too. tf_eflags is kept in 413 * the signal context during signal handling and there is no 414 * other place to remember it, so the PSL_RF bit may be 415 * corrupted by the signal handler without us knowing. 416 * Corruption of the PSL_RF bit at worst causes one more or 417 * one less debugger trap, so allowing it is fairly harmless. 418 */ 419 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { 420 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags); 421 return(EINVAL); 422 } 423 424 /* 425 * Don't allow users to load a valid privileged %cs. Let the 426 * hardware check for invalid selectors, excess privilege in 427 * other selectors, invalid %eip's and invalid %esp's. 428 */ 429 cs = ucp->uc_mcontext.mc_cs; 430 if (!CS_SECURE(cs)) { 431 kprintf("sigreturn: cs = 0x%x\n", cs); 432 trapsignal(lp, SIGBUS, T_PROTFLT); 433 return(EINVAL); 434 } 435 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe)); 436 } 437 438 /* 439 * Restore the FPU state from the frame 440 */ 441 npxpop(&ucp->uc_mcontext); 442 443 if (ucp->uc_mcontext.mc_onstack & 1) 444 lp->lwp_sigstk.ss_flags |= SS_ONSTACK; 445 else 446 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK; 447 448 lp->lwp_sigmask = ucp->uc_sigmask; 449 SIG_CANTMASK(lp->lwp_sigmask); 450 return(EJUSTRETURN); 451 } 452 453 /* 454 * cpu_idle() represents the idle LWKT. You cannot return from this function 455 * (unless you want to blow things up!). Instead we look for runnable threads 456 * and loop or halt as appropriate. Giant is not held on entry to the thread. 457 * 458 * The main loop is entered with a critical section held, we must release 459 * the critical section before doing anything else. lwkt_switch() will 460 * check for pending interrupts due to entering and exiting its own 461 * critical section. 462 * 463 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI 464 * to wake a HLTed cpu up. 465 */ 466 static int cpu_idle_hlt = 1; 467 static int cpu_idle_hltcnt; 468 static int cpu_idle_spincnt; 469 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 470 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 471 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW, 472 &cpu_idle_hltcnt, 0, "Idle loop entry halts"); 473 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW, 474 &cpu_idle_spincnt, 0, "Idle loop entry spins"); 475 476 void 477 cpu_idle(void) 478 { 479 struct thread *td = curthread; 480 struct mdglobaldata *gd = mdcpu; 481 int reqflags; 482 483 crit_exit(); 484 KKASSERT(td->td_critcount == 0); 485 cpu_enable_intr(); 486 487 for (;;) { 488 /* 489 * See if there are any LWKTs ready to go. 490 */ 491 lwkt_switch(); 492 493 /* 494 * The idle loop halts only if no threads are scheduleable 495 * and no signals have occured. 496 */ 497 if (cpu_idle_hlt && 498 (td->td_gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) { 499 splz(); 500 if ((td->td_gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) { 501 #ifdef DEBUGIDLE 502 struct timeval tv1, tv2; 503 gettimeofday(&tv1, NULL); 504 #endif 505 reqflags = gd->mi.gd_reqflags & 506 ~RQF_IDLECHECK_WK_MASK; 507 KKASSERT(gd->mi.gd_processing_ipiq == 0); 508 umtx_sleep(&gd->mi.gd_reqflags, reqflags, 509 1000000); 510 #ifdef DEBUGIDLE 511 gettimeofday(&tv2, NULL); 512 if (tv2.tv_usec - tv1.tv_usec + 513 (tv2.tv_sec - tv1.tv_sec) * 1000000 514 > 500000) { 515 kprintf("cpu %d idlelock %08x %08x\n", 516 gd->mi.gd_cpuid, 517 gd->mi.gd_reqflags, 518 gd->gd_fpending); 519 } 520 #endif 521 } 522 ++cpu_idle_hltcnt; 523 } else { 524 splz(); 525 __asm __volatile("pause"); 526 ++cpu_idle_spincnt; 527 } 528 } 529 } 530 531 /* 532 * Called by the spinlock code with or without a critical section held 533 * when a spinlock is found to be seriously constested. 534 * 535 * We need to enter a critical section to prevent signals from recursing 536 * into pthreads. 537 */ 538 void 539 cpu_spinlock_contested(void) 540 { 541 cpu_pause(); 542 } 543 544 /* 545 * Clear registers on exec 546 */ 547 void 548 exec_setregs(u_long entry, u_long stack, u_long ps_strings) 549 { 550 struct thread *td = curthread; 551 struct lwp *lp = td->td_lwp; 552 struct pcb *pcb = td->td_pcb; 553 struct trapframe *regs = lp->lwp_md.md_regs; 554 555 /* was i386_user_cleanup() in NetBSD */ 556 user_ldt_free(pcb); 557 558 bzero((char *)regs, sizeof(struct trapframe)); 559 regs->tf_rip = entry; 560 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */ 561 regs->tf_rdi = stack; /* argv */ 562 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 563 regs->tf_ss = _udatasel; 564 regs->tf_cs = _ucodesel; 565 regs->tf_rbx = ps_strings; 566 567 /* 568 * Reset the hardware debug registers if they were in use. 569 * They won't have any meaning for the newly exec'd process. 570 */ 571 if (pcb->pcb_flags & PCB_DBREGS) { 572 pcb->pcb_dr0 = 0; 573 pcb->pcb_dr1 = 0; 574 pcb->pcb_dr2 = 0; 575 pcb->pcb_dr3 = 0; 576 pcb->pcb_dr6 = 0; 577 pcb->pcb_dr7 = 0; /* JG set bit 10? */ 578 if (pcb == td->td_pcb) { 579 /* 580 * Clear the debug registers on the running 581 * CPU, otherwise they will end up affecting 582 * the next process we switch to. 583 */ 584 reset_dbregs(); 585 } 586 pcb->pcb_flags &= ~PCB_DBREGS; 587 } 588 589 /* 590 * Initialize the math emulator (if any) for the current process. 591 * Actually, just clear the bit that says that the emulator has 592 * been initialized. Initialization is delayed until the process 593 * traps to the emulator (if it is done at all) mainly because 594 * emulators don't provide an entry point for initialization. 595 */ 596 pcb->pcb_flags &= ~FP_SOFTFP; 597 598 /* 599 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing 600 * gd_npxthread. Otherwise a preemptive interrupt thread 601 * may panic in npxdna(). 602 */ 603 crit_enter(); 604 #if 0 605 load_cr0(rcr0() | CR0_MP); 606 #endif 607 608 /* 609 * NOTE: The MSR values must be correct so we can return to 610 * userland. gd_user_fs/gs must be correct so the switch 611 * code knows what the current MSR values are. 612 */ 613 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */ 614 pcb->pcb_gsbase = 0; 615 /* Initialize the npx (if any) for the current process. */ 616 npxinit(); 617 crit_exit(); 618 619 /* 620 * note: linux emulator needs edx to be 0x0 on entry, which is 621 * handled in execve simply by setting the 64 bit syscall 622 * return value to 0. 623 */ 624 } 625 626 void 627 cpu_setregs(void) 628 { 629 #if 0 630 unsigned int cr0; 631 632 cr0 = rcr0(); 633 cr0 |= CR0_NE; /* Done by npxinit() */ 634 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ 635 cr0 |= CR0_WP | CR0_AM; 636 load_cr0(cr0); 637 load_gs(_udatasel); 638 #endif 639 } 640 641 static int 642 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 643 { 644 int error; 645 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 646 req); 647 if (!error && req->newptr) 648 resettodr(); 649 return (error); 650 } 651 652 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 653 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 654 655 extern u_long bootdev; /* not a cdev_t - encoding is different */ 656 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev, 657 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)"); 658 659 /* 660 * Initialize 386 and configure to run kernel 661 */ 662 663 /* 664 * Initialize segments & interrupt table 665 */ 666 667 extern struct user *proc0paddr; 668 669 #if 0 670 671 extern inthand_t 672 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 673 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 674 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 675 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 676 IDTVEC(xmm), IDTVEC(dblfault), 677 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 678 #endif 679 680 int 681 ptrace_set_pc(struct lwp *lp, unsigned long addr) 682 { 683 lp->lwp_md.md_regs->tf_rip = addr; 684 return (0); 685 } 686 687 int 688 ptrace_single_step(struct lwp *lp) 689 { 690 lp->lwp_md.md_regs->tf_rflags |= PSL_T; 691 return (0); 692 } 693 694 int 695 fill_regs(struct lwp *lp, struct reg *regs) 696 { 697 struct trapframe *tp; 698 699 if ((tp = lp->lwp_md.md_regs) == NULL) 700 return EINVAL; 701 bcopy(&tp->tf_rdi, ®s->r_rdi, sizeof(*regs)); 702 return (0); 703 } 704 705 int 706 set_regs(struct lwp *lp, struct reg *regs) 707 { 708 struct trapframe *tp; 709 710 tp = lp->lwp_md.md_regs; 711 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) || 712 !CS_SECURE(regs->r_cs)) 713 return (EINVAL); 714 bcopy(®s->r_rdi, &tp->tf_rdi, sizeof(*regs)); 715 return (0); 716 } 717 718 static void 719 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87) 720 { 721 struct env87 *penv_87 = &sv_87->sv_env; 722 struct envxmm *penv_xmm = &sv_xmm->sv_env; 723 int i; 724 725 /* FPU control/status */ 726 penv_87->en_cw = penv_xmm->en_cw; 727 penv_87->en_sw = penv_xmm->en_sw; 728 penv_87->en_tw = penv_xmm->en_tw; 729 penv_87->en_fip = penv_xmm->en_fip; 730 penv_87->en_fcs = penv_xmm->en_fcs; 731 penv_87->en_opcode = penv_xmm->en_opcode; 732 penv_87->en_foo = penv_xmm->en_foo; 733 penv_87->en_fos = penv_xmm->en_fos; 734 735 /* FPU registers */ 736 for (i = 0; i < 8; ++i) 737 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 738 } 739 740 static void 741 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm) 742 { 743 struct env87 *penv_87 = &sv_87->sv_env; 744 struct envxmm *penv_xmm = &sv_xmm->sv_env; 745 int i; 746 747 /* FPU control/status */ 748 penv_xmm->en_cw = penv_87->en_cw; 749 penv_xmm->en_sw = penv_87->en_sw; 750 penv_xmm->en_tw = penv_87->en_tw; 751 penv_xmm->en_fip = penv_87->en_fip; 752 penv_xmm->en_fcs = penv_87->en_fcs; 753 penv_xmm->en_opcode = penv_87->en_opcode; 754 penv_xmm->en_foo = penv_87->en_foo; 755 penv_xmm->en_fos = penv_87->en_fos; 756 757 /* FPU registers */ 758 for (i = 0; i < 8; ++i) 759 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 760 } 761 762 int 763 fill_fpregs(struct lwp *lp, struct fpreg *fpregs) 764 { 765 if (lp->lwp_thread == NULL || lp->lwp_thread->td_pcb == NULL) 766 return EINVAL; 767 if (cpu_fxsr) { 768 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm, 769 (struct save87 *)fpregs); 770 return (0); 771 } 772 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs); 773 return (0); 774 } 775 776 int 777 set_fpregs(struct lwp *lp, struct fpreg *fpregs) 778 { 779 if (cpu_fxsr) { 780 set_fpregs_xmm((struct save87 *)fpregs, 781 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm); 782 return (0); 783 } 784 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs); 785 return (0); 786 } 787 788 int 789 fill_dbregs(struct lwp *lp, struct dbreg *dbregs) 790 { 791 return (ENOSYS); 792 } 793 794 int 795 set_dbregs(struct lwp *lp, struct dbreg *dbregs) 796 { 797 return (ENOSYS); 798 } 799 800 #if 0 801 /* 802 * Return > 0 if a hardware breakpoint has been hit, and the 803 * breakpoint was in user space. Return 0, otherwise. 804 */ 805 int 806 user_dbreg_trap(void) 807 { 808 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */ 809 u_int32_t bp; /* breakpoint bits extracted from dr6 */ 810 int nbp; /* number of breakpoints that triggered */ 811 caddr_t addr[4]; /* breakpoint addresses */ 812 int i; 813 814 dr7 = rdr7(); 815 if ((dr7 & 0x000000ff) == 0) { 816 /* 817 * all GE and LE bits in the dr7 register are zero, 818 * thus the trap couldn't have been caused by the 819 * hardware debug registers 820 */ 821 return 0; 822 } 823 824 nbp = 0; 825 dr6 = rdr6(); 826 bp = dr6 & 0x0000000f; 827 828 if (!bp) { 829 /* 830 * None of the breakpoint bits are set meaning this 831 * trap was not caused by any of the debug registers 832 */ 833 return 0; 834 } 835 836 /* 837 * at least one of the breakpoints were hit, check to see 838 * which ones and if any of them are user space addresses 839 */ 840 841 if (bp & 0x01) { 842 addr[nbp++] = (caddr_t)rdr0(); 843 } 844 if (bp & 0x02) { 845 addr[nbp++] = (caddr_t)rdr1(); 846 } 847 if (bp & 0x04) { 848 addr[nbp++] = (caddr_t)rdr2(); 849 } 850 if (bp & 0x08) { 851 addr[nbp++] = (caddr_t)rdr3(); 852 } 853 854 for (i=0; i<nbp; i++) { 855 if (addr[i] < 856 (caddr_t)VM_MAX_USER_ADDRESS) { 857 /* 858 * addr[i] is in user space 859 */ 860 return nbp; 861 } 862 } 863 864 /* 865 * None of the breakpoints are in user space. 866 */ 867 return 0; 868 } 869 870 #endif 871 872 void 873 identcpu(void) 874 { 875 int regs[4]; 876 877 do_cpuid(1, regs); 878 cpu_feature = regs[3]; 879 } 880 881 882 #ifndef DDB 883 void 884 Debugger(const char *msg) 885 { 886 kprintf("Debugger(\"%s\") called.\n", msg); 887 } 888 #endif /* no DDB */ 889