1 /*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (C) 1994, David Greenman 4 * Copyright (c) 1982, 1987, 1990, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 39 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $ 40 */ 41 42 #include "opt_ddb.h" 43 #include "opt_inet.h" 44 #include "opt_msgbuf.h" 45 #include "opt_swap.h" 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/sysproto.h> 50 #include <sys/signalvar.h> 51 #include <sys/kernel.h> 52 #include <sys/linker.h> 53 #include <sys/malloc.h> 54 #include <sys/proc.h> 55 #include <sys/buf.h> 56 #include <sys/reboot.h> 57 #include <sys/mbuf.h> 58 #include <sys/msgbuf.h> 59 #include <sys/sysent.h> 60 #include <sys/sysctl.h> 61 #include <sys/vmmeter.h> 62 #include <sys/bus.h> 63 #include <sys/usched.h> 64 #include <sys/reg.h> 65 66 #include <vm/vm.h> 67 #include <vm/vm_param.h> 68 #include <sys/lock.h> 69 #include <vm/vm_kern.h> 70 #include <vm/vm_object.h> 71 #include <vm/vm_page.h> 72 #include <vm/vm_map.h> 73 #include <vm/vm_pager.h> 74 #include <vm/vm_extern.h> 75 76 #include <sys/thread2.h> 77 #include <sys/mplock2.h> 78 79 #include <sys/user.h> 80 #include <sys/exec.h> 81 #include <sys/cons.h> 82 83 #include <ddb/ddb.h> 84 85 #include <machine/cpu.h> 86 #include <machine/clock.h> 87 #include <machine/specialreg.h> 88 #include <machine/md_var.h> 89 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */ 90 #include <machine/globaldata.h> /* CPU_prvspace */ 91 #include <machine/smp.h> 92 #include <machine/cputypes.h> 93 94 #include <bus/isa/rtc.h> 95 #include <sys/random.h> 96 #include <sys/ptrace.h> 97 #include <machine/sigframe.h> 98 #include <unistd.h> /* umtx_* functions */ 99 #include <pthread.h> /* pthread_yield() */ 100 101 extern void dblfault_handler (void); 102 103 static void set_fpregs_xmm (struct save87 *, struct savexmm *); 104 static void fill_fpregs_xmm (struct savexmm *, struct save87 *); 105 106 int64_t tsc_offsets[MAXCPU]; 107 108 #if defined(SWTCH_OPTIM_STATS) 109 extern int swtch_optim_stats; 110 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats, 111 CTLFLAG_RD, &swtch_optim_stats, 0, ""); 112 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count, 113 CTLFLAG_RD, &tlb_flush_count, 0, ""); 114 #endif 115 116 static int 117 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS) 118 { 119 u_long pmem = ctob(physmem); 120 int error; 121 122 error = sysctl_handle_long(oidp, &pmem, 0, req); 123 124 return (error); 125 } 126 127 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD, 128 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)"); 129 130 static int 131 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS) 132 { 133 u_long usermem = ctob(Maxmem - vmstats.v_wire_count); 134 int error; 135 136 error = sysctl_handle_long(oidp, &usermem, 0, req); 137 138 return (error); 139 } 140 141 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_ULONG|CTLFLAG_RD, 142 0, 0, sysctl_hw_usermem, "LU", ""); 143 144 SYSCTL_ULONG(_hw, OID_AUTO, availpages, CTLFLAG_RD, &Maxmem, 0, ""); 145 146 /* 147 * Send an interrupt to process. 148 * 149 * Stack is set up to allow sigcode stored 150 * at top to call routine, followed by kcall 151 * to sigreturn routine below. After sigreturn 152 * resets the signal mask, the stack, and the 153 * frame pointer, it returns to the user 154 * specified pc, psl. 155 */ 156 void 157 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code) 158 { 159 struct lwp *lp = curthread->td_lwp; 160 struct proc *p = lp->lwp_proc; 161 struct trapframe *regs; 162 struct sigacts *psp = p->p_sigacts; 163 struct sigframe sf, *sfp; 164 int oonstack; 165 char *sp; 166 167 regs = lp->lwp_md.md_regs; 168 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0; 169 170 /* Save user context */ 171 bzero(&sf, sizeof(struct sigframe)); 172 sf.sf_uc.uc_sigmask = *mask; 173 sf.sf_uc.uc_stack = lp->lwp_sigstk; 174 sf.sf_uc.uc_mcontext.mc_onstack = oonstack; 175 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0); 176 /* gcc8 craps out on -Warray-bounds w/ optimized bcopy */ 177 _bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe)); 178 179 /* Make the size of the saved context visible to userland */ 180 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); 181 182 /* Allocate and validate space for the signal handler context. */ 183 if ((lp->lwp_flags & LWP_ALTSTACK) != 0 && !oonstack && 184 SIGISMEMBER(psp->ps_sigonstack, sig)) { 185 sp = (char *)(lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size - 186 sizeof(struct sigframe)); 187 lp->lwp_sigstk.ss_flags |= SS_ONSTACK; 188 } else { 189 /* We take red zone into account */ 190 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128; 191 } 192 193 /* Align to 16 bytes */ 194 sfp = (struct sigframe *)((intptr_t)sp & ~0xFUL); 195 196 /* Translate the signal is appropriate */ 197 if (p->p_sysent->sv_sigtbl) { 198 if (sig <= p->p_sysent->sv_sigsize) 199 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 200 } 201 202 /* 203 * Build the argument list for the signal handler. 204 * 205 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx) 206 */ 207 regs->tf_rdi = sig; /* argument 1 */ 208 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */ 209 210 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 211 /* 212 * Signal handler installed with SA_SIGINFO. 213 * 214 * action(signo, siginfo, ucontext) 215 */ 216 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */ 217 regs->tf_rcx = (register_t)regs->tf_err; /* argument 4 */ 218 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 219 220 /* fill siginfo structure */ 221 sf.sf_si.si_signo = sig; 222 sf.sf_si.si_code = code; 223 sf.sf_si.si_addr = (void *)regs->tf_addr; 224 } else { 225 /* 226 * Old FreeBSD-style arguments. 227 * 228 * handler (signo, code, [uc], addr) 229 */ 230 regs->tf_rsi = (register_t)code; /* argument 2 */ 231 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */ 232 sf.sf_ahu.sf_handler = catcher; 233 } 234 235 #if 0 236 /* 237 * If we're a vm86 process, we want to save the segment registers. 238 * We also change eflags to be our emulated eflags, not the actual 239 * eflags. 240 */ 241 if (regs->tf_eflags & PSL_VM) { 242 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 243 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86; 244 245 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 246 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 247 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 248 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 249 250 if (vm86->vm86_has_vme == 0) 251 sf.sf_uc.uc_mcontext.mc_eflags = 252 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 253 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 254 255 /* 256 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 257 * syscalls made by the signal handler. This just avoids 258 * wasting time for our lazy fixup of such faults. PSL_NT 259 * does nothing in vm86 mode, but vm86 programs can set it 260 * almost legitimately in probes for old cpu types. 261 */ 262 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 263 } 264 #endif 265 266 /* 267 * Save the FPU state and reinit the FP unit 268 */ 269 npxpush(&sf.sf_uc.uc_mcontext); 270 271 /* 272 * Copy the sigframe out to the user's stack. 273 */ 274 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) { 275 /* 276 * Something is wrong with the stack pointer. 277 * ...Kill the process. 278 */ 279 sigexit(lp, SIGILL); 280 } 281 282 regs->tf_rsp = (register_t)sfp; 283 regs->tf_rip = trunc_page64(PS_STRINGS - *(p->p_sysent->sv_szsigcode)); 284 regs->tf_rip -= SZSIGCODE_EXTRA_BYTES; 285 286 /* 287 * x86 abi specifies that the direction flag must be cleared 288 * on function entry 289 */ 290 regs->tf_rflags &= ~(PSL_T|PSL_D); 291 292 /* 293 * 64 bit mode has a code and stack selector but 294 * no data or extra selector. %fs and %gs are not 295 * stored in-context. 296 */ 297 regs->tf_cs = _ucodesel; 298 regs->tf_ss = _udatasel; 299 } 300 301 /* 302 * Sanitize the trapframe for a virtual kernel passing control to a custom 303 * VM context. Remove any items that would otherwise create a privilage 304 * issue. 305 * 306 * XXX at the moment we allow userland to set the resume flag. Is this a 307 * bad idea? 308 */ 309 int 310 cpu_sanitize_frame(struct trapframe *frame) 311 { 312 frame->tf_cs = _ucodesel; 313 frame->tf_ss = _udatasel; 314 /* XXX VM (8086) mode not supported? */ 315 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP); 316 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I; 317 318 return(0); 319 } 320 321 /* 322 * Sanitize the tls so loading the descriptor does not blow up 323 * on us. For x86_64 we don't have to do anything. 324 */ 325 int 326 cpu_sanitize_tls(struct savetls *tls) 327 { 328 return(0); 329 } 330 331 /* 332 * sigreturn(ucontext_t *sigcntxp) 333 * 334 * System call to cleanup state after a signal 335 * has been taken. Reset signal mask and 336 * stack state from context left by sendsig (above). 337 * Return to previous pc and psl as specified by 338 * context left by sendsig. Check carefully to 339 * make sure that the user has not modified the 340 * state to gain improper privileges. 341 */ 342 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 343 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 344 345 int 346 sys_sigreturn(struct sigreturn_args *uap) 347 { 348 struct lwp *lp = curthread->td_lwp; 349 struct trapframe *regs; 350 ucontext_t uc; 351 ucontext_t *ucp; 352 register_t rflags; 353 int cs; 354 int error; 355 356 /* 357 * We have to copy the information into kernel space so userland 358 * can't modify it while we are sniffing it. 359 */ 360 regs = lp->lwp_md.md_regs; 361 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 362 if (error) 363 return (error); 364 ucp = &uc; 365 rflags = ucp->uc_mcontext.mc_rflags; 366 367 /* VM (8086) mode not supported */ 368 rflags &= ~PSL_VM_UNSUPP; 369 370 #if 0 371 if (eflags & PSL_VM) { 372 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 373 struct vm86_kernel *vm86; 374 375 /* 376 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 377 * set up the vm86 area, and we can't enter vm86 mode. 378 */ 379 if (lp->lwp_thread->td_pcb->pcb_ext == 0) 380 return (EINVAL); 381 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86; 382 if (vm86->vm86_inited == 0) 383 return (EINVAL); 384 385 /* go back to user mode if both flags are set */ 386 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 387 trapsignal(lp->lwp_proc, SIGBUS, 0); 388 389 if (vm86->vm86_has_vme) { 390 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 391 (eflags & VME_USERCHANGE) | PSL_VM; 392 } else { 393 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 394 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM; 395 } 396 bcopy(&ucp.uc_mcontext.mc_gs, tf, sizeof(struct trapframe)); 397 tf->tf_eflags = eflags; 398 tf->tf_vm86_ds = tf->tf_ds; 399 tf->tf_vm86_es = tf->tf_es; 400 tf->tf_vm86_fs = tf->tf_fs; 401 tf->tf_vm86_gs = tf->tf_gs; 402 tf->tf_ds = _udatasel; 403 tf->tf_es = _udatasel; 404 #if 0 405 tf->tf_fs = _udatasel; 406 tf->tf_gs = _udatasel; 407 #endif 408 } else 409 #endif 410 { 411 /* 412 * Don't allow users to change privileged or reserved flags. 413 */ 414 /* 415 * XXX do allow users to change the privileged flag PSL_RF. 416 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 417 * should sometimes set it there too. tf_eflags is kept in 418 * the signal context during signal handling and there is no 419 * other place to remember it, so the PSL_RF bit may be 420 * corrupted by the signal handler without us knowing. 421 * Corruption of the PSL_RF bit at worst causes one more or 422 * one less debugger trap, so allowing it is fairly harmless. 423 */ 424 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { 425 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags); 426 return(EINVAL); 427 } 428 429 /* 430 * Don't allow users to load a valid privileged %cs. Let the 431 * hardware check for invalid selectors, excess privilege in 432 * other selectors, invalid %eip's and invalid %esp's. 433 */ 434 cs = ucp->uc_mcontext.mc_cs; 435 if (!CS_SECURE(cs)) { 436 kprintf("sigreturn: cs = 0x%x\n", cs); 437 trapsignal(lp, SIGBUS, T_PROTFLT); 438 return(EINVAL); 439 } 440 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe)); 441 } 442 443 /* 444 * Restore the FPU state from the frame 445 */ 446 npxpop(&ucp->uc_mcontext); 447 448 if (ucp->uc_mcontext.mc_onstack & 1) 449 lp->lwp_sigstk.ss_flags |= SS_ONSTACK; 450 else 451 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK; 452 453 lp->lwp_sigmask = ucp->uc_sigmask; 454 SIG_CANTMASK(lp->lwp_sigmask); 455 return(EJUSTRETURN); 456 } 457 458 /* 459 * cpu_idle() represents the idle LWKT. You cannot return from this function 460 * (unless you want to blow things up!). Instead we look for runnable threads 461 * and loop or halt as appropriate. Giant is not held on entry to the thread. 462 * 463 * The main loop is entered with a critical section held, we must release 464 * the critical section before doing anything else. lwkt_switch() will 465 * check for pending interrupts due to entering and exiting its own 466 * critical section. 467 * 468 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI 469 * to wake a HLTed cpu up. 470 */ 471 static int cpu_idle_hlt = 1; 472 static int cpu_idle_hltcnt; 473 static int cpu_idle_spincnt; 474 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 475 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 476 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW, 477 &cpu_idle_hltcnt, 0, "Idle loop entry halts"); 478 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW, 479 &cpu_idle_spincnt, 0, "Idle loop entry spins"); 480 481 void 482 cpu_idle(void) 483 { 484 struct thread *td = curthread; 485 struct mdglobaldata *gd = mdcpu; 486 int reqflags; 487 488 crit_exit(); 489 KKASSERT(td->td_critcount == 0); 490 cpu_enable_intr(); 491 492 for (;;) { 493 /* 494 * See if there are any LWKTs ready to go. 495 */ 496 lwkt_switch(); 497 498 /* 499 * The idle loop halts only if no threads are scheduleable 500 * and no signals have occured. 501 */ 502 if (cpu_idle_hlt && 503 (td->td_gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) { 504 splz(); 505 if ((td->td_gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) { 506 #ifdef DEBUGIDLE 507 struct timeval tv1, tv2; 508 gettimeofday(&tv1, NULL); 509 #endif 510 reqflags = gd->mi.gd_reqflags & 511 ~RQF_IDLECHECK_WK_MASK; 512 KKASSERT(gd->mi.gd_processing_ipiq == 0); 513 umtx_sleep(&gd->mi.gd_reqflags, reqflags, 514 1000000); 515 #ifdef DEBUGIDLE 516 gettimeofday(&tv2, NULL); 517 if (tv2.tv_usec - tv1.tv_usec + 518 (tv2.tv_sec - tv1.tv_sec) * 1000000 519 > 500000) { 520 kprintf("cpu %d idlelock %08x %08x\n", 521 gd->mi.gd_cpuid, 522 gd->mi.gd_reqflags, 523 gd->gd_fpending); 524 } 525 #endif 526 } 527 ++cpu_idle_hltcnt; 528 } else { 529 splz(); 530 __asm __volatile("pause"); 531 ++cpu_idle_spincnt; 532 } 533 } 534 } 535 536 /* 537 * Called by the spinlock code with or without a critical section held 538 * when a spinlock is found to be seriously constested. 539 * 540 * We need to enter a critical section to prevent signals from recursing 541 * into pthreads. 542 */ 543 void 544 cpu_spinlock_contested(void) 545 { 546 cpu_pause(); 547 } 548 549 /* 550 * Clear registers on exec 551 */ 552 void 553 exec_setregs(u_long entry, u_long stack, u_long ps_strings) 554 { 555 struct thread *td = curthread; 556 struct lwp *lp = td->td_lwp; 557 struct pcb *pcb = td->td_pcb; 558 struct trapframe *regs = lp->lwp_md.md_regs; 559 560 user_ldt_free(pcb); 561 562 bzero((char *)regs, sizeof(struct trapframe)); 563 regs->tf_rip = entry; 564 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */ 565 regs->tf_rdi = stack; /* argv */ 566 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 567 regs->tf_ss = _udatasel; 568 regs->tf_cs = _ucodesel; 569 regs->tf_rbx = ps_strings; 570 571 /* 572 * Reset the hardware debug registers if they were in use. 573 * They won't have any meaning for the newly exec'd process. 574 */ 575 if (pcb->pcb_flags & PCB_DBREGS) { 576 pcb->pcb_dr0 = 0; 577 pcb->pcb_dr1 = 0; 578 pcb->pcb_dr2 = 0; 579 pcb->pcb_dr3 = 0; 580 pcb->pcb_dr6 = 0; 581 pcb->pcb_dr7 = 0; /* JG set bit 10? */ 582 if (pcb == td->td_pcb) { 583 /* 584 * Clear the debug registers on the running 585 * CPU, otherwise they will end up affecting 586 * the next process we switch to. 587 */ 588 reset_dbregs(); 589 } 590 pcb->pcb_flags &= ~PCB_DBREGS; 591 } 592 593 /* 594 * Initialize the math emulator (if any) for the current process. 595 * Actually, just clear the bit that says that the emulator has 596 * been initialized. Initialization is delayed until the process 597 * traps to the emulator (if it is done at all) mainly because 598 * emulators don't provide an entry point for initialization. 599 */ 600 pcb->pcb_flags &= ~FP_SOFTFP; 601 602 /* 603 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing 604 * gd_npxthread. Otherwise a preemptive interrupt thread 605 * may panic in npxdna(). 606 */ 607 crit_enter(); 608 #if 0 609 load_cr0(rcr0() | CR0_MP); 610 #endif 611 612 /* 613 * NOTE: The MSR values must be correct so we can return to 614 * userland. gd_user_fs/gs must be correct so the switch 615 * code knows what the current MSR values are. 616 */ 617 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */ 618 pcb->pcb_gsbase = 0; 619 /* Initialize the npx (if any) for the current process. */ 620 npxinit(); 621 crit_exit(); 622 623 /* 624 * note: linux emulator needs edx to be 0x0 on entry, which is 625 * handled in execve simply by setting the 64 bit syscall 626 * return value to 0. 627 */ 628 } 629 630 void 631 cpu_setregs(void) 632 { 633 #if 0 634 unsigned int cr0; 635 636 cr0 = rcr0(); 637 cr0 |= CR0_NE; /* Done by npxinit() */ 638 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ 639 cr0 |= CR0_WP | CR0_AM; 640 load_cr0(cr0); 641 load_gs(_udatasel); 642 #endif 643 } 644 645 static int 646 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 647 { 648 int error; 649 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 650 req); 651 if (!error && req->newptr) 652 resettodr(); 653 return (error); 654 } 655 656 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 657 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 658 659 /* 660 * Initialize x86 and configure to run kernel 661 */ 662 663 /* 664 * Initialize segments & interrupt table 665 */ 666 667 extern struct user *proc0paddr; 668 669 #if 0 670 671 extern inthand_t 672 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 673 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 674 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 675 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 676 IDTVEC(xmm), IDTVEC(dblfault), 677 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 678 #endif 679 680 int 681 ptrace_set_pc(struct lwp *lp, unsigned long addr) 682 { 683 lp->lwp_md.md_regs->tf_rip = addr; 684 return (0); 685 } 686 687 int 688 ptrace_single_step(struct lwp *lp) 689 { 690 lp->lwp_md.md_regs->tf_rflags |= PSL_T; 691 return (0); 692 } 693 694 int 695 fill_regs(struct lwp *lp, struct reg *regs) 696 { 697 struct trapframe *tp; 698 699 if ((tp = lp->lwp_md.md_regs) == NULL) 700 return EINVAL; 701 bcopy(&tp->tf_rdi, ®s->r_rdi, sizeof(*regs)); 702 return (0); 703 } 704 705 int 706 set_regs(struct lwp *lp, struct reg *regs) 707 { 708 struct trapframe *tp; 709 710 tp = lp->lwp_md.md_regs; 711 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) || 712 !CS_SECURE(regs->r_cs)) 713 return (EINVAL); 714 bcopy(®s->r_rdi, &tp->tf_rdi, sizeof(*regs)); 715 return (0); 716 } 717 718 static void 719 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87) 720 { 721 struct env87 *penv_87 = &sv_87->sv_env; 722 struct envxmm *penv_xmm = &sv_xmm->sv_env; 723 int i; 724 725 /* FPU control/status */ 726 penv_87->en_cw = penv_xmm->en_cw; 727 penv_87->en_sw = penv_xmm->en_sw; 728 penv_87->en_tw = penv_xmm->en_tw; 729 penv_87->en_fip = penv_xmm->en_fip; 730 penv_87->en_fcs = penv_xmm->en_fcs; 731 penv_87->en_opcode = penv_xmm->en_opcode; 732 penv_87->en_foo = penv_xmm->en_foo; 733 penv_87->en_fos = penv_xmm->en_fos; 734 735 /* FPU registers */ 736 for (i = 0; i < 8; ++i) 737 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 738 } 739 740 static void 741 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm) 742 { 743 struct env87 *penv_87 = &sv_87->sv_env; 744 struct envxmm *penv_xmm = &sv_xmm->sv_env; 745 int i; 746 747 /* FPU control/status */ 748 penv_xmm->en_cw = penv_87->en_cw; 749 penv_xmm->en_sw = penv_87->en_sw; 750 penv_xmm->en_tw = penv_87->en_tw; 751 penv_xmm->en_fip = penv_87->en_fip; 752 penv_xmm->en_fcs = penv_87->en_fcs; 753 penv_xmm->en_opcode = penv_87->en_opcode; 754 penv_xmm->en_foo = penv_87->en_foo; 755 penv_xmm->en_fos = penv_87->en_fos; 756 757 /* FPU registers */ 758 for (i = 0; i < 8; ++i) 759 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 760 } 761 762 int 763 fill_fpregs(struct lwp *lp, struct fpreg *fpregs) 764 { 765 if (lp->lwp_thread == NULL || lp->lwp_thread->td_pcb == NULL) 766 return EINVAL; 767 if (cpu_fxsr) { 768 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm, 769 (struct save87 *)fpregs); 770 return (0); 771 } 772 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs); 773 return (0); 774 } 775 776 int 777 set_fpregs(struct lwp *lp, struct fpreg *fpregs) 778 { 779 if (cpu_fxsr) { 780 set_fpregs_xmm((struct save87 *)fpregs, 781 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm); 782 return (0); 783 } 784 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs); 785 return (0); 786 } 787 788 int 789 fill_dbregs(struct lwp *lp, struct dbreg *dbregs) 790 { 791 return (ENOSYS); 792 } 793 794 int 795 set_dbregs(struct lwp *lp, struct dbreg *dbregs) 796 { 797 return (ENOSYS); 798 } 799 800 #if 0 801 /* 802 * Return > 0 if a hardware breakpoint has been hit, and the 803 * breakpoint was in user space. Return 0, otherwise. 804 */ 805 int 806 user_dbreg_trap(void) 807 { 808 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */ 809 u_int32_t bp; /* breakpoint bits extracted from dr6 */ 810 int nbp; /* number of breakpoints that triggered */ 811 caddr_t addr[4]; /* breakpoint addresses */ 812 int i; 813 814 dr7 = rdr7(); 815 if ((dr7 & 0x000000ff) == 0) { 816 /* 817 * all GE and LE bits in the dr7 register are zero, 818 * thus the trap couldn't have been caused by the 819 * hardware debug registers 820 */ 821 return 0; 822 } 823 824 nbp = 0; 825 dr6 = rdr6(); 826 bp = dr6 & 0x0000000f; 827 828 if (!bp) { 829 /* 830 * None of the breakpoint bits are set meaning this 831 * trap was not caused by any of the debug registers 832 */ 833 return 0; 834 } 835 836 /* 837 * at least one of the breakpoints were hit, check to see 838 * which ones and if any of them are user space addresses 839 */ 840 841 if (bp & 0x01) { 842 addr[nbp++] = (caddr_t)rdr0(); 843 } 844 if (bp & 0x02) { 845 addr[nbp++] = (caddr_t)rdr1(); 846 } 847 if (bp & 0x04) { 848 addr[nbp++] = (caddr_t)rdr2(); 849 } 850 if (bp & 0x08) { 851 addr[nbp++] = (caddr_t)rdr3(); 852 } 853 854 for (i=0; i<nbp; i++) { 855 if (addr[i] < 856 (caddr_t)VM_MAX_USER_ADDRESS) { 857 /* 858 * addr[i] is in user space 859 */ 860 return nbp; 861 } 862 } 863 864 /* 865 * None of the breakpoints are in user space. 866 */ 867 return 0; 868 } 869 870 #endif 871 872 void 873 identcpu(void) 874 { 875 int regs[4]; 876 877 do_cpuid(1, regs); 878 cpu_feature = regs[3]; 879 } 880 881 882 #ifndef DDB 883 void 884 Debugger(const char *msg) 885 { 886 kprintf("Debugger(\"%s\") called.\n", msg); 887 } 888 #endif /* no DDB */ 889