1 /* 2 * Copyright (c) 2008 The DragonFly Project. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in 12 * the documentation and/or other materials provided with the 13 * distribution. 14 * 3. Neither the name of The DragonFly Project nor the names of its 15 * contributors may be used to endorse or promote products derived 16 * from this software without specific, prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 21 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 22 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 24 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 26 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 27 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 28 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * -- 32 * 33 * Mach Operating System 34 * Copyright (c) 1991,1990 Carnegie Mellon University 35 * All Rights Reserved. 36 * 37 * Permission to use, copy, modify and distribute this software and its 38 * documentation is hereby granted, provided that both the copyright 39 * notice and this permission notice appear in all copies of the 40 * software, derivative works or modified versions, and any portions 41 * thereof, and that both notices appear in supporting documentation. 42 * 43 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS 44 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR 45 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 46 * 47 * Carnegie Mellon requests users of this software to return to 48 * 49 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 50 * School of Computer Science 51 * Carnegie Mellon University 52 * Pittsburgh PA 15213-3890 53 * 54 * any improvements or extensions that they make and grant Carnegie the 55 * rights to redistribute these changes. 56 * 57 * $FreeBSD: src/sys/i386/i386/db_interface.c,v 1.48.2.1 2000/07/07 00:38:46 obrien Exp $ 58 */ 59 60 /* 61 * Interface to new debugger. 62 */ 63 #include <sys/param.h> 64 #include <sys/systm.h> 65 #include <sys/reboot.h> 66 #include <sys/cons.h> 67 #include <sys/thread.h> 68 69 #include <machine/cpu.h> 70 #include <machine/smp.h> 71 #include <machine/globaldata.h> 72 #include <machine/md_var.h> 73 74 #include <vm/vm.h> 75 #include <vm/pmap.h> 76 77 #include <ddb/ddb.h> 78 79 #include <sys/thread2.h> 80 81 #include <setjmp.h> 82 83 static jmp_buf *db_nofault = NULL; 84 extern jmp_buf db_jmpbuf; 85 86 extern void gdb_handle_exception (db_regs_t *, int, int); 87 88 int db_active; 89 db_regs_t ddb_regs; 90 91 static jmp_buf db_global_jmpbuf; 92 static int db_global_jmpbuf_valid; 93 94 #ifdef __GNUC__ 95 #define rss() ({u_short ss; __asm __volatile("mov %%ss,%0" : "=r" (ss)); ss;}) 96 #endif 97 98 /* 99 * kdb_trap - field a TRACE or BPT trap 100 */ 101 int 102 kdb_trap(int type, int code, struct x86_64_saved_state *regs) 103 { 104 volatile int ddb_mode = !(boothowto & RB_GDB); 105 106 /* 107 * XXX try to do nothing if the console is in graphics mode. 108 * Handle trace traps (and hardware breakpoints...) by ignoring 109 * them except for forgetting about them. Return 0 for other 110 * traps to say that we haven't done anything. The trap handler 111 * will usually panic. We should handle breakpoint traps for 112 * our breakpoints by disarming our breakpoints and fixing up 113 * %eip. 114 */ 115 if (cons_unavail && ddb_mode) { 116 if (type == T_TRCTRAP) { 117 regs->tf_rflags &= ~PSL_T; 118 return (1); 119 } 120 return (0); 121 } 122 123 switch (type) { 124 case T_BPTFLT: /* breakpoint */ 125 case T_TRCTRAP: /* debug exception */ 126 break; 127 128 default: 129 /* 130 * XXX this is almost useless now. In most cases, 131 * trap_fatal() has already printed a much more verbose 132 * message. However, it is dangerous to print things in 133 * trap_fatal() - kprintf() might be reentered and trap. 134 * The debugger should be given control first. 135 */ 136 if (ddb_mode) 137 db_printf("kernel: type %d trap, code=%x\n", type, code); 138 139 if (db_nofault) { 140 jmp_buf *no_fault = db_nofault; 141 db_nofault = NULL; 142 longjmp(*no_fault, 1); 143 } 144 } 145 146 /* 147 * This handles unexpected traps in ddb commands, including calls to 148 * non-ddb functions. db_nofault only applies to memory accesses by 149 * internal ddb commands. 150 */ 151 if (db_global_jmpbuf_valid) 152 longjmp(db_global_jmpbuf, 1); 153 154 /* 155 * XXX We really should switch to a local stack here. 156 */ 157 ddb_regs = *regs; 158 159 crit_enter(); 160 #ifdef SMP 161 db_printf("\nCPU%d stopping CPUs: 0x%016jx\n", 162 mycpu->gd_cpuid, (uintmax_t)mycpu->gd_other_cpus); 163 164 /* We stop all CPUs except ourselves (obviously) */ 165 stop_cpus(mycpu->gd_other_cpus); 166 167 db_printf(" stopped\n"); 168 #endif /* SMP */ 169 170 setjmp(db_global_jmpbuf); 171 db_global_jmpbuf_valid = TRUE; 172 db_active++; 173 vcons_set_mode(1); 174 if (ddb_mode) { 175 cndbctl(TRUE); 176 db_trap(type, code); 177 cndbctl(FALSE); 178 } else 179 gdb_handle_exception(&ddb_regs, type, code); 180 db_active--; 181 vcons_set_mode(0); 182 db_global_jmpbuf_valid = FALSE; 183 184 #ifdef SMP 185 db_printf("\nCPU%d restarting CPUs: 0x%016jx\n", 186 mycpu->gd_cpuid, (uintmax_t)stopped_cpus); 187 188 /* Restart all the CPUs we previously stopped */ 189 if (stopped_cpus != mycpu->gd_other_cpus) { 190 db_printf("whoa, other_cpus: 0x%016jx, " 191 "stopped_cpus: 0x%016jx\n", 192 (uintmax_t)mycpu->gd_other_cpus, 193 (uintmax_t)stopped_cpus); 194 panic("stop_cpus() failed"); 195 } 196 restart_cpus(stopped_cpus); 197 198 db_printf(" restarted\n"); 199 #endif /* SMP */ 200 crit_exit(); 201 202 regs->tf_rip = ddb_regs.tf_rip; 203 regs->tf_rflags = ddb_regs.tf_rflags; 204 regs->tf_rax = ddb_regs.tf_rax; 205 regs->tf_rcx = ddb_regs.tf_rcx; 206 regs->tf_rdx = ddb_regs.tf_rdx; 207 regs->tf_rbx = ddb_regs.tf_rbx; 208 209 regs->tf_rsp = ddb_regs.tf_rsp; 210 regs->tf_ss = ddb_regs.tf_ss & 0xffff; 211 212 regs->tf_rbp = ddb_regs.tf_rbp; 213 regs->tf_rsi = ddb_regs.tf_rsi; 214 regs->tf_rdi = ddb_regs.tf_rdi; 215 216 regs->tf_r8 = ddb_regs.tf_r8; 217 regs->tf_r9 = ddb_regs.tf_r9; 218 regs->tf_r10 = ddb_regs.tf_r10; 219 regs->tf_r11 = ddb_regs.tf_r11; 220 regs->tf_r12 = ddb_regs.tf_r12; 221 regs->tf_r13 = ddb_regs.tf_r13; 222 regs->tf_r14 = ddb_regs.tf_r14; 223 regs->tf_r15 = ddb_regs.tf_r15; 224 225 /* regs->tf_es = ddb_regs.tf_es & 0xffff; */ 226 /* regs->tf_fs = ddb_regs.tf_fs & 0xffff; */ 227 /* regs->tf_gs = ddb_regs.tf_gs & 0xffff; */ 228 regs->tf_cs = ddb_regs.tf_cs & 0xffff; 229 /* regs->tf_ds = ddb_regs.tf_ds & 0xffff; */ 230 return (1); 231 } 232 233 /* 234 * Read bytes from kernel address space for debugger. 235 */ 236 void 237 db_read_bytes(vm_offset_t addr, size_t size, char *data) 238 { 239 char *src; 240 241 db_nofault = &db_jmpbuf; 242 243 src = (char *)addr; 244 while (size-- > 0) 245 *data++ = *src++; 246 247 db_nofault = NULL; 248 } 249 250 /* 251 * Write bytes to kernel address space for debugger. 252 */ 253 void 254 db_write_bytes(vm_offset_t addr, size_t size, char *data) 255 { 256 char *dst; 257 #if 0 258 vpte_t *ptep0 = NULL; 259 vpte_t oldmap0 = 0; 260 vm_offset_t addr1; 261 vpte_t *ptep1 = NULL; 262 vpte_t oldmap1 = 0; 263 #endif 264 265 db_nofault = &db_jmpbuf; 266 #if 0 267 if (addr > trunc_page((vm_offset_t)btext) - size && 268 addr < round_page((vm_offset_t)etext)) { 269 270 ptep0 = pmap_kpte(addr); 271 oldmap0 = *ptep0; 272 *ptep0 |= VPTE_W; 273 274 /* Map another page if the data crosses a page boundary. */ 275 if ((*ptep0 & PG_PS) == 0) { 276 addr1 = trunc_page(addr + size - 1); 277 if (trunc_page(addr) != addr1) { 278 ptep1 = pmap_kpte(addr1); 279 oldmap1 = *ptep1; 280 *ptep1 |= VPTE_W; 281 } 282 } else { 283 addr1 = trunc_4mpage(addr + size - 1); 284 if (trunc_4mpage(addr) != addr1) { 285 ptep1 = pmap_kpte(addr1); 286 oldmap1 = *ptep1; 287 *ptep1 |= VPTE_W; 288 } 289 } 290 291 cpu_invltlb(); 292 } 293 #endif 294 295 dst = (char *)addr; 296 297 while (size-- > 0) 298 *dst++ = *data++; 299 300 db_nofault = NULL; 301 302 #if 0 303 if (ptep0) { 304 *ptep0 = oldmap0; 305 306 if (ptep1) 307 *ptep1 = oldmap1; 308 309 cpu_invltlb(); 310 } 311 #endif 312 } 313 314 /* 315 * The debugger sometimes needs to know the actual KVM address represented 316 * by the instruction pointer, stack pointer, or base pointer. Normally 317 * the actual KVM address is simply the contents of the register. However, 318 * if the debugger is entered from the BIOS or VM86 we need to figure out 319 * the offset from the segment register. 320 */ 321 db_addr_t 322 PC_REGS(db_regs_t *regs) 323 { 324 return(regs->tf_rip); 325 } 326 327 db_addr_t 328 SP_REGS(db_regs_t *regs) 329 { 330 return(regs->tf_rsp); 331 } 332 333 db_addr_t 334 BP_REGS(db_regs_t *regs) 335 { 336 return(regs->tf_rbp); 337 } 338 339 /* 340 * XXX 341 * Move this to machdep.c and allow it to be called if any debugger is 342 * installed. 343 */ 344 void 345 Debugger(const char *msg) 346 { 347 static volatile u_char in_Debugger; 348 349 /* 350 * XXX 351 * Do nothing if the console is in graphics mode. This is 352 * OK if the call is for the debugger hotkey but not if the call 353 * is a weak form of panicing. 354 */ 355 if (cons_unavail && !(boothowto & RB_GDB)) 356 return; 357 358 if (!in_Debugger) { 359 in_Debugger = 1; 360 db_printf("Debugger(\"%s\")\n", msg); 361 breakpoint(); 362 in_Debugger = 0; 363 } 364 } 365