1 /* 2 * Copyright (c) 2007 The DragonFly Project. All rights reserved. 3 * 4 * This code is derived from software contributed to The DragonFly Project 5 * by Matthew Dillon <dillon@backplane.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 3. Neither the name of The DragonFly Project nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific, prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 36 #include <sys/interrupt.h> 37 #include <sys/kernel.h> 38 #include <sys/memrange.h> 39 #include <sys/tls.h> 40 #include <sys/types.h> 41 42 #include <vm/vm_extern.h> 43 #include <vm/vm_kern.h> 44 #include <vm/vm_object.h> 45 #include <vm/vm_page.h> 46 47 #include <sys/mplock2.h> 48 49 #include <machine/cpu.h> 50 #include <machine/cpufunc.h> 51 #include <machine/globaldata.h> 52 #include <machine/md_var.h> 53 #include <machine/pmap.h> 54 #include <machine/smp.h> 55 #include <machine/tls.h> 56 57 #include <unistd.h> 58 #include <pthread.h> 59 #include <signal.h> 60 #include <stdio.h> 61 62 extern pt_entry_t *KPTphys; 63 64 volatile cpumask_t stopped_cpus; 65 cpumask_t smp_active_mask = 1; /* which cpus are ready for IPIs etc? */ 66 static int boot_address; 67 static cpumask_t smp_startup_mask = 1; /* which cpus have been started */ 68 int mp_naps; /* # of Applications processors */ 69 static int mp_finish; 70 71 /* function prototypes XXX these should go elsewhere */ 72 void bootstrap_idle(void); 73 void single_cpu_ipi(int, int, int); 74 void selected_cpu_ipi(cpumask_t, int, int); 75 #if 0 76 void ipi_handler(int); 77 #endif 78 79 pt_entry_t *SMPpt; 80 81 /* AP uses this during bootstrap. Do not staticize. */ 82 char *bootSTK; 83 static int bootAP; 84 85 86 /* XXX these need to go into the appropriate header file */ 87 static int start_all_aps(u_int); 88 void init_secondary(void); 89 void *start_ap(void *); 90 91 /* 92 * Get SMP fully working before we start initializing devices. 93 */ 94 static 95 void 96 ap_finish(void) 97 { 98 int i; 99 cpumask_t ncpus_mask = 0; 100 101 for (i = 1; i <= ncpus; i++) 102 ncpus_mask |= CPUMASK(i); 103 104 mp_finish = 1; 105 if (bootverbose) 106 kprintf("Finish MP startup\n"); 107 108 /* build our map of 'other' CPUs */ 109 mycpu->gd_other_cpus = smp_startup_mask & ~CPUMASK(mycpu->gd_cpuid); 110 111 /* 112 * Let the other cpu's finish initializing and build their map 113 * of 'other' CPUs. 114 */ 115 rel_mplock(); 116 while (smp_active_mask != smp_startup_mask) { 117 DELAY(100000); 118 cpu_lfence(); 119 } 120 121 while (try_mplock() == 0) 122 DELAY(100000); 123 if (bootverbose) 124 kprintf("Active CPU Mask: %08x\n", smp_active_mask); 125 } 126 127 SYSINIT(finishsmp, SI_BOOT2_FINISH_SMP, SI_ORDER_FIRST, ap_finish, NULL) 128 129 130 void * 131 start_ap(void *arg __unused) 132 { 133 init_secondary(); 134 setrealcpu(); 135 bootstrap_idle(); 136 137 return(NULL); /* NOTREACHED */ 138 } 139 140 /* storage for AP thread IDs */ 141 pthread_t ap_tids[MAXCPU]; 142 143 void 144 mp_start(void) 145 { 146 int shift; 147 148 ncpus = optcpus; 149 150 mp_naps = ncpus - 1; 151 152 /* ncpus2 -- ncpus rounded down to the nearest power of 2 */ 153 for (shift = 0; (1 << shift) <= ncpus; ++shift) 154 ; 155 --shift; 156 ncpus2_shift = shift; 157 ncpus2 = 1 << shift; 158 ncpus2_mask = ncpus2 - 1; 159 160 /* ncpus_fit -- ncpus rounded up to the nearest power of 2 */ 161 if ((1 << shift) < ncpus) 162 ++shift; 163 ncpus_fit = 1 << shift; 164 ncpus_fit_mask = ncpus_fit - 1; 165 166 /* 167 * cpu0 initialization 168 */ 169 mycpu->gd_ipiq = (void *)kmem_alloc(&kernel_map, 170 sizeof(lwkt_ipiq) * ncpus); 171 bzero(mycpu->gd_ipiq, sizeof(lwkt_ipiq) * ncpus); 172 173 /* 174 * cpu 1-(n-1) 175 */ 176 start_all_aps(boot_address); 177 178 } 179 180 void 181 mp_announce(void) 182 { 183 int x; 184 185 kprintf("DragonFly/MP: Multiprocessor\n"); 186 kprintf(" cpu0 (BSP)\n"); 187 188 for (x = 1; x <= mp_naps; ++x) 189 kprintf(" cpu%d (AP)\n", x); 190 } 191 192 void 193 cpu_send_ipiq(int dcpu) 194 { 195 if (CPUMASK(dcpu) & smp_active_mask) 196 if (pthread_kill(ap_tids[dcpu], SIGUSR1) != 0) 197 panic("pthread_kill failed in cpu_send_ipiq"); 198 #if 0 199 panic("XXX cpu_send_ipiq()"); 200 #endif 201 } 202 203 void 204 smp_invltlb(void) 205 { 206 #ifdef SMP 207 #endif 208 } 209 210 void 211 single_cpu_ipi(int cpu, int vector, int delivery_mode) 212 { 213 kprintf("XXX single_cpu_ipi\n"); 214 } 215 216 void 217 selected_cpu_ipi(cpumask_t target, int vector, int delivery_mode) 218 { 219 crit_enter(); 220 while (target) { 221 int n = BSFCPUMASK(target); 222 target &= ~CPUMASK(n); 223 single_cpu_ipi(n, vector, delivery_mode); 224 } 225 crit_exit(); 226 } 227 228 int 229 stop_cpus(cpumask_t map) 230 { 231 map &= smp_active_mask; 232 233 crit_enter(); 234 while (map) { 235 int n = BSFCPUMASK(map); 236 map &= ~CPUMASK(n); 237 stopped_cpus |= CPUMASK(n); 238 if (pthread_kill(ap_tids[n], SIGXCPU) != 0) 239 panic("stop_cpus: pthread_kill failed"); 240 } 241 crit_exit(); 242 #if 0 243 panic("XXX stop_cpus()"); 244 #endif 245 246 return(1); 247 } 248 249 int 250 restart_cpus(cpumask_t map) 251 { 252 map &= smp_active_mask; 253 254 crit_enter(); 255 while (map) { 256 int n = BSFCPUMASK(map); 257 map &= ~CPUMASK(n); 258 stopped_cpus &= ~CPUMASK(n); 259 if (pthread_kill(ap_tids[n], SIGXCPU) != 0) 260 panic("restart_cpus: pthread_kill failed"); 261 } 262 crit_exit(); 263 #if 0 264 panic("XXX restart_cpus()"); 265 #endif 266 267 return(1); 268 } 269 270 void 271 ap_init(void) 272 { 273 /* 274 * Adjust smp_startup_mask to signal the BSP that we have started 275 * up successfully. Note that we do not yet hold the BGL. The BSP 276 * is waiting for our signal. 277 * 278 * We can't set our bit in smp_active_mask yet because we are holding 279 * interrupts physically disabled and remote cpus could deadlock 280 * trying to send us an IPI. 281 */ 282 smp_startup_mask |= CPUMASK(mycpu->gd_cpuid); 283 cpu_mfence(); 284 285 /* 286 * Interlock for finalization. Wait until mp_finish is non-zero, 287 * then get the MP lock. 288 * 289 * Note: We are in a critical section. 290 * 291 * Note: we are the idle thread, we can only spin. 292 * 293 * Note: The load fence is memory volatile and prevents the compiler 294 * from improperly caching mp_finish, and the cpu from improperly 295 * caching it. 296 */ 297 298 while (mp_finish == 0) { 299 cpu_lfence(); 300 DELAY(500000); 301 } 302 while (try_mplock() == 0) 303 DELAY(100000); 304 305 /* BSP may have changed PTD while we're waiting for the lock */ 306 cpu_invltlb(); 307 308 /* Build our map of 'other' CPUs. */ 309 mycpu->gd_other_cpus = smp_startup_mask & ~CPUMASK(mycpu->gd_cpuid); 310 311 kprintf("SMP: AP CPU #%d Launched!\n", mycpu->gd_cpuid); 312 313 314 /* Set memory range attributes for this CPU to match the BSP */ 315 mem_range_AP_init(); 316 /* 317 * Once we go active we must process any IPIQ messages that may 318 * have been queued, because no actual IPI will occur until we 319 * set our bit in the smp_active_mask. If we don't the IPI 320 * message interlock could be left set which would also prevent 321 * further IPIs. 322 * 323 * The idle loop doesn't expect the BGL to be held and while 324 * lwkt_switch() normally cleans things up this is a special case 325 * because we returning almost directly into the idle loop. 326 * 327 * The idle thread is never placed on the runq, make sure 328 * nothing we've done put it there. 329 */ 330 KKASSERT(get_mplock_count(curthread) == 1); 331 smp_active_mask |= CPUMASK(mycpu->gd_cpuid); 332 333 mdcpu->gd_fpending = 0; 334 mdcpu->gd_ipending = 0; 335 initclocks_pcpu(); /* clock interrupts (via IPIs) */ 336 lwkt_process_ipiq(); 337 338 /* 339 * Releasing the mp lock lets the BSP finish up the SMP init 340 */ 341 rel_mplock(); 342 KKASSERT((curthread->td_flags & TDF_RUNQ) == 0); 343 } 344 345 void 346 init_secondary(void) 347 { 348 int myid = bootAP; 349 struct mdglobaldata *md; 350 struct privatespace *ps; 351 352 ps = &CPU_prvspace[myid]; 353 354 KKASSERT(ps->mdglobaldata.mi.gd_prvspace == ps); 355 356 /* 357 * Setup the %gs for cpu #n. The mycpu macro works after this 358 * point. Note that %fs is used by pthreads. 359 */ 360 tls_set_gs(&CPU_prvspace[myid], sizeof(struct privatespace)); 361 362 md = mdcpu; /* loaded through %gs:0 (mdglobaldata.mi.gd_prvspace)*/ 363 364 /* JG */ 365 md->gd_common_tss.tss_rsp0 = 0; /* not used until after switch */ 366 //md->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL); 367 //md->gd_common_tss.tss_ioopt = (sizeof md->gd_common_tss) << 16; 368 369 /* 370 * Set to a known state: 371 * Set by mpboot.s: CR0_PG, CR0_PE 372 * Set by cpu_setregs: CR0_NE, CR0_MP, CR0_TS, CR0_WP, CR0_AM 373 */ 374 } 375 376 static int 377 start_all_aps(u_int boot_addr) 378 { 379 int x, i; 380 struct mdglobaldata *gd; 381 struct privatespace *ps; 382 vm_page_t m; 383 vm_offset_t va; 384 #if 0 385 struct lwp_params params; 386 #endif 387 388 /* 389 * needed for ipis to initial thread 390 * FIXME: rename ap_tids? 391 */ 392 ap_tids[0] = pthread_self(); 393 394 for (x = 1; x <= mp_naps; x++) 395 { 396 /* Allocate space for the CPU's private space. */ 397 for (i = 0; i < sizeof(struct mdglobaldata); i += PAGE_SIZE) { 398 va =(vm_offset_t)&CPU_prvspace[x].mdglobaldata + i; 399 m = vm_page_alloc(&kernel_object, va, VM_ALLOC_SYSTEM); 400 pmap_kenter_quick(va, m->phys_addr); 401 } 402 403 for (i = 0; i < sizeof(CPU_prvspace[x].idlestack); i += PAGE_SIZE) { 404 va =(vm_offset_t)&CPU_prvspace[x].idlestack + i; 405 m = vm_page_alloc(&kernel_object, va, VM_ALLOC_SYSTEM); 406 pmap_kenter_quick(va, m->phys_addr); 407 } 408 409 gd = &CPU_prvspace[x].mdglobaldata; /* official location */ 410 bzero(gd, sizeof(*gd)); 411 gd->mi.gd_prvspace = ps = &CPU_prvspace[x]; 412 413 /* prime data page for it to use */ 414 mi_gdinit(&gd->mi, x); 415 cpu_gdinit(gd, x); 416 417 #if 0 418 gd->gd_CMAP1 = pmap_kpte((vm_offset_t)CPU_prvspace[x].CPAGE1); 419 gd->gd_CMAP2 = pmap_kpte((vm_offset_t)CPU_prvspace[x].CPAGE2); 420 gd->gd_CMAP3 = pmap_kpte((vm_offset_t)CPU_prvspace[x].CPAGE3); 421 gd->gd_PMAP1 = pmap_kpte((vm_offset_t)CPU_prvspace[x].PPAGE1); 422 gd->gd_CADDR1 = ps->CPAGE1; 423 gd->gd_CADDR2 = ps->CPAGE2; 424 gd->gd_CADDR3 = ps->CPAGE3; 425 gd->gd_PADDR1 = (vpte_t *)ps->PPAGE1; 426 #endif 427 428 gd->mi.gd_ipiq = (void *)kmem_alloc(&kernel_map, sizeof(lwkt_ipiq) * (mp_naps + 1)); 429 bzero(gd->mi.gd_ipiq, sizeof(lwkt_ipiq) * (mp_naps + 1)); 430 431 /* 432 * Setup the AP boot stack 433 */ 434 bootSTK = &ps->idlestack[UPAGES*PAGE_SIZE/2]; 435 bootAP = x; 436 437 /* 438 * Setup the AP's lwp, this is the 'cpu' 439 * 440 * We have to make sure our signals are masked or the new LWP 441 * may pick up a signal that it isn't ready for yet. SMP 442 * startup occurs after SI_BOOT2_LEAVE_CRIT so interrupts 443 * have already been enabled. 444 */ 445 cpu_disable_intr(); 446 pthread_create(&ap_tids[x], NULL, start_ap, NULL); 447 cpu_enable_intr(); 448 449 while((smp_startup_mask & CPUMASK(x)) == 0) { 450 cpu_lfence(); /* XXX spin until the AP has started */ 451 DELAY(1000); 452 } 453 } 454 455 return(ncpus - 1); 456 } 457