1 /* 2 * Copyright (c) 2007 The DragonFly Project. All rights reserved. 3 * 4 * This code is derived from software contributed to The DragonFly Project 5 * by Matthew Dillon <dillon@backplane.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 3. Neither the name of The DragonFly Project nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific, prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 36 #include <sys/interrupt.h> 37 #include <sys/kernel.h> 38 #include <sys/memrange.h> 39 #include <sys/tls.h> 40 #include <sys/types.h> 41 #include <sys/vmm.h> 42 43 #include <vm/vm_extern.h> 44 #include <vm/vm_kern.h> 45 #include <vm/vm_object.h> 46 #include <vm/vm_page.h> 47 48 #include <sys/mplock2.h> 49 50 #include <machine/cpu.h> 51 #include <machine/cpufunc.h> 52 #include <machine/globaldata.h> 53 #include <machine/md_var.h> 54 #include <machine/pmap.h> 55 #include <machine/smp.h> 56 #include <machine/tls.h> 57 #include <machine/param.h> 58 59 #include <unistd.h> 60 #include <pthread.h> 61 #include <signal.h> 62 #include <stdio.h> 63 64 extern pt_entry_t *KPTphys; 65 66 extern int vmm_enabled; 67 68 volatile cpumask_t stopped_cpus; 69 cpumask_t smp_active_mask = 1; /* which cpus are ready for IPIs etc? */ 70 static int boot_address; 71 static cpumask_t smp_startup_mask = 1; /* which cpus have been started */ 72 int mp_naps; /* # of Applications processors */ 73 static int mp_finish; 74 75 /* Local data for detecting CPU TOPOLOGY */ 76 static int core_bits = 0; 77 static int logical_CPU_bits = 0; 78 79 /* function prototypes XXX these should go elsewhere */ 80 void bootstrap_idle(void); 81 void single_cpu_ipi(int, int, int); 82 void selected_cpu_ipi(cpumask_t, int, int); 83 #if 0 84 void ipi_handler(int); 85 #endif 86 87 pt_entry_t *SMPpt; 88 89 /* AP uses this during bootstrap. Do not staticize. */ 90 char *bootSTK; 91 static int bootAP; 92 93 94 /* XXX these need to go into the appropriate header file */ 95 static int start_all_aps(u_int); 96 void init_secondary(void); 97 void *start_ap(void *); 98 99 /* 100 * Get SMP fully working before we start initializing devices. 101 */ 102 static 103 void 104 ap_finish(void) 105 { 106 int i; 107 cpumask_t ncpus_mask = 0; 108 109 for (i = 1; i <= ncpus; i++) 110 ncpus_mask |= CPUMASK(i); 111 112 mp_finish = 1; 113 if (bootverbose) 114 kprintf("Finish MP startup\n"); 115 116 /* build our map of 'other' CPUs */ 117 mycpu->gd_other_cpus = smp_startup_mask & ~CPUMASK(mycpu->gd_cpuid); 118 119 /* 120 * Let the other cpu's finish initializing and build their map 121 * of 'other' CPUs. 122 */ 123 rel_mplock(); 124 while (smp_active_mask != smp_startup_mask) { 125 DELAY(100000); 126 cpu_lfence(); 127 } 128 129 while (try_mplock() == 0) 130 DELAY(100000); 131 if (bootverbose) 132 kprintf("Active CPU Mask: %08lx\n", (long)smp_active_mask); 133 } 134 135 SYSINIT(finishsmp, SI_BOOT2_FINISH_SMP, SI_ORDER_FIRST, ap_finish, NULL) 136 137 void * 138 start_ap(void *arg __unused) 139 { 140 init_secondary(); 141 setrealcpu(); 142 bootstrap_idle(); 143 144 return(NULL); /* NOTREACHED */ 145 } 146 147 /* storage for AP thread IDs */ 148 pthread_t ap_tids[MAXCPU]; 149 150 void 151 mp_start(void) 152 { 153 int shift; 154 ncpus = optcpus; 155 156 mp_naps = ncpus - 1; 157 158 /* ncpus2 -- ncpus rounded down to the nearest power of 2 */ 159 for (shift = 0; (1 << shift) <= ncpus; ++shift) 160 ; 161 --shift; 162 ncpus2_shift = shift; 163 ncpus2 = 1 << shift; 164 ncpus2_mask = ncpus2 - 1; 165 166 /* ncpus_fit -- ncpus rounded up to the nearest power of 2 */ 167 if ((1 << shift) < ncpus) 168 ++shift; 169 ncpus_fit = 1 << shift; 170 ncpus_fit_mask = ncpus_fit - 1; 171 172 /* 173 * cpu0 initialization 174 */ 175 mycpu->gd_ipiq = (void *)kmem_alloc(&kernel_map, 176 sizeof(lwkt_ipiq) * ncpus); 177 bzero(mycpu->gd_ipiq, sizeof(lwkt_ipiq) * ncpus); 178 179 /* 180 * cpu 1-(n-1) 181 */ 182 start_all_aps(boot_address); 183 184 } 185 186 void 187 mp_announce(void) 188 { 189 int x; 190 191 kprintf("DragonFly/MP: Multiprocessor\n"); 192 kprintf(" cpu0 (BSP)\n"); 193 194 for (x = 1; x <= mp_naps; ++x) 195 kprintf(" cpu%d (AP)\n", x); 196 } 197 198 void 199 cpu_send_ipiq(int dcpu) 200 { 201 if (CPUMASK(dcpu) & smp_active_mask) { 202 if (pthread_kill(ap_tids[dcpu], SIGUSR1) != 0) 203 panic("pthread_kill failed in cpu_send_ipiq"); 204 } 205 #if 0 206 panic("XXX cpu_send_ipiq()"); 207 #endif 208 } 209 210 void 211 single_cpu_ipi(int cpu, int vector, int delivery_mode) 212 { 213 kprintf("XXX single_cpu_ipi\n"); 214 } 215 216 void 217 selected_cpu_ipi(cpumask_t target, int vector, int delivery_mode) 218 { 219 crit_enter(); 220 while (target) { 221 int n = BSFCPUMASK(target); 222 target &= ~CPUMASK(n); 223 single_cpu_ipi(n, vector, delivery_mode); 224 } 225 crit_exit(); 226 } 227 228 int 229 stop_cpus(cpumask_t map) 230 { 231 map &= smp_active_mask; 232 233 crit_enter(); 234 while (map) { 235 int n = BSFCPUMASK(map); 236 map &= ~CPUMASK(n); 237 stopped_cpus |= CPUMASK(n); 238 if (pthread_kill(ap_tids[n], SIGXCPU) != 0) 239 panic("stop_cpus: pthread_kill failed"); 240 } 241 crit_exit(); 242 #if 0 243 panic("XXX stop_cpus()"); 244 #endif 245 246 return(1); 247 } 248 249 int 250 restart_cpus(cpumask_t map) 251 { 252 map &= smp_active_mask; 253 254 crit_enter(); 255 while (map) { 256 int n = BSFCPUMASK(map); 257 map &= ~CPUMASK(n); 258 stopped_cpus &= ~CPUMASK(n); 259 if (pthread_kill(ap_tids[n], SIGXCPU) != 0) 260 panic("restart_cpus: pthread_kill failed"); 261 } 262 crit_exit(); 263 #if 0 264 panic("XXX restart_cpus()"); 265 #endif 266 267 return(1); 268 } 269 void 270 ap_init(void) 271 { 272 /* 273 * Adjust smp_startup_mask to signal the BSP that we have started 274 * up successfully. Note that we do not yet hold the BGL. The BSP 275 * is waiting for our signal. 276 * 277 * We can't set our bit in smp_active_mask yet because we are holding 278 * interrupts physically disabled and remote cpus could deadlock 279 * trying to send us an IPI. 280 */ 281 smp_startup_mask |= CPUMASK(mycpu->gd_cpuid); 282 cpu_mfence(); 283 284 /* 285 * Interlock for finalization. Wait until mp_finish is non-zero, 286 * then get the MP lock. 287 * 288 * Note: We are in a critical section. 289 * 290 * Note: we are the idle thread, we can only spin. 291 * 292 * Note: The load fence is memory volatile and prevents the compiler 293 * from improperly caching mp_finish, and the cpu from improperly 294 * caching it. 295 */ 296 297 while (mp_finish == 0) { 298 cpu_lfence(); 299 DELAY(500000); 300 } 301 while (try_mplock() == 0) 302 DELAY(100000); 303 304 /* BSP may have changed PTD while we're waiting for the lock */ 305 cpu_invltlb(); 306 307 /* Build our map of 'other' CPUs. */ 308 mycpu->gd_other_cpus = smp_startup_mask & ~CPUMASK(mycpu->gd_cpuid); 309 310 kprintf("SMP: AP CPU #%d Launched!\n", mycpu->gd_cpuid); 311 312 313 /* Set memory range attributes for this CPU to match the BSP */ 314 mem_range_AP_init(); 315 /* 316 * Once we go active we must process any IPIQ messages that may 317 * have been queued, because no actual IPI will occur until we 318 * set our bit in the smp_active_mask. If we don't the IPI 319 * message interlock could be left set which would also prevent 320 * further IPIs. 321 * 322 * The idle loop doesn't expect the BGL to be held and while 323 * lwkt_switch() normally cleans things up this is a special case 324 * because we returning almost directly into the idle loop. 325 * 326 * The idle thread is never placed on the runq, make sure 327 * nothing we've done put it there. 328 */ 329 KKASSERT(get_mplock_count(curthread) == 1); 330 smp_active_mask |= CPUMASK(mycpu->gd_cpuid); 331 332 mdcpu->gd_fpending = 0; 333 mdcpu->gd_ipending = 0; 334 initclocks_pcpu(); /* clock interrupts (via IPIs) */ 335 lwkt_process_ipiq(); 336 337 /* 338 * Releasing the mp lock lets the BSP finish up the SMP init 339 */ 340 rel_mplock(); 341 KKASSERT((curthread->td_flags & TDF_RUNQ) == 0); 342 } 343 344 void 345 init_secondary(void) 346 { 347 int myid = bootAP; 348 struct mdglobaldata *md; 349 struct privatespace *ps; 350 351 ps = &CPU_prvspace[myid]; 352 353 KKASSERT(ps->mdglobaldata.mi.gd_prvspace == ps); 354 355 /* 356 * Setup the %gs for cpu #n. The mycpu macro works after this 357 * point. Note that %fs is used by pthreads. 358 */ 359 tls_set_gs(&CPU_prvspace[myid], sizeof(struct privatespace)); 360 361 md = mdcpu; /* loaded through %gs:0 (mdglobaldata.mi.gd_prvspace)*/ 362 363 /* JG */ 364 md->gd_common_tss.tss_rsp0 = 0; /* not used until after switch */ 365 //md->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL); 366 //md->gd_common_tss.tss_ioopt = (sizeof md->gd_common_tss) << 16; 367 368 /* 369 * Set to a known state: 370 * Set by mpboot.s: CR0_PG, CR0_PE 371 * Set by cpu_setregs: CR0_NE, CR0_MP, CR0_TS, CR0_WP, CR0_AM 372 */ 373 } 374 375 static int 376 start_all_aps(u_int boot_addr) 377 { 378 int x, i; 379 struct mdglobaldata *gd; 380 struct privatespace *ps; 381 vm_page_t m; 382 vm_offset_t va; 383 void *stack; 384 pthread_attr_t attr; 385 #if 0 386 struct lwp_params params; 387 #endif 388 389 /* 390 * needed for ipis to initial thread 391 * FIXME: rename ap_tids? 392 */ 393 ap_tids[0] = pthread_self(); 394 pthread_attr_init(&attr); 395 396 vm_object_hold(&kernel_object); 397 for (x = 1; x <= mp_naps; x++) 398 { 399 /* Allocate space for the CPU's private space. */ 400 for (i = 0; i < sizeof(struct mdglobaldata); i += PAGE_SIZE) { 401 va =(vm_offset_t)&CPU_prvspace[x].mdglobaldata + i; 402 m = vm_page_alloc(&kernel_object, va, VM_ALLOC_SYSTEM); 403 pmap_kenter_quick(va, m->phys_addr); 404 } 405 406 for (i = 0; i < sizeof(CPU_prvspace[x].idlestack); i += PAGE_SIZE) { 407 va =(vm_offset_t)&CPU_prvspace[x].idlestack + i; 408 m = vm_page_alloc(&kernel_object, va, VM_ALLOC_SYSTEM); 409 pmap_kenter_quick(va, m->phys_addr); 410 } 411 412 gd = &CPU_prvspace[x].mdglobaldata; /* official location */ 413 bzero(gd, sizeof(*gd)); 414 gd->mi.gd_prvspace = ps = &CPU_prvspace[x]; 415 416 /* prime data page for it to use */ 417 mi_gdinit(&gd->mi, x); 418 cpu_gdinit(gd, x); 419 420 #if 0 421 gd->gd_CMAP1 = pmap_kpte((vm_offset_t)CPU_prvspace[x].CPAGE1); 422 gd->gd_CMAP2 = pmap_kpte((vm_offset_t)CPU_prvspace[x].CPAGE2); 423 gd->gd_CMAP3 = pmap_kpte((vm_offset_t)CPU_prvspace[x].CPAGE3); 424 gd->gd_PMAP1 = pmap_kpte((vm_offset_t)CPU_prvspace[x].PPAGE1); 425 gd->gd_CADDR1 = ps->CPAGE1; 426 gd->gd_CADDR2 = ps->CPAGE2; 427 gd->gd_CADDR3 = ps->CPAGE3; 428 gd->gd_PADDR1 = (vpte_t *)ps->PPAGE1; 429 #endif 430 431 gd->mi.gd_ipiq = (void *)kmem_alloc(&kernel_map, sizeof(lwkt_ipiq) * (mp_naps + 1)); 432 bzero(gd->mi.gd_ipiq, sizeof(lwkt_ipiq) * (mp_naps + 1)); 433 434 /* 435 * Setup the AP boot stack 436 */ 437 bootSTK = &ps->idlestack[UPAGES*PAGE_SIZE/2]; 438 bootAP = x; 439 440 /* 441 * Setup the AP's lwp, this is the 'cpu' 442 * 443 * We have to make sure our signals are masked or the new LWP 444 * may pick up a signal that it isn't ready for yet. SMP 445 * startup occurs after SI_BOOT2_LEAVE_CRIT so interrupts 446 * have already been enabled. 447 */ 448 cpu_disable_intr(); 449 450 if (vmm_enabled) { 451 stack = mmap(NULL, KERNEL_STACK_SIZE, 452 PROT_READ|PROT_WRITE|PROT_EXEC, 453 MAP_ANON, -1, 0); 454 if (stack == MAP_FAILED) { 455 panic("Unable to allocate stack for thread %d\n", x); 456 } 457 pthread_attr_setstack(&attr, stack, KERNEL_STACK_SIZE); 458 } 459 460 pthread_create(&ap_tids[x], &attr, start_ap, NULL); 461 cpu_enable_intr(); 462 463 while((smp_startup_mask & CPUMASK(x)) == 0) { 464 cpu_lfence(); /* XXX spin until the AP has started */ 465 DELAY(1000); 466 } 467 } 468 vm_object_drop(&kernel_object); 469 pthread_attr_destroy(&attr); 470 471 return(ncpus - 1); 472 } 473 474 /* 475 * CPU TOPOLOGY DETECTION FUNCTIONS. 476 */ 477 478 void 479 detect_cpu_topology(void) 480 { 481 logical_CPU_bits = vkernel_b_arg; 482 core_bits = vkernel_B_arg; 483 } 484 485 int 486 get_chip_ID(int cpuid) 487 { 488 return get_apicid_from_cpuid(cpuid) >> 489 (logical_CPU_bits + core_bits); 490 } 491 492 int 493 get_core_number_within_chip(int cpuid) 494 { 495 return (get_apicid_from_cpuid(cpuid) >> logical_CPU_bits) & 496 ( (1 << core_bits) -1); 497 } 498 499 int 500 get_logical_CPU_number_within_core(int cpuid) 501 { 502 return get_apicid_from_cpuid(cpuid) & 503 ( (1 << logical_CPU_bits) -1); 504 } 505 506