xref: /dragonfly/sys/sys/pciio.h (revision 2cd2d2b5)
1 /*-
2  * Copyright (c) 1997, Stefan Esser <se@FreeBSD.ORG>
3  * Copyright (c) 1997, 1998, 1999, Kenneth D. Merry <ken@FreeBSD.ORG>
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice unmodified, this list of conditions, and the following
11  *    disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  *
27  *	$FreeBSD: src/sys/sys/pciio.h,v 1.5 1999/12/08 17:44:04 ken Exp $
28  *	$DragonFly: src/sys/sys/pciio.h,v 1.2 2003/06/17 04:28:58 dillon Exp $
29  *
30  */
31 
32 #ifndef _SYS_PCIIO_H_
33 #define	_SYS_PCIIO_H_
34 
35 #include <sys/ioccom.h>
36 
37 #define PCI_MAXNAMELEN	16
38 
39 typedef enum {
40 	PCI_GETCONF_LAST_DEVICE,
41 	PCI_GETCONF_LIST_CHANGED,
42 	PCI_GETCONF_MORE_DEVS,
43 	PCI_GETCONF_ERROR
44 } pci_getconf_status;
45 
46 typedef enum {
47 	PCI_GETCONF_NO_MATCH		= 0x00,
48 	PCI_GETCONF_MATCH_BUS		= 0x01,
49 	PCI_GETCONF_MATCH_DEV		= 0x02,
50 	PCI_GETCONF_MATCH_FUNC		= 0x04,
51 	PCI_GETCONF_MATCH_NAME		= 0x08,
52 	PCI_GETCONF_MATCH_UNIT		= 0x10,
53 	PCI_GETCONF_MATCH_VENDOR	= 0x20,
54 	PCI_GETCONF_MATCH_DEVICE	= 0x40,
55 	PCI_GETCONF_MATCH_CLASS		= 0x80
56 } pci_getconf_flags;
57 
58 struct pcisel {
59 	u_int8_t	pc_bus;		/* bus number */
60 	u_int8_t	pc_dev;		/* device on this bus */
61 	u_int8_t	pc_func;	/* function on this device */
62 };
63 
64 struct	pci_conf {
65 	struct pcisel	pc_sel;		/* bus+slot+function */
66 	u_int8_t	pc_hdr;		/* PCI header type */
67 	u_int16_t	pc_subvendor;	/* card vendor ID */
68 	u_int16_t	pc_subdevice;	/* card device ID, assigned by
69 					   card vendor */
70 	u_int16_t	pc_vendor;	/* chip vendor ID */
71 	u_int16_t	pc_device;	/* chip device ID, assigned by
72 					   chip vendor */
73 	u_int8_t	pc_class;	/* chip PCI class */
74 	u_int8_t	pc_subclass;	/* chip PCI subclass */
75 	u_int8_t	pc_progif;	/* chip PCI programming interface */
76 	u_int8_t	pc_revid;	/* chip revision ID */
77 	char		pd_name[PCI_MAXNAMELEN + 1];  /* device name */
78 	u_long		pd_unit;	/* device unit number */
79 };
80 
81 struct pci_match_conf {
82 	struct pcisel		pc_sel;		/* bus+slot+function */
83 	char			pd_name[PCI_MAXNAMELEN + 1];  /* device name */
84 	u_long			pd_unit;	/* Unit number */
85 	u_int16_t		pc_vendor;	/* PCI Vendor ID */
86 	u_int16_t		pc_device;	/* PCI Device ID */
87 	u_int8_t		pc_class;	/* PCI class */
88 	pci_getconf_flags	flags;		/* Matching expression */
89 };
90 
91 struct	pci_conf_io {
92 	u_int32_t		pat_buf_len;	/* pattern buffer length */
93 	u_int32_t		num_patterns;	/* number of patterns */
94 	struct pci_match_conf	*patterns;	/* pattern buffer */
95 	u_int32_t		match_buf_len;	/* match buffer length */
96 	u_int32_t		num_matches;	/* number of matches returned */
97 	struct pci_conf		*matches;	/* match buffer */
98 	u_int32_t		offset;		/* offset into device list */
99 	u_int32_t		generation;	/* device list generation */
100 	pci_getconf_status	status;		/* request status */
101 };
102 
103 struct pci_io {
104 	struct pcisel	pi_sel;		/* device to operate on */
105 	int		pi_reg;		/* configuration register to examine */
106 	int		pi_width;	/* width (in bytes) of read or write */
107 	u_int32_t	pi_data;	/* data to write or result of read */
108 };
109 
110 
111 #define	PCIOCGETCONF	_IOWR('p', 1, struct pci_conf_io)
112 #define	PCIOCREAD	_IOWR('p', 2, struct pci_io)
113 #define	PCIOCWRITE	_IOWR('p', 3, struct pci_io)
114 #define	PCIOCATTACHED	_IOWR('p', 4, struct pci_io)
115 
116 #endif /* !_SYS_PCIIO_H_ */
117