1 /* $NetBSD: h_io_assist.c,v 1.12 2020/09/05 07:22:26 maxv Exp $ */ 2 3 /* 4 * Copyright (c) 2018-2020 Maxime Villard, m00nbsd.net 5 * All rights reserved. 6 * 7 * This code is part of the NVMM hypervisor. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #include <stdio.h> 32 #include <stdlib.h> 33 #include <stdint.h> 34 #include <stdbool.h> 35 #include <unistd.h> 36 #include <string.h> 37 #include <err.h> 38 #include <errno.h> 39 #include <sys/types.h> 40 #include <sys/mman.h> 41 #include <machine/segments.h> 42 #include <machine/psl.h> 43 44 #include <nvmm.h> 45 46 #ifdef __NetBSD__ 47 48 #include <machine/pte.h> 49 #include <x86/specialreg.h> 50 51 #define PAGE_SIZE 4096 52 53 #else /* DragonFly */ 54 55 #include <machine/pmap.h> 56 #include <machine/specialreg.h> 57 58 #define PTE_P X86_PG_V /* 0x001: P (Valid) */ 59 #define PTE_W X86_PG_RW /* 0x002: R/W (Read/Write) */ 60 #define PSL_MBO PSL_RESERVED_DEFAULT /* 0x00000002 */ 61 #define SDT_SYS386BSY SDT_SYSBSY /* 11: system 64-bit TSS busy */ 62 63 #endif /* __NetBSD__ */ 64 65 #define IO_SIZE 128 66 67 static char iobuf[IO_SIZE]; 68 69 static char *databuf; 70 static uint8_t *instbuf; 71 72 static void 73 init_seg(struct nvmm_x64_state_seg *seg, int type, int sel) 74 { 75 seg->selector = sel; 76 seg->attrib.type = type; 77 seg->attrib.s = (type & 0b10000) != 0; 78 seg->attrib.dpl = 0; 79 seg->attrib.p = 1; 80 seg->attrib.avl = 1; 81 seg->attrib.l = 1; 82 seg->attrib.def = 0; 83 seg->attrib.g = 1; 84 seg->limit = 0x0000FFFF; 85 seg->base = 0x00000000; 86 } 87 88 static void 89 reset_machine(struct nvmm_machine *mach, struct nvmm_vcpu *vcpu) 90 { 91 struct nvmm_x64_state *state = vcpu->state; 92 93 memset(state, 0, sizeof(*state)); 94 95 /* Default. */ 96 state->gprs[NVMM_X64_GPR_RFLAGS] = PSL_MBO; 97 init_seg(&state->segs[NVMM_X64_SEG_CS], SDT_MEMERA, GSEL(GCODE_SEL, SEL_KPL)); 98 init_seg(&state->segs[NVMM_X64_SEG_SS], SDT_MEMRWA, GSEL(GDATA_SEL, SEL_KPL)); 99 init_seg(&state->segs[NVMM_X64_SEG_DS], SDT_MEMRWA, GSEL(GDATA_SEL, SEL_KPL)); 100 init_seg(&state->segs[NVMM_X64_SEG_ES], SDT_MEMRWA, GSEL(GDATA_SEL, SEL_KPL)); 101 init_seg(&state->segs[NVMM_X64_SEG_FS], SDT_MEMRWA, GSEL(GDATA_SEL, SEL_KPL)); 102 init_seg(&state->segs[NVMM_X64_SEG_GS], SDT_MEMRWA, GSEL(GDATA_SEL, SEL_KPL)); 103 104 /* Blank. */ 105 init_seg(&state->segs[NVMM_X64_SEG_GDT], 0, 0); 106 init_seg(&state->segs[NVMM_X64_SEG_IDT], 0, 0); 107 init_seg(&state->segs[NVMM_X64_SEG_LDT], SDT_SYSLDT, 0); 108 init_seg(&state->segs[NVMM_X64_SEG_TR], SDT_SYS386BSY, 0); 109 110 /* Protected mode enabled. */ 111 state->crs[NVMM_X64_CR_CR0] = CR0_PG|CR0_PE|CR0_NE|CR0_TS|CR0_MP|CR0_WP|CR0_AM; 112 113 /* 64bit mode enabled. */ 114 state->crs[NVMM_X64_CR_CR4] = CR4_PAE; 115 state->msrs[NVMM_X64_MSR_EFER] = EFER_LME | EFER_SCE | EFER_LMA; 116 117 /* Stolen from x86/pmap.c */ 118 #define PATENTRY(n, type) (type << ((n) * 8)) 119 #define PAT_UC 0x0ULL 120 #define PAT_WC 0x1ULL 121 #define PAT_WT 0x4ULL 122 #define PAT_WP 0x5ULL 123 #define PAT_WB 0x6ULL 124 #define PAT_UCMINUS 0x7ULL 125 state->msrs[NVMM_X64_MSR_PAT] = 126 PATENTRY(0, PAT_WB) | PATENTRY(1, PAT_WT) | 127 PATENTRY(2, PAT_UCMINUS) | PATENTRY(3, PAT_UC) | 128 PATENTRY(4, PAT_WB) | PATENTRY(5, PAT_WT) | 129 PATENTRY(6, PAT_UCMINUS) | PATENTRY(7, PAT_UC); 130 131 /* Page tables. */ 132 state->crs[NVMM_X64_CR_CR3] = 0x3000; 133 134 state->gprs[NVMM_X64_GPR_RIP] = 0x2000; 135 136 if (nvmm_vcpu_setstate(mach, vcpu, NVMM_X64_STATE_ALL) == -1) 137 err(errno, "nvmm_vcpu_setstate"); 138 } 139 140 static void 141 map_pages(struct nvmm_machine *mach) 142 { 143 pt_entry_t *L4, *L3, *L2, *L1; 144 int ret; 145 146 instbuf = mmap(NULL, PAGE_SIZE, PROT_READ|PROT_WRITE, MAP_ANON|MAP_PRIVATE, 147 -1, 0); 148 if (instbuf == MAP_FAILED) 149 err(errno, "mmap"); 150 databuf = mmap(NULL, PAGE_SIZE, PROT_READ|PROT_WRITE, MAP_ANON|MAP_PRIVATE, 151 -1, 0); 152 if (databuf == MAP_FAILED) 153 err(errno, "mmap"); 154 155 if (nvmm_hva_map(mach, (uintptr_t)instbuf, PAGE_SIZE) == -1) 156 err(errno, "nvmm_hva_map"); 157 if (nvmm_hva_map(mach, (uintptr_t)databuf, PAGE_SIZE) == -1) 158 err(errno, "nvmm_hva_map"); 159 ret = nvmm_gpa_map(mach, (uintptr_t)instbuf, 0x2000, PAGE_SIZE, 160 PROT_READ|PROT_EXEC); 161 if (ret == -1) 162 err(errno, "nvmm_gpa_map"); 163 ret = nvmm_gpa_map(mach, (uintptr_t)databuf, 0x1000, PAGE_SIZE, 164 PROT_READ|PROT_WRITE); 165 if (ret == -1) 166 err(errno, "nvmm_gpa_map"); 167 168 L4 = mmap(NULL, PAGE_SIZE, PROT_READ|PROT_WRITE, MAP_ANON|MAP_PRIVATE, 169 -1, 0); 170 if (L4 == MAP_FAILED) 171 err(errno, "mmap"); 172 L3 = mmap(NULL, PAGE_SIZE, PROT_READ|PROT_WRITE, MAP_ANON|MAP_PRIVATE, 173 -1, 0); 174 if (L3 == MAP_FAILED) 175 err(errno, "mmap"); 176 L2 = mmap(NULL, PAGE_SIZE, PROT_READ|PROT_WRITE, MAP_ANON|MAP_PRIVATE, 177 -1, 0); 178 if (L2 == MAP_FAILED) 179 err(errno, "mmap"); 180 L1 = mmap(NULL, PAGE_SIZE, PROT_READ|PROT_WRITE, MAP_ANON|MAP_PRIVATE, 181 -1, 0); 182 if (L1 == MAP_FAILED) 183 err(errno, "mmap"); 184 185 if (nvmm_hva_map(mach, (uintptr_t)L4, PAGE_SIZE) == -1) 186 err(errno, "nvmm_hva_map"); 187 if (nvmm_hva_map(mach, (uintptr_t)L3, PAGE_SIZE) == -1) 188 err(errno, "nvmm_hva_map"); 189 if (nvmm_hva_map(mach, (uintptr_t)L2, PAGE_SIZE) == -1) 190 err(errno, "nvmm_hva_map"); 191 if (nvmm_hva_map(mach, (uintptr_t)L1, PAGE_SIZE) == -1) 192 err(errno, "nvmm_hva_map"); 193 194 ret = nvmm_gpa_map(mach, (uintptr_t)L4, 0x3000, PAGE_SIZE, 195 PROT_READ|PROT_WRITE); 196 if (ret == -1) 197 err(errno, "nvmm_gpa_map"); 198 ret = nvmm_gpa_map(mach, (uintptr_t)L3, 0x4000, PAGE_SIZE, 199 PROT_READ|PROT_WRITE); 200 if (ret == -1) 201 err(errno, "nvmm_gpa_map"); 202 ret = nvmm_gpa_map(mach, (uintptr_t)L2, 0x5000, PAGE_SIZE, 203 PROT_READ|PROT_WRITE); 204 if (ret == -1) 205 err(errno, "nvmm_gpa_map"); 206 ret = nvmm_gpa_map(mach, (uintptr_t)L1, 0x6000, PAGE_SIZE, 207 PROT_READ|PROT_WRITE); 208 if (ret == -1) 209 err(errno, "nvmm_gpa_map"); 210 211 memset(L4, 0, PAGE_SIZE); 212 memset(L3, 0, PAGE_SIZE); 213 memset(L2, 0, PAGE_SIZE); 214 memset(L1, 0, PAGE_SIZE); 215 216 L4[0] = PTE_P | PTE_W | 0x4000; 217 L3[0] = PTE_P | PTE_W | 0x5000; 218 L2[0] = PTE_P | PTE_W | 0x6000; 219 L1[0x2000 / PAGE_SIZE] = PTE_P | PTE_W | 0x2000; 220 L1[0x1000 / PAGE_SIZE] = PTE_P | PTE_W | 0x1000; 221 } 222 223 /* -------------------------------------------------------------------------- */ 224 225 static size_t iobuf_off = 0; 226 227 static void 228 io_callback(struct nvmm_io *io) 229 { 230 if (io->port != 123) { 231 printf("Wrong port\n"); 232 exit(-1); 233 } 234 235 if (io->in) { 236 memcpy(io->data, iobuf + iobuf_off, io->size); 237 } else { 238 memcpy(iobuf + iobuf_off, io->data, io->size); 239 } 240 iobuf_off += io->size; 241 242 } 243 244 static int 245 handle_io(struct nvmm_machine *mach, struct nvmm_vcpu *vcpu) 246 { 247 int ret; 248 249 ret = nvmm_assist_io(mach, vcpu); 250 if (ret == -1) { 251 err(errno, "nvmm_assist_io"); 252 } 253 254 return 0; 255 } 256 257 static void 258 run_machine(struct nvmm_machine *mach, struct nvmm_vcpu *vcpu) 259 { 260 struct nvmm_vcpu_exit *exit = vcpu->exit; 261 262 while (1) { 263 if (nvmm_vcpu_run(mach, vcpu) == -1) 264 err(errno, "nvmm_vcpu_run"); 265 266 switch (exit->reason) { 267 case NVMM_VCPU_EXIT_NONE: 268 break; 269 270 case NVMM_VCPU_EXIT_RDMSR: 271 /* Stop here. */ 272 return; 273 274 case NVMM_VCPU_EXIT_IO: 275 handle_io(mach, vcpu); 276 break; 277 278 case NVMM_VCPU_EXIT_SHUTDOWN: 279 printf("Shutting down!\n"); 280 return; 281 282 default: 283 printf("Invalid!\n"); 284 return; 285 } 286 } 287 } 288 289 /* -------------------------------------------------------------------------- */ 290 291 struct test { 292 const char *name; 293 uint8_t *code_begin; 294 uint8_t *code_end; 295 const char *wanted; 296 bool in; 297 }; 298 299 static void 300 run_test(struct nvmm_machine *mach, struct nvmm_vcpu *vcpu, 301 const struct test *test) 302 { 303 size_t size; 304 char *res; 305 306 size = (size_t)test->code_end - (size_t)test->code_begin; 307 308 reset_machine(mach, vcpu); 309 310 iobuf_off = 0; 311 memset(iobuf, 0, IO_SIZE); 312 memset(databuf, 0, PAGE_SIZE); 313 memcpy(instbuf, test->code_begin, size); 314 315 if (test->in) { 316 strcpy(iobuf, test->wanted); 317 } else { 318 strcpy(databuf, test->wanted); 319 } 320 321 run_machine(mach, vcpu); 322 323 if (test->in) { 324 res = databuf; 325 } else { 326 res = iobuf; 327 } 328 329 if (!strcmp(res, test->wanted)) { 330 printf("Test '%s' passed\n", test->name); 331 } else { 332 printf("Test '%s' failed, wanted '%s', got '%s'\n", test->name, 333 test->wanted, res); 334 } 335 } 336 337 /* -------------------------------------------------------------------------- */ 338 339 extern uint8_t test1_begin, test1_end; 340 extern uint8_t test2_begin, test2_end; 341 extern uint8_t test3_begin, test3_end; 342 extern uint8_t test4_begin, test4_end; 343 extern uint8_t test5_begin, test5_end; 344 extern uint8_t test6_begin, test6_end; 345 extern uint8_t test7_begin, test7_end; 346 extern uint8_t test8_begin, test8_end; 347 extern uint8_t test9_begin, test9_end; 348 extern uint8_t test10_begin, test10_end; 349 extern uint8_t test11_begin, test11_end; 350 extern uint8_t test12_begin, test12_end; 351 352 static const struct test tests[] = { 353 { "test1 - INB", &test1_begin, &test1_end, "12", true }, 354 { "test2 - INW", &test2_begin, &test2_end, "1234", true }, 355 { "test3 - INL", &test3_begin, &test3_end, "12345678", true }, 356 { "test4 - INSB+REP", &test4_begin, &test4_end, "12345", true }, 357 { "test5 - INSW+REP", &test5_begin, &test5_end, 358 "Comment est votre blanquette", true }, 359 { "test6 - INSL+REP", &test6_begin, &test6_end, 360 "123456789abcdefghijklmnopqrs", true }, 361 { "test7 - OUTB", &test7_begin, &test7_end, "12", false }, 362 { "test8 - OUTW", &test8_begin, &test8_end, "1234", false }, 363 { "test9 - OUTL", &test9_begin, &test9_end, "12345678", false }, 364 { "test10 - OUTSB+REP", &test10_begin, &test10_end, "12345", false }, 365 { "test11 - OUTSW+REP", &test11_begin, &test11_end, 366 "Ah, Herr Bramard", false }, 367 { "test12 - OUTSL+REP", &test12_begin, &test12_end, 368 "123456789abcdefghijklmnopqrs", false }, 369 { NULL, NULL, NULL, NULL, false } 370 }; 371 372 static struct nvmm_assist_callbacks callbacks = { 373 .io = io_callback, 374 .mem = NULL 375 }; 376 377 /* 378 * 0x1000: Data, mapped 379 * 0x2000: Instructions, mapped 380 * 0x3000: L4 381 * 0x4000: L3 382 * 0x5000: L2 383 * 0x6000: L1 384 */ 385 int main(int argc, char *argv[]) 386 { 387 struct nvmm_machine mach; 388 struct nvmm_vcpu vcpu; 389 size_t i; 390 391 if (nvmm_init() == -1) 392 err(errno, "nvmm_init"); 393 if (nvmm_machine_create(&mach) == -1) 394 err(errno, "nvmm_machine_create"); 395 if (nvmm_vcpu_create(&mach, 0, &vcpu) == -1) 396 err(errno, "nvmm_vcpu_create"); 397 nvmm_vcpu_configure(&mach, &vcpu, NVMM_VCPU_CONF_CALLBACKS, &callbacks); 398 map_pages(&mach); 399 400 for (i = 0; tests[i].name != NULL; i++) { 401 run_test(&mach, &vcpu, &tests[i]); 402 } 403 404 return 0; 405 } 406