1/*
2 * Copyright (c) 2018-2021 Maxime Villard, m00nbsd.net
3 * All rights reserved.
4 *
5 * This code is part of the NVMM hypervisor.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29	.globl	test1_begin, test1_end
30	.globl	test2_begin, test2_end
31	.globl	test3_begin, test3_end
32	.globl	test4_begin, test4_end
33	.globl	test5_begin, test5_end
34	.globl	test6_begin, test6_end
35	.globl	test7_begin, test7_end
36	.globl	test8_begin, test8_end
37	.globl	test9_begin, test9_end
38	.globl	test10_begin, test10_end
39	.globl	test11_begin, test11_end
40	.globl	test12_begin, test12_end
41	.globl	test13_begin, test13_end
42	.globl	test14_begin, test14_end
43	.globl	test_64bit_15_begin, test_64bit_15_end
44	.globl	test_64bit_16_begin, test_64bit_16_end
45	.text
46	.code64
47
48#define TEST_END	\
49	movq	$0xFFFFFFFFFFFFFFFF,%rcx;	\
50	rdmsr	;
51
52	.align	64
53test1_begin:
54	movq	$0x1000,%rax
55	movq	$0x1000,%rbp
56
57	movq	$0x1000,(%rax)
58
59	movq	$1,%r11
60	movq	$0x2000,(%rax,%r11,8)
61
62	movq	(%rbp),%r8
63	movq	8(%rbp),%rbx
64	addq	%rbx,%r8
65	movq	%r8,(%rbp)
66	movb	$4,(%rbp)
67
68	TEST_END
69test1_end:
70
71	.align	64
72test2_begin:
73	movq	$0x1000,%rax
74
75	movq	$0x1000,(%rax)
76	movq	$0x00FF,%rbx
77	orb	%bl,(%rax)
78	movq	$0x0400,%rcx
79	orw	%cx,(%rax)
80
81	movq	$0x0200,%rcx
82	orq	(%rax),%rcx
83	movq	%rcx,(%rax)
84
85	TEST_END
86test2_end:
87
88	.align	64
89test3_begin:
90	movq	$0x1000,%rax
91
92	movq	$0x1FFF,(%rax)
93	movq	$0x1FF0,%rbx
94	andq	%rbx,(%rax)
95	movq	$0x10C1,%rcx
96	andb	%cl,(%rax)
97
98	TEST_END
99test3_end:
100
101	.align	64
102test4_begin:
103	movq	$0x1000,%rax
104
105	movq	$0x1FFF,(%rax)
106	movq	$0x1FF0,%rbx
107	xorq	%rbx,(%rax)
108	movq	$0x10C0,%rcx
109	xorw	%cx,(%rax)
110
111	TEST_END
112test4_end:
113
114	.align	64
115test5_begin:
116	movq	$0xFFFFFFFF00001000,%rax
117
118	movq	$0x1FFF,(%eax)
119	movb	$0,(%eax,%ebx,1)
120
121	TEST_END
122test5_end:
123
124	.align	64
125test6_begin:
126	movq	$0xFFA0,%rax
127	movabs	%rax,0x1000
128
129	movabs	0x1000,%al
130	orb	$0x0B,%al
131	movabs	%al,0x1000
132
133	TEST_END
134test6_end:
135
136	.align	64
137test7_begin:
138	movq	$0x56,%rax
139
140	movq	$1,%rcx
141	movq	$0x1000,%rdi
142	rep	stosb
143
144	movq	$0x1234,%rax
145	stosw
146
147	TEST_END
148test7_end:
149
150	.align	64
151test8_begin:
152	movq	$0x1008,%rsi
153	movq	$0x12345678,(%rsi)
154
155	movq	$0x1000,%rdi
156
157	lodsw
158	movw	%ax,(%rdi)
159	addq	$2,%rdi
160
161	lodsb
162	movb	%al,(%rdi)
163	addq	$1,%rdi
164
165	lodsb
166	movb	%al,(%rdi)
167	addq	$2,%rdi
168
169	TEST_END
170test8_end:
171
172	.align	64
173test9_begin:
174	movq	$0x1000,%rax
175
176	movq	$0x12345678,8(%rax)
177
178	movq	$0x1008,%rsi
179	movq	$0x1000,%rdi
180
181	movq	$4,%rcx
182	rep movsb
183
184	movq	$2,%rcx
185	rep movsw
186
187	TEST_END
188test9_end:
189
190	.align	64
191test10_begin:
192	movq	$0x1000,%rax
193	movq	$0x12345678,(%rax)
194
195	movq	$0xFFFFFFFFFFFFFFFF,%rbx
196	movzbl	(%rax),%ebx
197	movq	%rbx,(%rax)
198
199	TEST_END
200test10_end:
201
202	.align	64
203test11_begin:
204	movq	$0x1000,%rax
205	movq	$0x12345678,(%rax)
206
207	movq	$0xFFFFFFFFFFFFFFFF,%rbx
208	movzwq	(%rax),%rbx
209	movq	%rbx,(%rax)
210
211	TEST_END
212test11_end:
213
214	.align	64
215test12_begin:
216	movq	$0x1000,%rax
217	movq	$0xFFFFFFFFF2345678,(%rax)
218
219	cmpb	$0x78,(%rax)
220	jne	.L12_failure
221	cmpb	$0x77,(%rax)
222	jl	.L12_failure
223	cmpb	$0x79,(%rax)
224	jg	.L12_failure
225
226	cmpw	$0x5678,(%rax)
227	jne	.L12_failure
228	cmpw	$0x5677,(%rax)
229	jl	.L12_failure
230	cmpw	$0x5679,(%rax)
231	jg	.L12_failure
232
233	cmpl	$0xF2345678,(%rax)
234	jne	.L12_failure
235	cmpl	$0xF2345677,(%rax)
236	jl	.L12_failure
237	cmpl	$0xF2345679,(%rax)
238	jg	.L12_failure
239
240	cmpq	$0xFFFFFFFFF2345678,(%rax)
241	jne	.L12_failure
242	cmpq	$0xFFFFFFFFF2345677,(%rax)
243	jl	.L12_failure
244	cmpq	$0xFFFFFFFFF2345679,(%rax)
245	jg	.L12_failure
246
247.L12_success:
248	movq	$1,(%rax)
249	TEST_END
250.L12_failure:
251	movq	$0,(%rax)
252	TEST_END
253test12_end:
254
255	.align	64
256test13_begin:
257	movq	$0x1000,%rax
258	movq	$0x000000001000A0FF,(%rax)
259
260	movq	$0xFFFF,%rcx
261	subb	%cl,(%rax)
262
263	movq	$0xA000,%rcx
264	subw	%cx,(%rax)
265
266	movq	$0x0000000F1000A0FF,%rcx
267	subq	(%rax),%rcx
268
269	movq	%rcx,(%rax)
270
271	TEST_END
272test13_end:
273
274	.align	64
275test14_begin:
276	movq	$0x1000,%rax
277	movq	$0xA0FF,(%rax)
278
279	testb	$0x0F,(%rax)
280	jz	.L14_failure
281
282	testw	$0x0F00,(%rax)
283	jnz	.L14_failure
284
285	testl	$0xA000,(%rax)
286	jz	.L14_failure
287
288.L14_success:
289	movq	$1,(%rax)
290	TEST_END
291.L14_failure:
292	movq	$0,(%rax)
293	TEST_END
294test14_end:
295
296	.align	64
297test_64bit_15_begin:
298	movq	$0x1000,%rax
299	movq	$0x120000,%rbx
300	movq	$0x003400,%rcx
301	movq	$0x000056,%rdx
302
303	xchgq	%rbx,(%rax)
304	xchgw	(%rax),%cx
305	xchgb	%dl,(%rax)
306
307	TEST_END
308test_64bit_15_end:
309
310	.align	64
311test_64bit_16_begin:
312	movq	$0x1000,%rax
313	movq	$0x000000,%rbx
314	movq	$0x000000,%rcx
315	movq	$0x000000,%rdx
316
317	movq	$0x123456,(%rax)
318	xchgq	%rbx,(%eax)
319	movq	$0,(%rax)
320	xchgq	%rbx,(%eax)
321
322	TEST_END
323test_64bit_16_end:
324
325/* -------------------------------------------------------------------------- */
326
327	.globl	test_16bit_1_begin, test_16bit_1_end
328	.globl	test_16bit_2_begin, test_16bit_2_end
329	.globl	test_16bit_3_begin, test_16bit_3_end
330	.globl	test_16bit_4_begin, test_16bit_4_end
331	.globl	test_16bit_5_begin, test_16bit_5_end
332	.globl	test_16bit_6_begin, test_16bit_6_end
333
334#define TEST16_END	\
335	rdmsr
336
337	.code16
338
339	.align	64
340test_16bit_1_begin:
341	movw	$0x10f1,%bx
342	movw	$0x123,%dx
343
344	movb	%dl,(%bx)
345
346	TEST16_END
347test_16bit_1_end:
348
349	.align	64
350test_16bit_2_begin:
351	movw	$0x10f1,%bx
352	movw	$2,%di
353	movw	$0x123,%dx
354
355	movw	%dx,(%bx,%di)
356
357	TEST16_END
358test_16bit_2_end:
359
360	.align	64
361test_16bit_3_begin:
362	movw	$0x10f1,%bp
363	movw	$2,%si
364	movw	$0x678,%dx
365
366	movw	%dx,-2(%bp,%si)
367
368	TEST16_END
369test_16bit_3_end:
370
371	.align	64
372test_16bit_4_begin:
373	movw	$0x10f0,%bp
374	movw	$2,%si
375	movw	$2+4+4,%di
376	movw	$0xFFFF,%dx
377	movl	$0x0001,%eax
378	movl	$0x0010,%ebx
379	movl	$0x1000,%ecx
380
381	movw	%dx,4(%bp,%si)		/* 16bit opr 16bit adr */
382	andl	%eax,4(%bp,%si)		/* 32bit opr 16bit adr */
383	orw	%bx,4(%ebp,%esi)	/* 16bit opr 32bit adr */
384	orl	%ecx,-4(%bp,%di)	/* 32bit opr 16bit adr, negative */
385
386	TEST16_END
387test_16bit_4_end:
388
389	.align	64
390test_16bit_5_begin:
391	movb	$0x12,0x1234
392
393	TEST16_END
394test_16bit_5_end:
395
396	.align	64
397test_16bit_6_begin:
398	movw	$0x1234,%bp
399	movw	$4,%di
400	movw	$0x1200,%bx
401	movw	$0x0034,%cx
402
403	xchgw	%bx,(%bp)
404	xchgb	-4(%bp,%di),%cl
405
406	TEST16_END
407test_16bit_6_end:
408